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author | Spencer Oliver <spen@spen-soft.co.uk> | 2012-12-04 11:32:49 +0000 |
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committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2012-12-30 11:34:14 +0000 |
commit | 54a8640df0420185962e1c31936f2c691de4167a (patch) | |
tree | 0e30e6b38341a2f6f07cab3b1bc5d65851523dcd /tcl/target | |
parent | f82798c8144af9a749d80b9eb844789f97ff5bcf (diff) | |
download | riscv-openocd-54a8640df0420185962e1c31936f2c691de4167a.zip riscv-openocd-54a8640df0420185962e1c31936f2c691de4167a.tar.gz riscv-openocd-54a8640df0420185962e1c31936f2c691de4167a.tar.bz2 |
cfg: enable stlink stm32l HSI
Switch to using the internal HSI when a reset init is called, this also
matches the std stm32l cfg.
Read (verify) speed is increased from 17 to 120 KiB/s.
Change-Id: Ic94ba85949ffdefa17b7be45eef14e30f941d107
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1004
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'tcl/target')
-rw-r--r-- | tcl/target/stm32lx_stlink.cfg | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/tcl/target/stm32lx_stlink.cfg b/tcl/target/stm32lx_stlink.cfg index f9211d2..ed9865d 100644 --- a/tcl/target/stm32lx_stlink.cfg +++ b/tcl/target/stm32lx_stlink.cfg @@ -18,3 +18,18 @@ source [find target/stm32_stlink.cfg] set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME + +proc stm32l_enable_HSI {} { + # Enable HSI as clock source + echo "STM32L: Enabling HSI" + + # Set HSION in RCC_CR + mww 0x40023800 0x00000101 + + # Set HSI as SYSCLK + mww 0x40023808 0x00000001 +} + +$_TARGETNAME configure -event reset-init { + stm32l_enable_HSI +} |