aboutsummaryrefslogtreecommitdiff
path: root/tcl/target
diff options
context:
space:
mode:
authorJim Norris <u17263@att.net>2012-03-01 21:08:54 -0600
committerSpencer Oliver <spen@spen-soft.co.uk>2012-03-06 13:31:59 +0000
commit0ab3f83667718e43142222499b7d6a464fe444c6 (patch)
tree59658134b011ca390fe2543b94193b199477b91e /tcl/target
parent4b4ce4f27e26b38807b65cce8fd6961e28a7733f (diff)
downloadriscv-openocd-0ab3f83667718e43142222499b7d6a464fe444c6.zip
riscv-openocd-0ab3f83667718e43142222499b7d6a464fe444c6.tar.gz
riscv-openocd-0ab3f83667718e43142222499b7d6a464fe444c6.tar.bz2
Add new configuration files for the Diolan LPC-4350-DB1 development
board with the NXP LPC4350 processor. Change-Id: I0843e96af9ca05d3e598e2e16eb19fc0581ab46d Signed-off-by: Jim Norris <u17263@att.net> Reviewed-on: http://openocd.zylin.com/501 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/target')
-rw-r--r--tcl/target/lpc4350.cfg44
1 files changed, 44 insertions, 0 deletions
diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg
new file mode 100644
index 0000000..63d1307
--- /dev/null
+++ b/tcl/target/lpc4350.cfg
@@ -0,0 +1,44 @@
+
+adapter_khz 500
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lpc4350
+}
+
+#
+# M4 JTAG mode TAP
+#
+if { [info exists M4_JTAG_TAPID] } {
+ set _M4_JTAG_TAPID $M4_JTAG_TAPID
+} else {
+ set _M4_JTAG_TAPID 0x4ba00477
+}
+
+#
+# M4 SWD mode TAP
+#
+if { [info exists M4_SWD_TAPID] } {
+ set _M4_SWD_TAPID $M4_SWD_TAPID
+} else {
+ set _M4_SWD_TAPID 0x2ba01477
+}
+
+#
+# M0 TAP
+#
+if { [info exists M0_JTAG_TAPID] } {
+ set _M0_JTAG_TAPID $M0_JTAG_TAPID
+} else {
+ set _M0_JTAG_TAPID 0x0ba01477
+}
+
+jtag newtap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
+ -expected-id $_M4_JTAG_TAPID
+
+jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
+ -expected-id $_M0_JTAG_TAPID
+
+target create $_CHIPNAME.m4 cortex_m3 -chain-position $_CHIPNAME.m4
+target create $_CHIPNAME.m0 cortex_m3 -chain-position $_CHIPNAME.m0