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authorChristoph Pittracher <pitt@segfault.info>2015-06-04 09:25:10 +0200
committerSpencer Oliver <spen@spen-soft.co.uk>2015-08-06 13:16:02 +0100
commite3f8db54e67b503011f624db490964dba9399597 (patch)
tree008e6243913efeb9a09d049ec2d2466547ed0acb /tcl/interface
parent33d220d10a069be34095313f51ae22052a079b34 (diff)
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bcm2835gpio: Add SWD support, Raspberry Pi 2 support.
Added support for SWD transport similar to sysfsgpio driver. Added configurable peripheral base address to support Raspberry Pi 2. Change-Id: If76d45fbe74ce49f1f22af72e5f246e973237e04 Signed-off-by: Christoph Pittracher <pitt@segfault.info> Reviewed-on: http://openocd.zylin.com/2802 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/interface')
-rw-r--r--tcl/interface/raspberrypi-native.cfg2
-rw-r--r--tcl/interface/raspberrypi2-native.cfg42
2 files changed, 44 insertions, 0 deletions
diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-native.cfg
index 058d80b..6b73f35 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-native.cfg
@@ -10,6 +10,8 @@
interface bcm2835gpio
+bcm2835gpio_peripheral_base 0x20000000
+
# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
# These depend on system clock, calibrated for stock 700MHz
# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET
diff --git a/tcl/interface/raspberrypi2-native.cfg b/tcl/interface/raspberrypi2-native.cfg
new file mode 100644
index 0000000..f846fa2
--- /dev/null
+++ b/tcl/interface/raspberrypi2-native.cfg
@@ -0,0 +1,42 @@
+#
+# Config for using Raspberry Pi's expansion header
+#
+# This is best used with a fast enough buffer but also
+# is suitable for direct connection if the target voltage
+# matches RPi's 3.3V and the cable is short enough.
+#
+# Do not forget the GND connection, pin 6 of the expansion header.
+#
+
+interface bcm2835gpio
+
+bcm2835gpio_peripheral_base 0x3F000000
+
+# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
+# These depend on system clock, calibrated for stock 700MHz
+# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET
+bcm2835gpio_speed_coeffs 146203 36
+
+# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
+# Header pin numbers: 23 22 19 21
+# bcm2835gpio_jtag_nums 11 25 10 9
+
+# or if you have both connected,
+# reset_config trst_and_srst srst_push_pull
+
+# Each of the SWD lines need a gpio number set: swclk swdio
+# Header pin numbers: 22 18
+bcm2835gpio_swd_nums 25 24
+
+# If you define trst or srst, use appropriate reset_config
+# Header pin numbers: TRST - 26, SRST - 18
+
+# bcm2835gpio_trst_num 7
+# reset_config trst_only
+
+bcm2835gpio_srst_num 18
+reset_config srst_only srst_push_pull
+
+# or if you have both connected,
+# reset_config trst_and_srst srst_push_pull
+