Merge branch 'master' into from_upstream

Change-Id: I036350ee06aa396344fb8a80c7dba148ec24c9c8

5 files changed, 251 insertions, 0 deletions

diff --git a/tcl/board/arm_musca_a.cfg b/tcl/board/arm_musca_a.cfg
new file mode 100644
index 0000000..fa7cf5e
--- /dev/null
+++ b/tcl/board/arm_musca_a.cfg
@@ -0,0 +1,44 @@
+#
+# Configuration script for ARM Musca-A development board
+#
+# For now we do not support Musca A flash programming using OpenOCD. However, a
+# work area is configured for flash programming speed up.
+#
+# GDB considers all memory as RAM unless target supplies a memory map.
+# OpenOCD will only send memory map if flash banks are configured. Otherwise,
+# configure GDB after connection by issuing following commands:
+# (gdb) mem 0x10200000 0x109FFFFF ro
+# (gdb) mem 0x00200000 0x009FFFFF ro
+# (gdb) set mem inaccessible-by-default off
+
+# ARM Musca A board supports both JTAG and SWD transports.
+source [find target/swj-dp.tcl]
+
+# set a safe JTAG clock speed, can be overridden
+adapter_khz 1000
+
+global _CHIPNAME
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME MUSCA_A
+}
+
+if { [info exists CPUTAPID] } {
+	set _CPUTAPID $CPUTAPID
+} else {
+	set _CPUTAPID 0x6ba00477
+}
+
+# Enable CPU1 debugging as a separate GDB target
+set _ENABLE_CPU1 1
+
+# Musca A1 has 32KB SRAM banks. Override default work-area-size to 8KB per CPU
+set WORKAREASIZE_CPU0 0x2000
+set WORKAREASIZE_CPU1 0x2000
+
+# Set SRAM bank 1 to be used for work area. Override here if needed.
+set WORKAREAADDR_CPU0 0x30008000
+set WORKAREAADDR_CPU1 0x3000A000
+
+source [find target/arm_corelink_sse200.cfg]
diff --git a/tcl/board/kindle2.cfg b/tcl/board/kindle2.cfg
new file mode 100644
index 0000000..f32b2a3
--- /dev/null
+++ b/tcl/board/kindle2.cfg
@@ -0,0 +1,181 @@
+# Board configuration file for Amazon Kindle Model No. D00701 and D00801
+# AKA Kindle 2nd generation and Kindle DX
+# using a Freescale MCIMX31LDVKN5D i.MX31 processor
+#
+# Pins at J9 40-Pin FFC-A:
+#  1 - GND
+# 16 - TRSTB
+# 17 - TDI
+# 18 - TMS
+# 19 - TCK
+# 20 - RTCK
+# 21 - TDO
+# 22 - DE
+# 25 - BOOT_MODE4
+# 27 - BOOT_MODE2
+
+source [find target/imx31.cfg]
+source [find target/imx.cfg]
+
+$_TARGETNAME configure -event reset-init { kindle2_init }
+$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
+
+# 8MiB NOR Flash
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0xa0000000 0x800000 2 2 $_TARGETNAME
+
+# 16kiB internal SRAM
+$_TARGETNAME configure -work-area-phys 0x1fffc000 \
+	-work-area-size 0x4000 -work-area-backup 0
+
+# FIXME: currently SRST is not wired to the system
+reset_config trst_only
+jtag_ntrst_assert_width 10
+jtag_ntrst_delay 30
+
+# this is broken but enabled by default
+arm11 memwrite burst disable
+
+adapter_khz 1000
+ftdi_tdo_sample_edge falling
+
+proc kindle2_init {} {
+	imx3x_reset
+	kindle2_clock_setup
+	disable_mmu_and_cache
+	kindle2_misc_init
+	kindle2_sdram_init
+	arm core_state arm
+}
+
+proc kindle2_clock_setup {} {
+	# CCMR: clock from FPM/CKIL
+	mww 0x53f80000  0x074b0b7b
+	# IPU_CONF
+	mww 0x53fc0000  0x040
+	# 398MHz
+	mww 0x53f80004 0xff871650
+	mww 0x53f80010 0x00331c23
+}
+
+proc kindle2_misc_init { } {
+	# AIPS1
+	mww 0x43f00040 0x0
+	mww 0x43f00044 0x0
+	mww 0x43f00048 0x0
+	mww 0x43f0004c 0x0
+	mww 0x43f00050 0x0
+	mww 0x43f00000 0x77777777
+	mww 0x43f00004 0x77777777
+
+	# AIPS2
+	mww 0x53f00040 0x0
+	mww 0x53f00044 0x0
+	mww 0x53f00048 0x0
+	mww 0x53f0004c 0x0
+	mww 0x53f00050 0x0
+	mww 0x53f00000 0x77777777
+	mww 0x53f00004 0x77777777
+
+	# Start 16 bit NorFlash Initialization on CS0
+	mww 0xb8002000 0x0000cc03
+	mww 0xb8002004 0xa0330d01
+	mww 0xb8002008 0x00220800
+}
+
+proc disable_mmu_and_cache {} {
+	# Mode Supervisor, disable FIQ, IRQ and imprecise data aborts
+	reg cpsr 0x1d3
+
+	# flush entire BTAC
+	arm mcr 15 0 7 5 6 0
+	# invalidate instruction and data cache
+	# MCR CP15, 0, R1, C7, C7, 0
+	arm mcr 15 0 7 7 0
+
+	# clean and invalidate cache
+	arm mcr 15 0 7 15 0
+
+	# disable MMU and caches
+	arm mcr 15 0 1 0 0 0
+
+	arm mcr 15 0 15 2 4 0
+
+	# invalidate TLBs
+	arm mcr 15 0 8 7 0 0
+
+	# Drain the write buffer
+	arm mcr 15 0 7 10 4 0
+
+	# start from AIPS 2GB region
+	arm mcr 15 0 15 2 4 0x40000015
+}
+
+proc kindle2_sdram_init {} {
+	#--------------------------------------------
+	# Samsung K4X1G323PC-8GC3 32Mx32 Mobile DDR SDRAM
+	#--------------------------------------------
+	# SDCLK
+	mww 0x43fac26c 0
+
+	# CAS
+	mww 0x43fac270 0
+
+	# RAS
+	mww 0x43fac274 0
+
+	# CS2 (CSD0)
+	mww 0x43fac27c 0x1000
+
+	# DQM3
+	mww 0x43fac284 0
+
+	# DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2dc)
+	mww 0x43fac288 0
+	mww 0x43fac28c 0
+	mww 0x43fac290 0
+	mww 0x43fac294 0
+	mww 0x43fac298 0
+	mww 0x43fac29c 0
+	mww 0x43fac2a0 0
+	mww 0x43fac2a4 0
+	mww 0x43fac2a8 0
+	mww 0x43fac2ac 0
+	mww 0x43fac2b0 0
+	mww 0x43fac2b4 0
+	mww 0x43fac2b8 0
+	mww 0x43fac2bc 0
+	mww 0x43fac2c0 0
+	mww 0x43fac2c4 0
+	mww 0x43fac2c8 0
+	mww 0x43fac2cc 0
+	mww 0x43fac2d0 0
+	mww 0x43fac2d4 0
+	mww 0x43fac2d8 0
+	mww 0x43fac2dc 0
+
+	# ?
+	mww 0xb8002000 0x00006602
+	mww 0xb8002004 0x00000501
+	mww 0xb8002008 0x00000000
+
+	# LPDDR1 Initialization script
+	mww 0xb8001010 0x00000002
+	mww 0xb8001010 0x00000004
+	# ESDCFG0: set timing paramters
+	mww 0xb8001004 0x007fff7f
+	# ESDCTL0: select Prechare-All mode
+	mww 0xb8001000 0x92100000
+	mww 0x80000f00 0x12344321
+	# ESDCTL0: Auto Refresh
+	mww 0xb8001000 0xa2100000
+	mww 0x80000000 0x12344321
+	mww 0x80000000 0x12344321
+	# ESDCTL0: Load Mode Register
+	mww 0xb8001000 0xb2100000
+	mwb 0x80000033 0xda
+	mwb 0x81000000 0xff
+	# ESDCTL0: enable Auto-Refresh
+	mww 0xb8001000 0x82226080
+	mww 0x80000000 0xdeadbeef
+}
diff --git a/tcl/board/microchip_saml11_xplained_pro.cfg b/tcl/board/microchip_saml11_xplained_pro.cfg
new file mode 100644
index 0000000..3558a8e
--- /dev/null
+++ b/tcl/board/microchip_saml11_xplained_pro.cfg
@@ -0,0 +1,10 @@
+#
+# Microchip (formerly Atmel) SAM L11 Xplained Pro Evaluation Kit.
+# https://www.microchip.com/DevelopmentTools/ProductDetails/dm320205
+#
+
+source [find interface/cmsis-dap.cfg]
+adapter_khz 1000
+
+set CHIPNAME saml11
+source [find target/atsaml1x.cfg]
diff --git a/tcl/board/renesas_gr_peach.cfg b/tcl/board/renesas_gr_peach.cfg
new file mode 100644
index 0000000..ee6efe0
--- /dev/null
+++ b/tcl/board/renesas_gr_peach.cfg
@@ -0,0 +1,5 @@
+# Renesas RZ/A1H GR-Peach board
+
+reset_config srst_only
+
+source [find target/renesas_r7s72100.cfg]
diff --git a/tcl/board/rigado_bmd300_ek.cfg b/tcl/board/rigado_bmd300_ek.cfg
new file mode 100644
index 0000000..04e5e1f
--- /dev/null
+++ b/tcl/board/rigado_bmd300_ek.cfg
@@ -0,0 +1,11 @@
+#
+# Rigado BMD-300 Evaluation Kit
+#
+# https://www.rigado.com/products/modules/bmd-300/
+#
+
+source [find interface/jlink.cfg]
+transport select swd
+adapter_khz 1000
+
+source [find target/nrf52.cfg]