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| author | Jonathan Tinkham <sctincman@gmail.com> | 2020-03-19 10:31:05 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-19 09:31:05 -0700 |
| commit | 548790fefc5da04a2a60d6fb54f765c7bf959e42 (patch) | |
| tree | c1caf6bc164c45a48477c71d31a702300dc28d06 /tcl/board | |
| parent | f6f30fb1489d82d68a8894eedda90f33e136f338 (diff) | |
| download | riscv-openocd-548790fefc5da04a2a60d6fb54f765c7bf959e42.zip riscv-openocd-548790fefc5da04a2a60d6fb54f765c7bf959e42.tar.gz riscv-openocd-548790fefc5da04a2a60d6fb54f765c7bf959e42.tar.bz2 | |
Add support for HiFive1 RevB board (#456)
Adds new PID (0x1051) used on board to libjaylink, and add config
and flash entry for RevB board and FE310-G002 respectively.
Diffstat (limited to 'tcl/board')
| -rw-r--r-- | tcl/board/sifive-hifive1-revb.cfg | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/tcl/board/sifive-hifive1-revb.cfg b/tcl/board/sifive-hifive1-revb.cfg new file mode 100644 index 0000000..6f9a9c8 --- /dev/null +++ b/tcl/board/sifive-hifive1-revb.cfg @@ -0,0 +1,24 @@ +adapter_khz 4000 + +interface jlink +transport select jtag + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000913 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 0 + +riscv set_enable_virt2phys off +riscv set_enable_virtual off + +flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME.0 + +init + +jlink jtag 3 + +halt +flash protect 0 64 last off +echo "Ready for Remote Connections" |