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| author | Ian Thompson <ianst@cadence.com> | 2022-09-09 12:10:20 -0700 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2022-09-13 22:18:57 +0000 |
| commit | 58bd387219f4586f09f90fd6ebe441f3e2d29598 (patch) | |
| tree | fe5bee03543bab68a682b22d675453fdc7c77482 /src/target | |
| parent | 16cbddf1ce8b38bb5c2f02e438441572d285d946 (diff) | |
| download | riscv-openocd-58bd387219f4586f09f90fd6ebe441f3e2d29598.zip riscv-openocd-58bd387219f4586f09f90fd6ebe441f3e2d29598.tar.gz riscv-openocd-58bd387219f4586f09f90fd6ebe441f3e2d29598.tar.bz2 | |
target/xtensa: fully initialize buffers for PWRSTAT read
Read buffer is sized for 32-bit APB version of PWRSTAT/PWRCTL registers. Initialize to zero so 8-bit JTAG register mirrors are accurate.
Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I81310649fa7180893d0188aab3c8a14315aaea0a
Reviewed-on: https://review.openocd.org/c/openocd/+/7183
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/xtensa/xtensa_debug_module.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/xtensa/xtensa_debug_module.c b/src/target/xtensa/xtensa_debug_module.c index 8753b86..4f33c08 100644 --- a/src/target/xtensa/xtensa_debug_module.c +++ b/src/target/xtensa/xtensa_debug_module.c @@ -246,8 +246,8 @@ int xtensa_dm_device_id_read(struct xtensa_debug_module *dm) int xtensa_dm_power_status_read(struct xtensa_debug_module *dm, uint32_t clear) { - uint8_t stat_buf[sizeof(uint32_t)]; - uint8_t stath_buf[sizeof(uint32_t)]; + uint8_t stat_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 }; + uint8_t stath_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 }; /* TODO: JTAG does not work when PWRCTL_JTAGDEBUGUSE is not set. * It is set in xtensa_examine(), need to move reading of XDMREG_OCDID out of this function */ |