diff options
| author | Erhan Kurubas <erhan.kurubas@espressif.com> | 2022-07-03 11:38:17 +0300 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2022-07-23 14:00:26 +0000 |
| commit | 49cf334e98dc2e6f52d64e594b8067247841b37d (patch) | |
| tree | 3c9b532584b757dda79b23235f6adfd5769995ca /src/target | |
| parent | 5ffc745ea39393d2fc2772bf11e996e237463004 (diff) | |
| download | riscv-openocd-49cf334e98dc2e6f52d64e594b8067247841b37d.zip riscv-openocd-49cf334e98dc2e6f52d64e594b8067247841b37d.tar.gz riscv-openocd-49cf334e98dc2e6f52d64e594b8067247841b37d.tar.bz2 | |
target/semihosting: export semihosting_common_handlers[] from header file
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4add0c1dc7888497ee90fd02754607a16434b66f
Reviewed-on: https://review.openocd.org/c/openocd/+/7075
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/aarch64.c | 2 | ||||
| -rw-r--r-- | src/target/armv4_5.c | 2 | ||||
| -rw-r--r-- | src/target/espressif/esp32.c | 1 | ||||
| -rw-r--r-- | src/target/riscv/riscv.c | 1 | ||||
| -rw-r--r-- | src/target/semihosting_common.h | 2 |
5 files changed, 2 insertions, 6 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c index e9144ed..20e212e 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -3144,8 +3144,6 @@ static const struct command_registration aarch64_exec_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -extern const struct command_registration semihosting_common_handlers[]; - static const struct command_registration aarch64_command_handlers[] = { { .name = "arm", diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 2759b46..2b34792 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -1116,8 +1116,6 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv) return JIM_OK; } -extern const struct command_registration semihosting_common_handlers[]; - static const struct command_registration arm_exec_command_handlers[] = { { .name = "reg", diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c index 5a0d69b..29d94a2 100644 --- a/src/target/espressif/esp32.c +++ b/src/target/espressif/esp32.c @@ -632,7 +632,6 @@ static const struct command_registration esp32_any_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -extern const struct command_registration semihosting_common_handlers[]; static const struct command_registration esp32_command_handlers[] = { { .chain = esp_xtensa_smp_command_handlers, diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index c673175..f79239a 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3114,7 +3114,6 @@ static const struct command_registration riscv_exec_command_handlers[] = { * protocol, then a command like `riscv semihosting enable` will make * sense, but for now all semihosting commands are prefixed with `arm`. */ -extern const struct command_registration semihosting_common_handlers[]; const struct command_registration riscv_command_handlers[] = { { diff --git a/src/target/semihosting_common.h b/src/target/semihosting_common.h index 32a7218..8ecf2e5 100644 --- a/src/target/semihosting_common.h +++ b/src/target/semihosting_common.h @@ -201,4 +201,6 @@ void semihosting_set_field(struct target *target, uint64_t value, size_t index, uint8_t *fields); +extern const struct command_registration semihosting_common_handlers[]; + #endif /* OPENOCD_TARGET_SEMIHOSTING_COMMON_H */ |