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author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-01 00:48:40 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-01 00:48:40 -0800 |
commit | 209a0197f0c79442a2314199170a957c36c0ddb6 (patch) | |
tree | 3e574b044020e68dc8a04231f35efa2303e4d6f9 /src/target | |
parent | fb984a477d526b742855bfe0ab07f4dced3b9323 (diff) | |
download | riscv-openocd-209a0197f0c79442a2314199170a957c36c0ddb6.zip riscv-openocd-209a0197f0c79442a2314199170a957c36c0ddb6.tar.gz riscv-openocd-209a0197f0c79442a2314199170a957c36c0ddb6.tar.bz2 |
ARMv7-A: stop using CP15 ops
The ARMv7-A code uses read_cp15() to access fault registers.
Instead, use DPM operations directly, passing in the relevant
MRC instructions.
This eliminates per-operation overhead (though it'll be hard
to observe, this is uncommon) and helps eliminate read_cp15().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/armv7a.c | 41 |
1 files changed, 36 insertions, 5 deletions
diff --git a/src/target/armv7a.c b/src/target/armv7a.c index 3d94329..e23208f 100644 --- a/src/target/armv7a.c +++ b/src/target/armv7a.c @@ -38,17 +38,48 @@ static void armv7a_show_fault_registers(struct target *target) { uint32_t dfsr, ifsr, dfar, ifar; struct armv7a_common *armv7a = target_to_armv7a(target); - - armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr); - armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr); - armv7a->read_cp15(target, 0, 0, 6, 0, &dfar); - armv7a->read_cp15(target, 0, 2, 6, 0, &ifar); + struct arm_dpm *dpm = armv7a->armv4_5_common.dpm; + int retval; + + retval = dpm->prepare(dpm); + if (retval != ERROR_OK) + return; + + /* ARMV4_5_MRC(cpnum, op1, r0, CRn, CRm, op2) */ + + /* c5/c0 - {data, instruction} fault status registers */ + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 5, 0, 0), + &dfsr); + if (retval != ERROR_OK) + goto done; + + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 5, 0, 1), + &ifsr); + if (retval != ERROR_OK) + goto done; + + /* c6/c0 - {data, instruction} fault address registers */ + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 6, 0, 0), + &dfar); + if (retval != ERROR_OK) + goto done; + + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 6, 0, 2), + &ifar); + if (retval != ERROR_OK) + goto done; LOG_USER("Data fault registers DFSR: %8.8" PRIx32 ", DFAR: %8.8" PRIx32, dfsr, dfar); LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32 ", IFAR: %8.8" PRIx32, ifsr, ifar); +done: + /* (void) */ dpm->finish(dpm); } int armv7a_arch_state(struct target *target) |