semihosting: move semihosting_result_t from riscv.h to the semihosting_common.h

These enum values are useful for the arch level semihosting call handlers.
Currently riscv uses them, we also need similar return codes for the xtensa.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I8f63749cc203c59b07862f33edf3c393cd7e33a9
Reviewed-on: https://review.openocd.org/c/openocd/+/7039
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

4 files changed, 31 insertions, 29 deletions

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index e2d8e70..c673175 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -2209,17 +2209,17 @@ int riscv_openocd_poll(struct target *target)
 				if (halt_reason == RISCV_HALT_BREAKPOINT) {
 					int retval;
 					switch (riscv_semihosting(t, &retval)) {
-					case SEMI_NONE:
-					case SEMI_WAITING:
+					case SEMIHOSTING_NONE:
+					case SEMIHOSTING_WAITING:
 						/* This hart should remain halted. */
 						should_remain_halted++;
 						break;
-					case SEMI_HANDLED:
+					case SEMIHOSTING_HANDLED:
 						/* This hart should be resumed, along with any other
 							 * harts that halted due to haltgroups. */
 						should_resume++;
 						break;
-					case SEMI_ERROR:
+					case SEMIHOSTING_ERROR:
 						return retval;
 					}
 				} else if (halt_reason != RISCV_HALT_GROUP) {
@@ -2280,15 +2280,15 @@ int riscv_openocd_poll(struct target *target)
 	if (target->debug_reason == DBG_REASON_BREAKPOINT) {
 		int retval;
 		switch (riscv_semihosting(target, &retval)) {
-			case SEMI_NONE:
-			case SEMI_WAITING:
+			case SEMIHOSTING_NONE:
+			case SEMIHOSTING_WAITING:
 				target_call_event_callbacks(target, TARGET_EVENT_HALTED);
 				break;
-			case SEMI_HANDLED:
+			case SEMIHOSTING_HANDLED:
 				if (riscv_resume(target, true, 0, 0, 0, false) != ERROR_OK)
 					return ERROR_FAIL;
 				break;
-			case SEMI_ERROR:
+			case SEMIHOSTING_ERROR:
 				return retval;
 		}
 	} else {
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index 6eb9158..a6d27f7 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -10,6 +10,7 @@ struct riscv_program;
 #include "gdb_regs.h"
 #include "jtag/jtag.h"
 #include "target/register.h"
+#include "target/semihosting_common.h"
 #include <helper/command.h>
 
 /* The register cache is statically allocated. */
@@ -377,13 +378,8 @@ int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_wp_addre
 int riscv_init_registers(struct target *target);
 
 void riscv_semihosting_init(struct target *target);
-typedef enum {
-	SEMI_NONE,		/* Not halted for a semihosting call. */
-	SEMI_HANDLED,	/* Call handled, and target was resumed. */
-	SEMI_WAITING,	/* Call handled, target is halted waiting until we can resume. */
-	SEMI_ERROR		/* Something went wrong. */
-} semihosting_result_t;
-semihosting_result_t riscv_semihosting(struct target *target, int *retval);
+
+enum semihosting_result riscv_semihosting(struct target *target, int *retval);
 
 void riscv_add_bscan_tunneled_scan(struct target *target, struct scan_field *field,
 		riscv_bscan_tunneled_scan_context_t *ctxt);
diff --git a/src/target/riscv/riscv_semihosting.c b/src/target/riscv/riscv_semihosting.c
index 1dd8e77..c337a74 100644
--- a/src/target/riscv/riscv_semihosting.c
+++ b/src/target/riscv/riscv_semihosting.c
@@ -44,7 +44,6 @@
 #include <helper/log.h>
 
 #include "target/target.h"
-#include "target/semihosting_common.h"
 #include "riscv.h"
 
 static int riscv_semihosting_setup(struct target *target, int enable);
@@ -67,23 +66,23 @@ void riscv_semihosting_init(struct target *target)
  * @param retval Pointer to a location where the return code will be stored
  * @return non-zero value if a request was processed or an error encountered
  */
-semihosting_result_t riscv_semihosting(struct target *target, int *retval)
+enum semihosting_result riscv_semihosting(struct target *target, int *retval)
 {
 	struct semihosting *semihosting = target->semihosting;
 	if (!semihosting) {
 		LOG_DEBUG("   -> NONE (!semihosting)");
-		return SEMI_NONE;
+		return SEMIHOSTING_NONE;
 	}
 
 	if (!semihosting->is_active) {
 		LOG_DEBUG("   -> NONE (!semihosting->is_active)");
-		return SEMI_NONE;
+		return SEMIHOSTING_NONE;
 	}
 
 	riscv_reg_t pc;
 	int result = riscv_get_register(target, &pc, GDB_REGNO_PC);
 	if (result != ERROR_OK)
-		return SEMI_ERROR;
+		return SEMIHOSTING_ERROR;
 
 	uint8_t tmp_buf[12];
 
@@ -92,7 +91,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
 		/* Instruction memories may not support arbitrary read size. Use any size that will work. */
 		*retval = riscv_read_by_any_size(target, (pc - 4) + 4 * i, 4, tmp_buf + 4 * i);
 		if (*retval != ERROR_OK)
-			return SEMI_ERROR;
+			return SEMIHOSTING_ERROR;
 	}
 
 	/*
@@ -111,7 +110,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
 	if (pre != 0x01f01013 || ebreak != 0x00100073 || post != 0x40705013) {
 		/* Not the magic sequence defining semihosting. */
 		LOG_DEBUG("   -> NONE (no magic)");
-		return SEMI_NONE;
+		return SEMIHOSTING_NONE;
 	}
 
 	/*
@@ -126,13 +125,13 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
 		result = riscv_get_register(target, &r0, GDB_REGNO_A0);
 		if (result != ERROR_OK) {
 			LOG_DEBUG("   -> ERROR (couldn't read a0)");
-			return SEMI_ERROR;
+			return SEMIHOSTING_ERROR;
 		}
 
 		result = riscv_get_register(target, &r1, GDB_REGNO_A1);
 		if (result != ERROR_OK) {
 			LOG_DEBUG("   -> ERROR (couldn't read a1)");
-			return SEMI_ERROR;
+			return SEMIHOSTING_ERROR;
 		}
 
 		semihosting->op = r0;
@@ -146,12 +145,12 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
 			*retval = semihosting_common(target);
 			if (*retval != ERROR_OK) {
 				LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op);
-				return SEMI_ERROR;
+				return SEMIHOSTING_ERROR;
 			}
 		} else {
 			/* Unknown operation number, not a semihosting call. */
 			LOG_DEBUG("   -> NONE (unknown operation number)");
-			return SEMI_NONE;
+			return SEMIHOSTING_NONE;
 		}
 	}
 
@@ -163,14 +162,14 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
 		/* Resume right after the EBREAK 4 bytes instruction. */
 		*retval = riscv_set_register(target, GDB_REGNO_PC, pc + 4);
 		if (*retval != ERROR_OK)
-			return SEMI_ERROR;
+			return SEMIHOSTING_ERROR;
 
 		LOG_DEBUG("   -> HANDLED");
-		return SEMI_HANDLED;
+		return SEMIHOSTING_HANDLED;
 	}
 
 	LOG_DEBUG("   -> WAITING");
-	return SEMI_WAITING;
+	return SEMIHOSTING_WAITING;
 }
 
 /* -------------------------------------------------------------------------
diff --git a/src/target/semihosting_common.h b/src/target/semihosting_common.h
index 1b71690..9fe76ba 100644
--- a/src/target/semihosting_common.h
+++ b/src/target/semihosting_common.h
@@ -103,6 +103,13 @@ enum semihosting_redirect_config {
 	SEMIHOSTING_REDIRECT_CFG_ALL,
 };
 
+enum semihosting_result {
+	SEMIHOSTING_NONE,		/* Not halted for a semihosting call. */
+	SEMIHOSTING_HANDLED,	/* Call handled, and target was resumed. */
+	SEMIHOSTING_WAITING,	/* Call handled, target is halted waiting until we can resume. */
+	SEMIHOSTING_ERROR		/* Something went wrong. */
+};
+
 struct target;
 
 /*