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| author | Tim Newsome <tim@sifive.com> | 2017-06-19 13:36:25 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-06-20 13:10:35 -0700 |
| commit | 9cd98058a0c68dc8545c2ac3218204799ee0920f (patch) | |
| tree | b2d2813a3c2ca4d45a9de4d4a4af4f4ce53232ab /src/target/mips32_pracc.h | |
| parent | 10518351bb4208545f8b80c7c8e21b7585fe0925 (diff) | |
| download | riscv-openocd-multicore.zip riscv-openocd-multicore.tar.gz riscv-openocd-multicore.tar.bz2 | |
Set hardware triggers on all harts.multicore
Right now we're using "threads" to represent harts. gdb/OpenOCD assume
there's only one set of hardware breakpoints among all threads. Make it
so.
Diffstat (limited to 'src/target/mips32_pracc.h')
0 files changed, 0 insertions, 0 deletions