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| author | Ivan De Cesaris <ivan.de.cesaris@intel.com> | 2014-05-21 15:20:08 +0200 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2014-05-31 12:01:31 +0000 |
| commit | 74889cf4683211f96275d342df61c1dade126a5d (patch) | |
| tree | 3922a485e91edec19827b16239c17feef2ee7823 /src/target/lakemont.h | |
| parent | 970a12aef41c227ff6c6b59fed66a253a806d7ee (diff) | |
| download | riscv-openocd-74889cf4683211f96275d342df61c1dade126a5d.zip riscv-openocd-74889cf4683211f96275d342df61c1dade126a5d.tar.gz riscv-openocd-74889cf4683211f96275d342df61c1dade126a5d.tar.bz2 | |
quark_x10xx: cleanup of LOG format specifiers
Fix for LOG format specifiers, this is a superset of those
exposed by the arm-none-eabi build.
Add 0x prefix for all values printed in hex.
Add LOG messages for error cases when enabling or disabling
paging.
Change-Id: I070c556e0ad31204231a2b572e7b93af22a9bc61
Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com>
Reviewed-on: http://openocd.zylin.com/2149
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'src/target/lakemont.h')
| -rw-r--r-- | src/target/lakemont.h | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/src/target/lakemont.h b/src/target/lakemont.h index e63cab0..e5729ae 100644 --- a/src/target/lakemont.h +++ b/src/target/lakemont.h @@ -32,6 +32,7 @@ #ifndef LAKEMONT_H #define LAKEMONT_H #include <jtag/jtag.h> +#include <helper/types.h> /* The Intel Quark SoC X1000 Core is codenamed lakemont */ @@ -59,18 +60,18 @@ /* needed during lakemont probemode */ #define NOT_PMREG 0xfe #define NOT_AVAIL_REG 0xff -#define PM_DSB 0x00000000 -#define PM_DSL 0xFFFFFFFF -#define PM_DSAR 0x004F9300 -#define PM_DR7 0x00000400 +#define PM_DSB ((uint32_t)0x00000000) +#define PM_DSL ((uint32_t)0xFFFFFFFF) +#define PM_DSAR ((uint32_t)0x004F9300) +#define PM_DR7 ((uint32_t)0x00000400) #define DELAY_SUBMITPIR 0 /* for now 0 is working */ /* lakemont tapstatus bits */ -#define TS_PRDY_BIT 0x00000001 -#define TS_EN_PM_BIT 0x00000002 -#define TS_PM_BIT 0x00000004 -#define TS_PMCR_BIT 0x00000008 -#define TS_SBP_BIT 0x00000010 +#define TS_PRDY_BIT ((uint32_t)0x00000001) +#define TS_EN_PM_BIT ((uint32_t)0x00000002) +#define TS_PM_BIT ((uint32_t)0x00000004) +#define TS_PMCR_BIT ((uint32_t)0x00000008) +#define TS_SBP_BIT ((uint32_t)0x00000010) struct lakemont_core_reg { uint32_t num; |