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authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2018-03-12 16:56:05 +0100
committerMatthias Welwarsky <matthias@welwarsky.de>2018-03-16 08:58:06 +0000
commitffd6b78a2c47d1c15629dc72c71caea30ef8161a (patch)
treec2a7f4efa9c41216c1df83878eea904d80ca6e3a /src/target/armv8_cache.c
parent935f0c5cc28a3a2cc627ff25b30d65d8d82ad8c4 (diff)
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aarch64: fix debug entry from EL0
If we enter debug state from EL0, some registers are not accessible. Temporarily move to EL1H and back to gain access. Also, fix armv8_dpm_modeswitch() to not immediately restore the previous state on elevating the privilege level. Change-Id: Ic2a92109230ff4eb6834c00ef544397a5b7ad56a Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4461 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src/target/armv8_cache.c')
-rw-r--r--src/target/armv8_cache.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c
index 7f610c9..40965eb 100644
--- a/src/target/armv8_cache.c
+++ b/src/target/armv8_cache.c
@@ -310,6 +310,7 @@ int armv8_identify_cache(struct armv8_common *armv8)
{
/* read cache descriptor */
int retval = ERROR_FAIL;
+ struct arm *arm = &armv8->arm;
struct arm_dpm *dpm = armv8->arm.dpm;
uint32_t csselr, clidr, ctr;
uint32_t cache_reg;
@@ -320,6 +321,13 @@ int armv8_identify_cache(struct armv8_common *armv8)
if (retval != ERROR_OK)
goto done;
+ /* check if we're in an unprivileged mode */
+ if (armv8_curel_from_core_mode(arm->core_mode) < SYSTEM_CUREL_EL1) {
+ retval = armv8_dpm_modeswitch(dpm, ARMV8_64_EL1H);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
/* retrieve CTR */
retval = dpm->instr_read_data_r0(dpm,
armv8_opcode(armv8, READ_REG_CTR), &ctr);
@@ -417,6 +425,7 @@ int armv8_identify_cache(struct armv8_common *armv8)
}
done:
+ armv8_dpm_modeswitch(dpm, ARM_MODE_ANY);
dpm->finish(dpm);
return retval;