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| author | Spencer Oliver <spen@spen-soft.co.uk> | 2012-11-08 14:50:05 +0000 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2013-02-02 16:21:50 +0000 |
| commit | 85ed6ea59fdc3cc15de33f95f04441b75b9439bf (patch) | |
| tree | 26ca0ec9045083f545a7d68f81bdd46e691331fa /src/target/armv7m.c | |
| parent | fc2abe63fd3cea7497da7be2955d333bd3f800b9 (diff) | |
| download | riscv-openocd-85ed6ea59fdc3cc15de33f95f04441b75b9439bf.zip riscv-openocd-85ed6ea59fdc3cc15de33f95f04441b75b9439bf.tar.gz riscv-openocd-85ed6ea59fdc3cc15de33f95f04441b75b9439bf.tar.bz2 | |
armv7m: remove unused armv7m_regtype
This simplifies the armv7m_core_reg structure ready for the move to using
the generic struct arm_reg.
Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/967
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'src/target/armv7m.c')
| -rw-r--r-- | src/target/armv7m.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 1975b79..c6715d3 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -213,7 +213,6 @@ static int armv7m_read_core_reg(struct target *target, unsigned num) armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info; retval = armv7m->load_core_reg_u32(target, - armv7m_core_reg->type, armv7m_core_reg->num, ®_value); buf_set_u32(armv7m->core_cache->reg_list[num].value, 0, 32, reg_value); @@ -236,7 +235,6 @@ static int armv7m_write_core_reg(struct target *target, unsigned num) reg_value = buf_get_u32(armv7m->core_cache->reg_list[num].value, 0, 32); armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info; retval = armv7m->store_core_reg_u32(target, - armv7m_core_reg->type, armv7m_core_reg->num, reg_value); if (retval != ERROR_OK) { @@ -429,7 +427,7 @@ int armv7m_wait_algorithm(struct target *target, return ERROR_TARGET_TIMEOUT; } - armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc); + armv7m->load_core_reg_u32(target, 15, &pc); if (exit_point && (pc != exit_point)) { LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" PRIx32, pc, |