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| author | Florian Fainelli <f.fainelli@gmail.com> | 2019-03-19 09:50:41 -0700 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-06-12 15:14:44 +0100 |
| commit | eeabbd58c06e8c5fc01ce87cd2b04725fbc0e2bb (patch) | |
| tree | 204b2f63e7f6c460e69e80d9a4b1d8083deb8c0c /src/target/armv7a_mmu.c | |
| parent | 604dded6f1cd1e41d8ccf3185bc078ce698f391f (diff) | |
| download | riscv-openocd-eeabbd58c06e8c5fc01ce87cd2b04725fbc0e2bb.zip riscv-openocd-eeabbd58c06e8c5fc01ce87cd2b04725fbc0e2bb.tar.gz riscv-openocd-eeabbd58c06e8c5fc01ce87cd2b04725fbc0e2bb.tar.bz2 | |
armv7a_mmu: Do not restrict virtual addresses to uint32_t
In preparation for adding super section decoding, do not restrict
armv7a_mmu_translate_va_pa() to 32-bit virtual addresses since ARMv7-A
processors with VMSA extensions (including LPAE) can issue wider
physical addresses. Update casting to uint32_t where necessary.
Change-Id: Id1c3d0d5ac324cbdc334259d9ea75fe4981671a1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5211
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src/target/armv7a_mmu.c')
| -rw-r--r-- | src/target/armv7a_mmu.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c index 6118417..aa3dc16 100644 --- a/src/target/armv7a_mmu.c +++ b/src/target/armv7a_mmu.c @@ -36,12 +36,12 @@ /* V7 method VA TO PA */ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va, - uint32_t *val, int meminfo) + target_addr_t *val, int meminfo) { int retval = ERROR_FAIL; struct armv7a_common *armv7a = target_to_armv7a(target); struct arm_dpm *dpm = armv7a->arm.dpm; - uint32_t virt = va & ~0xfff; + uint32_t virt = va & ~0xfff, value; uint32_t NOS, NS, INNER, OUTER; *val = 0xdeadbeef; retval = dpm->prepare(dpm); @@ -56,9 +56,10 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va, goto done; retval = dpm->instr_read_data_r0(dpm, ARMV4_5_MRC(15, 0, 0, 7, 4, 0), - val); + &value); if (retval != ERROR_OK) goto done; + *val = value; /* decode memory attribute */ NOS = (*val >> 10) & 1; /* Not Outer shareable */ NS = (*val >> 9) & 1; /* Non secure */ @@ -67,7 +68,7 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va, *val = (*val & ~0xfff) + (va & 0xfff); if (meminfo) { - LOG_INFO("%" PRIx32 " : %" PRIx32 " %s outer shareable %s secured", + LOG_INFO("%" PRIx32 " : %" TARGET_PRIxADDR " %s outer shareable %s secured", va, *val, NOS == 1 ? "not" : " ", NS == 1 ? "not" : ""); |