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| author | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2014-05-09 22:50:34 +0200 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2014-06-28 09:32:21 +0000 |
| commit | 5a7eae940b8ed47f79ec433d6fcc3494fa0fae5b (patch) | |
| tree | 6138b1f5323b63b969ea90aa15488999a3acb147 /src/jtag/swd.h | |
| parent | bc91cdad3c894ae75e727ad89cf33333e14cb357 (diff) | |
| download | riscv-openocd-5a7eae940b8ed47f79ec433d6fcc3494fa0fae5b.zip riscv-openocd-5a7eae940b8ed47f79ec433d6fcc3494fa0fae5b.tar.gz riscv-openocd-5a7eae940b8ed47f79ec433d6fcc3494fa0fae5b.tar.bz2 | |
swd: Remove support for turnaround periods other than 1
ARM deprecated other trn periods in ADIv5.1 and one cycle is the only
setting that is guaranteed to be implemented, as well as being the reset
value in ADIv5.0.
Thus it makes no sense supporting anything else.
Change-Id: Iffa16bb0ce74788bca88fd3ace8a026148013d00
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2132
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'src/jtag/swd.h')
| -rw-r--r-- | src/jtag/swd.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/jtag/swd.h b/src/jtag/swd.h index 2e676b5..b0db5d2 100644 --- a/src/jtag/swd.h +++ b/src/jtag/swd.h @@ -58,17 +58,13 @@ static inline uint8_t swd_cmd(bool is_read, bool is_ap, uint8_t regnum) struct swd_driver { /** * Initialize the debug link so it can perform SWD operations. - * @param trn value from WCR: how many clocks - * to not drive the SWDIO line at certain points in - * the SWD protocol (at least 1 clock). * * As an example, this would switch a dual-mode debug adapter * into SWD mode and out of JTAG mode. * * @return ERROR_OK on success, else a negative fault code. */ - int (*init)(uint8_t trn); - + int (*init)(void); /** * Queued read of an AP or DP register. |