openocd: fix simple cases of Yoda condition

There are ~900 Yoda conditions to be aligned to the coding style.
For recurrent Yoda conditions it's preferable using a trivial
script in order to minimize the review effort.
E.g. comparison of uppercase macro/enum with lowercase variable:
	- ...(ERROR_OK == retval)...
	+ ...(retval == ERROR_OK)...

Patch generated automatically with the command:
	sed -i \
	's/(\([A-Z][A-Z0-9_]*\) \([=!]=\) \([a-z][a-z0-9_]*\))/(\3 \2 \1)/g' \
	$(find src/ -type f)

While there, remove the braces {} around a single statement block
to prevent warning from checkpatch.

Change-Id: If585b0a4b4578879c87b2dd74d9e0025e275ec6b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6354
Tested-by: jenkins
Reviewed-by: Xiang W <wxjstz@126.com>

37 files changed, 357 insertions, 357 deletions

diff --git a/src/flash/common.c b/src/flash/common.c
index 3e25511..e8e795a 100644
--- a/src/flash/common.c
+++ b/src/flash/common.c
@@ -32,7 +32,7 @@ unsigned get_flash_name_index(const char *name)
 	unsigned requested;
 	int retval = parse_uint(name_index + 1, &requested);
 	/* detect parsing error by forcing past end of bank list */
-	return (ERROR_OK == retval) ? requested : ~0U;
+	return (retval == ERROR_OK) ? requested : ~0U;
 }
 
 bool flash_driver_name_matches(const char *name, const char *expected)
diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index 534f20e..4341935 100644
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -368,16 +368,16 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
 	uint32_t status;
 
 	retval = at91sam9_ecc_init(target, info);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (data) {
 		retval = nand_read_data_page(nand, data, data_size);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 	}
 
@@ -443,16 +443,16 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
 	uint32_t parity, nparity;
 
 	retval = at91sam9_ecc_init(target, info);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (data) {
 		retval = nand_write_data_page(nand, data, data_size);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Unable to write data to NAND device");
 			return retval;
 		}
@@ -476,7 +476,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
 	if (!oob)
 		free(oob_data);
 
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Unable to write OOB data to NAND");
 		return retval;
 	}
diff --git a/src/flash/nand/core.c b/src/flash/nand/core.c
index baef5d5..8e2af23 100644
--- a/src/flash/nand/core.c
+++ b/src/flash/nand/core.c
@@ -750,7 +750,7 @@ int nand_page_command(struct nand_device *nand, uint32_t page,
 			nand->controller->address(nand, (page >> 16) & 0xff);
 
 		/* large page devices need a start command if reading */
-		if (NAND_CMD_READ0 == cmd)
+		if (cmd == NAND_CMD_READ0)
 			nand->controller->command(nand, NAND_CMD_READSTART);
 	}
 
@@ -772,7 +772,7 @@ int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 	if (nand->controller->read_block_data != NULL)
 		retval = (nand->controller->read_block_data)(nand, data, size);
 
-	if (ERROR_NAND_NO_BUFFER == retval) {
+	if (retval == ERROR_NAND_NO_BUFFER) {
 		uint32_t i;
 		int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
 
@@ -793,7 +793,7 @@ int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 	int retval;
 
 	retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (data)
@@ -812,7 +812,7 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 	if (nand->controller->write_block_data != NULL)
 		retval = (nand->controller->write_block_data)(nand, data, size);
 
-	if (ERROR_NAND_NO_BUFFER == retval) {
+	if (retval == ERROR_NAND_NO_BUFFER) {
 		bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
 		uint32_t incr = is16bit ? 2 : 1;
 		uint16_t write_data;
@@ -825,7 +825,7 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 				write_data = *data;
 
 			retval = nand->controller->write_data(nand, write_data);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				break;
 
 			data += incr;
@@ -849,7 +849,7 @@ int nand_write_finish(struct nand_device *nand)
 		return ERROR_NAND_OPERATION_TIMEOUT;
 
 	retval = nand_read_status(nand, &status);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("couldn't read status");
 		return ERROR_NAND_OPERATION_FAILED;
 	}
@@ -870,12 +870,12 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 	int retval;
 
 	retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (data) {
 		retval = nand_write_data_page(nand, data, data_size);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Unable to write data to NAND device");
 			return retval;
 		}
@@ -883,7 +883,7 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 
 	if (oob) {
 		retval = nand_write_data_page(nand, oob, oob_size);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Unable to write OOB data to NAND device");
 			return retval;
 		}
diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c
index f766560..b525f3d 100644
--- a/src/flash/nand/driver.c
+++ b/src/flash/nand/driver.c
@@ -75,7 +75,7 @@ int nand_driver_walk(nand_driver_walker_t f, void *x)
 {
 	for (unsigned i = 0; nand_flash_controllers[i]; i++) {
 		int retval = (*f)(nand_flash_controllers[i], x);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 	}
 	return ERROR_OK;
diff --git a/src/flash/nand/fileio.c b/src/flash/nand/fileio.c
index fee4012..5504841 100644
--- a/src/flash/nand/fileio.c
+++ b/src/flash/nand/fileio.c
@@ -67,8 +67,8 @@ int nand_fileio_start(struct command_invocation *cmd,
 
 	if (NULL != filename) {
 		int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
-		if (ERROR_OK != retval) {
-			const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
+		if (retval != ERROR_OK) {
+			const char *msg = (filemode == FILEIO_READ) ? "read" : "write";
 			command_print(cmd, "failed to open '%s' for %s access",
 				filename, msg);
 			return retval;
@@ -124,7 +124,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
 
 	struct nand_device *nand;
 	int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (NULL == nand->device) {
@@ -159,7 +159,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
 	}
 
 	retval = nand_fileio_start(CMD, nand, CMD_ARGV[1], filemode, state);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (!need_size) {
diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index 6ce0575..bda7b87 100644
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -589,7 +589,7 @@ static int lpc3180_write_page(struct nand_device *nand,
 					oob_size);
 			}
 			retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				return retval;
 
 			/* allocate a working area */
@@ -970,7 +970,7 @@ static int lpc3180_read_page(struct nand_device *nand,
 			/* read always the data and also oob areas*/
 
 			retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				return retval;
 
 			/* allocate a working area */
diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c
index 3e2add4..49890c2 100644
--- a/src/flash/nand/lpc32xx.c
+++ b/src/flash/nand/lpc32xx.c
@@ -141,7 +141,7 @@ static float lpc32xx_cycle_time(struct nand_device *nand)
 
 	/* determine current SYSCLK (13'MHz or main oscillator) */
 	retval = target_read_u32(target, 0x40004050, &sysclk_ctrl);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("could not read SYSCLK_CTRL");
 		return ERROR_NAND_OPERATION_FAILED;
 	}
@@ -153,7 +153,7 @@ static float lpc32xx_cycle_time(struct nand_device *nand)
 
 	/* determine selected HCLK source */
 	retval = target_read_u32(target, 0x40004044, &pwr_ctrl);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("could not read HCLK_CTRL");
 		return ERROR_NAND_OPERATION_FAILED;
 	}
@@ -162,14 +162,14 @@ static float lpc32xx_cycle_time(struct nand_device *nand)
 		hclk = sysclk;
 	else {
 		retval = target_read_u32(target, 0x40004058, &hclkpll_ctrl);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not read HCLKPLL_CTRL");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		hclk_pll = lpc32xx_pll(sysclk, hclkpll_ctrl);
 
 		retval = target_read_u32(target, 0x40004040, &hclkdiv_ctrl);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not read CLKDIV_CTRL");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -235,21 +235,21 @@ static int lpc32xx_init(struct nand_device *nand)
 
 		/* FLASHCLK_CTRL = 0x22 (enable clk for MLC) */
 		retval = target_write_u32(target, 0x400040c8, 0x22);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set FLASHCLK_CTRL");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* MLC_CEH = 0x0 (Force nCE assert) */
 		retval = target_write_u32(target, 0x200b804c, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_CEH");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* MLC_LOCK = 0xa25e (unlock protected registers) */
 		retval = target_write_u32(target, 0x200b8044, 0xa25e);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_LOCK");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -264,7 +264,7 @@ static int lpc32xx_init(struct nand_device *nand)
 		if (bus_width == 16)
 			mlc_icr_value |= 0x1;
 		retval = target_write_u32(target, 0x200b8030, mlc_icr_value);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ICR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -282,7 +282,7 @@ static int lpc32xx_init(struct nand_device *nand)
 
 		/* MLC_LOCK = 0xa25e (unlock protected registers) */
 		retval = target_write_u32(target, 0x200b8044, 0xa25e);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_LOCK");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -296,13 +296,13 @@ static int lpc32xx_init(struct nand_device *nand)
 				| ((trhz & 0x7) << 16)
 				| ((trbwb & 0x1f) << 19)
 				| ((tcea & 0x3) << 24));
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_TIME_REG");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		retval = lpc32xx_reset(nand);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return ERROR_NAND_OPERATION_FAILED;
 	} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
 		float cycle;
@@ -311,7 +311,7 @@ static int lpc32xx_init(struct nand_device *nand)
 
 		/* FLASHCLK_CTRL = 0x05 (enable clk for SLC) */
 		retval = target_write_u32(target, 0x400040c8, 0x05);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set FLASHCLK_CTRL");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -320,7 +320,7 @@ static int lpc32xx_init(struct nand_device *nand)
 		 * so reset calling is here at the beginning
 		 */
 		retval = lpc32xx_reset(nand);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return ERROR_NAND_OPERATION_FAILED;
 
 		/* SLC_CFG =
@@ -333,14 +333,14 @@ static int lpc32xx_init(struct nand_device *nand)
 		*/
 		retval = target_write_u32(target, 0x20020014,
 				0x3e | ((bus_width == 16) ? 1 : 0));
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set SLC_CFG");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
 		retval = target_write_u32(target, 0x20020020, 0x03);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set SLC_IEN");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -349,14 +349,14 @@ static int lpc32xx_init(struct nand_device *nand)
 
 		/* DMACLK_CTRL = 0x01 (enable clock for DMA controller) */
 		retval = target_write_u32(target, 0x400040e8, 0x01);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set DMACLK_CTRL");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* DMACConfig = DMA enabled*/
 		retval = target_write_u32(target, 0x31000030, 0x01);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set DMACConfig");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -380,7 +380,7 @@ static int lpc32xx_init(struct nand_device *nand)
 				| ((w_hold & 0xf) << 20)
 				| ((w_width & 0xf) << 24)
 				| ((w_rdy & 0xf) << 28));
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set SLC_TAC");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -407,7 +407,7 @@ static int lpc32xx_reset(struct nand_device *nand)
 	} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
 		/* MLC_CMD = 0xff (reset controller and NAND device) */
 		retval = target_write_u32(target, 0x200b8000, 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_CMD");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -420,7 +420,7 @@ static int lpc32xx_reset(struct nand_device *nand)
 	} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
 		/* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */
 		retval = target_write_u32(target, 0x20020010, 0x6);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set SLC_CTRL");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -453,14 +453,14 @@ static int lpc32xx_command(struct nand_device *nand, uint8_t command)
 	} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
 		/* MLC_CMD = command */
 		retval = target_write_u32(target, 0x200b8000, command);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_CMD");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 	} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
 		/* SLC_CMD = command */
 		retval = target_write_u32(target, 0x20020008, command);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set SLC_CMD");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -487,14 +487,14 @@ static int lpc32xx_address(struct nand_device *nand, uint8_t address)
 	} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
 		/* MLC_ADDR = address */
 		retval = target_write_u32(target, 0x200b8004, address);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 	} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
 		/* SLC_ADDR = address */
 		retval = target_write_u32(target, 0x20020004, address);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set SLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -521,14 +521,14 @@ static int lpc32xx_write_data(struct nand_device *nand, uint16_t data)
 	} else if (lpc32xx_info->selected_controller == LPC32XX_MLC_CONTROLLER) {
 		/* MLC_DATA = data */
 		retval = target_write_u32(target, 0x200b0000, data);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_DATA");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 	} else if (lpc32xx_info->selected_controller == LPC32XX_SLC_CONTROLLER) {
 		/* SLC_DATA = data */
 		retval = target_write_u32(target, 0x20020000, data);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set SLC_DATA");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -561,7 +561,7 @@ static int lpc32xx_read_data(struct nand_device *nand, void *data)
 			LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not read MLC_DATA");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -570,7 +570,7 @@ static int lpc32xx_read_data(struct nand_device *nand, void *data)
 
 		/* data = SLC_DATA, must use 32-bit access */
 		retval = target_read_u32(target, 0x20020000, &data32);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not read SLC_DATA");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -600,7 +600,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
 
 	/* MLC_CMD = sequential input */
 	retval = target_write_u32(target, 0x200b8000, NAND_CMD_SEQIN);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("could not set MLC_CMD");
 		return ERROR_NAND_OPERATION_FAILED;
 	}
@@ -608,20 +608,20 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
 	if (nand->page_size == 512) {
 		/* MLC_ADDR = 0x0 (one column cycle) */
 		retval = target_write_u32(target, 0x200b8004, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* MLC_ADDR = row */
 		retval = target_write_u32(target, 0x200b8004, page & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		retval = target_write_u32(target, 0x200b8004,
 				(page >> 8) & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -629,7 +629,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
 		if (nand->address_cycles == 4) {
 			retval = target_write_u32(target, 0x200b8004,
 					(page >> 16) & 0xff);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not set MLC_ADDR");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -637,25 +637,25 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
 	} else {
 		/* MLC_ADDR = 0x0 (two column cycles) */
 		retval = target_write_u32(target, 0x200b8004, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		retval = target_write_u32(target, 0x200b8004, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* MLC_ADDR = row */
 		retval = target_write_u32(target, 0x200b8004, page & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		retval = target_write_u32(target, 0x200b8004,
 				(page >> 8) & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -687,27 +687,27 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
 
 		/* write MLC_ECC_ENC_REG to start encode cycle */
 		retval = target_write_u32(target, 0x200b8008, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ECC_ENC_REG");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		retval = target_write_memory(target, 0x200a8000,
 				4, 128, page_buffer);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_BUF (data)");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		retval = target_write_memory(target, 0x200a8000,
 				1, 6, oob_buffer);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_BUF (oob)");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* write MLC_ECC_AUTO_ENC_REG to start auto encode */
 		retval = target_write_u32(target, 0x200b8010, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ECC_AUTO_ENC_REG");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -721,7 +721,7 @@ static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
 
 	/* MLC_CMD = auto program command */
 	retval = target_write_u32(target, 0x200b8000, NAND_CMD_PAGEPROG);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("could not set MLC_CMD");
 		return ERROR_NAND_OPERATION_FAILED;
 	}
@@ -901,14 +901,14 @@ static int lpc32xx_start_slc_dma(struct nand_device *nand, uint32_t count,
 
 	/* DMACIntTCClear = ch0 */
 	retval = target_write_u32(target, 0x31000008, 1);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not set DMACIntTCClear");
 		return retval;
 	}
 
 	/* DMACIntErrClear = ch0 */
 	retval = target_write_u32(target, 0x31000010, 1);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not set DMACIntErrClear");
 		return retval;
 	}
@@ -926,28 +926,28 @@ static int lpc32xx_start_slc_dma(struct nand_device *nand, uint32_t count,
 	retval = target_write_u32(target, 0x31000110,
 			1 | 1<<1 | 1<<6 | 2<<11 | 0<<14
 			| 0<<15 | 0<<16 | 0<<18);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not set DMACC0Config");
 		return retval;
 	}
 
 	/* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
 	retval = target_write_u32(target, 0x20020010, 0x3);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not set SLC_CTRL");
 		return retval;
 	}
 
 	/* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
 	retval = target_write_u32(target, 0x20020028, 2);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not set SLC_ICR");
 		return retval;
 	}
 
 	/* SLC_TC */
 	retval = target_write_u32(target, 0x20020030, count);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("lpc32xx_start_slc_dma: Could not set SLC_TC");
 		return retval;
 	}
@@ -974,13 +974,13 @@ static int lpc32xx_dma_ready(struct nand_device *nand, int timeout)
 
 		/* Read DMACRawIntTCStat */
 		retval = target_read_u32(target, 0x31000014, &tc_stat);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not read DMACRawIntTCStat");
 			return 0;
 		}
 		/* Read DMACRawIntErrStat */
 		retval = target_read_u32(target, 0x31000018, &err_stat);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not read DMACRawIntErrStat");
 			return 0;
 		}
@@ -1065,13 +1065,13 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 	retval = target_write_memory(target, target_mem_base, 4,
 			nll * sizeof(struct dmac_ll) / 4,
 			(uint8_t *)dmalist);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not write DMA descriptors to IRAM");
 		return retval;
 	}
 
 	retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("NAND_CMD_SEQIN failed");
 		return retval;
 	}
@@ -1085,7 +1085,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 	       WIDTH = bus_width
 	*/
 	retval = target_write_u32(target, 0x20020014, 0x3c);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not set SLC_CFG");
 		return retval;
 	}
@@ -1097,7 +1097,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 		retval = target_write_memory(target,
 				target_mem_base + DATA_OFFS,
 				4, nand->page_size/4, fdata);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not write data to IRAM");
 			return retval;
 		}
@@ -1106,7 +1106,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 		retval = target_write_memory(target, 0x31000100, 4,
 				sizeof(struct dmac_ll) / 4,
 				(uint8_t *)dmalist);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not write DMA descriptor to DMAC");
 			return retval;
 		}
@@ -1115,7 +1115,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 		int tot_size = nand->page_size;
 		tot_size += tot_size == 2048 ? 64 : 16;
 		retval = lpc32xx_start_slc_dma(nand, tot_size, 0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("DMA failed");
 			return retval;
 		}
@@ -1139,7 +1139,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 		static uint32_t hw_ecc[8];
 		retval = target_read_memory(target, target_mem_base + ECC_OFFS,
 				4, ecc_count, (uint8_t *)hw_ecc);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Reading hw generated ECC from IRAM failed");
 			return retval;
 		}
@@ -1154,7 +1154,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 	}
 	retval = target_write_memory(target, target_mem_base + SPARE_OFFS, 4,
 			foob_size / 4, foob);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Writing OOB to IRAM failed");
 		return retval;
 	}
@@ -1163,7 +1163,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 	retval = target_write_memory(target, 0x31000100, 4,
 			sizeof(struct dmac_ll) / 4,
 			(uint8_t *)(&dmalist[nll-1]));
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not write OOB DMA descriptor to DMAC");
 		return retval;
 	}
@@ -1173,7 +1173,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 
 		/* DMACIntTCClear = ch0 */
 		retval = target_write_u32(target, 0x31000008, 1);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not set DMACIntTCClear");
 			return retval;
 		}
@@ -1190,7 +1190,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 		retval = target_write_u32(target, 0x31000110,
 				1 | 1<<1 | 1<<6 | 2<<11 | 0<<14
 				| 0<<15 | 0<<16 | 0<<18);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not set DMACC0Config");
 			return retval;
 		}
@@ -1203,7 +1203,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 	} else {
 		/* Start xfer of data from iram to flash using DMA */
 		retval = lpc32xx_start_slc_dma(nand, foob_size, 1);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("DMA OOB failed");
 			return retval;
 		}
@@ -1211,7 +1211,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 
 	/* Let NAND start actual writing */
 	retval = nand_write_finish(nand);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("nand_write_finish failed");
 		return retval;
 	}
@@ -1307,7 +1307,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		/* MLC_CMD = Read0 */
 		retval = target_write_u32(target, 0x200b8000, NAND_CMD_READ0);
 	}
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("could not set MLC_CMD");
 		return ERROR_NAND_OPERATION_FAILED;
 	}
@@ -1315,20 +1315,20 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		/* small page device
 		 * MLC_ADDR = 0x0 (one column cycle) */
 		retval = target_write_u32(target, 0x200b8004, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* MLC_ADDR = row */
 		retval = target_write_u32(target, 0x200b8004, page & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		retval = target_write_u32(target, 0x200b8004,
 				(page >> 8) & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -1336,7 +1336,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		if (nand->address_cycles == 4) {
 			retval = target_write_u32(target, 0x200b8004,
 					(page >> 16) & 0xff);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not set MLC_ADDR");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -1345,25 +1345,25 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		/* large page device
 		 * MLC_ADDR = 0x0 (two column cycles) */
 		retval = target_write_u32(target, 0x200b8004, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		retval = target_write_u32(target, 0x200b8004, 0x0);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 
 		/* MLC_ADDR = row */
 		retval = target_write_u32(target, 0x200b8004, page & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
 		retval = target_write_u32(target, 0x200b8004,
 				(page >> 8) & 0xff);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ADDR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -1371,7 +1371,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		/* MLC_CMD = Read Start */
 		retval = target_write_u32(target, 0x200b8000,
 				NAND_CMD_READSTART);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_CMD");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -1380,7 +1380,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 	while (page_bytes_done < (uint32_t)nand->page_size) {
 		/* MLC_ECC_AUTO_DEC_REG = dummy */
 		retval = target_write_u32(target, 0x200b8014, 0xaa55aa55);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not set MLC_ECC_AUTO_DEC_REG");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -1392,7 +1392,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		}
 
 		retval = target_read_u32(target, 0x200b8048, &mlc_isr);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("could not read MLC_ISR");
 			return ERROR_NAND_OPERATION_FAILED;
 		}
@@ -1411,7 +1411,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		if (data) {
 			retval = target_read_memory(target, 0x200a8000, 4, 128,
 					page_buffer + page_bytes_done);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not read MLC_BUF (data)");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -1420,7 +1420,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 		if (oob) {
 			retval = target_read_memory(target, 0x200a8000, 4, 4,
 					oob_buffer + oob_bytes_done);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not read MLC_BUF (oob)");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -1462,13 +1462,13 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 	retval = target_write_memory(target, target_mem_base, 4,
 			nll * sizeof(struct dmac_ll) / 4,
 			(uint8_t *)dmalist);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not write DMA descriptors to IRAM");
 		return retval;
 	}
 
 	retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("lpc32xx_read_page_slc: NAND_CMD_READ0 failed");
 		return retval;
 	}
@@ -1482,7 +1482,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 	       WIDTH = bus_width
 	*/
 	retval = target_write_u32(target, 0x20020014, 0x3e);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("lpc32xx_read_page_slc: Could not set SLC_CFG");
 		return retval;
 	}
@@ -1490,7 +1490,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 	/* Write first descriptor to DMA controller */
 	retval = target_write_memory(target, 0x31000100, 4,
 			sizeof(struct dmac_ll) / 4, (uint8_t *)dmalist);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not write DMA descriptor to DMAC");
 		return retval;
 	}
@@ -1499,7 +1499,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 	int tot_size = nand->page_size;
 	tot_size += nand->page_size == 2048 ? 64 : 16;
 	retval = lpc32xx_start_slc_dma(nand, tot_size, 1);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("lpc32xx_read_page_slc: DMA read failed");
 		return retval;
 	}
@@ -1508,7 +1508,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 	if (data) {
 		retval = target_read_memory(target, target_mem_base + DATA_OFFS,
 				4, data_size/4, data);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not read data from IRAM");
 			return retval;
 		}
@@ -1518,7 +1518,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 		retval = target_read_memory(target,
 				target_mem_base + SPARE_OFFS, 4,
 				oob_size/4, oob);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not read OOB from IRAM");
 			return retval;
 		}
@@ -1530,7 +1530,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 	retval = target_read_memory(target, target_mem_base + SPARE_OFFS,
 			4, nand->page_size == 2048 ? 16 : 4, foob);
 	lpc32xx_dump_oob(foob, nand->page_size == 2048 ? 64 : 16);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not read OOB from IRAM");
 		return retval;
 	}
@@ -1539,7 +1539,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
 	static uint32_t hw_ecc[8];	/* max size */
 	retval = target_read_memory(target, target_mem_base + ECC_OFFS, 4,
 			ecc_count, (uint8_t *)hw_ecc);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Could not read hw generated ECC from IRAM");
 		return retval;
 	}
@@ -1633,7 +1633,7 @@ static int lpc32xx_controller_ready(struct nand_device *nand, int timeout)
 
 			/* Read MLC_ISR, wait for controller to become ready */
 			retval = target_read_u8(target, 0x200b8048, &status);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not set MLC_STAT");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -1648,7 +1648,7 @@ static int lpc32xx_controller_ready(struct nand_device *nand, int timeout)
 
 			/* Read SLC_STAT and check READY bit */
 			retval = target_read_u32(target, 0x20020018, &status);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not set SLC_STAT");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -1687,7 +1687,7 @@ static int lpc32xx_nand_ready(struct nand_device *nand, int timeout)
 			/* Read MLC_ISR, wait for NAND flash device to
 			 * become ready */
 			retval = target_read_u8(target, 0x200b8048, &status);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not read MLC_ISR");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -1702,7 +1702,7 @@ static int lpc32xx_nand_ready(struct nand_device *nand, int timeout)
 
 			/* Read SLC_STAT and check READY bit */
 			retval = target_read_u32(target, 0x20020018, &status);
-			if (ERROR_OK != retval) {
+			if (retval != ERROR_OK) {
 				LOG_ERROR("could not read SLC_STAT");
 				return ERROR_NAND_OPERATION_FAILED;
 			}
@@ -1731,7 +1731,7 @@ static int lpc32xx_tc_ready(struct nand_device *nand, int timeout)
 		int retval;
 		/* Read SLC_INT_STAT and check INT_TC_STAT bit */
 		retval = target_read_u32(target, 0x2002001c, &status);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Could not read SLC_INT_STAT");
 			return 0;
 		}
diff --git a/src/flash/nand/s3c24xx.h b/src/flash/nand/s3c24xx.h
index 5c7782d..4b0c02f 100644
--- a/src/flash/nand/s3c24xx.h
+++ b/src/flash/nand/s3c24xx.h
@@ -51,7 +51,7 @@ S3C24XX_DEVICE_COMMAND();
 #define CALL_S3C24XX_DEVICE_COMMAND(d, i) \
 	do { \
 		int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \
-		if (ERROR_OK != retval) \
+		if (retval != ERROR_OK) \
 			return retval; \
 	} while (0)
 
diff --git a/src/flash/nand/tcl.c b/src/flash/nand/tcl.c
index 9e0ca41..cbc51b8 100644
--- a/src/flash/nand/tcl.c
+++ b/src/flash/nand/tcl.c
@@ -83,7 +83,7 @@ COMMAND_HANDLER(handle_nand_info_command)
 
 	struct nand_device *p;
 	int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (NULL == p->device) {
@@ -142,7 +142,7 @@ COMMAND_HANDLER(handle_nand_probe_command)
 
 	struct nand_device *p;
 	int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = nand_probe(p);
@@ -161,7 +161,7 @@ COMMAND_HANDLER(handle_nand_erase_command)
 
 	struct nand_device *p;
 	int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	unsigned long offset;
@@ -208,7 +208,7 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
 
 	struct nand_device *p;
 	int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (CMD_ARGC == 3) {
@@ -246,7 +246,7 @@ COMMAND_HANDLER(handle_nand_write_command)
 	struct nand_fileio_state s;
 	int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
 			&s, &nand, FILEIO_READ, false, true);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	uint32_t total_bytes = s.size;
@@ -261,7 +261,7 @@ COMMAND_HANDLER(handle_nand_write_command)
 
 		retval = nand_write_page(nand, s.address / nand->page_size,
 				s.page, s.page_size, s.oob, s.oob_size);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			command_print(CMD, "failed writing file %s "
 				"to NAND flash %s at offset 0x%8.8" PRIx32,
 				CMD_ARGV[1], CMD_ARGV[0], s.address);
@@ -286,7 +286,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
 	struct nand_fileio_state file;
 	int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
 			&file, &nand, FILEIO_READ, false, true);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct nand_fileio_state dev;
@@ -295,13 +295,13 @@ COMMAND_HANDLER(handle_nand_verify_command)
 	dev.size = file.size;
 	dev.oob_format = file.oob_format;
 	retval = nand_fileio_start(CMD, nand, NULL, FILEIO_NONE, &dev);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	while (file.size > 0) {
 		retval = nand_read_page(nand, dev.address / dev.page_size,
 				dev.page, dev.page_size, dev.oob, dev.oob_size);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			command_print(CMD, "reading NAND flash page failed");
 			nand_fileio_cleanup(&dev);
 			nand_fileio_cleanup(&file);
@@ -346,14 +346,14 @@ COMMAND_HANDLER(handle_nand_dump_command)
 	struct nand_fileio_state s;
 	int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
 			&s, &nand, FILEIO_WRITE, true, false);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	while (s.size > 0) {
 		size_t size_written;
 		retval = nand_read_page(nand, s.address / nand->page_size,
 				s.page, s.page_size, s.oob, s.oob_size);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			command_print(CMD, "reading NAND flash page failed");
 			nand_fileio_cleanup(&s);
 			return retval;
@@ -388,7 +388,7 @@ COMMAND_HANDLER(handle_nand_raw_access_command)
 
 	struct nand_device *p;
 	int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (NULL == p->device) {
@@ -530,7 +530,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
 	if (NULL != controller->commands) {
 		retval = register_commands(CMD_CTX, NULL,
 				controller->commands);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 	}
 	c = malloc(sizeof(struct nand_device));
@@ -552,7 +552,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
 	c->next = NULL;
 
 	retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("'%s' driver rejected nand flash. Usage: %s",
 			controller->name,
 			controller->usage);
diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c
index 162e1bb..684d21d 100644
--- a/src/flash/nor/ambiqmicro.c
+++ b/src/flash/nor/ambiqmicro.c
@@ -774,7 +774,7 @@ COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (ambiqmicro_mass_erase(bank) == ERROR_OK) {
@@ -802,7 +802,7 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command)
 	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last);
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (ambiqmicro_erase(bank, first, last) == ERROR_OK)
diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c
index f70e5d0..a64c2b4 100644
--- a/src/flash/nor/atsamv.c
+++ b/src/flash/nor/atsamv.c
@@ -612,7 +612,7 @@ static int samv_get_info(struct flash_bank *bank, struct command_invocation *cmd
 	struct samv_flash_bank *samv_info = bank->driver_priv;
 	if (!samv_info->probed) {
 		int r = samv_probe(bank);
-		if (ERROR_OK != r)
+		if (r != ERROR_OK)
 			return r;
 	}
 	command_print_sameline(cmd, "Cortex-M7 detected with %" PRIu32 " kB flash\n",
diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c
index b52b56b..51f8d47 100644
--- a/src/flash/nor/avrf.c
+++ b/src/flash/nor/avrf.c
@@ -435,7 +435,7 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (avrf_mass_erase(bank) == ERROR_OK) {
diff --git a/src/flash/nor/cc26xx.c b/src/flash/nor/cc26xx.c
index 4d58daa..250fc37 100644
--- a/src/flash/nor/cc26xx.c
+++ b/src/flash/nor/cc26xx.c
@@ -107,9 +107,9 @@ static int cc26xx_wait_algo_done(struct flash_bank *bank, uint32_t params_addr)
 	int retval = ERROR_OK;
 
 	start_ms = timeval_ms();
-	while (CC26XX_BUFFER_FULL == status) {
+	while (status == CC26XX_BUFFER_FULL) {
 		retval = target_read_u32(target, status_addr, &status);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		elapsed_ms = timeval_ms() - start_ms;
@@ -119,7 +119,7 @@ static int cc26xx_wait_algo_done(struct flash_bank *bank, uint32_t params_addr)
 			break;
 	};
 
-	if (CC26XX_BUFFER_EMPTY != status) {
+	if (status != CC26XX_BUFFER_EMPTY) {
 		LOG_ERROR("%s: Flash operation failed", cc26xx_bank->family_name);
 		return ERROR_FAIL;
 	}
@@ -136,7 +136,7 @@ static int cc26xx_init(struct flash_bank *bank)
 
 	/* Make sure we've probed the flash to get the device and size */
 	retval = cc26xx_auto_probe(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Check for working area to use for flash helper algorithm */
@@ -144,7 +144,7 @@ static int cc26xx_init(struct flash_bank *bank)
 		target_free_working_area(target, cc26xx_bank->working_area);
 	retval = target_alloc_working_area(target, cc26xx_bank->algo_working_size,
 				&cc26xx_bank->working_area);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Confirm the defined working address is the area we need to use */
@@ -154,7 +154,7 @@ static int cc26xx_init(struct flash_bank *bank)
 	/* Write flash helper algorithm into target memory */
 	retval = target_write_buffer(target, CC26XX_ALGO_BASE_ADDRESS,
 				cc26xx_bank->algo_size, cc26xx_bank->algo_code);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("%s: Failed to load flash helper algorithm",
 			cc26xx_bank->family_name);
 		target_free_working_area(target, cc26xx_bank->working_area);
@@ -168,7 +168,7 @@ static int cc26xx_init(struct flash_bank *bank)
 	/* Begin executing the flash helper algorithm */
 	retval = target_start_algorithm(target, 0, NULL, 0, NULL,
 				CC26XX_ALGO_BASE_ADDRESS, 0, &cc26xx_bank->armv7m_info);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("%s: Failed to start flash helper algorithm",
 			cc26xx_bank->family_name);
 		target_free_working_area(target, cc26xx_bank->working_area);
@@ -217,7 +217,7 @@ static int cc26xx_mass_erase(struct flash_bank *bank)
 	}
 
 	retval = cc26xx_init(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Initialize algorithm parameters */
@@ -231,7 +231,7 @@ static int cc26xx_mass_erase(struct flash_bank *bank)
 				sizeof(algo_params), (uint8_t *)&algo_params);
 
 	/* Wait for command to complete */
-	if (ERROR_OK == retval)
+	if (retval == ERROR_OK)
 		retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[0]);
 
 	/* Regardless of errors, try to close down algo */
@@ -290,7 +290,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first,
 	length = (last - first + 1) * cc26xx_bank->sector_length;
 
 	retval = cc26xx_init(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Set up algorithm parameters for erase command */
@@ -304,7 +304,7 @@ static int cc26xx_erase(struct flash_bank *bank, unsigned int first,
 				sizeof(algo_params), (uint8_t *)&algo_params);
 
 	/* If no error, wait for erase to finish */
-	if (ERROR_OK == retval)
+	if (retval == ERROR_OK)
 		retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[0]);
 
 	/* Regardless of errors, try to close down algo */
@@ -333,7 +333,7 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 	retval = cc26xx_init(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Initialize algorithm parameters to default values */
@@ -354,7 +354,7 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
 		/* Put next block of data to flash into buffer */
 		retval = target_write_buffer(target, cc26xx_bank->buffer_addr[index],
 					size, buffer);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Unable to write data to target memory");
 			break;
 		}
@@ -367,13 +367,13 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
 		/* Issue flash helper algorithm parameters for block write */
 		retval = target_write_buffer(target, cc26xx_bank->params_addr[index],
 					sizeof(algo_params[index]), (uint8_t *)&algo_params[index]);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			break;
 
 		/* Wait for next ping pong buffer to be ready */
 		index ^= 1;
 		retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[index]);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			break;
 
 		count -= size;
@@ -386,7 +386,7 @@ static int cc26xx_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 	/* If no error yet, wait for last buffer to finish */
-	if (ERROR_OK == retval) {
+	if (retval == ERROR_OK) {
 		index ^= 1;
 		retval = cc26xx_wait_algo_done(bank, cc26xx_bank->params_addr[index]);
 	}
@@ -410,12 +410,12 @@ static int cc26xx_probe(struct flash_bank *bank)
 	int retval;
 
 	retval = target_read_u32(target, FCFG1_ICEPICK_ID, &value);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 	cc26xx_bank->icepick_id = value;
 
 	retval = target_read_u32(target, FCFG1_USER_ID, &value);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 	cc26xx_bank->user_id = value;
 
@@ -454,7 +454,7 @@ static int cc26xx_probe(struct flash_bank *bank)
 	}
 
 	retval = target_read_u32(target, CC26XX_FLASH_SIZE_INFO, &value);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 	num_sectors = value & 0xff;
 	if (num_sectors > max_sectors)
diff --git a/src/flash/nor/cc3220sf.c b/src/flash/nor/cc3220sf.c
index 1d01ba3..88604df 100644
--- a/src/flash/nor/cc3220sf.c
+++ b/src/flash/nor/cc3220sf.c
@@ -49,12 +49,12 @@ static int cc3220sf_mass_erase(struct flash_bank *bank)
 
 	/* Set starting address to erase to zero */
 	retval = target_write_u32(target, FMA_REGISTER_ADDR, 0);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Write the MERASE bit of the FMC register */
 	retval = target_write_u32(target, FMC_REGISTER_ADDR, FMC_MERASE_VALUE);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Poll the MERASE bit until the mass erase is complete */
@@ -62,7 +62,7 @@ static int cc3220sf_mass_erase(struct flash_bank *bank)
 	start_ms = timeval_ms();
 	while (!done) {
 		retval = target_read_u32(target, FMC_REGISTER_ADDR, &value);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		if ((value & FMC_MERASE_BIT) == 0) {
@@ -137,12 +137,12 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first,
 
 		/* Set starting address to erase */
 		retval = target_write_u32(target, FMA_REGISTER_ADDR, address);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		/* Write the ERASE bit of the FMC register */
 		retval = target_write_u32(target, FMC_REGISTER_ADDR, FMC_ERASE_VALUE);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		/* Poll the ERASE bit until the erase is complete */
@@ -150,7 +150,7 @@ static int cc3220sf_erase(struct flash_bank *bank, unsigned int first,
 		start_ms = timeval_ms();
 		while (!done) {
 			retval = target_read_u32(target, FMC_REGISTER_ADDR, &value);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				return retval;
 
 			if ((value & FMC_ERASE_BIT) == 0) {
@@ -200,13 +200,13 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 	/* Obtain working area to use for flash helper algorithm */
 	retval = target_alloc_working_area(target, sizeof(cc3220sf_algo),
 				&algo_working_area);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Obtain working area to use for flash buffer */
 	retval = target_alloc_working_area(target,
 				target_get_working_area_avail(target), &buffer_working_area);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		target_free_working_area(target, algo_working_area);
 		return retval;
 	}
@@ -223,7 +223,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 	/* Write flash helper algorithm into target memory */
 	retval = target_write_buffer(target, algo_base_address,
 				sizeof(cc3220sf_algo), cc3220sf_algo);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		target_free_working_area(target, algo_working_area);
 		target_free_working_area(target, buffer_working_area);
 		return retval;
@@ -262,7 +262,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 		/* Retrieve what is already in flash at the head address */
 		retval = target_read_buffer(target, head_address, sizeof(head), head);
 
-		if (ERROR_OK == retval) {
+		if (retval == ERROR_OK) {
 			/* Substitute in the new data to write */
 			while ((remaining > 0) && (head_offset < 4)) {
 				head[head_offset] = *buffer;
@@ -273,7 +273,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 			}
 		}
 
-		if (ERROR_OK == retval) {
+		if (retval == ERROR_OK) {
 			/* Helper parameters are passed in registers R0-R2 */
 			/* Set start of data buffer, address to write to, and word count */
 			buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address);
@@ -285,12 +285,12 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 						sizeof(head), head);
 		}
 
-		if (ERROR_OK == retval) {
+		if (retval == ERROR_OK) {
 			/* Execute the flash helper algorithm */
 			retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 						algo_base_address, 0, FLASH_TIMEOUT,
 						&cc3220sf_bank->armv7m_info);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				LOG_ERROR("cc3220sf: Flash algorithm failed to run");
 
 			/* Check that the head value was written to flash */
@@ -307,7 +307,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 	/* Adjust remaining so it is a multiple of whole words */
 	remaining -= tail_count;
 
-	while ((ERROR_OK == retval) && (remaining > 0)) {
+	while ((retval == ERROR_OK) && (remaining > 0)) {
 		/* Set start of data buffer and address to write to */
 		buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address);
 		buf_set_u32(reg_params[1].value, 0, 32, address);
@@ -317,7 +317,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 			/* Fill up buffer with data to flash */
 			retval = target_write_buffer(target, algo_buffer_address,
 						algo_buffer_size, buffer);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				break;
 
 			/* Count to write is in 32-bit words */
@@ -331,7 +331,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 			/* Fill buffer with what's left of the data */
 			retval = target_write_buffer(target, algo_buffer_address,
 						remaining, buffer);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				break;
 
 			/* Calculate the final word count to write */
@@ -352,7 +352,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 		retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 					algo_base_address, 0, FLASH_TIMEOUT,
 					&cc3220sf_bank->armv7m_info);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("cc3220sf: Flash algorithm failed to run");
 			break;
 		}
@@ -369,7 +369,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 	/* Do one word write for any final bytes less than a full word */
-	if ((ERROR_OK == retval) && (0 != tail_count)) {
+	if ((retval == ERROR_OK) && (0 != tail_count)) {
 		uint8_t tail[4];
 
 		/* Set starting byte offset for data to write */
@@ -378,7 +378,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 		/* Retrieve what is already in flash at the tail address */
 		retval = target_read_buffer(target, address, sizeof(tail), tail);
 
-		if (ERROR_OK == retval) {
+		if (retval == ERROR_OK) {
 			/* Substitute in the new data to write */
 			while (tail_count > 0) {
 				tail[tail_offset] = *buffer;
@@ -388,7 +388,7 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 			}
 		}
 
-		if (ERROR_OK == retval) {
+		if (retval == ERROR_OK) {
 			/* Set start of data buffer, address to write to, and word count */
 			buf_set_u32(reg_params[0].value, 0, 32, algo_buffer_address);
 			buf_set_u32(reg_params[1].value, 0, 32, address);
@@ -399,12 +399,12 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer,
 						sizeof(tail), tail);
 		}
 
-		if (ERROR_OK == retval) {
+		if (retval == ERROR_OK) {
 			/* Execute the flash helper algorithm */
 			retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 						algo_base_address, 0, FLASH_TIMEOUT,
 						&cc3220sf_bank->armv7m_info);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				LOG_ERROR("cc3220sf: Flash algorithm failed to run");
 
 			/* Check that the tail was written to flash */
diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c
index 6461e4c..f461956 100644
--- a/src/flash/nor/efm32.c
+++ b/src/flash/nor/efm32.c
@@ -232,7 +232,7 @@ static int efm32x_read_info(struct flash_bank *bank,
 	memset(efm32_info, 0, sizeof(struct efm32_info));
 
 	ret = target_read_u32(bank->target, CPUID, &cpuid);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	if (((cpuid >> 4) & 0xfff) == 0xc23) {
@@ -247,23 +247,23 @@ static int efm32x_read_info(struct flash_bank *bank,
 	}
 
 	ret = efm32x_get_flash_size(bank, &(efm32_info->flash_sz_kib));
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_get_ram_size(bank, &(efm32_info->ram_sz_kib));
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_get_part_num(bank, &(efm32_info->part_num));
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_get_part_family(bank, &(efm32_info->part_family));
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_get_prod_rev(bank, &(efm32_info->prod_rev));
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	for (size_t i = 0; i < ARRAY_SIZE(efm32_families); i++) {
@@ -296,7 +296,7 @@ static int efm32x_read_info(struct flash_bank *bank,
 		uint8_t pg_size = 0;
 		ret = target_read_u8(bank->target, EFM32_MSC_DI_PAGE_SIZE,
 			&pg_size);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			return ret;
 
 		efm32_info->page_size = (1 << ((pg_size+10) & 0xff));
@@ -349,7 +349,7 @@ static int efm32x_set_reg_bits(struct flash_bank *bank, uint32_t reg,
 	uint32_t reg_val = 0;
 
 	ret = efm32x_read_reg_u32(bank, reg, &reg_val);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	if (set)
@@ -381,7 +381,7 @@ static int efm32x_wait_status(struct flash_bank *bank, int timeout,
 
 	while (1) {
 		ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			break;
 
 		LOG_DEBUG("status: 0x%" PRIx32 "", status);
@@ -420,16 +420,16 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr)
 	LOG_DEBUG("erasing flash page at 0x%08" PRIx32, addr);
 
 	ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_ADDRB, addr);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD,
 		EFM32_MSC_WRITECMD_LADDRIM_MASK, 1);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	LOG_DEBUG("status 0x%" PRIx32, status);
@@ -444,7 +444,7 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr)
 
 	ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD,
 		EFM32_MSC_WRITECMD_ERASEPAGE_MASK, 1);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	return efm32x_wait_status(bank, EFM32_FLASH_ERASE_TMO,
@@ -464,14 +464,14 @@ static int efm32x_erase(struct flash_bank *bank, unsigned int first,
 
 	efm32x_msc_lock(bank, 0);
 	ret = efm32x_set_wren(bank, 1);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to enable MSC write");
 		return ret;
 	}
 
 	for (unsigned int i = first; i <= last; i++) {
 		ret = efm32x_erase_page(bank, bank->sectors[i].offset);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			LOG_ERROR("Failed to erase page %d", i);
 	}
 
@@ -498,7 +498,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
 
 	for (int i = 0; i < data_size; i++, ptr++) {
 		ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+i*4, ptr);
-		if (ERROR_OK != ret) {
+		if (ret != ERROR_OK) {
 			LOG_ERROR("Failed to read PLW %d", i);
 			return ret;
 		}
@@ -509,7 +509,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
 	/* ULW, word 126 */
 	ptr = efm32x_info->lb_page + 126;
 	ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+126*4, ptr);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read ULW");
 		return ret;
 	}
@@ -517,7 +517,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
 	/* DLW, word 127 */
 	ptr = efm32x_info->lb_page + 127;
 	ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+127*4, ptr);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read DLW");
 		return ret;
 	}
@@ -525,7 +525,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
 	/* MLW, word 125, present in GG, LG, PG, JG, EFR32 */
 	ptr = efm32x_info->lb_page + 125;
 	ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+125*4, ptr);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read MLW");
 		return ret;
 	}
@@ -533,7 +533,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
 	/* ALW, word 124, present in GG, LG, PG, JG, EFR32 */
 	ptr = efm32x_info->lb_page + 124;
 	ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+124*4, ptr);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read ALW");
 		return ret;
 	}
@@ -541,7 +541,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
 	/* CLW1, word 123, present in EFR32 */
 	ptr = efm32x_info->lb_page + 123;
 	ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+123*4, ptr);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read CLW1");
 		return ret;
 	}
@@ -549,7 +549,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank)
 	/* CLW0, word 122, present in GG, LG, PG, JG, EFR32 */
 	ptr = efm32x_info->lb_page + 122;
 	ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+122*4, ptr);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read CLW0");
 		return ret;
 	}
@@ -563,7 +563,7 @@ static int efm32x_write_lock_data(struct flash_bank *bank)
 	int ret = 0;
 
 	ret = efm32x_erase_page(bank, EFM32_MSC_LOCK_BITS);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to erase LB page");
 		return ret;
 	}
@@ -617,14 +617,14 @@ static int efm32x_protect(struct flash_bank *bank, int set, unsigned int first,
 
 	for (unsigned int i = first; i <= last; i++) {
 		ret = efm32x_set_page_lock(bank, i, set);
-		if (ERROR_OK != ret) {
+		if (ret != ERROR_OK) {
 			LOG_ERROR("Failed to set lock on page %d", i);
 			return ret;
 		}
 	}
 
 	ret = efm32x_write_lock_data(bank);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to write LB page");
 		return ret;
 	}
@@ -812,16 +812,16 @@ static int efm32x_write_word(struct flash_bank *bank, uint32_t addr,
 	keep_alive();
 
 	ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_ADDRB, addr);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_set_reg_bits(bank, EFM32_MSC_REG_WRITECMD,
 		EFM32_MSC_WRITECMD_LADDRIM_MASK, 1);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	ret = efm32x_read_reg_u32(bank, EFM32_MSC_REG_STATUS, &status);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	LOG_DEBUG("status 0x%" PRIx32, status);
@@ -836,27 +836,27 @@ static int efm32x_write_word(struct flash_bank *bank, uint32_t addr,
 
 	ret = efm32x_wait_status(bank, EFM32_FLASH_WDATAREADY_TMO,
 		EFM32_MSC_STATUS_WDATAREADY_MASK, 1);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Wait for WDATAREADY failed");
 		return ret;
 	}
 
 	ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_WDATA, val);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("WDATA write failed");
 		return ret;
 	}
 
 	ret = efm32x_write_reg_u32(bank, EFM32_MSC_REG_WRITECMD,
 		EFM32_MSC_WRITECMD_WRITEONCE_MASK);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("WRITECMD write failed");
 		return ret;
 	}
 
 	ret = efm32x_wait_status(bank, EFM32_FLASH_WRITE_TMO,
 		EFM32_MSC_STATUS_BUSY_MASK, 0);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Wait for BUSY failed");
 		return ret;
 	}
@@ -950,7 +950,7 @@ static int efm32x_probe(struct flash_bank *bank)
 	memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ);
 
 	ret = efm32x_read_info(bank, &efm32_mcu_info);
-	if (ERROR_OK != ret)
+	if (ret != ERROR_OK)
 		return ret;
 
 	LOG_INFO("detected part: %s Gecko, rev %d",
@@ -973,7 +973,7 @@ static int efm32x_probe(struct flash_bank *bank)
 	bank->num_sectors = num_pages;
 
 	ret = efm32x_read_lock_data(bank);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read LB data");
 		return ret;
 	}
@@ -1011,7 +1011,7 @@ static int efm32x_protect_check(struct flash_bank *bank)
 	}
 
 	ret = efm32x_read_lock_data(bank);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read LB data");
 		return ret;
 	}
@@ -1030,7 +1030,7 @@ static int get_efm32x_info(struct flash_bank *bank, struct command_invocation *c
 	int ret;
 
 	ret = efm32x_read_info(bank, &info);
-	if (ERROR_OK != ret) {
+	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read EFM32 info");
 		return ret;
 	}
@@ -1048,7 +1048,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
@@ -1065,7 +1065,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command)
 	*ptr = 0;
 
 	retval = efm32x_write_lock_data(bank);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("Failed to write LB page");
 		return retval;
 	}
diff --git a/src/flash/nor/em357.c b/src/flash/nor/em357.c
index 4e2a169..2597d8b 100644
--- a/src/flash/nor/em357.c
+++ b/src/flash/nor/em357.c
@@ -761,7 +761,7 @@ COMMAND_HANDLER(em357_handle_lock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	em357_info = bank->driver_priv;
@@ -800,7 +800,7 @@ COMMAND_HANDLER(em357_handle_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	target = bank->target;
@@ -873,7 +873,7 @@ COMMAND_HANDLER(em357_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = em357_mass_erase(bank);
diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c
index c5eab51..dc7dd40 100644
--- a/src/flash/nor/fm3.c
+++ b/src/flash/nor/fm3.c
@@ -949,7 +949,7 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (fm3_chip_erase(bank) == ERROR_OK) {
diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c
index 754957e..465199d 100644
--- a/src/flash/nor/lpc2000.c
+++ b/src/flash/nor/lpc2000.c
@@ -1569,7 +1569,7 @@ COMMAND_HANDLER(lpc2000_handle_part_id_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (bank->target->state != TARGET_HALTED) {
diff --git a/src/flash/nor/lpc2900.c b/src/flash/nor/lpc2900.c
index 4d3d7f7..4bf5297 100644
--- a/src/flash/nor/lpc2900.c
+++ b/src/flash/nor/lpc2900.c
@@ -487,7 +487,7 @@ COMMAND_HANDLER(lpc2900_handle_signature_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (bank->target->state != TARGET_HALTED) {
@@ -522,7 +522,7 @@ COMMAND_HANDLER(lpc2900_handle_read_custom_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@@ -584,7 +584,7 @@ COMMAND_HANDLER(lpc2900_handle_password_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@@ -614,7 +614,7 @@ COMMAND_HANDLER(lpc2900_handle_write_custom_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@@ -713,7 +713,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
 	/* Get the bank descriptor */
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
@@ -794,7 +794,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_jtag_command)
 	/* Get the bank descriptor */
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index 33d7868..a1bb668 100644
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -768,7 +768,7 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command)
 		return ERROR_OK;
 	}
 
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (max32xxx_mass_erase(bank) == ERROR_OK) {
@@ -796,7 +796,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
 	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 	info = bank->driver_priv;
 
@@ -852,7 +852,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
 	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 	info = bank->driver_priv;
 
@@ -907,13 +907,13 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command)
 	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 	info = bank->driver_priv;
 
 	/* Update the protection array */
 	retval = max32xxx_protect_check(bank);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_WARNING("Error updating the protection array");
 		return retval;
 	}
diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c
index 22f7c77..b418bf1 100644
--- a/src/flash/nor/msp432.c
+++ b/src/flash/nor/msp432.c
@@ -63,7 +63,7 @@ static int msp432_device_type(uint32_t family_type, uint32_t device_id,
 {
 	int device_type = MSP432_NO_TYPE;
 
-	if (MSP432E4 == family_type) {
+	if (family_type == MSP432E4) {
 		/* MSP432E4 device family */
 
 		if (device_id == 0x180C0002) {
@@ -191,7 +191,7 @@ static int msp432_exec_cmd(struct target *target, struct msp432_algo_params
 	/* Write out parameters to target memory */
 	retval = target_write_buffer(target, ALGO_PARAMS_BASE_ADDR,
 				sizeof(struct msp432_algo_params), (uint8_t *)algo_params);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Write out command to target memory */
@@ -209,9 +209,9 @@ static int msp432_wait_return_code(struct target *target)
 	int retval = ERROR_OK;
 
 	start_ms = timeval_ms();
-	while ((0 == return_code) || (FLASH_BUSY == return_code)) {
+	while ((0 == return_code) || (return_code == FLASH_BUSY)) {
 		retval = target_read_u32(target, ALGO_RETURN_CODE_ADDR, &return_code);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		elapsed_ms = timeval_ms() - start_ms;
@@ -221,7 +221,7 @@ static int msp432_wait_return_code(struct target *target)
 			break;
 	};
 
-	if (FLASH_SUCCESS != return_code) {
+	if (return_code != FLASH_SUCCESS) {
 		LOG_ERROR("msp432: Flash operation failed: %s",
 			msp432_return_text(return_code));
 		return ERROR_FAIL;
@@ -251,9 +251,9 @@ static int msp432_wait_inactive(struct target *target, uint32_t buffer)
 	}
 
 	start_ms = timeval_ms();
-	while (BUFFER_INACTIVE != status_code) {
+	while (status_code != BUFFER_INACTIVE) {
 		retval = target_read_u32(target, status_addr, &status_code);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		elapsed_ms = timeval_ms() - start_ms;
@@ -263,7 +263,7 @@ static int msp432_wait_inactive(struct target *target, uint32_t buffer)
 			break;
 	};
 
-	if (BUFFER_INACTIVE != status_code) {
+	if (status_code != BUFFER_INACTIVE) {
 		LOG_ERROR(
 			"msp432: Flash operation failed: buffer not written to flash");
 		return ERROR_FAIL;
@@ -286,7 +286,7 @@ static int msp432_init(struct flash_bank *bank)
 
 	/* Make sure we've probed the flash to get the device and size */
 	retval = msp432_auto_probe(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Choose appropriate flash helper algorithm */
@@ -339,7 +339,7 @@ static int msp432_init(struct flash_bank *bank)
 		target_free_working_area(target, msp432_bank->working_area);
 	retval = target_alloc_working_area(target, ALGO_WORKING_SIZE,
 				&msp432_bank->working_area);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Confirm the defined working address is the area we need to use */
@@ -349,7 +349,7 @@ static int msp432_init(struct flash_bank *bank)
 	/* Write flash helper algorithm into target memory */
 	retval = target_write_buffer(target, ALGO_BASE_ADDR, loader_size,
 				loader_code);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Initialize the ARMv7 specific info to run the algorithm */
@@ -362,7 +362,7 @@ static int msp432_init(struct flash_bank *bank)
 	/* Write out parameters to target memory */
 	retval = target_write_buffer(target, ALGO_PARAMS_BASE_ADDR,
 				sizeof(algo_params), (uint8_t *)&algo_params);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Initialize stack pointer for flash helper algorithm */
@@ -373,7 +373,7 @@ static int msp432_init(struct flash_bank *bank)
 	retval = target_start_algorithm(target, 0, 0, 1, reg_params,
 				algo_entry_addr, 0, &msp432_bank->armv7m_info);
 	destroy_reg_param(&reg_params[0]);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("msp432: Failed to start flash helper algorithm");
 		return retval;
 	}
@@ -385,7 +385,7 @@ static int msp432_init(struct flash_bank *bank)
 
 	/* Issue the init command to the flash helper algorithm */
 	retval = msp432_exec_cmd(target, &algo_params, FLASH_INIT);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = msp432_wait_return_code(target);
@@ -406,7 +406,7 @@ static int msp432_quit(struct flash_bank *bank)
 
 	/* Issue the exit command to the flash helper algorithm */
 	retval = msp432_exec_cmd(target, &algo_params, FLASH_EXIT);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	(void)msp432_wait_return_code(target);
@@ -438,7 +438,7 @@ static int msp432_mass_erase(struct flash_bank *bank, bool all)
 	}
 
 	retval = msp432_init(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Initialize algorithm parameters to default values */
@@ -452,19 +452,19 @@ static int msp432_mass_erase(struct flash_bank *bank, bool all)
 
 	/* Issue the mass erase command to the flash helper algorithm */
 	retval = msp432_exec_cmd(target, &algo_params, FLASH_MASS_ERASE);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		(void)msp432_quit(bank);
 		return retval;
 	}
 
 	retval = msp432_wait_return_code(target);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		(void)msp432_quit(bank);
 		return retval;
 	}
 
 	retval = msp432_quit(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	return retval;
@@ -507,7 +507,7 @@ COMMAND_HANDLER(msp432_mass_erase_command)
 	}
 
 	retval = msp432_mass_erase(bank, all);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (MSP432E4 == msp432_bank->family_type) {
@@ -614,7 +614,7 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first,
 	}
 
 	retval = msp432_init(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Initialize algorithm parameters to default values */
@@ -646,20 +646,20 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first,
 
 		/* Issue the sector erase command to the flash helper algorithm */
 		retval = msp432_exec_cmd(target, &algo_params, FLASH_SECTOR_ERASE);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			(void)msp432_quit(bank);
 			return retval;
 		}
 
 		retval = msp432_wait_return_code(target);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			(void)msp432_quit(bank);
 			return retval;
 		}
 	}
 
 	retval = msp432_quit(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	return retval;
@@ -705,7 +705,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
 			if (offset < start) {
 				uint32_t start_count = MIN(start - offset, count);
 				retval = msp432_write(bank, buffer, offset, start_count);
-				if (ERROR_OK != retval)
+				if (retval != ERROR_OK)
 					return retval;
 			}
 			/* Send a request for anything after read-only sectors */
@@ -723,7 +723,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 	retval = msp432_init(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Initialize algorithm parameters to default values */
@@ -742,7 +742,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
 
 	/* Set up flash helper algorithm to continuous flash mode */
 	retval = msp432_exec_cmd(target, &algo_params, FLASH_CONTINUOUS);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		(void)msp432_quit(bank);
 		return retval;
 	}
@@ -758,7 +758,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
 
 		/* Put next block of data to flash into buffer */
 		retval = target_write_buffer(target, ALGO_BUFFER1_ADDR, size, buffer);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("Unable to write data to target memory");
 			(void)msp432_quit(bank);
 			return ERROR_FLASH_OPERATION_FAILED;
@@ -767,13 +767,13 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
 		/* Signal the flash helper algorithm that data is ready to flash */
 		retval = target_write_u32(target, ALGO_BUFFER1_STATUS_ADDR,
 					data_ready);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			(void)msp432_quit(bank);
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
 
 		retval = msp432_wait_inactive(target, 1);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			(void)msp432_quit(bank);
 			return retval;
 		}
@@ -788,13 +788,13 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
 
 	/* Confirm that the flash helper algorithm is finished */
 	retval = msp432_wait_return_code(target);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		(void)msp432_quit(bank);
 		return retval;
 	}
 
 	retval = msp432_quit(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	return retval;
@@ -826,7 +826,7 @@ static int msp432_probe(struct flash_bank *bank)
 	/* Read the flash size register to determine this is a P4 or not */
 	/* MSP432P4s will return the size of flash.  MSP432E4s will return zero */
 	retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (0 == size) {
@@ -834,13 +834,13 @@ static int msp432_probe(struct flash_bank *bank)
 		msp432_bank->family_type = MSP432E4;
 
 		retval = target_read_u32(target, E4_DID0_REG, &device_id);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		msp432_bank->device_id = device_id;
 
 		retval = target_read_u32(target, E4_DID1_REG, &hardware_rev);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		msp432_bank->hardware_rev = hardware_rev;
@@ -849,13 +849,13 @@ static int msp432_probe(struct flash_bank *bank)
 		msp432_bank->family_type = MSP432P4;
 
 		retval = target_read_u32(target, P4_DEVICE_ID_REG, &device_id);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		msp432_bank->device_id = device_id & 0xFFFF;
 
 		retval = target_read_u32(target, P4_HARDWARE_REV_REG, &hardware_rev);
-		if (ERROR_OK != retval)
+		if (retval != ERROR_OK)
 			return retval;
 
 		msp432_bank->hardware_rev = hardware_rev & 0xFF;
@@ -868,7 +868,7 @@ static int msp432_probe(struct flash_bank *bank)
 		/* Set up MSP432P4 specific flash parameters */
 		if (is_main) {
 			retval = target_read_u32(target, P4_FLASH_MAIN_SIZE_REG, &size);
-			if (ERROR_OK != retval)
+			if (retval != ERROR_OK)
 				return retval;
 
 			sector_length = P4_SECTOR_LENGTH;
@@ -878,7 +878,7 @@ static int msp432_probe(struct flash_bank *bank)
 				msp432_bank->device_type == MSP432P411X_GUESS) {
 				/* MSP432P411x has an info size register, use that for size */
 				retval = target_read_u32(target, P4_FLASH_INFO_SIZE_REG, &size);
-				if (ERROR_OK != retval)
+				if (retval != ERROR_OK)
 					return retval;
 			} else {
 				/* All other MSP432P401x devices have fixed info region size */
diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index dc6b28d..38f900f 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -848,7 +848,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 2, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (address < bank->base || address >= (bank->base + bank->size)) {
@@ -885,7 +885,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	target = bank->target;
diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c
index cc2521b..28c2124 100644
--- a/src/flash/nor/psoc4.c
+++ b/src/flash/nor/psoc4.c
@@ -624,7 +624,7 @@ COMMAND_HANDLER(psoc4_handle_flash_autoerase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
@@ -898,7 +898,7 @@ COMMAND_HANDLER(psoc4_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = psoc4_mass_erase(bank);
diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c
index b42add9..a84fcf0 100644
--- a/src/flash/nor/sim3x.c
+++ b/src/flash/nor/sim3x.c
@@ -1039,7 +1039,7 @@ COMMAND_HANDLER(sim3x_lock)
 			return retval;
 
 		ret = sim3x_flash_write(bank, lock_word, LOCK_WORD_ADDRESS, 4);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			return ret;
 
 		LOG_INFO("Target is successfully locked");
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index 1e1ff60..569c09b 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -1315,7 +1315,7 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (stellaris_mass_erase(bank) == ERROR_OK) {
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index fbcf83a..d50e0d8 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -349,7 +349,7 @@ static int stm32x_protect_check(struct flash_bank *bank)
 	uint32_t protection;
 
 	int retval = stm32x_check_operation_supported(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* medium density - each bit refers to a 4 sector protection block
@@ -1197,7 +1197,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1210,7 +1210,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
 	}
 
 	retval = stm32x_check_operation_supported(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (stm32x_erase_options(bank) != ERROR_OK) {
@@ -1240,7 +1240,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	target = bank->target;
@@ -1251,7 +1251,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
 	}
 
 	retval = stm32x_check_operation_supported(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (stm32x_erase_options(bank) != ERROR_OK) {
@@ -1282,7 +1282,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1295,7 +1295,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
 	}
 
 	retval = stm32x_check_operation_supported(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = target_read_u32(target, STM32_FLASH_OBR_B0, &optionbyte);
@@ -1349,7 +1349,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1362,11 +1362,11 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
 	}
 
 	retval = stm32x_check_operation_supported(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_read_options(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* start with current options */
@@ -1438,7 +1438,7 @@ COMMAND_HANDLER(stm32x_handle_options_load_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
@@ -1457,7 +1457,7 @@ COMMAND_HANDLER(stm32x_handle_options_load_command)
 	}
 
 	retval = stm32x_check_operation_supported(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* unlock option flash registers */
@@ -1520,7 +1520,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_mass_erase(bank);
diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c
index f718e3b..00e6be0 100644
--- a/src/flash/nor/stm32f2x.c
+++ b/src/flash/nor/stm32f2x.c
@@ -1430,7 +1430,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1469,7 +1469,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1556,7 +1556,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_mass_erase(bank);
@@ -1585,11 +1585,11 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command)
 	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_read_options(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1631,11 +1631,11 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
 	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_read_options(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1693,7 +1693,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
 	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stm32x_info = bank->driver_priv;
@@ -1707,7 +1707,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
 				" finally unlock it. Clears PCROP and mass erases flash.");
 
 	retval = stm32x_read_options(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], optcr2_pcrop);
@@ -1731,7 +1731,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 	if (stm32x_is_otp(bank)) {
 		if (strcmp(CMD_ARGV[1], "enable") == 0) {
diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c
index 4c503db..16ab6ae 100644
--- a/src/flash/nor/stm32h7x.c
+++ b/src/flash/nor/stm32h7x.c
@@ -1003,7 +1003,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_set_rdp(bank, OPT_RDP_L1);
@@ -1023,7 +1023,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_set_rdp(bank, OPT_RDP_L0);
@@ -1083,7 +1083,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32x_mass_erase(bank);
@@ -1109,14 +1109,14 @@ COMMAND_HANDLER(stm32x_handle_option_read_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	uint32_t reg_offset, value;
 
 	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], reg_offset);
 	retval = stm32x_read_flash_reg(bank, reg_offset, &value);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32,
@@ -1134,7 +1134,7 @@ COMMAND_HANDLER(stm32x_handle_option_write_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	uint32_t reg_offset, value, mask = 0xffffffff;
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index aa4171e..9e460a2 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1708,7 +1708,7 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32l4_mass_erase(bank);
@@ -1734,7 +1734,7 @@ COMMAND_HANDLER(stm32l4_handle_option_read_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	uint32_t reg_offset, reg_addr;
@@ -1744,7 +1744,7 @@ COMMAND_HANDLER(stm32l4_handle_option_read_command)
 	reg_addr = stm32l4_get_flash_reg(bank, reg_offset);
 
 	retval = stm32l4_read_flash_reg(bank, reg_offset, &value);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", reg_addr, value);
@@ -1761,7 +1761,7 @@ COMMAND_HANDLER(stm32l4_handle_option_write_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	uint32_t reg_offset;
@@ -1788,15 +1788,15 @@ COMMAND_HANDLER(stm32l4_handle_option_load_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32l4_unlock_reg(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32l4_unlock_option_reg(bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	/* Set OBL_LAUNCH bit in CR -> system reset and option bytes reload,
@@ -1824,7 +1824,7 @@ COMMAND_HANDLER(stm32l4_handle_lock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (stm32l4_is_otp(bank)) {
@@ -1859,7 +1859,7 @@ COMMAND_HANDLER(stm32l4_handle_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (stm32l4_is_otp(bank)) {
@@ -1891,7 +1891,7 @@ COMMAND_HANDLER(stm32l4_handle_wrp_info_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (stm32l4_is_otp(bank)) {
@@ -1963,7 +1963,7 @@ COMMAND_HANDLER(stm32l4_handle_otp_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	if (!stm32l4_is_otp(bank)) {
diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c
index 5ca424b..e8655aa 100644
--- a/src/flash/nor/stm32lx.c
+++ b/src/flash/nor/stm32lx.c
@@ -313,7 +313,7 @@ COMMAND_HANDLER(stm32lx_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32lx_mass_erase(bank);
@@ -337,7 +337,7 @@ COMMAND_HANDLER(stm32lx_handle_lock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32lx_lock(bank);
@@ -357,7 +357,7 @@ COMMAND_HANDLER(stm32lx_handle_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = stm32lx_unlock(bank);
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c
index 978188e..e8e0061 100644
--- a/src/flash/nor/stmqspi.c
+++ b/src/flash/nor/stmqspi.c
@@ -509,7 +509,7 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	stmqspi_info = bank->driver_priv;
@@ -638,7 +638,7 @@ COMMAND_HANDLER(stmqspi_handle_set)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, index++, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	target = bank->target;
@@ -808,7 +808,7 @@ COMMAND_HANDLER(stmqspi_handle_cmd)
 	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	target = bank->target;
diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c
index cce8710..5f3ff00 100644
--- a/src/flash/nor/str7x.c
+++ b/src/flash/nor/str7x.c
@@ -728,7 +728,7 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str7x_info = bank->driver_priv;
diff --git a/src/flash/nor/str9x.c b/src/flash/nor/str9x.c
index 87ffec8..5c3a9cb 100644
--- a/src/flash/nor/str9x.c
+++ b/src/flash/nor/str9x.c
@@ -611,7 +611,7 @@ COMMAND_HANDLER(str9x_handle_flash_config_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	uint32_t bbsr, nbbsr, bbadr, nbbadr;
diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c
index 9946b06..1d9e59e 100644
--- a/src/flash/nor/str9xpec.c
+++ b/src/flash/nor/str9xpec.c
@@ -727,7 +727,7 @@ COMMAND_HANDLER(str9xpec_handle_part_id_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
@@ -768,7 +768,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_read_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
@@ -877,7 +877,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_write_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	status = str9xpec_write_options(bank);
@@ -901,7 +901,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
@@ -923,7 +923,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
@@ -945,7 +945,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
@@ -967,7 +967,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
@@ -989,7 +989,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_lock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	status = str9xpec_lock_device(bank);
@@ -1009,7 +1009,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_unlock_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	status = str9xpec_unlock_device(bank);
@@ -1036,7 +1036,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
@@ -1083,7 +1083,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	str9xpec_info = bank->driver_priv;
diff --git a/src/flash/nor/swm050.c b/src/flash/nor/swm050.c
index 98361eb..be7452b 100644
--- a/src/flash/nor/swm050.c
+++ b/src/flash/nor/swm050.c
@@ -142,7 +142,7 @@ COMMAND_HANDLER(swm050_handle_mass_erase_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = swm050_mass_erase(bank);
diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c
index 199bf2d..1705384 100644
--- a/src/flash/nor/tcl.c
+++ b/src/flash/nor/tcl.c
@@ -195,7 +195,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
 
 	struct flash_bank *p;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	retval = p->driver->erase_check(p);
@@ -286,7 +286,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
 	if (retval == ERROR_OK)
 		retval = flash_erase_address_range(target, do_pad, address, length);
 
-	if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
+	if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
 		command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %" PRIu32 ")"
 			" in %fs (%0.3f KiB/s)", address, length,
 			duration_elapsed(&bench), duration_kbps(&bench, length));
@@ -334,7 +334,7 @@ COMMAND_HANDLER(handle_flash_erase_command)
 
 	retval = flash_driver_erase(p, first, last);
 
-	if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
+	if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
 		command_print(CMD, "erased sectors %" PRIu32 " "
 			"through %" PRIu32 " on flash bank %u "
 			"in %fs", first, last, p->bank_number, duration_elapsed(&bench));
@@ -460,7 +460,7 @@ COMMAND_HANDLER(handle_flash_write_image_command)
 		return retval;
 	}
 
-	if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
+	if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
 		command_print(CMD, "wrote %" PRIu32 " bytes from file %s "
 			"in %fs (%0.3f KiB/s)", written, CMD_ARGV[0],
 			duration_elapsed(&bench), duration_kbps(&bench, written));
@@ -512,7 +512,7 @@ COMMAND_HANDLER(handle_flash_verify_image_command)
 		return retval;
 	}
 
-	if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
+	if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
 		command_print(CMD, "verified %" PRIu32 " bytes from file %s "
 			"in %fs (%0.3f KiB/s)", verified, CMD_ARGV[0],
 			duration_elapsed(&bench), duration_kbps(&bench, verified));
@@ -754,7 +754,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	offset = 0;
@@ -841,7 +841,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
 
 	free(buffer);
 
-	if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
+	if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
 		command_print(CMD, "wrote %zu bytes from file %s to flash bank %u"
 			" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
 			length, CMD_ARGV[1], bank->bank_number, offset,
@@ -870,7 +870,7 @@ COMMAND_HANDLER(handle_flash_read_bank_command)
 	struct flash_bank *p;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
 
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	offset = 0;
@@ -951,7 +951,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command)
 
 	struct flash_bank *p;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	offset = 0;
@@ -1072,7 +1072,7 @@ COMMAND_HANDLER(handle_flash_padded_value_command)
 
 	struct flash_bank *p;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	COMMAND_PARSE_NUMBER(u8, CMD_ARGV[1], p->default_padded_value);
@@ -1286,7 +1286,7 @@ COMMAND_HANDLER(handle_flash_bank_command)
 	if (NULL != driver->commands) {
 		int retval = register_commands(CMD_CTX, NULL,
 				driver->commands);
-		if (ERROR_OK != retval) {
+		if (retval != ERROR_OK) {
 			LOG_ERROR("couldn't register '%s' commands",
 				driver_name);
 			return ERROR_FAIL;
@@ -1306,7 +1306,7 @@ COMMAND_HANDLER(handle_flash_bank_command)
 
 	int retval;
 	retval = CALL_COMMAND_HANDLER(driver->flash_bank_command, c);
-	if (ERROR_OK != retval) {
+	if (retval != ERROR_OK) {
 		LOG_ERROR("'%s' driver rejected flash bank at " TARGET_ADDR_FMT
 				"; usage: %s", driver_name, c->base, driver->usage);
 		free(c);
diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index 1220a1e..1a37e9c 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -475,7 +475,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer,
 				w_buffer += len;
 				sector_bytes -= len;
 				ret = isc_program_data_page(bank, page_buf);
-				if (ERROR_OK != ret)
+				if (ret != ERROR_OK)
 					goto EXIT;
 				else {
 					LOG_DEBUG("written %d bytes from %d", dbg_written, dbg_count);
@@ -494,7 +494,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer,
 	if (write_flag) {
 		for (unsigned int i = 0; i < bank->num_sectors; i++) {
 			ret = isc_set_data_done(bank, i);
-			if (ERROR_OK != ret)
+			if (ret != ERROR_OK)
 				goto EXIT;
 		}
 	}
@@ -755,7 +755,7 @@ COMMAND_HANDLER(xcf_handle_ccb_command) {
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	uint16_t ccb = 0xFFFF;
@@ -800,29 +800,29 @@ COMMAND_HANDLER(xcf_handle_ccb_command) {
 		sector = gucr_num(bank);
 		isc_clear_protect(bank, sector, sector);
 		int ret = isc_erase_sectors(bank, sector, sector);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			goto EXIT;
 		ret = isc_program_ccb(bank, ccb);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			goto EXIT;
 		ret = isc_program_single_revision_btc(bank);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			goto EXIT;
 		ret = isc_set_data_done(bank, sector);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			goto EXIT;
 
 		/* SUCR sector */
 		sector = sucr_num(bank);
 		isc_clear_protect(bank, sector, sector);
 		ret = isc_erase_sectors(bank, sector, sector);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			goto EXIT;
 		ret = isc_program_singe_revision_sucr(bank);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			goto EXIT;
 		ret = isc_set_data_done(bank, sector);
-		if (ERROR_OK != ret)
+		if (ret != ERROR_OK)
 			goto EXIT;
 
 EXIT:
@@ -838,7 +838,7 @@ COMMAND_HANDLER(xcf_handle_configure_command) {
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-	if (ERROR_OK != retval)
+	if (retval != ERROR_OK)
 		return retval;
 
 	return fpga_configure(bank);