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| author | Tim Newsome <tim@sifive.com> | 2019-02-14 17:33:28 -0800 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-03-08 14:05:35 +0000 |
| commit | c3b90c052acfb7e35a0f4ce22276d53a96d631c7 (patch) | |
| tree | 38d260910f37f2213c6c1e3159dcef342ba25923 /src/flash/nor/stmsmi.c | |
| parent | 57e30102ea440d77aa001e26eb901d0cbb305a30 (diff) | |
| download | riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.zip riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.tar.gz riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.tar.bz2 | |
flash/nor: use target_addr_t for flash bank base
This should allow users to configure flash at >32-bit addresses.
Change-Id: I7c9d3c5762579011a2d9708e5317e5765349845c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4919
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src/flash/nor/stmsmi.c')
| -rw-r--r-- | src/flash/nor/stmsmi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/flash/nor/stmsmi.c b/src/flash/nor/stmsmi.c index 4d38e94..b55c8b9 100644 --- a/src/flash/nor/stmsmi.c +++ b/src/flash/nor/stmsmi.c @@ -559,13 +559,13 @@ static int stmsmi_probe(struct flash_bank *bank) stmsmi_info->bank_num = SMI_SEL_BANK3; break; default: - LOG_ERROR("Invalid SMI base address 0x%" PRIx32, bank->base); + LOG_ERROR("Invalid SMI base address " TARGET_ADDR_FMT, bank->base); return ERROR_FAIL; } io_base = target_device->io_base; stmsmi_info->io_base = io_base; - LOG_DEBUG("Valid SMI on device %s at address 0x%" PRIx32, + LOG_DEBUG("Valid SMI on device %s at address " TARGET_ADDR_FMT, target_device->name, bank->base); /* read and decode flash ID; returns in SW mode */ |