diff options
| author | Tim Newsome <tim@sifive.com> | 2019-02-14 17:33:28 -0800 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-03-08 14:05:35 +0000 |
| commit | c3b90c052acfb7e35a0f4ce22276d53a96d631c7 (patch) | |
| tree | 38d260910f37f2213c6c1e3159dcef342ba25923 /src/flash/nor/cfi.c | |
| parent | 57e30102ea440d77aa001e26eb901d0cbb305a30 (diff) | |
| download | riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.zip riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.tar.gz riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.tar.bz2 | |
flash/nor: use target_addr_t for flash bank base
This should allow users to configure flash at >32-bit addresses.
Change-Id: I7c9d3c5762579011a2d9708e5317e5765349845c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4919
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src/flash/nor/cfi.c')
| -rw-r--r-- | src/flash/nor/cfi.c | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index a2db50f..1638628 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -889,8 +889,8 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" - PRIx32, i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base " + TARGET_ADDR_FMT, i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } @@ -937,8 +937,8 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" - PRIx32, i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base " + TARGET_ADDR_FMT, i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } @@ -2001,8 +2001,9 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t if (retval != ERROR_OK) return retval; - LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address 0x%" PRIx32, - bank->base, address); + LOG_ERROR("couldn't write word at base " TARGET_ADDR_FMT + ", address 0x%" PRIx32, + bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -2026,9 +2027,9 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, /* Check for valid range */ if (address & buffermask) { - LOG_ERROR("Write address at base 0x%" PRIx32 ", address 0x%" PRIx32 - " not aligned to 2^%d boundary", - bank->base, address, cfi_info->max_buf_write_size); + LOG_ERROR("Write address at base " TARGET_ADDR_FMT ", address 0x%" + PRIx32 " not aligned to 2^%d boundary", + bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } @@ -2056,7 +2057,8 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, return retval; LOG_ERROR( - "couldn't start buffer write operation at base 0x%" PRIx32 ", address 0x%" PRIx32, + "couldn't start buffer write operation at base " TARGET_ADDR_FMT + ", address 0x%" PRIx32, bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -2085,7 +2087,7 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, if (retval != ERROR_OK) return retval; - LOG_ERROR("Buffer write at base 0x%" PRIx32 + LOG_ERROR("Buffer write at base " TARGET_ADDR_FMT ", address 0x%" PRIx32 " failed.", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -2121,7 +2123,7 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3 if (retval != ERROR_OK) return retval; - LOG_ERROR("couldn't write word at base 0x%" PRIx32 + LOG_ERROR("couldn't write word at base " TARGET_ADDR_FMT ", address 0x%" PRIx32, bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -2147,7 +2149,7 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word /* Check for valid range */ if (address & buffermask) { - LOG_ERROR("Write address at base 0x%" PRIx32 + LOG_ERROR("Write address at base " TARGET_ADDR_FMT ", address 0x%" PRIx32 " not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; @@ -2193,7 +2195,7 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word if (retval != ERROR_OK) return retval; - LOG_ERROR("couldn't write block at base 0x%" PRIx32 + LOG_ERROR("couldn't write block at base " TARGET_ADDR_FMT ", address 0x%" PRIx32 ", size 0x%" PRIx32, bank->base, address, bufferwsize); return ERROR_FLASH_OPERATION_FAILED; |