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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2021-03-16 16:10:59 +0100 |
|---|---|---|
| committer | Oleksij Rempel <linux@rempel-privat.de> | 2021-08-30 07:51:52 +0000 |
| commit | c2ad18d68b79b0466782b945a2ef4bb723071282 (patch) | |
| tree | 4782601ec90eae6d3b2c55691c471e6e2169dc15 /doc | |
| parent | 6c1e1a212a8c044ae778c526851fe909bf219e90 (diff) | |
| download | riscv-openocd-c2ad18d68b79b0466782b945a2ef4bb723071282.zip riscv-openocd-c2ad18d68b79b0466782b945a2ef4bb723071282.tar.gz riscv-openocd-c2ad18d68b79b0466782b945a2ef4bb723071282.tar.bz2 | |
flash/stm32l4x: add support of STM32U57x/U58x
this device flash registers are quite similar to STM32L5
with this changes :
- flash size is up to 2MB
- 2MB variants are always dual bank
- 1MB and 512KB variants could be dual bank (contiguous addressing)
depending on DUALBANK bit(21)
- flash data width is 16 bytes (quad-word)
Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/openocd.texi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 4404807..2759a39 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -7302,7 +7302,7 @@ The @var{num} parameter is a value shown by @command{flash banks}. @end deffn @deffn {Flash Driver} {stm32l4x} -All members of the STM32 G0, G4, L4, L4+, L5, WB and WL +All members of the STM32 G0, G4, L4, L4+, L5, U5, WB and WL microcontroller families from STMicroelectronics include internal flash and use ARM Cortex-M0+, M4 and M33 cores. The driver automatically recognizes a number of these chips using |