diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-19 13:09:19 -0800 |
---|---|---|
committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-19 13:09:19 -0800 |
commit | abe8b43755fdbc4fe92b966c48b367159deff226 (patch) | |
tree | 45ab3a2c03476db594f54c966d043fcb07b5fc28 /doc | |
parent | 64934d9204dc854d40893634a66e29ece09ad578 (diff) | |
download | riscv-openocd-abe8b43755fdbc4fe92b966c48b367159deff226.zip riscv-openocd-abe8b43755fdbc4fe92b966c48b367159deff226.tar.gz riscv-openocd-abe8b43755fdbc4fe92b966c48b367159deff226.tar.bz2 |
ETM: add "etm trigger_debug" command
In conjunction with manual register setup, this lets the ETM trigger
cause entry to debug state. It should make it easier to test and
bugfix the ETM code, by enabling non-trace usage and isolating bugs
specific to thef ETM support. (One current issue being that trace
data collection using the ETB doesn't yet behave.)
For example, many ARM9 cores with an ETM should be able to implement
four more (simple) breakpoints and two more (simple) watchpoints than
the EmbeddedICE supports. Or, they should be able to support complex
breakpoints, incorporating ETM sequencer, counters, and/or subroutine
entry/exit criteria int criteria used to trigger debug entry.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index bb3e51a..d9cb4ea 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5512,6 +5512,17 @@ trace stream without an image of the code. @end itemize @end deffn +@deffn Command {etm trigger_debug} (@option{enable}|@option{disable}) +Displays whether ETM triggering debug entry (like a breakpoint) is +enabled or disabled, after optionally modifying that configuration. +The default behaviour is @option{disable}. +Any change takes effect after the next @command{etm start}. + +By using script commands to configure ETM registers, you can make the +processor enter debug state automatically when certain conditions, +more complex than supported by the breakpoint hardware, happen. +@end deffn + @subsection ETM Trace Operation After setting up the ETM, you can use it to collect data. |