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author | Marc Schink <dev@zapb.de> | 2023-11-14 10:55:46 +0100 |
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committer | Antonio Borneo <borneo.antonio@gmail.com> | 2023-12-30 13:15:03 +0000 |
commit | 5c53034d85480d0855394c4683733f61b27b6c5e (patch) | |
tree | 330667f716e89ca09992b12cdc188bc9be4f7379 /doc | |
parent | b0f99dfed0d0f95d3f9190f1767b4f2f6969f5bc (diff) | |
download | riscv-openocd-5c53034d85480d0855394c4683733f61b27b6c5e.zip riscv-openocd-5c53034d85480d0855394c4683733f61b27b6c5e.tar.gz riscv-openocd-5c53034d85480d0855394c4683733f61b27b6c5e.tar.bz2 |
doc/openocd: Mention APM32F1 and APM32F4 series
Change-Id: I2ff28b0fdf4923a58771a44ad6e83ac871d6fa9e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8018
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 395d03c..cc133f7 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -7709,7 +7709,7 @@ applied to all of them. @deffn {Flash Driver} {stm32f1x} This driver supports the STM32F0, STM32F1 and STM32F3 microcontroller series from STMicroelectronics. The driver is also compatible with the GD32F1, GD32VF103 (RISC-V core), GD32F3 and GD32E23 microcontroller series from GigaDevice. -The driver also supports the APM32F0 series from Geehy Semiconductor. +The driver also supports the APM32F0 and APM32F1 series from Geehy Semiconductor. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. @example @@ -7771,6 +7771,7 @@ The @var{num} parameter is a value shown by @command{flash banks}. @deffn {Flash Driver} {stm32f2x} All members of the STM32F2, STM32F4 and STM32F7 microcontroller families from STMicroelectronics include internal flash and use ARM Cortex-M3/M4/M7 cores. +The driver also works for the APM32F4 series from Geehy Semiconductor. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. |