jtag/drivers: Add dmem driver

Direct memory driver support for CoreSight Access Port(AP).

Even though we emulate SWD (serial wire debug), we aren't actually
using swd. Instead, we are using a direct memory access to get to the
register set. This is similar in approach to other fast access native
drivers such as am335xgpio drivers.

Example operation on Texas Instrument's AM62x K3 SoC:

+-----------+
|  OpenOCD  |   SoC mem map
|    on     |--------------+
| Cortex-A53|              |
+-----------+              |
                           |
+-----------+        +-----v-----+
|Cortex-M4F |<───────|           |
+-----------+        |           |
                     |  DebugSS  |
+-----------+        |           |
|Cortex-M4F |<───────|           |
+-----------+        +-----------+

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jason Peck <jpeck@ti.com>
Change-Id: I8470cb15348863dd844b2c0e3f63a9063cb032c6
Reviewed-on: https://review.openocd.org/c/openocd/+/7088
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

1 files changed, 60 insertions, 0 deletions

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 3348e47..6f16c9f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3568,6 +3568,66 @@ espusbjtag chip_id 1
 
 @end deffn
 
+@deffn {Interface Driver} {dmem} Direct Memory access debug interface
+
+The Texas Instruments K3 SoC family provides memory access to DAP
+and coresight control registers. This allows control over the
+microcontrollers directly from one of the processors on the SOC
+itself.
+
+For maximum performance, the driver accesses the debug registers
+directly over the SoC memory map. The memory mapping requires read
+and write permission to kernel memory via "/dev/mem" and assumes that
+the system firewall configurations permit direct access to the debug
+memory space.
+
+@verbatim
++-----------+
+|  OpenOCD  |   SoC mem map (/dev/mem)
+|    on     +--------------+
+| Cortex-A53|              |
++-----------+              |
+                           |
++-----------+        +-----v-----+
+|Cortex-M4F <--------+           |
++-----------+        |           |
+                     |  DebugSS  |
++-----------+        |           |
+|Cortex-M4F <--------+           |
++-----------+        +-----------+
+@end verbatim
+
+NOTE: Firewalls are configurable in K3 SoC and depending on various types of
+device configuration, this function may be blocked out. Typical behavior
+observed in such cases is a firewall exception report on the security
+controller and armv8 processor reporting a system error.
+
+See @file{tcl/interface/ti_k3_am625-swd-native.cfg} for a sample configuration
+file.
+
+@deffn {Command} {dmem info}
+Print the DAPBUS dmem configuration.
+@end deffn
+
+@deffn {Config Command} {dmem device} device_path
+Set the DAPBUS memory access device (default: /dev/mem).
+@end deffn
+
+@deffn {Config Command} {dmem base_address} base_address
+Set the DAPBUS base address which is used to access CoreSight
+compliant Access Ports (APs) directly.
+@end deffn
+
+@deffn {Config Command} {dmem ap_address_offset} offset_address
+Set the address offset between Access Ports (APs).
+@end deffn
+
+@deffn {Config Command} {dmem max_aps} n
+Set the maximum number of valid access ports on the SoC.
+@end deffn
+
+@end deffn
+
 @section Transport Configuration
 @cindex Transport
 As noted earlier, depending on the version of OpenOCD you use,