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| author | Robert Jordens <jordens@gmail.com> | 2015-07-02 23:15:53 -0600 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2015-08-06 13:14:01 +0100 |
| commit | 2d99a0defa8fde13d4f421d54dbb6246b908303d (patch) | |
| tree | c1d7fa13a10341bdfbb04de06ead846b0eb95946 /HACKING | |
| parent | 76586814a58106c43549feea7a1e4ba16eee9c27 (diff) | |
| download | riscv-openocd-2d99a0defa8fde13d4f421d54dbb6246b908303d.zip riscv-openocd-2d99a0defa8fde13d4f421d54dbb6246b908303d.tar.gz riscv-openocd-2d99a0defa8fde13d4f421d54dbb6246b908303d.tar.bz2 | |
cpld/virtex2: allow JSTART to be disabled
This adds an option to disable the use of the JSTART instruction
when loading bitstreams to xilinx fpgas. JSTART apparently prevents
configuration if the startup clock is not set to the jtag clock in
the bitstream.
xc3sprog is omitting JSTART for all devices. Problems with loading a bitstream
that does not have StartupClk:JTAGClk are described here:
http://www.xilinx.com/support/answers/56151.html
Change-Id: I8137c0bae05a8c3c6f8e2611869f70a770d1651d
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2860
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'HACKING')
0 files changed, 0 insertions, 0 deletions