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| author | Omair Javaid <omair.javaid@linaro.org> | 2019-03-31 01:35:43 +0500 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-06-19 09:36:02 +0100 |
| commit | ae449bb5f964032e3fb035c49aa54b6d2a9058c5 (patch) | |
| tree | e64a506b18a904c94cdbbac4c1ca7ceb68ad2e08 /ChangeLog | |
| parent | bc94ca241a5d9b1bbd0b0e79f577a27dab58ecd0 (diff) | |
| download | riscv-openocd-ae449bb5f964032e3fb035c49aa54b6d2a9058c5.zip riscv-openocd-ae449bb5f964032e3fb035c49aa54b6d2a9058c5.tar.gz riscv-openocd-ae449bb5f964032e3fb035c49aa54b6d2a9058c5.tar.bz2 | |
Configs for ARM corelink SSE-200 target and Musca A board
This patch adds configuration files for ARM CoreLink SSE-200 SoCs. Also
adds configuration file for SSE-200 based Musca A board. Flash programming
support for Musca A QSPI flash is still not functional. This configuration
will be updated once that support lands into OpenOCD.
Please refer to ARM documentation for more information about SSE-200 and
Musca A.
Change-Id: Id3783c34d6e2609d659ef91c0bf7252c39439874
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/5006
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'ChangeLog')
0 files changed, 0 insertions, 0 deletions