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| author | Mariano Alvira <mar@devl.org> | 2010-02-27 22:51:41 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-27 22:51:41 -0800 |
| commit | e4a40d257d6c8fa393929cda50c0a1d777787da2 (patch) | |
| tree | 939fc2f8b2e086fae1da31df5cd1bea014124bae | |
| parent | e70d42a727bebc5ae0ce0b1386620d30ea00b05b (diff) | |
| download | riscv-openocd-e4a40d257d6c8fa393929cda50c0a1d777787da2.zip riscv-openocd-e4a40d257d6c8fa393929cda50c0a1d777787da2.tar.gz riscv-openocd-e4a40d257d6c8fa393929cda50c0a1d777787da2.tar.bz2 | |
Add target/mc13224v.cfg
The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for
Zigbee and similar low-power wireless applications. Using PIP
(Platform In Package) technology, it integrates: an RF balun and
matching network; a buck converter (only an external inductor is
necessary); 96KB of SRAM; and 128KB of non-volatile memory.
It has an integrated bootloader and can boot from a variety of sources:
external SPI or I2C non-volatile memory, an image loaded over UART1,
or the internal non-volatile memory. The image loaded from one of these
sources is executed directly from SRAM starting at location 0x00400000.
Open source development code at http://mc1322x.devl.org
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| -rw-r--r-- | tcl/target/mc13224v.cfg | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/tcl/target/mc13224v.cfg b/tcl/target/mc13224v.cfg new file mode 100644 index 0000000..497e376 --- /dev/null +++ b/tcl/target/mc13224v.cfg @@ -0,0 +1,54 @@ +source [find bitsbytes.tcl] +source [find cpu/arm/arm7tdmi.tcl] +source [find memory.tcl] +source [find mmr_helpers.tcl] + +set CHIP_MAKER freescale +set CHIP_FAMILY mc1322x +set CHIP_NAME mc13224 +set N_RAM 1 +set RAM(0,BASE) 0x00400000 +set RAM(0,LEN) 0x18000 +set RAM(0,HUMAN) "internal SRAM" +set RAM(0,TYPE) "ram" +set RAM(0,RWX) $RWX_RWX +set RAM(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY + +# I AM LAZY... I create 1 region for all MMRs. +set N_MMREGS 1 +set MMREGS(0,CHIPSELECT) -1 +set MMREGS(0,BASE) 0x80000000 +set MMREGS(0,LEN) 0x00030000 +set MMREGS(0,HUMAN) "mm-regs" +set MMREGS(0,TYPE) "mmr" +set MMREGS(0,RWX) $RWX_RW +set MMREGS(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY + +set N_XMEM 0 + +set _CHIPNAME mc13224v +set _CPUTAPID 0x1f1f001d + +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +reset_config srst_only +jtag_ntrst_delay 200 + +# rclk hasn't been working well. This maybe the mc13224v or something else. +#jtag_rclk 2000 +jtag_khz 2000 + +###################### +# Target configuration +###################### + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME + +# Internal sram memory +$_TARGETNAME configure -work-area-phys 0x00408000 \ + -work-area-size 0x1000 \ + -work-area-backup 1 + +# flash support is pending (should be straightforward to implement) +#flash bank mc1322x 0 0 0 0 $_TARGETNAME |