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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2021-02-14 13:22:03 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-06-13 19:59:16 +0100 |
| commit | cb5d9e0098a62b388fcfc7c89ddb6cda2be77a38 (patch) | |
| tree | 46a7ef133d5ac82e99e51cac204962fad40ee19e | |
| parent | 708284a1accfa01c7a14ea7d7cd588000776d6b7 (diff) | |
| download | riscv-openocd-cb5d9e0098a62b388fcfc7c89ddb6cda2be77a38.zip riscv-openocd-cb5d9e0098a62b388fcfc7c89ddb6cda2be77a38.tar.gz riscv-openocd-cb5d9e0098a62b388fcfc7c89ddb6cda2be77a38.tar.bz2 | |
armv4_5: do not read/write non-existent registers
Change-Id: I4a0c401a325e57ba5d4d93d83b7e6b71a4d0865e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6064
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
| -rw-r--r-- | src/target/armv4_5.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 8ba9136..084a6f9 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -1681,7 +1681,7 @@ static int arm_full_context(struct target *target) int retval = ERROR_OK; for (; num_regs && retval == ERROR_OK; num_regs--, reg++) { - if (reg->valid) + if (!reg->exist || reg->valid) continue; retval = armv4_5_get_core_reg(reg); } |