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| author | Tim Newsome <tim@sifive.com> | 2019-01-07 12:16:51 -0800 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2019-01-07 12:16:51 -0800 |
| commit | 6faa9ded26d49bf7d989dfa190a2231b2159c301 (patch) | |
| tree | ac46e9605821fff3b3bcd7c3c36cfa4a94ec7845 | |
| parent | f9af0b6cca392116d15cb0b3f48cd7ba55420131 (diff) | |
| download | riscv-openocd-6faa9ded26d49bf7d989dfa190a2231b2159c301.zip riscv-openocd-6faa9ded26d49bf7d989dfa190a2231b2159c301.tar.gz riscv-openocd-6faa9ded26d49bf7d989dfa190a2231b2159c301.tar.bz2 | |
Clean up debug printf.
I only need to see 64 bits of PC if the high bits are non-zero.
Change-Id: I29397791da1e3f1705e573b2eaafc3eac202e178
| -rw-r--r-- | src/target/riscv/riscv-013.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index b734104..75224e9 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2798,7 +2798,7 @@ static int riscv013_get_register(struct target *target, int result = ERROR_OK; if (rid == GDB_REGNO_PC) { result = register_read(target, value, GDB_REGNO_DPC); - LOG_DEBUG("read PC from DPC: 0x%016" PRIx64, *value); + LOG_DEBUG("read PC from DPC: 0x%" PRIx64, *value); } else if (rid == GDB_REGNO_PRIV) { uint64_t dcsr; result = register_read(target, &dcsr, GDB_REGNO_DCSR); @@ -2822,7 +2822,7 @@ static int riscv013_set_register(struct target *target, int hid, int rid, uint64 if (rid <= GDB_REGNO_XPR31) { return register_write_direct(target, rid, value); } else if (rid == GDB_REGNO_PC) { - LOG_DEBUG("writing PC to DPC: 0x%016" PRIx64, value); + LOG_DEBUG("writing PC to DPC: 0x%" PRIx64, value); register_write_direct(target, GDB_REGNO_DPC, value); uint64_t actual_value; register_read_direct(target, &actual_value, GDB_REGNO_DPC); |