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authorSpencer Oliver <ntfreak@users.sourceforge.net>2010-02-26 23:25:55 +0000
committerSpencer Oliver <ntfreak@users.sourceforge.net>2010-02-28 22:48:19 +0000
commit550abe7396f60274ffd0c5f373eda046af9d9a85 (patch)
tree27e3173068e8c044f3c006b664abcf03270ed460
parent4c9f29bd9c9e38c3f495f8c26869f4dfe8fe9983 (diff)
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CortexM3: move disassemble cmd to arm cmd group
Rather than using a Cortex disassemble cmd, we now use the arm generic version. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
-rw-r--r--doc/openocd.texi6
-rw-r--r--src/target/cortex_m3.c51
2 files changed, 0 insertions, 57 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 9da2977..d54ad12 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6427,12 +6427,6 @@ If @var{value} is defined, first assigns that.
@subsection Cortex-M3 specific commands
@cindex Cortex-M3
-@deffn Command {cortex_m3 disassemble} address [count]
-@cindex disassemble
-Disassembles @var{count} Thumb2 instructions starting at @var{address}.
-If @var{count} is not specified, a single instruction is disassembled.
-@end deffn
-
@deffn Command {cortex_m3 maskisr} (@option{on}|@option{off})
Control masking (disabling) interrupts during target step/resume.
@end deffn
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 3ebc34a..0aa7ac1 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -1899,50 +1899,6 @@ static int cortex_m3_verify_pointer(struct command_context *cmd_ctx,
* cortexm3_target structure, which is only used with CM3 targets.
*/
-/*
- * REVISIT Thumb2 disassembly should work for all ARMv7 cores, as well
- * as at least ARM-1156T2. The interesting thing about Cortex-M is
- * that *only* Thumb2 disassembly matters. There are also some small
- * additions to Thumb2 that are specific to ARMv7-M.
- */
-COMMAND_HANDLER(handle_cortex_m3_disassemble_command)
-{
- int retval;
- struct target *target = get_current_target(CMD_CTX);
- struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
- uint32_t address;
- unsigned long count = 1;
- struct arm_instruction cur_instruction;
-
- retval = cortex_m3_verify_pointer(CMD_CTX, cortex_m3);
- if (retval != ERROR_OK)
- return retval;
-
- errno = 0;
- switch (CMD_ARGC) {
- case 2:
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], count);
- /* FALL THROUGH */
- case 1:
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
- break;
- default:
- command_print(CMD_CTX,
- "usage: cortex_m3 disassemble <address> [<count>]");
- return ERROR_OK;
- }
-
- while (count--) {
- retval = thumb2_opcode(target, address, &cur_instruction);
- if (retval != ERROR_OK)
- return retval;
- command_print(CMD_CTX, "%s", cur_instruction.text);
- address += cur_instruction.instruction_size;
- }
-
- return ERROR_OK;
-}
-
static const struct {
char name[10];
unsigned mask;
@@ -2057,13 +2013,6 @@ COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
static const struct command_registration cortex_m3_exec_command_handlers[] = {
{
- .name = "disassemble",
- .handler = handle_cortex_m3_disassemble_command,
- .mode = COMMAND_EXEC,
- .help = "disassemble Thumb2 instructions",
- .usage = "address [count]",
- },
- {
.name = "maskisr",
.handler = handle_cortex_m3_mask_interrupts_command,
.mode = COMMAND_EXEC,