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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2024-04-13 18:46:11 +0200 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2024-05-04 08:34:37 +0000 |
| commit | 42e31d75b443e369597669b5ff7901de902ad35e (patch) | |
| tree | 56840166bfe937157bbe6f6d240ec45c49007644 | |
| parent | 89d881c19ae89712652f17962b8b7d2e79e25ca3 (diff) | |
| download | riscv-openocd-42e31d75b443e369597669b5ff7901de902ad35e.zip riscv-openocd-42e31d75b443e369597669b5ff7901de902ad35e.tar.gz riscv-openocd-42e31d75b443e369597669b5ff7901de902ad35e.tar.bz2 | |
target: aarch64: fix regs invalidation when -defer-examine
The code for aarch64 allocates the register cache during the very
first examine of the target.
To prevent a segmentation fault in assert_reset(), the call to
register_cache_invalidate() is guarded by target_was_examined().
But for targets with -defer-examine, the target is set as not
examined in handle_target_reset() just before entering in
assert_reset().
This causes registers to not be invalidated while reset a target
examined but with -defer-examine.
Change the condition and invalidate the register cache if it has
been already allocated.
Change-Id: Ie13abb0ae2cc28fc3295d678c4ad1691024eb7b8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8214
Tested-by: jenkins
| -rw-r--r-- | src/target/aarch64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 2e4d0b5..6a70b2d 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -1983,7 +1983,7 @@ static int aarch64_assert_reset(struct target *target) } /* registers are now invalid */ - if (target_was_examined(target)) { + if (armv8->arm.core_cache) { register_cache_invalidate(armv8->arm.core_cache); register_cache_invalidate(armv8->arm.core_cache->next); } |