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author | Tomas Vanek <vanekt@fbl.cz> | 2024-01-21 10:15:07 +0100 |
---|---|---|
committer | Antonio Borneo <borneo.antonio@gmail.com> | 2024-02-11 23:02:09 +0000 |
commit | 38616990744b2bac7026f0d41da9247b42494379 (patch) | |
tree | 067e11be71ddc77ceab0fb40a7b6eb459a4bc6f6 | |
parent | 0d3d4c981ac77b600ce95c9ea6f1cdb280127342 (diff) | |
download | riscv-openocd-38616990744b2bac7026f0d41da9247b42494379.zip riscv-openocd-38616990744b2bac7026f0d41da9247b42494379.tar.gz riscv-openocd-38616990744b2bac7026f0d41da9247b42494379.tar.bz2 |
target/cortex_m: prevent asserting reset if examine is deferred
In a corner case when debug_ap is not available,
cortex_m_assert_reset() asserts reset to restore
communication with the target.
Prevent to do so on targets with defer_examine,
as such targets need some special handling to enable them
after reset anyway.
The change makes possible to handle a multicore Cortex-M SoC with
an auxiliary Cortex-M core(s) switched of by default
even with 'reset_config srst_gates_jtag'
Change-Id: I8cec7a816423e588d5e2e4f7904c81c776eddc42
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8097
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
-rw-r--r-- | src/target/cortex_m.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 6a29a5f..8bb852f 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1625,7 +1625,8 @@ static int cortex_m_assert_reset(struct target *target) bool srst_asserted = false; if ((jtag_reset_config & RESET_HAS_SRST) && - ((jtag_reset_config & RESET_SRST_NO_GATING) || !armv7m->debug_ap)) { + ((jtag_reset_config & RESET_SRST_NO_GATING) + || (!armv7m->debug_ap && !target->defer_examine))) { /* If we have no debug_ap, asserting SRST is the only thing * we can do now */ adapter_assert_reset(); |