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| author | Tim Newsome <tim@sifive.com> | 2023-09-22 09:46:00 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2023-09-22 09:46:52 -0700 |
| commit | b465ef97340f83d0964895e2415fa706a7347c43 (patch) | |
| tree | 8bb6ceb0d09c542f89910196f25f008025a3ec56 | |
| parent | 67c2835997c206ddeba58cfc0fad76789db7474b (diff) | |
| download | riscv-openocd-reset_test.zip riscv-openocd-reset_test.tar.gz riscv-openocd-reset_test.tar.bz2 | |
DMI read before asserting ndmreset/haltreq.reset_test
In case the target needs a moment to recover from the tap/system reset
that might have been performed earlier.
Change-Id: Ifb899098b37d30ebd9024ebc309abbe53bedd906
Signed-off-by: Tim Newsome <tim@sifive.com>
| -rw-r--r-- | src/jtag/drivers/ftdi.c | 2 | ||||
| -rw-r--r-- | src/target/riscv/riscv-013.c | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c index d2dd893..2e3e079 100644 --- a/src/jtag/drivers/ftdi.c +++ b/src/jtag/drivers/ftdi.c @@ -197,6 +197,8 @@ static int ftdi_set_signal(const struct signal *s, char value) bool data; bool oe; + LOG_DEBUG_IO("set signal '%s' to '%c'", s->name, value); + if (s->data_mask == 0 && s->oe_mask == 0) { LOG_ERROR("interface doesn't provide signal '%s'", s->name); return ERROR_FAIL; diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 9122d28..9bd10ac 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2814,6 +2814,12 @@ static int assert_reset(struct target *target) select_dmi(target); + /* When we get here, OpenOCD might just have done some reset, which may + * have affected DMI or DM. Read a register just to make sure + * everything's in sync again. */ + if (dm_read(target, NULL, DM_DMSTATUS) != ERROR_OK) + return ERROR_FAIL; + if (target_has_event_action(target, TARGET_EVENT_RESET_ASSERT)) { /* Run the user-supplied script if there is one. */ target_handle_event(target, TARGET_EVENT_RESET_ASSERT); |