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| author | Tim Newsome <tim@sifive.com> | 2020-04-21 10:48:03 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2020-04-21 10:48:03 -0700 |
| commit | 397d5be64b1c8e1a2e5bd2b38572c1ff096570f4 (patch) | |
| tree | d987f8815d6dc4d9189340106b96951cf79eefc9 | |
| parent | bd7d75d4b936dcefc24ea8fb1314876bb5bd6953 (diff) | |
| download | riscv-openocd-regcache.zip riscv-openocd-regcache.tar.gz riscv-openocd-regcache.tar.bz2 | |
Don't read registers that we know don't exist.regcache
Change-Id: Ie5c6226b3d4ecb6cf8f0d8954a52fda88e6e5bdd
| -rw-r--r-- | src/target/riscv/riscv.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 2d04e9f..1345078 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3096,6 +3096,11 @@ int riscv_get_register_on_hart(struct target *target, riscv_reg_t *value, RISCV_INFO(r); struct reg *reg = &target->reg_cache->reg_list[regid]; + if (!reg->exist) { + LOG_DEBUG("[%s]{%d} %s does not exist.", + target_name(target), hartid, gdb_regno_name(regid)); + return ERROR_FAIL; + } if (reg && reg->valid && hartid == riscv_current_hartid(target)) { *value = buf_get_u64(reg->value, 0, reg->size); |