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authorTim Newsome <tim@sifive.com>2023-04-05 10:48:56 -0700
committerGitHub <noreply@github.com>2023-04-05 10:48:56 -0700
commit7e36bb615837f53bd4c720451e057e3b7d4745b3 (patch)
tree6e9468cb2871e8a127ee2d1078a4787bc463bf6f
parent4fdcc14e2645252916cc2e8467ff5ce95f4795dc (diff)
parentc6ba4166e47c3bc319babfabac9227e2db7ac7d5 (diff)
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Merge branch 'riscv' into hypervisor
Signed-off-by: Tim Newsome <tim@sifive.com>
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-rw-r--r--tcl/target/fm4.cfg2
-rw-r--r--tcl/target/fm4_mb9bf.cfg2
-rw-r--r--tcl/target/fm4_s6e2cc.cfg2
-rw-r--r--tcl/target/gd32vf103.cfg10
-rw-r--r--tcl/target/gp326xxxa.cfg2
-rw-r--r--tcl/target/hi3798.cfg2
-rw-r--r--tcl/target/hi6220.cfg2
-rw-r--r--tcl/target/hilscher_netx10.cfg2
-rw-r--r--tcl/target/hilscher_netx50.cfg2
-rw-r--r--tcl/target/hilscher_netx500.cfg2
-rw-r--r--tcl/target/icepick.cfg2
-rw-r--r--tcl/target/imx.cfg2
-rw-r--r--tcl/target/imx21.cfg2
-rw-r--r--tcl/target/imx25.cfg2
-rw-r--r--tcl/target/imx27.cfg2
-rw-r--r--tcl/target/imx28.cfg2
-rw-r--r--tcl/target/imx31.cfg2
-rw-r--r--tcl/target/imx35.cfg2
-rw-r--r--tcl/target/imx51.cfg2
-rw-r--r--tcl/target/imx53.cfg2
-rw-r--r--tcl/target/imx6.cfg2
-rw-r--r--tcl/target/imx6sx.cfg2
-rw-r--r--tcl/target/imx6ul.cfg2
-rw-r--r--tcl/target/imx7.cfg2
-rw-r--r--tcl/target/imx7ulp.cfg2
-rw-r--r--tcl/target/imx8m.cfg5
-rw-r--r--tcl/target/imx8qm.cfg2
-rw-r--r--tcl/target/infineon/tle987x.cfg2
-rw-r--r--tcl/target/is5114.cfg2
-rw-r--r--tcl/target/ixp42x.cfg2
-rw-r--r--tcl/target/k1921vk01t.cfg2
-rw-r--r--tcl/target/k40.cfg2
-rw-r--r--tcl/target/k60.cfg2
-rw-r--r--tcl/target/ke0x.cfg2
-rw-r--r--tcl/target/ke1xf.cfg2
-rw-r--r--tcl/target/ke1xz.cfg2
-rw-r--r--tcl/target/kl25.cfg2
-rw-r--r--tcl/target/kl46.cfg2
-rw-r--r--tcl/target/klx.cfg2
-rw-r--r--tcl/target/ks869x.cfg2
-rw-r--r--tcl/target/kx.cfg2
-rw-r--r--tcl/target/lpc11xx.cfg2
-rw-r--r--tcl/target/lpc12xx.cfg2
-rw-r--r--tcl/target/lpc13xx.cfg2
-rw-r--r--tcl/target/lpc17xx.cfg2
-rw-r--r--tcl/target/lpc1850.cfg2
-rw-r--r--tcl/target/lpc1xxx.cfg2
-rw-r--r--tcl/target/lpc2103.cfg2
-rw-r--r--tcl/target/lpc2124.cfg2
-rw-r--r--tcl/target/lpc2129.cfg2
-rw-r--r--tcl/target/lpc2148.cfg2
-rw-r--r--tcl/target/lpc2294.cfg2
-rw-r--r--tcl/target/lpc2378.cfg2
-rw-r--r--tcl/target/lpc2460.cfg2
-rw-r--r--tcl/target/lpc2478.cfg2
-rw-r--r--tcl/target/lpc2900.cfg1
-rw-r--r--tcl/target/lpc2xxx.cfg2
-rw-r--r--tcl/target/lpc3131.cfg2
-rw-r--r--tcl/target/lpc3250.cfg2
-rw-r--r--tcl/target/lpc40xx.cfg2
-rw-r--r--tcl/target/lpc4350.cfg2
-rw-r--r--tcl/target/lpc4357.cfg2
-rw-r--r--tcl/target/lpc4370.cfg2
-rw-r--r--tcl/target/lpc84x.cfg2
-rw-r--r--tcl/target/lpc8nxx.cfg2
-rw-r--r--tcl/target/lpc8xx.cfg2
-rw-r--r--tcl/target/ls1012a.cfg2
-rw-r--r--tcl/target/marvell/88f3710.cfg2
-rw-r--r--tcl/target/marvell/88f3720.cfg2
-rw-r--r--tcl/target/marvell/88f37x0.cfg2
-rw-r--r--tcl/target/max32620.cfg2
-rw-r--r--tcl/target/max32625.cfg2
-rw-r--r--tcl/target/max3263x.cfg2
-rw-r--r--tcl/target/mc13224v.cfg2
-rw-r--r--tcl/target/mdr32f9q2i.cfg2
-rw-r--r--tcl/target/nds32v2.cfg2
-rw-r--r--tcl/target/nds32v3.cfg2
-rw-r--r--tcl/target/nds32v3m.cfg2
-rw-r--r--tcl/target/ngultra.cfg51
-rw-r--r--tcl/target/nhs31xx.cfg2
-rw-r--r--tcl/target/nrf51.cfg2
-rw-r--r--tcl/target/nrf52.cfg2
-rw-r--r--tcl/target/nuc910.cfg2
-rw-r--r--tcl/target/numicro.cfg2
-rw-r--r--tcl/target/omap2420.cfg2
-rw-r--r--tcl/target/omap3530.cfg2
-rw-r--r--tcl/target/omap4430.cfg2
-rw-r--r--tcl/target/omap4460.cfg2
-rw-r--r--tcl/target/omap5912.cfg2
-rw-r--r--tcl/target/omapl138.cfg2
-rw-r--r--tcl/target/or1k.cfg2
-rw-r--r--tcl/target/pic32mx.cfg2
-rw-r--r--tcl/target/psoc4.cfg2
-rw-r--r--tcl/target/psoc5lp.cfg2
-rw-r--r--tcl/target/psoc6.cfg2
-rw-r--r--tcl/target/pxa255.cfg2
-rw-r--r--tcl/target/pxa270.cfg2
-rw-r--r--tcl/target/pxa3xx.cfg2
-rw-r--r--tcl/target/qualcomm_qca4531.cfg2
-rw-r--r--tcl/target/quark_d20xx.cfg2
-rw-r--r--tcl/target/quark_x10xx.cfg2
-rw-r--r--tcl/target/readme.txt2
-rw-r--r--tcl/target/renesas_r7s72100.cfg2
-rw-r--r--tcl/target/renesas_rcar_gen2.cfg2
-rw-r--r--tcl/target/renesas_rcar_gen3.cfg2
-rw-r--r--tcl/target/renesas_rcar_reset_common.cfg2
-rw-r--r--tcl/target/renesas_s7g2.cfg2
-rw-r--r--tcl/target/rk3308.cfg2
-rw-r--r--tcl/target/rsl10.cfg70
-rw-r--r--tcl/target/samsung_s3c2410.cfg2
-rw-r--r--tcl/target/samsung_s3c2440.cfg2
-rw-r--r--tcl/target/samsung_s3c2450.cfg2
-rw-r--r--tcl/target/samsung_s3c4510.cfg2
-rw-r--r--tcl/target/samsung_s3c6410.cfg2
-rw-r--r--tcl/target/sharp_lh79532.cfg2
-rw-r--r--tcl/target/sim3x.cfg2
-rw-r--r--tcl/target/smp8634.cfg2
-rw-r--r--tcl/target/snps_em_sk_fpga.cfg4
-rw-r--r--tcl/target/snps_hsdk.cfg4
-rw-r--r--tcl/target/spear3xx.cfg2
-rw-r--r--tcl/target/stellaris.cfg2
-rw-r--r--tcl/target/stm32f0x.cfg2
-rw-r--r--tcl/target/stm32f1x.cfg11
-rw-r--r--tcl/target/stm32f2x.cfg11
-rw-r--r--tcl/target/stm32f3x.cfg11
-rw-r--r--tcl/target/stm32f4x.cfg15
-rw-r--r--tcl/target/stm32f7x.cfg11
-rw-r--r--tcl/target/stm32g0x.cfg2
-rw-r--r--tcl/target/stm32g4x.cfg11
-rw-r--r--tcl/target/stm32h7x.cfg2
-rw-r--r--tcl/target/stm32h7x_dual_bank.cfg2
-rw-r--r--tcl/target/stm32l0.cfg2
-rw-r--r--tcl/target/stm32l0_dual_bank.cfg2
-rw-r--r--tcl/target/stm32l1.cfg11
-rw-r--r--tcl/target/stm32l1x_dual_bank.cfg2
-rw-r--r--tcl/target/stm32l4x.cfg15
-rw-r--r--tcl/target/stm32mp13x.cfg2
-rw-r--r--tcl/target/stm32mp15x.cfg2
-rw-r--r--tcl/target/stm32w108xx.cfg2
-rw-r--r--tcl/target/stm32wbx.cfg11
-rw-r--r--tcl/target/stm32wlx.cfg6
-rw-r--r--tcl/target/stm32x5x_common.cfg9
-rw-r--r--tcl/target/stm32xl.cfg2
-rw-r--r--tcl/target/stm8l.cfg2
-rw-r--r--tcl/target/stm8l152.cfg2
-rw-r--r--tcl/target/stm8s.cfg2
-rw-r--r--tcl/target/stm8s003.cfg2
-rw-r--r--tcl/target/stm8s103.cfg2
-rw-r--r--tcl/target/stm8s105.cfg2
-rw-r--r--tcl/target/str710.cfg2
-rw-r--r--tcl/target/str730.cfg2
-rw-r--r--tcl/target/str750.cfg2
-rw-r--r--tcl/target/str912.cfg2
-rw-r--r--tcl/target/swj-dp.tcl2
-rw-r--r--tcl/target/swm050.cfg2
-rw-r--r--tcl/target/test_reset_syntax_error.cfg2
-rw-r--r--tcl/target/test_syntax_error.cfg2
-rw-r--r--tcl/target/ti-ar7.cfg2
-rw-r--r--tcl/target/ti-cjtag.cfg2
-rw-r--r--tcl/target/ti_calypso.cfg2
-rw-r--r--tcl/target/ti_cc13x0.cfg2
-rw-r--r--tcl/target/ti_cc13x2.cfg2
-rw-r--r--tcl/target/ti_cc26x0.cfg2
-rw-r--r--tcl/target/ti_cc26x2.cfg2
-rw-r--r--tcl/target/ti_cc3220sf.cfg2
-rw-r--r--tcl/target/ti_cc32xx.cfg2
-rw-r--r--tcl/target/ti_dm355.cfg2
-rw-r--r--tcl/target/ti_dm365.cfg2
-rw-r--r--tcl/target/ti_dm6446.cfg2
-rw-r--r--tcl/target/ti_msp432.cfg2
-rw-r--r--tcl/target/ti_rm4x.cfg2
-rw-r--r--tcl/target/ti_tms570.cfg2
-rw-r--r--tcl/target/ti_tms570ls20xxx.cfg2
-rw-r--r--tcl/target/ti_tms570ls3137.cfg2
-rw-r--r--tcl/target/tmpa900.cfg2
-rw-r--r--tcl/target/tmpa910.cfg2
-rw-r--r--tcl/target/tnetc4401.cfg2
-rw-r--r--tcl/target/u8500.cfg2
-rw-r--r--tcl/target/vd_riscv.cfg3
-rw-r--r--tcl/target/vd_xtensa_jtag.cfg27
-rw-r--r--tcl/target/vybrid_vf6xx.cfg2
-rw-r--r--tcl/target/xilinx_zynqmp.cfg2
-rw-r--r--tcl/target/xmc1xxx.cfg2
-rw-r--r--tcl/target/xmc4xxx.cfg2
-rw-r--r--tcl/target/xmos_xs1-xau8a-10_arm.cfg2
-rw-r--r--tcl/target/xtensa-core-esp32.cfg260
-rw-r--r--tcl/target/xtensa-core-esp32s2.cfg223
-rw-r--r--tcl/target/xtensa-core-esp32s3.cfg297
-rw-r--r--tcl/target/xtensa-core-nxp_rt600.cfg247
-rw-r--r--tcl/target/xtensa.cfg51
-rw-r--r--tcl/target/zynq_7000.cfg2
-rw-r--r--tcl/test/selftest.cfg1
-rw-r--r--tcl/test/syntax1.cfg2
-rw-r--r--tcl/tools/firmware-recovery.tcl2
-rw-r--r--tcl/tools/memtest.tcl2
-rw-r--r--testing/test-am335xgpio-deprecated-commands.cfg70
-rw-r--r--testing/test-bcm2835gpio-deprecated-commands.cfg105
-rw-r--r--testing/test-linuxgpiod-deprecated-commands.cfg105
-rwxr-xr-xtools/checkpatch.sh4
-rw-r--r--tools/scripts/camelcase.txt217
-rwxr-xr-xtools/scripts/checkpatch.pl5847
-rw-r--r--tools/scripts/const_structs.checkpatch0
-rwxr-xr-xtools/scripts/spdxcheck.py449
-rw-r--r--tools/scripts/spdxexclude13
-rw-r--r--tools/scripts/spelling.txt1642
-rw-r--r--tools/scripts/typedefs.txt8
1588 files changed, 27065 insertions, 13975 deletions
diff --git a/.checkpatch.conf b/.checkpatch.conf
new file mode 100644
index 0000000..8cb9a37
--- /dev/null
+++ b/.checkpatch.conf
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+--max-line-length=120
+--tab-size=4
+--show-types
+--strict
+
+--typedefsfile tools/scripts/typedefs.txt
+
+--ignore AVOID_EXTERNS
+--ignore BLOCK_COMMENT_STYLE
+--ignore COMPLEX_MACRO
+--ignore CONST_STRUCT
+--ignore ENOSYS
+--ignore FILE_PATH_CHANGES
+--ignore GERRIT_CHANGE_ID
+--ignore LINE_SPACING
+--ignore LOGICAL_CONTINUATIONS
+--ignore MACRO_WITH_FLOW_CONTROL
+--ignore NEW_TYPEDEFS
+--ignore PARENTHESIS_ALIGNMENT
+--ignore PREFER_DEFINED_ATTRIBUTE_MACRO
+--ignore PREFER_FALLTHROUGH
+--ignore PREFER_KERNEL_TYPES
+--ignore SPLIT_STRING
+--ignore SSCANF_TO_KSTRTO
+--ignore SWITCH_CASE_INDENT_LEVEL
+--ignore TRACING_LOGGING
+--ignore VOLATILE
diff --git a/.github/workflows/checkpatch.yml b/.github/workflows/checkpatch.yml
index 06958c2..e2bf68f 100644
--- a/.github/workflows/checkpatch.yml
+++ b/.github/workflows/checkpatch.yml
@@ -16,7 +16,7 @@ jobs:
- name: Install required packages (apt-get)
run: |
sudo apt-get update
- sudo apt-get install patchutils
+ sudo apt-get install patchutils python3-ply python3-git
- name: Run checkpatch
run: |
git diff -U20 HEAD~40 \
diff --git a/.gitignore b/.gitignore
index f5aa68a..818bb0c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -68,7 +68,6 @@ doxygen
doxygen.log
Doxyfile
libtool
-*-libtool
Makefile
!contrib/loaders/**/Makefile
stamp-h1
@@ -101,3 +100,6 @@ tags
GPATH
GRTAGS
GTAGS
+
+# checkpatch script files
+.checkpatch-camelcase.*
diff --git a/.travis.yml b/.travis.yml
index d0bc8f2..e5ebe4d 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -1,3 +1,32 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright Marek Vasut <marex@denx.de>
+
+# OpenOCD on Travis CI - https://travis-ci.org/
+
+sudo: required
+dist: bionic
+
+arch:
+ - amd64
+ - arm64
+ - ppc64le
+ - s390x
+
+addons:
+ apt:
+ sources:
+ - sourceline: 'ppa:ubuntu-toolchain-r/test'
+ - sourceline: 'deb https://apt.llvm.org/bionic/ llvm-toolchain-bionic-9 main'
+ key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key'
+ packages:
+ - libftdi-dev
+ - libhidapi-dev
+ - libjaylink-dev
+
+env:
+ - CC=gcc-9
+ - CC=clang-9
+
language: c
dist: trusty
diff --git a/HACKING b/HACKING
index 5d110fb..a2d4dcc 100644
--- a/HACKING
+++ b/HACKING
@@ -197,6 +197,8 @@ while(!done) {
@endcode
\note use "git add ." before commit to add new files.
+ \note check @ref checkpatch for hint about checkpatch script
+
Commit message template, notice the short first line.
The field '<c>specify touched area</c>'
should identify the main part or subsystem the patch touches.
@@ -205,7 +207,9 @@ specify touched area: short comment
<blank line>
Longer comments over several lines, explaining (where applicable) the
reason for the patch and the general idea the solution is based on,
-any major design decisions, etc...
+any major design decisions, etc. Limit each comment line's length to 75
+characters; since 75 it's too short for a URL, you can put the URL in a
+separate line preceded by 'Link: '.
<blank line>
Signed-off-by: ...
@endcode
@@ -253,6 +257,65 @@ git push review
Further reading: http://www.coreboot.org/Git
+@section checkpatch About checkpatch script
+
+OpenOCD source code includes the script checkpatch to let developers to
+verify their patches before submitting them for review (see @ref gerrit).
+
+Every patch for OpenOCD project that is submitted for review on Gerrit
+is tested by Jenkins. Jenkins will run the checkpatch script to analyze
+each patch.
+If the script highlights either errors or warnings, Gerrit will add the
+score "-1" to the patch and maintainers will probably ignore the patch,
+waiting for the developer to send a fixed version.
+
+The script checkpatch verifies the SPDX tag for new files against a very
+short list of license tags.
+If the license of your contribution is not listed there, but compatible
+with OpenOCD license, please alert the maintainers or add the missing
+license in the first patch of your patch series.
+
+The script checkpatch has been originally developed for the Linux kernel
+source code, thus includes specific tests and checks related to Linux
+coding style and to Linux code structure. While the script has been
+adapted for OpenOCD specificities, it still includes some Linux related
+test. It is then possible that it triggers sometimes some <em>false
+positive</em>!
+
+If you think that the error identified by checkpatch is a false
+positive, please report it to the openocd-devel mailing list or prepare
+a patch for fixing checkpatch and send it to Gerrit for review.
+
+\attention The procedure below is allowed only for <em>exceptional
+cases</em>. Do not use it to submit normal patches.
+
+There are <em>exceptional cases</em> in which you need to skip some of
+the tests from checkpatch in order to pass the approval from Gerrit.
+
+For example, a patch that modify one line inside a big comment block
+will not show the beginning or the end of the comment block. This can
+prevent checkpatch to detect the comment block. Checkpatch can wrongly
+consider the modified comment line as a code line, triggering a set of
+false errors.
+
+Only for <em>exceptional cases</em>, it is allowed to submit patches
+to Gerrit with the special field 'Checkpatch-ignore:' in the commit
+message. This field will cause checkpatch to ignore the error types
+listed in the field, only for the patch itself.
+The error type is printed by checkpatch on failure.
+For example the names of Windows APIs mix lower and upper case chars,
+in violation of OpenOCD coding style, triggering a 'CAMELCASE' error:
+@code
+CHECK:CAMELCASE: Avoid CamelCase: <WSAGetLastError>
+#96105: FILE: src/helper/log.c:505:
++ error_code = WSAGetLastError();
+@endcode
+Adding in the commit message of the patch the line:
+@code
+Checkpatch-ignore: CAMELCASE
+@endcode
+will force checkpatch to ignore the CAMELCASE error.
+
@section timeline When can I expect my contribution to be committed?
The code review is intended to take as long as a week or two to allow
diff --git a/LICENSES/exceptions/eCos-exception-2.0 b/LICENSES/exceptions/eCos-exception-2.0
new file mode 100644
index 0000000..d21109f
--- /dev/null
+++ b/LICENSES/exceptions/eCos-exception-2.0
@@ -0,0 +1,20 @@
+SPDX-Exception-Identifier: eCos-exception-2.0
+SPDX-URL: https://spdx.org/licenses/eCos-exception-2.0.html
+SPDX-Licenses: GPL-2.0-only, GPL-2.0-or-later
+Usage-Guide:
+ This exception is used together with one of the above SPDX-Licenses.
+ To use this exception add it with the keyword WITH to one of the
+ identifiers in the SPDX-Licenses tag:
+ SPDX-License-Identifier: <SPDX-License> WITH eCos-exception-2.0
+License-Text:
+
+As a special exception, if other files instantiate templates or use
+macros or inline functions from this file, or you compile this
+file and link it with other works to produce a work based on this
+file, this file does not by itself cause the resulting work to be
+covered by the GNU General Public License. However the source code for
+this file must still be made available in accordance with section (3)
+of the GNU General Public License.
+
+This exception does not invalidate any other reasons why a work based on
+this file might be covered by the GNU General Public License.
diff --git a/LICENSES/license-rules.txt b/LICENSES/license-rules.txt
index 8d0c0a0..c751929 100644
--- a/LICENSES/license-rules.txt
+++ b/LICENSES/license-rules.txt
@@ -190,7 +190,64 @@ OpenOCD, can be broken down into:
License-Text:
Full license text
-2. Stand-alone licenses:
+2. Exceptions:
+
+ Some licenses can be amended with exceptions which grant certain rights
+ which the original license does not. These exceptions are available
+ from the directory::
+
+ LICENSES/exceptions/
+
+ in the OpenOCD source tree. The files in this directory contain the full
+ exception text and the required `Exception Metatags`_.
+
+ Examples::
+
+ LICENSES/exceptions/eCos-exception-2.0
+
+ Exception Metatags:
+
+ The following meta tags must be available in an exception file:
+
+ - SPDX-Exception-Identifier:
+
+ One exception identifier which can be used with SPDX license
+ identifiers.
+
+ - SPDX-URL:
+
+ The URL of the SPDX page which contains additional information related
+ to the exception.
+
+ - SPDX-Licenses:
+
+ A comma separated list of SPDX license identifiers for which the
+ exception can be used.
+
+ - Usage-Guidance:
+
+ Freeform text for usage advice. The text must be followed by correct
+ examples for the SPDX license identifiers as they should be put into
+ source files according to the `License identifier syntax`_ guidelines.
+
+ - Exception-Text:
+
+ All text after this tag is treated as the original exception text
+
+ File format examples::
+
+ SPDX-Exception-Identifier: eCos-exception-2.0
+ SPDX-URL: https://spdx.org/licenses/eCos-exception-2.0.html
+ SPDX-Licenses: GPL-2.0-only, GPL-2.0-or-later
+ Usage-Guide:
+ This exception is used together with one of the above SPDX-Licenses.
+ To use this exception add it with the keyword WITH to one of the
+ identifiers in the SPDX-Licenses tag:
+ SPDX-License-Identifier: <SPDX-License> WITH eCos-exception-2.0
+ License-Text:
+ Full license text
+
+3. Stand-alone licenses:
These licenses should only be used for stand-alone applications that are
distributed with OpenOCD but are not included in the OpenOCD binary.
diff --git a/LICENSES/preferred/BSD-2-Clause-Views b/LICENSES/preferred/BSD-2-Clause-Views
new file mode 100644
index 0000000..abfb0ff
--- /dev/null
+++ b/LICENSES/preferred/BSD-2-Clause-Views
@@ -0,0 +1,37 @@
+Valid-License-Identifier: BSD-2-Clause-Views
+SPDX-URL: https://spdx.org/licenses/BSD-2-Clause-Views.html
+Usage-Guide:
+ To use the BSD 2-clause with views sentence License put the following SPDX
+ tag/value pair into a comment according to the placement guidelines in
+ the licensing rules documentation:
+ SPDX-License-Identifier: BSD-2-Clause-Views
+License-Text:
+
+Copyright (c) <year> <owner> . All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+The views and conclusions contained in the software and documentation
+are those of the authors and should not be interpreted as representing
+official policies, either expressed or implied, of the copyright holders
+or contributors.
diff --git a/LICENSES/preferred/BSD-Source-Code b/LICENSES/preferred/BSD-Source-Code
new file mode 100644
index 0000000..622cd3a
--- /dev/null
+++ b/LICENSES/preferred/BSD-Source-Code
@@ -0,0 +1,32 @@
+Valid-License-Identifier: BSD-Source-Code
+SPDX-URL: https://spdx.org/licenses/BSD-Source-Code.html
+Usage-Guide:
+ To use the BSD Source Code Attribution License put the following SPDX
+ tag/value pair into a comment according to the placement guidelines in
+ the licensing rules documentation:
+ SPDX-License-Identifier: BSD-Source-Code
+License-Text:
+
+Copyright (c) <year> <owner> . All rights reserved.
+
+Redistribution and use of this software in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ * Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ * Neither the name of the copyright holder nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
diff --git a/Makefile.am b/Makefile.am
index 55d79e6..bc7ab21 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# not a GNU package. You can remove this line, if
# have all needed files, that a GNU package needs
AUTOMAKE_OPTIONS = gnu 1.6
@@ -54,9 +56,12 @@ EXTRA_DIST += \
$(EXTRA_DIST_NEWS) \
Doxyfile.in \
LICENSES/license-rules.txt \
+ LICENSES/exceptions/eCos-exception-2.0 \
LICENSES/preferred/BSD-1-Clause \
LICENSES/preferred/BSD-2-Clause \
+ LICENSES/preferred/BSD-2-Clause-Views \
LICENSES/preferred/BSD-3-Clause \
+ LICENSES/preferred/BSD-Source-Code \
LICENSES/preferred/GFDL-1.2 \
LICENSES/preferred/gfdl-1.2.texi.readme \
LICENSES/preferred/GPL-2.0 \
diff --git a/NEWS b/NEWS
index 9db6c5f..50cb984 100644
--- a/NEWS
+++ b/NEWS
@@ -2,29 +2,126 @@ This file includes highlights of the changes made in the OpenOCD
source archive release.
JTAG Layer:
+ * add default to adapter speed when unspecified (100 kHz)
+ * AM335X gpio (BeagleBones) adapter driver
+ * BCM2835 support for SWD
+ * Cadence Virtual Debug (vdebug) adapter driver
+ * CMSIS-DAP support for SWO and SWD multidrop
+ * Espressif USB JTAG Programmer adapter driver
+ * Remote bitbang support for Windows host
+ * ST-LINK add TCP server support to adapter driver
+ * SWD multidrop support
Boundary Scan:
Target Layer:
+ * aarch64: support watchpoints
+ * arm: support independent TPIU and SWO for trace
+ * arm adi v5: support Large Physical Address Extension
+ * arm adi v6: support added, for jtag and swd transport
+ * cortex_a: support watchpoints
+ * elf 64bit load support
+ * Espressif: support ESP32, ESP32-S2 and ESP32-S3 cores
+ * semihosting: support user defined operations
+ * Xtensa: support Xtensa LX architecture via JTAG and ADIv5 DAP
Flash Layer:
+ * Atmel/Microchip SAM E51G18A, E51G19A, R35J18B, LAN9255 support
+ * GigaDevice GD32E23x, GD32F1x0/3x0, GD32VF103 support
+ * Nuvoton NPCX series support
+ * onsemi RSL10 support
+ * Raspberry Pi Pico RP2040 support
+ * ST BlueNRG-LPS support
+ * ST STM32 G05x, G06x, G0Bx, G0Cx, U57x, U58x, WB1x, WL5x support
+ * ST STM32 G0, G4, L4, L4+, L5, WB, WL OTP support
Board, Target, and Interface Configuration Scripts:
+ * Ampere Computing eMAG8180, Altra ("Quicksilver") and Altra Max ("Mystique") board config
+ * Cadence KC705 FPGA (Xtensa Development Platform) via JTAG and ADIv5 DAP board config
+ * Digilent Nexys Video board config
+ * Espressif ESP32 ETHERNET-KIT and WROVER-KIT board config
+ * Espressif ESP32 via ESP USB Bridge generic board config
+ * Espressif ESP32-S2 Kaluga 1 board config
+ * Espressif ESP32-S2 with ESP USB Bridge board config
+ * Espressif ESP32-S3 example board config
+ * Kontron SMARC-sAL28 board config
+ * LambdaConcept ECPIX-5 board config
+ * Microchip ATSAMA5D27-SOM1-EK1 board config
+ * Microchip EVB-LAN9255 board config
+ * Microchip SAME51 Curiosity Nano board config
+ * NXP FRDM-K64F, LS1046ARDB and LS1088ARDB board config
+ * NXP RT6XX board config
+ * Olimex H405 board config
+ * Radiona ULX3S board config
+ * Raspberry Pi 3 and Raspberry Pi 4 model B board config
+ * Raspberry Pi Pico-Debug board config
+ * Renesas R-Car V3U Falcon board config
+ * ST BlueNRG-LPS steval-idb012v1 board config
+ * ST NUCLEO-8S208RB board config
+ * ST NUCLEO-G031K8, NUCLEO-G070RB, NUCLEO-G071RB board config
+ * ST NUCLEO-G431KB, NUCLEO-G431RB, NUCLEO-G474RE board config
+ * ST STM32MP13x-DK board config
+ * TI AM625 EVM, AM642 EVM and AM654 EVM board config
+ * TI J721E EVM, J721S2 EVM and J7200 EVM board config
+ * Ampere Computing eMAG, Altra ("Quicksilver") and Altra Max ("Mystique") target config
+ * Cadence Xtensa generic and Xtensa VDebug target config
+ * Broadcom BCM2711, BCM2835, BCM2836 and BCM2837 target config
+ * Espressif ESP32, ESP32-S2 and ESP32-S3 target config
+ * Microchip ATSAMA5D2 series target config
+ * NanoXplore NG-Ultra SoC target config
+ * NXP IMX8QM target config
+ * NXP LS1028A, LS1046A and LS1088A target config
+ * NXP RT600 (Xtensa HiFi DSP) target config
+ * onsemi RSL10 target config
+ * Raspberry Pi Pico RP2040 target config
+ * Renesas R8A779A0 V3U target config
+ * Renesas RZ/Five target config
+ * Renesas RZ/G2 MPU family target config
+ * Rockchip RK3399 target config
+ * ST BlueNRG-LPS target config
+ * ST STM32MP13x target config
+ * TI AM625, AM654, J721E and J721S2 target config
+ * Ashling Opella-LD interface config
+ * Aspeed AST2600 linuxgpiod based interface config
+ * Blinkinlabs JTAG_Hat interface config
+ * Cadence Virtual Debug (vdebug) interface config
+ * Espressif ESP32-S2 Kaluga 1 board's interface config
+ * Espressif USB Bridge jtag interface config
+ * Infineon DAP miniWiggler V3 interface config
+ * PLS SPC5 interface config
+ * Tigard interface config
+ * Lattice MachXO3 family FPGA config
Server Layer:
+ * GDB: add per-target remote protocol extensions
+ * GDB: more 'Z' packets support
+ * IPDBG JtagHost server functionality
+ * semihosting: I/O redirection to TCP server
+ * telnet: support for command's autocomplete
RTOS:
+ * 'none' rtos support
+ * Zephyr rtos support
Documentation:
Build and Release:
+ * Add json extension to jimtcl build
+ * Drop dependency from libusb0
+ * Drop repository repo.or.cz for submodules
+ * Move gerrit to https://review.openocd.org/
+ * Require autoconf 2.69 or newer
+ * Update jep106 to revision JEP106BE
+ * Update jimtcl to version 0.81
+ * Update libjaylink to version 0.3.1
+ * New configure flag '--enable-jimtcl-maintainer' for jimtcl build
This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
-http://sourceforge.net/p/openocd/code/ci/v0.x.0/log/?path=
+http://sourceforge.net/p/openocd/code/ci/v0.12.0-rc1/log/?path=
For older NEWS, see the NEWS files associated with each release
diff --git a/README b/README
index 34dac0b..3c07d7c 100644
--- a/README
+++ b/README
@@ -101,17 +101,18 @@ Supported hardware
JTAG adapters
-------------
-AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
-Bus Blaster, Buspirate, Cadence DPI, Chameleon, CMSIS-DAP, Cortino,
-Cypress KitProg, DENX, Digilent JTAG-SMT2, DLC 5, DLP-USB1232H,
-embedded projects, eStick, FlashLINK, FlossJTAG, Flyswatter, Flyswatter2,
+AICE, AM335x, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
+Bus Blaster, Buspirate, Cadence DPI, Cadence vdebug, Chameleon, CMSIS-DAP,
+Cortino, Cypress KitProg, DENX, Digilent JTAG-SMT2, DLC 5, DLP-USB1232H,
+embedded projects, Espressif USB JTAG Programmer,
+eStick, FlashLINK, FlossJTAG, Flyswatter, Flyswatter2,
FTDI FT232R, Gateworks, Hoegl, ICDI, ICEBear, J-Link, JTAG VPI, JTAGkey,
JTAGkey2, JTAG-lock-pick, KT-Link, Linux GPIOD, Lisa/L, LPC1768-Stick,
Mellanox rshim, MiniModule, NGX, Nuvoton Nu-Link, Nu-Link2, NXHX, NXP IMX GPIO,
OOCDLink, Opendous, OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee,
Remote Bitbang, RLink, SheevaPlug devkit, Stellaris evkits,
ST-LINK (SWO tracing supported), STM32-PerformanceStick, STR9-comStick,
-sysfsgpio, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
+sysfsgpio, Tigard, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
Xverve.
@@ -121,16 +122,18 @@ Debug targets
ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
FA526, Feroceon/Dragonite, XScale.
ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64),
-Intel Quark, LS102x-SAP, NDS32, RISC-V, ST STM8.
+ESP32, ESP32-S2, ESP32-S3, Intel Quark, LS102x-SAP, NDS32, RISC-V, ST STM8,
+Xtensa.
Flash drivers
-------------
ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
-i.MX31, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPC3180, LPC32xx,
+GD32, i.MX31, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPC3180, LPC32xx,
LPCSPIFI, Marvell QSPI, MAX32, Milandr, MXC, NIIET, nRF51, nRF52 , NuMicro,
-NUC910, Orion/Kirkwood, PIC32mx, PSoC4/5LP/6, Renesas RPC HF and SH QSPI,
+NUC910, Nuvoton NPCX, onsemi RSL10, Orion/Kirkwood, PIC32mx, PSoC4/5LP/6,
+Raspberry RP2040, Renesas RPC HF and SH QSPI,
S3C24xx, S3C6400, SiM3x, SiFive Freedom E, Stellaris, ST BlueNRG, STM32,
STM32 QUAD/OCTO-SPI for Flash/FRAM/EEPROM, STMSMI, STR7x, STR9x, SWM050,
TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF,
diff --git a/bootstrap b/bootstrap
index e81ba4d..cf6167f 100755
--- a/bootstrap
+++ b/bootstrap
@@ -1,4 +1,6 @@
#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Run the autotools bootstrap sequence to create the configure script
# Abort execution on error
diff --git a/configure.ac b/configure.ac
index 687fffa..dacf277 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,5 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
AC_PREREQ([2.69])
-AC_INIT([openocd], [0.11.0+dev],
+AC_INIT([openocd], [0.12.0-rc1+dev],
[OpenOCD Mailing List <openocd-devel@lists.sourceforge.net>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([build-aux])
@@ -24,6 +26,12 @@ AC_PROG_CC
m4_version_prereq([2.70],[],[AC_PROG_CC_C99])
AM_PROG_CC_C_O
AC_PROG_RANLIB
+
+# If macro PKG_PROG_PKG_CONFIG is not available, Autoconf generates a misleading error message,
+# so check for existence first, and otherwise provide helpful advice.
+m4_ifndef([PKG_PROG_PKG_CONFIG], [m4_fatal(m4_normalize([
+ Macro PKG_PROG_PKG_CONFIG is not available.
+ It is usually defined in file pkg.m4 provided by package pkg-config.]))])
PKG_PROG_PKG_CONFIG([0.23])
dnl disable checks for C++, Fortran and GNU Java Compiler
@@ -47,12 +55,10 @@ AC_CHECK_HEADERS([elf.h])
AC_EGREP_HEADER(Elf64_Ehdr, [elf.h], [
AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type `Elf64_Ehdr'.])
])
-AC_CHECK_HEADERS([dirent.h])
AC_CHECK_HEADERS([fcntl.h])
AC_CHECK_HEADERS([malloc.h])
AC_CHECK_HEADERS([netdb.h])
AC_CHECK_HEADERS([poll.h])
-AC_CHECK_HEADERS([pthread.h])
AC_CHECK_HEADERS([strings.h])
AC_CHECK_HEADERS([sys/ioctl.h])
AC_CHECK_HEADERS([sys/param.h])
@@ -62,7 +68,7 @@ AC_CHECK_HEADERS([sys/sysctl.h])
AC_CHECK_HEADERS([sys/time.h])
AC_CHECK_HEADERS([sys/types.h])
AC_CHECK_HEADERS([unistd.h])
-AC_CHECK_HEADERS([arpa/inet.h ifaddrs.h netinet/in.h netinet/tcp.h net/if.h], [], [], [dnl
+AC_CHECK_HEADERS([arpa/inet.h netinet/in.h netinet/tcp.h], [], [], [dnl
#include <stdio.h>
#ifdef STDC_HEADERS
# include <stdlib.h>
@@ -86,7 +92,6 @@ AC_CHECK_FUNCS([strndup])
AC_CHECK_FUNCS([strnlen])
AC_CHECK_FUNCS([gettimeofday])
AC_CHECK_FUNCS([usleep])
-AC_CHECK_FUNCS([vasprintf])
AC_CHECK_FUNCS([realpath])
# guess-rev.sh only exists in the repository, not in the released archives
@@ -123,7 +128,8 @@ m4_define([USB1_ADAPTERS],
[[opendous], [eStick/opendous JTAG Programmer], [OPENDOUS]],
[[armjtagew], [Olimex ARM-JTAG-EW Programmer], [ARMJTAGEW]],
[[rlink], [Raisonance RLink JTAG Programmer], [RLINK]],
- [[usbprog], [USBProg JTAG Programmer], [USBPROG]]])
+ [[usbprog], [USBProg JTAG Programmer], [USBPROG]],
+ [[esp_usb_jtag], [Espressif JTAG Programmer], [ESP_USB_JTAG]]])
m4_define([DEPRECATED_USB1_ADAPTERS],
[[[aice], [Andes JTAG Programmer (deprecated)], [AICE]]])
@@ -715,6 +721,11 @@ AS_IF([test "x$enable_presto" != "xno"], [
build_bitq=yes
])
+# esp-usb-jtag also needs the bitq module
+AS_IF([test "x$enable_esp_usb_jtag" != "xno"], [
+ build_bitq=yes
+])
+
AM_CONDITIONAL([RELEASE], [test "x$build_release" = "xyes"])
AM_CONDITIONAL([PARPORT], [test "x$build_parport" = "xyes"])
AM_CONDITIONAL([DUMMY], [test "x$build_dummy" = "xyes"])
@@ -793,7 +804,6 @@ AS_IF([test "x${gcc_wextra}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Wredundant-decls"
GCC_WARNINGS="${GCC_WARNINGS} -Wpointer-arith"
GCC_WARNINGS="${GCC_WARNINGS} -Wundef"
- GCC_WARNINGS="${GCC_WARNINGS} -Wno-error=deprecated-declarations"
])
AS_IF([test "x${gcc_werror}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Werror"
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index 34defad..bb6f478 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copy this file to /etc/udev/rules.d/
# If rules fail to reload automatically, you can refresh udev rules
# with the command "udevadm control --reload"
@@ -216,6 +218,10 @@ ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev", TAG+="uaccess"
+# Espressif USB JTAG/serial debug units
+ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1001", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1002", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
# Marvell Sheevaplug
ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"
diff --git a/contrib/buildroot/openocd_be_defconfig b/contrib/buildroot/openocd_be_defconfig
new file mode 100644
index 0000000..2fe28f6
--- /dev/null
+++ b/contrib/buildroot/openocd_be_defconfig
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+BR2_armeb=y
+BR2_cortex_a7=y
+BR2_TOOLCHAIN_EXTERNAL=y
+BR2_PACKAGE_OPENOCD=y
+BR2_PACKAGE_OPENOCD_FTDI=y
+BR2_PACKAGE_OPENOCD_STLINK=y
+BR2_PACKAGE_OPENOCD_TI_ICDI=y
+BR2_PACKAGE_OPENOCD_ULINK=y
+BR2_PACKAGE_OPENOCD_UBLASTER2=y
+BR2_PACKAGE_OPENOCD_JLINK=y
+BR2_PACKAGE_OPENOCD_OSDBM=y
+BR2_PACKAGE_OPENOCD_OPENDOUS=y
+BR2_PACKAGE_OPENOCD_AICE=y
+BR2_PACKAGE_OPENOCD_VSLLINK=y
+BR2_PACKAGE_OPENOCD_USBPROG=y
+BR2_PACKAGE_OPENOCD_RLINK=y
+BR2_PACKAGE_OPENOCD_ARMEW=y
+BR2_PACKAGE_OPENOCD_XDS110=y
+BR2_PACKAGE_OPENOCD_PARPORT=y
+BR2_PACKAGE_OPENOCD_VPI=y
+BR2_PACKAGE_OPENOCD_UBLASTER=y
+BR2_PACKAGE_OPENOCD_AMTJT=y
+BR2_PACKAGE_OPENOCD_GW16012=y
+BR2_PACKAGE_OPENOCD_PRESTO=y
+BR2_PACKAGE_OPENOCD_OPENJTAG=y
+BR2_PACKAGE_OPENOCD_BUSPIRATE=y
+BR2_PACKAGE_OPENOCD_SYSFS=y
diff --git a/contrib/cross-build.sh b/contrib/cross-build.sh
index 2275f68..ded1691 100755
--- a/contrib/cross-build.sh
+++ b/contrib/cross-build.sh
@@ -1,4 +1,5 @@
#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0-or-later
# This is an example of how to do a cross-build of OpenOCD using pkg-config.
# Cross-building with pkg-config is deceptively hard and most guides and
diff --git a/contrib/gen-stellaris-part-header.pl b/contrib/gen-stellaris-part-header.pl
index 68f2889..3f982f4 100755
--- a/contrib/gen-stellaris-part-header.pl
+++ b/contrib/gen-stellaris-part-header.pl
@@ -1,4 +1,6 @@
#!/usr/bin/perl
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Automatically generates the StellarisParts struct in src/flash/nor/stellaris.c
# Uses the header files from TI/Luminary's StellarisWare complete Firmware Development Package
# available from: http://www.luminarymicro.com/products/software_updates.html
diff --git a/contrib/itmdump.c b/contrib/itmdump.c
index 8809904..e7523d9 100644
--- a/contrib/itmdump.c
+++ b/contrib/itmdump.c
@@ -1,19 +1,6 @@
-/*
- * Copyright (C) 2010 by David Brownell
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+/* Copyright (C) 2010 by David Brownell */
/*
* Simple utility to parse and dump ARM Cortex-M3 SWO trace output. Once the
diff --git a/contrib/libdcc/dcc_stdio.c b/contrib/libdcc/dcc_stdio.c
index 7da78c6..9ad633b 100644
--- a/contrib/libdcc/dcc_stdio.c
+++ b/contrib/libdcc/dcc_stdio.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -5,19 +7,6 @@
* spen@spen-soft.co.uk *
* Copyright (C) 2008 by Frederik Kriewtz *
* frederik@kriewitz.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc_stdio.h"
diff --git a/contrib/libdcc/dcc_stdio.h b/contrib/libdcc/dcc_stdio.h
index f4a5d7e..3447b8c 100644
--- a/contrib/libdcc/dcc_stdio.h
+++ b/contrib/libdcc/dcc_stdio.h
@@ -1,21 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef DCC_STDIO_H
diff --git a/contrib/libdcc/example.c b/contrib/libdcc/example.c
index 99b7bf6..7c7d936 100644
--- a/contrib/libdcc/example.c
+++ b/contrib/libdcc/example.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* Copyright (C) 2008 by Frederik Kriewtz *
* frederik@kriewitz.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc_stdio.h"
diff --git a/contrib/list_example.c b/contrib/list_example.c
index 0f62b86..4fcfcdf 100644
--- a/contrib/list_example.c
+++ b/contrib/list_example.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/* Copyright (C) 2021 by Andreas Fritiofson <andreas.fritiofson@gmail.com> */
/*
diff --git a/contrib/loaders/Makefile b/contrib/loaders/Makefile
index 0a637af..ae6a5eb 100644
--- a/contrib/loaders/Makefile
+++ b/contrib/loaders/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
.PHONY: arm clean-arm
all: arm stm8
diff --git a/contrib/loaders/checksum/Makefile b/contrib/loaders/checksum/Makefile
index 623e425..5789a08 100644
--- a/contrib/loaders/checksum/Makefile
+++ b/contrib/loaders/checksum/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../src/helper/bin2char.sh
ARM_CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/checksum/armv4_5_crc.s b/contrib/loaders/checksum/armv4_5_crc.s
index 8f62dc8..b3ecb58 100644
--- a/contrib/loaders/checksum/armv4_5_crc.s
+++ b/contrib/loaders/checksum/armv4_5_crc.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*
diff --git a/contrib/loaders/checksum/armv7m_crc.s b/contrib/loaders/checksum/armv7m_crc.s
index 923875a..8cb7f2d 100644
--- a/contrib/loaders/checksum/armv7m_crc.s
+++ b/contrib/loaders/checksum/armv7m_crc.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*
diff --git a/contrib/loaders/checksum/mips32.s b/contrib/loaders/checksum/mips32.s
index 3073d87..52de547 100644
--- a/contrib/loaders/checksum/mips32.s
+++ b/contrib/loaders/checksum/mips32.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.global main
diff --git a/contrib/loaders/checksum/riscv_crc.c b/contrib/loaders/checksum/riscv_crc.c
index e437b66..9931af5 100644
--- a/contrib/loaders/checksum/riscv_crc.c
+++ b/contrib/loaders/checksum/riscv_crc.c
@@ -1,7 +1,6 @@
-/*
- * SPDX-License-Identifier: GPL-2.0-or-later
- * Copyright (C) 2009-2021 Free Software Foundation, Inc.
- */
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/* Copyright (C) 2009-2021 Free Software Foundation, Inc. */
/* Copied from https://github.com/gcc-mirror/gcc/blob/master/libiberty/crc32.c
* and then tweaked a little. */
diff --git a/contrib/loaders/debug/xscale/Makefile b/contrib/loaders/debug/xscale/Makefile
index a0455c7..cdecd14 100644
--- a/contrib/loaders/debug/xscale/Makefile
+++ b/contrib/loaders/debug/xscale/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/debug/xscale/debug_handler.S b/contrib/loaders/debug/xscale/debug_handler.S
index 0f62d9c..9e1d65f 100644
--- a/contrib/loaders/debug/xscale/debug_handler.S
+++ b/contrib/loaders/debug/xscale/debug_handler.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "protocol.h"
diff --git a/contrib/loaders/debug/xscale/debug_handler.ld b/contrib/loaders/debug/xscale/debug_handler.ld
index d943b13..0e46cb1 100644
--- a/contrib/loaders/debug/xscale/debug_handler.ld
+++ b/contrib/loaders/debug/xscale/debug_handler.ld
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/* identify the Entry Point */
ENTRY(reset_handler)
diff --git a/contrib/loaders/debug/xscale/protocol.h b/contrib/loaders/debug/xscale/protocol.h
index cb01655..bd29cf1 100644
--- a/contrib/loaders/debug/xscale/protocol.h
+++ b/contrib/loaders/debug/xscale/protocol.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#define REG_R0 0
diff --git a/contrib/loaders/erase_check/Makefile b/contrib/loaders/erase_check/Makefile
index 1a0fd9e..d49c049 100644
--- a/contrib/loaders/erase_check/Makefile
+++ b/contrib/loaders/erase_check/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../src/helper/bin2char.sh
ARM_CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/erase_check/armv4_5_erase_check.s b/contrib/loaders/erase_check/armv4_5_erase_check.s
index 6c7d27f..dedadaa 100644
--- a/contrib/loaders/erase_check/armv4_5_erase_check.s
+++ b/contrib/loaders/erase_check/armv4_5_erase_check.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*
diff --git a/contrib/loaders/erase_check/armv7m_erase_check.s b/contrib/loaders/erase_check/armv7m_erase_check.s
index 3303c87..429b693 100644
--- a/contrib/loaders/erase_check/armv7m_erase_check.s
+++ b/contrib/loaders/erase_check/armv7m_erase_check.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*
diff --git a/contrib/loaders/erase_check/stm8_erase_check.s b/contrib/loaders/erase_check/stm8_erase_check.s
index 04cde5b..116ac59 100644
--- a/contrib/loaders/erase_check/stm8_erase_check.s
+++ b/contrib/loaders/erase_check/stm8_erase_check.s
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
-* Copyright (C) 2017 Ake Rehnman
-* ake.rehnman(at)gmail.com
-*
-* This program is free software: you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation, either version 2 of the License, or
-* (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
+ * Copyright (C) 2017 Ake Rehnman
+ * ake.rehnman(at)gmail.com
+ */
;;
;; erase check memory code
;;
diff --git a/contrib/loaders/flash/armv4_5_cfi_intel_16.s b/contrib/loaders/flash/armv4_5_cfi_intel_16.s
index c35b651..0c5611d 100644
--- a/contrib/loaders/flash/armv4_5_cfi_intel_16.s
+++ b/contrib/loaders/flash/armv4_5_cfi_intel_16.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv4_5_cfi_intel_32.s b/contrib/loaders/flash/armv4_5_cfi_intel_32.s
index db47717..473a782 100644
--- a/contrib/loaders/flash/armv4_5_cfi_intel_32.s
+++ b/contrib/loaders/flash/armv4_5_cfi_intel_32.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv4_5_cfi_intel_8.s b/contrib/loaders/flash/armv4_5_cfi_intel_8.s
index d50acd2..18f4bb8 100644
--- a/contrib/loaders/flash/armv4_5_cfi_intel_8.s
+++ b/contrib/loaders/flash/armv4_5_cfi_intel_8.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv4_5_cfi_span_16.s b/contrib/loaders/flash/armv4_5_cfi_span_16.s
index 5327271..da02037 100644
--- a/contrib/loaders/flash/armv4_5_cfi_span_16.s
+++ b/contrib/loaders/flash/armv4_5_cfi_span_16.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s b/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s
index 919f6e1..fb7679e 100644
--- a/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s
+++ b/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv4_5_cfi_span_32.s b/contrib/loaders/flash/armv4_5_cfi_span_32.s
index c8f87b1..7e377e2 100644
--- a/contrib/loaders/flash/armv4_5_cfi_span_32.s
+++ b/contrib/loaders/flash/armv4_5_cfi_span_32.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv4_5_cfi_span_8.s b/contrib/loaders/flash/armv4_5_cfi_span_8.s
index 46018e1..ad4ee26 100644
--- a/contrib/loaders/flash/armv4_5_cfi_span_8.s
+++ b/contrib/loaders/flash/armv4_5_cfi_span_8.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv7m_cfi_span_16.s b/contrib/loaders/flash/armv7m_cfi_span_16.s
index d4915a7..0a5279e 100644
--- a/contrib/loaders/flash/armv7m_cfi_span_16.s
+++ b/contrib/loaders/flash/armv7m_cfi_span_16.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s b/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s
index 5b29a3b..592c811 100644
--- a/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s
+++ b/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/armv7m_io.s b/contrib/loaders/flash/armv7m_io.s
index f6dbbe9..9d8439e 100644
--- a/contrib/loaders/flash/armv7m_io.s
+++ b/contrib/loaders/flash/armv7m_io.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 by Henrik Nilsson *
* henrik.nilsson@bytequest.se *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script b/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script
index 85450c1..1099d83 100644
--- a/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script
+++ b/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
soft_reset_halt
load_image at91sam7x_ocl.bin 0x200000
resume 0x200000
diff --git a/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld b/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld
index 8cb2118..b093523 100644
--- a/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld
+++ b/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld
@@ -1,32 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
****************************************************************************
*
* History:
diff --git a/contrib/loaders/flash/at91sam7x/crt.s b/contrib/loaders/flash/at91sam7x/crt.s
index 94ed66d..77df43c 100644
--- a/contrib/loaders/flash/at91sam7x/crt.s
+++ b/contrib/loaders/flash/at91sam7x/crt.s
@@ -1,32 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
****************************************************************************
*
* History:
diff --git a/contrib/loaders/flash/at91sam7x/dcc.c b/contrib/loaders/flash/at91sam7x/dcc.c
index a5c32e7..ee95a34 100644
--- a/contrib/loaders/flash/at91sam7x/dcc.c
+++ b/contrib/loaders/flash/at91sam7x/dcc.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc.h"
diff --git a/contrib/loaders/flash/at91sam7x/dcc.h b/contrib/loaders/flash/at91sam7x/dcc.h
index 428bf49..5baca6c 100644
--- a/contrib/loaders/flash/at91sam7x/dcc.h
+++ b/contrib/loaders/flash/at91sam7x/dcc.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef dccH
#define dccH
diff --git a/contrib/loaders/flash/at91sam7x/main.c b/contrib/loaders/flash/at91sam7x/main.c
index 47c9440..a29c6e6 100644
--- a/contrib/loaders/flash/at91sam7x/main.c
+++ b/contrib/loaders/flash/at91sam7x/main.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "platform.h"
diff --git a/contrib/loaders/flash/at91sam7x/makefile b/contrib/loaders/flash/at91sam7x/makefile
index 3948297..3d101c1 100644
--- a/contrib/loaders/flash/at91sam7x/makefile
+++ b/contrib/loaders/flash/at91sam7x/makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
##############################################################################################
# Start of default section
#
diff --git a/contrib/loaders/flash/at91sam7x/ocl.h b/contrib/loaders/flash/at91sam7x/ocl.h
index bd8a5f7..e458b58 100644
--- a/contrib/loaders/flash/at91sam7x/ocl.h
+++ b/contrib/loaders/flash/at91sam7x/ocl.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OCL_H
#define OCL_H
diff --git a/contrib/loaders/flash/at91sam7x/platform.h b/contrib/loaders/flash/at91sam7x/platform.h
index 3dfa4dc..538df9b 100644
--- a/contrib/loaders/flash/at91sam7x/platform.h
+++ b/contrib/loaders/flash/at91sam7x/platform.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef platformH
#define platformH
diff --git a/contrib/loaders/flash/at91sam7x/samflash.c b/contrib/loaders/flash/at91sam7x/samflash.c
index 3095394..fcb76fb 100644
--- a/contrib/loaders/flash/at91sam7x/samflash.c
+++ b/contrib/loaders/flash/at91sam7x/samflash.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "samflash.h"
diff --git a/contrib/loaders/flash/at91sam7x/samflash.h b/contrib/loaders/flash/at91sam7x/samflash.h
index 18973a7..059c2b2 100644
--- a/contrib/loaders/flash/at91sam7x/samflash.h
+++ b/contrib/loaders/flash/at91sam7x/samflash.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef samflashH
#define samflashH
diff --git a/contrib/loaders/flash/at91sam7x/samregs.h b/contrib/loaders/flash/at91sam7x/samregs.h
index b206fd2..3e34a8d 100644
--- a/contrib/loaders/flash/at91sam7x/samregs.h
+++ b/contrib/loaders/flash/at91sam7x/samregs.h
@@ -1,32 +1,8 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/*
* Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holders nor the names of
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
- * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
- * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
* For additional information see http://www.ethernut.de/
*/
diff --git a/contrib/loaders/flash/bluenrg-x/Makefile b/contrib/loaders/flash/bluenrg-x/Makefile
index 1a5cfc0..81d479a 100644
--- a/contrib/loaders/flash/bluenrg-x/Makefile
+++ b/contrib/loaders/flash/bluenrg-x/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c b/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c
index f09f7f5..1bc72d5 100644
--- a/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c
+++ b/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/* To be built with arm-none-eabi-gcc -c -mthumb -mcpu=cortex-m0 -O3 bluenrgx.c */
/* Then postprocess output of command "arm-none-eabi-objdump -d bluenrgx.o" to make a C array of bytes */
diff --git a/contrib/loaders/flash/cc26xx/Makefile b/contrib/loaders/flash/cc26xx/Makefile
index 7cc1fb3..550e1d0 100644
--- a/contrib/loaders/flash/cc26xx/Makefile
+++ b/contrib/loaders/flash/cc26xx/Makefile
@@ -1,3 +1,7 @@
+# SPDX-License-Identifier: BSD-3-Clause
+
+# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/cc26xx/cc26x0/cc26x0r2f.lds b/contrib/loaders/flash/cc26xx/cc26x0/cc26x0r2f.lds
index 9a126fc..79cbfc4 100644
--- a/contrib/loaders/flash/cc26xx/cc26x0/cc26x0r2f.lds
+++ b/contrib/loaders/flash/cc26xx/cc26x0/cc26x0r2f.lds
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
/* Entry Point */
diff --git a/contrib/loaders/flash/cc26xx/cc26x2/cc26x2r1f.lds b/contrib/loaders/flash/cc26xx/cc26x2/cc26x2r1f.lds
index fb7cc56..2394c0c 100644
--- a/contrib/loaders/flash/cc26xx/cc26x2/cc26x2r1f.lds
+++ b/contrib/loaders/flash/cc26xx/cc26x2/cc26x2r1f.lds
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
/* Entry Point */
diff --git a/contrib/loaders/flash/cc26xx/flash.c b/contrib/loaders/flash/cc26xx/flash.c
index c19cb73..affd029 100644
--- a/contrib/loaders/flash/cc26xx/flash.c
+++ b/contrib/loaders/flash/cc26xx/flash.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/cc26xx/flash.h b/contrib/loaders/flash/cc26xx/flash.h
index dd0a374..07acf26 100644
--- a/contrib/loaders/flash/cc26xx/flash.h
+++ b/contrib/loaders/flash/cc26xx/flash.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_CC26XX_FLASH_H
diff --git a/contrib/loaders/flash/cc26xx/flashloader.c b/contrib/loaders/flash/cc26xx/flashloader.c
index 2eaf618..8e9636d 100644
--- a/contrib/loaders/flash/cc26xx/flashloader.c
+++ b/contrib/loaders/flash/cc26xx/flashloader.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/cc26xx/flashloader.h b/contrib/loaders/flash/cc26xx/flashloader.h
index aec74aa..a669557 100644
--- a/contrib/loaders/flash/cc26xx/flashloader.h
+++ b/contrib/loaders/flash/cc26xx/flashloader.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_CC26XX_FLASHLOADER_H
diff --git a/contrib/loaders/flash/cc26xx/hw_regs.h b/contrib/loaders/flash/cc26xx/hw_regs.h
index 830d3af..78c81be 100644
--- a/contrib/loaders/flash/cc26xx/hw_regs.h
+++ b/contrib/loaders/flash/cc26xx/hw_regs.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_CC26XX_HW_REGS_H
diff --git a/contrib/loaders/flash/cc26xx/main.c b/contrib/loaders/flash/cc26xx/main.c
index 13204b4..6b626a3 100644
--- a/contrib/loaders/flash/cc26xx/main.c
+++ b/contrib/loaders/flash/cc26xx/main.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/cc26xx/startup.c b/contrib/loaders/flash/cc26xx/startup.c
index 53d8ea8..3117eb1 100644
--- a/contrib/loaders/flash/cc26xx/startup.c
+++ b/contrib/loaders/flash/cc26xx/startup.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/cc3220sf/Makefile b/contrib/loaders/flash/cc3220sf/Makefile
index d1dcc25..1c74577 100644
--- a/contrib/loaders/flash/cc3220sf/Makefile
+++ b/contrib/loaders/flash/cc3220sf/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/cc3220sf/cc3220sf.s b/contrib/loaders/flash/cc3220sf/cc3220sf.s
index cffcfa0..ea82c85 100644
--- a/contrib/loaders/flash/cc3220sf/cc3220sf.s
+++ b/contrib/loaders/flash/cc3220sf/cc3220sf.s
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2017 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* Params:
diff --git a/contrib/loaders/flash/cortex-m0.S b/contrib/loaders/flash/cortex-m0.S
index b4416e7..74b071d 100644
--- a/contrib/loaders/flash/cortex-m0.S
+++ b/contrib/loaders/flash/cortex-m0.S
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2014 by Angus Gratton *
* Derived from stm32f1x.S:
@@ -5,19 +7,6 @@
* andreas.fritiofson@gmail.com *
* Copyright (C) 2013 by Roman Dmitrienko *
* me@iamroman.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
.syntax unified
diff --git a/contrib/loaders/flash/efm32.S b/contrib/loaders/flash/efm32.S
index c5de55c..b693851 100644
--- a/contrib/loaders/flash/efm32.S
+++ b/contrib/loaders/flash/efm32.S
@@ -1,23 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
* Copyright (C) 2013 by Roman Dmitrienko *
* me@iamroman.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/fespi/Makefile b/contrib/loaders/flash/fespi/Makefile
index edecf0a..d63b819 100644
--- a/contrib/loaders/flash/fespi/Makefile
+++ b/contrib/loaders/flash/fespi/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= riscv64-unknown-elf-
diff --git a/contrib/loaders/flash/fespi/riscv.lds b/contrib/loaders/flash/fespi/riscv.lds
index 77fe0e5..7473128 100644
--- a/contrib/loaders/flash/fespi/riscv.lds
+++ b/contrib/loaders/flash/fespi/riscv.lds
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
OUTPUT_ARCH( "riscv" )
SECTIONS
diff --git a/contrib/loaders/flash/fespi/riscv_fespi.c b/contrib/loaders/flash/fespi/riscv_fespi.c
index b616433..17ae2fd 100644
--- a/contrib/loaders/flash/fespi/riscv_fespi.c
+++ b/contrib/loaders/flash/fespi/riscv_fespi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
diff --git a/contrib/loaders/flash/fespi/riscv_wrapper.S b/contrib/loaders/flash/fespi/riscv_wrapper.S
index 4f632a7..4bc4fe6 100644
--- a/contrib/loaders/flash/fespi/riscv_wrapper.S
+++ b/contrib/loaders/flash/fespi/riscv_wrapper.S
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
#if __riscv_xlen == 64
# define LREG ld
# define SREG sd
diff --git a/contrib/loaders/flash/fm4/Makefile b/contrib/loaders/flash/fm4/Makefile
index 207b9d0..5e6593b 100644
--- a/contrib/loaders/flash/fm4/Makefile
+++ b/contrib/loaders/flash/fm4/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/fm4/erase.S b/contrib/loaders/flash/fm4/erase.S
index 6fdf81d..666487d 100644
--- a/contrib/loaders/flash/fm4/erase.S
+++ b/contrib/loaders/flash/fm4/erase.S
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Spansion FM4 flash sector erase algorithm
*
diff --git a/contrib/loaders/flash/fm4/fm4.h b/contrib/loaders/flash/fm4/fm4.h
index 603aac8..76a4f33 100644
--- a/contrib/loaders/flash/fm4/fm4.h
+++ b/contrib/loaders/flash/fm4/fm4.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Spansion FM4 flash macros
*
diff --git a/contrib/loaders/flash/fm4/write.S b/contrib/loaders/flash/fm4/write.S
index a8d01cd..0819da7 100644
--- a/contrib/loaders/flash/fm4/write.S
+++ b/contrib/loaders/flash/fm4/write.S
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Spansion FM4 flash write algorithm
*
diff --git a/contrib/loaders/flash/fpga/xilinx_bscan_spi.py b/contrib/loaders/flash/fpga/xilinx_bscan_spi.py
index 4246aa2..408cfdd 100755
--- a/contrib/loaders/flash/fpga/xilinx_bscan_spi.py
+++ b/contrib/loaders/flash/fpga/xilinx_bscan_spi.py
@@ -1,17 +1,7 @@
#!/usr/bin/python3
-#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2015 Robert Jordens <jordens@gmail.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
import unittest
diff --git a/contrib/loaders/flash/gd32vf103/Makefile b/contrib/loaders/flash/gd32vf103/Makefile
index 2c34e08..812fd8a 100644
--- a/contrib/loaders/flash/gd32vf103/Makefile
+++ b/contrib/loaders/flash/gd32vf103/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= riscv-none-embed-
diff --git a/contrib/loaders/flash/gd32vf103/gd32vf103.c b/contrib/loaders/flash/gd32vf103/gd32vf103.c
index 69225a0..927014c 100644
--- a/contrib/loaders/flash/gd32vf103/gd32vf103.c
+++ b/contrib/loaders/flash/gd32vf103/gd32vf103.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
#include <stdint.h>
diff --git a/contrib/loaders/flash/k1921vk01t.S b/contrib/loaders/flash/k1921vk01t.S
index b8f0b53..d8e3cd6 100644
--- a/contrib/loaders/flash/k1921vk01t.S
+++ b/contrib/loaders/flash/k1921vk01t.S
@@ -1,20 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by Bogdan Kolbov *
* kolbov@niiet.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/kinetis/Makefile b/contrib/loaders/flash/kinetis/Makefile
index b240f53..d6c072b 100644
--- a/contrib/loaders/flash/kinetis/Makefile
+++ b/contrib/loaders/flash/kinetis/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/kinetis/kinetis_flash.s b/contrib/loaders/flash/kinetis/kinetis_flash.s
index c8e6e05..5b9d3c6 100644
--- a/contrib/loaders/flash/kinetis/kinetis_flash.s
+++ b/contrib/loaders/flash/kinetis/kinetis_flash.s
@@ -1,19 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by Ivan Meleca *
* ivan@artekit.eu *
* *
* Copyright (C) 2016 by Tomas Vanek *
* vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
***************************************************************************/
/* Params:
diff --git a/contrib/loaders/flash/kinetis_ke/Makefile b/contrib/loaders/flash/kinetis_ke/Makefile
index 7d8dba8..17cbf32 100644
--- a/contrib/loaders/flash/kinetis_ke/Makefile
+++ b/contrib/loaders/flash/kinetis_ke/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s b/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s
index 1fa7613..f082b46 100644
--- a/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s
+++ b/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s
@@ -1,16 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by Ivan Meleca *
* ivan@artekit.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
***************************************************************************/
/* Params:
diff --git a/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s b/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s
index 289662d..e0ff0b1 100644
--- a/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s
+++ b/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s
@@ -1,16 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by Ivan Meleca *
* ivan@artekit.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/lpcspifi_erase.S b/contrib/loaders/flash/lpcspifi_erase.S
index 350aa93..70cdcfa 100644
--- a/contrib/loaders/flash/lpcspifi_erase.S
+++ b/contrib/loaders/flash/lpcspifi_erase.S
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/lpcspifi_init.S b/contrib/loaders/flash/lpcspifi_init.S
index 9872892..651298a 100644
--- a/contrib/loaders/flash/lpcspifi_init.S
+++ b/contrib/loaders/flash/lpcspifi_init.S
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/***************************************************************************
diff --git a/contrib/loaders/flash/lpcspifi_write.S b/contrib/loaders/flash/lpcspifi_write.S
index 8435a20..476e143 100644
--- a/contrib/loaders/flash/lpcspifi_write.S
+++ b/contrib/loaders/flash/lpcspifi_write.S
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/max32xxx/Makefile b/contrib/loaders/flash/max32xxx/Makefile
index 8f3f924..1565c81 100644
--- a/contrib/loaders/flash/max32xxx/Makefile
+++ b/contrib/loaders/flash/max32xxx/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/max32xxx/max32xxx.s b/contrib/loaders/flash/max32xxx/max32xxx.s
index f5306d6..38a4f12 100644
--- a/contrib/loaders/flash/max32xxx/max32xxx.s
+++ b/contrib/loaders/flash/max32xxx/max32xxx.s
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2016 by Maxim Integrated *
* Kevin Gillespie <kevin.gillespie@maximintegrated.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/mdr32fx.S b/contrib/loaders/flash/mdr32fx.S
index 73f4b6f..3a25d20 100644
--- a/contrib/loaders/flash/mdr32fx.S
+++ b/contrib/loaders/flash/mdr32fx.S
@@ -1,24 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
* *
* Copyright (C) 2013 by Paul Fertser *
* fercerpav@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/mrvlqspi_write.S b/contrib/loaders/flash/mrvlqspi_write.S
index e1088e3..5865da0 100644
--- a/contrib/loaders/flash/mrvlqspi_write.S
+++ b/contrib/loaders/flash/mrvlqspi_write.S
@@ -1,24 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2014 by Mahavir Jain <mjain@marvell.com> *
* *
* Adapted from (contrib/loaders/flash/lpcspifi_write.S): *
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/msp432/MSP432E4_FlashLibIf.h b/contrib/loaders/flash/msp432/MSP432E4_FlashLibIf.h
index d406d60..aad3989 100644
--- a/contrib/loaders/flash/msp432/MSP432E4_FlashLibIf.h
+++ b/contrib/loaders/flash/msp432/MSP432E4_FlashLibIf.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2014-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432E4_FLASHLIBIF_H
diff --git a/contrib/loaders/flash/msp432/MSP432P4_FlashLibIf.h b/contrib/loaders/flash/msp432/MSP432P4_FlashLibIf.h
index c438097..b933481 100644
--- a/contrib/loaders/flash/msp432/MSP432P4_FlashLibIf.h
+++ b/contrib/loaders/flash/msp432/MSP432P4_FlashLibIf.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2014-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P4_FLASHLIBIF_H
diff --git a/contrib/loaders/flash/msp432/Makefile b/contrib/loaders/flash/msp432/Makefile
index 6083331..cb1092c 100644
--- a/contrib/loaders/flash/msp432/Makefile
+++ b/contrib/loaders/flash/msp432/Makefile
@@ -1,3 +1,7 @@
+# SPDX-License-Identifier: BSD-3-Clause
+
+# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/msp432/driverlib.c b/contrib/loaders/flash/msp432/driverlib.c
index ac6dfd4..6f483b8 100644
--- a/contrib/loaders/flash/msp432/driverlib.c
+++ b/contrib/loaders/flash/msp432/driverlib.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/msp432/driverlib.h b/contrib/loaders/flash/msp432/driverlib.h
index 23ba7b5..1a08737 100644
--- a/contrib/loaders/flash/msp432/driverlib.h
+++ b/contrib/loaders/flash/msp432/driverlib.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_DRIVERLIB_H
diff --git a/contrib/loaders/flash/msp432/main_msp432e4x.c b/contrib/loaders/flash/msp432/main_msp432e4x.c
index 23540ac..7974f48 100644
--- a/contrib/loaders/flash/msp432/main_msp432e4x.c
+++ b/contrib/loaders/flash/msp432/main_msp432e4x.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/msp432/main_msp432p401x.c b/contrib/loaders/flash/msp432/main_msp432p401x.c
index 7992f11..47fb7fa 100644
--- a/contrib/loaders/flash/msp432/main_msp432p401x.c
+++ b/contrib/loaders/flash/msp432/main_msp432p401x.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/msp432/main_msp432p411x.c b/contrib/loaders/flash/msp432/main_msp432p411x.c
index be1f709..efc05a3 100644
--- a/contrib/loaders/flash/msp432/main_msp432p411x.c
+++ b/contrib/loaders/flash/msp432/main_msp432p411x.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/msp432/msp432e4x.h b/contrib/loaders/flash/msp432/msp432e4x.h
index 2a9d155..c0bc7b4 100644
--- a/contrib/loaders/flash/msp432/msp432e4x.h
+++ b/contrib/loaders/flash/msp432/msp432e4x.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432E4X_H
diff --git a/contrib/loaders/flash/msp432/msp432e4x/msp432e4x.lds b/contrib/loaders/flash/msp432/msp432e4x/msp432e4x.lds
index af97458..2782209 100644
--- a/contrib/loaders/flash/msp432/msp432e4x/msp432e4x.lds
+++ b/contrib/loaders/flash/msp432/msp432e4x/msp432e4x.lds
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
MEMORY {
diff --git a/contrib/loaders/flash/msp432/msp432p401x.h b/contrib/loaders/flash/msp432/msp432p401x.h
index ca219fd..b8ccea8 100644
--- a/contrib/loaders/flash/msp432/msp432p401x.h
+++ b/contrib/loaders/flash/msp432/msp432p401x.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H
diff --git a/contrib/loaders/flash/msp432/msp432p401x/msp432p401x.lds b/contrib/loaders/flash/msp432/msp432p401x/msp432p401x.lds
index f9d04ed..178eaf4 100644
--- a/contrib/loaders/flash/msp432/msp432p401x/msp432p401x.lds
+++ b/contrib/loaders/flash/msp432/msp432p401x/msp432p401x.lds
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
MEMORY {
diff --git a/contrib/loaders/flash/msp432/msp432p411x.h b/contrib/loaders/flash/msp432/msp432p411x.h
index 6482dd3..3225fa4 100644
--- a/contrib/loaders/flash/msp432/msp432p411x.h
+++ b/contrib/loaders/flash/msp432/msp432p411x.h
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P411X_H
diff --git a/contrib/loaders/flash/msp432/msp432p411x/msp432p411x.lds b/contrib/loaders/flash/msp432/msp432p411x/msp432p411x.lds
index 0e7aa2d..cec3c53 100644
--- a/contrib/loaders/flash/msp432/msp432p411x/msp432p411x.lds
+++ b/contrib/loaders/flash/msp432/msp432p411x/msp432p411x.lds
@@ -1,35 +1,9 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
MEMORY {
diff --git a/contrib/loaders/flash/msp432/startup_msp432e4.c b/contrib/loaders/flash/msp432/startup_msp432e4.c
index 494da46..4978960 100644
--- a/contrib/loaders/flash/msp432/startup_msp432e4.c
+++ b/contrib/loaders/flash/msp432/startup_msp432e4.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/msp432/startup_msp432p4.c b/contrib/loaders/flash/msp432/startup_msp432p4.c
index 09103b0..350fd35 100644
--- a/contrib/loaders/flash/msp432/startup_msp432p4.c
+++ b/contrib/loaders/flash/msp432/startup_msp432p4.c
@@ -1,35 +1,9 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-*
-* Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the
-* distribution.
-*
-* Neither the name of Texas Instruments Incorporated nor the names of
-* its contributors may be used to endorse or promote products derived
-* from this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
******************************************************************************/
#include <stdint.h>
diff --git a/contrib/loaders/flash/npcx/npcx_flash.c b/contrib/loaders/flash/npcx/npcx_flash.c
index d60624a..7d59123 100644
--- a/contrib/loaders/flash/npcx/npcx_flash.c
+++ b/contrib/loaders/flash/npcx/npcx_flash.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 by Nuvoton Technology Corporation
diff --git a/contrib/loaders/flash/nrf5/Makefile b/contrib/loaders/flash/nrf5/Makefile
index 67390b9..254ccd7 100644
--- a/contrib/loaders/flash/nrf5/Makefile
+++ b/contrib/loaders/flash/nrf5/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/nrf5/nrf5.S b/contrib/loaders/flash/nrf5/nrf5.S
index 12b1d92..4115b03 100644
--- a/contrib/loaders/flash/nrf5/nrf5.S
+++ b/contrib/loaders/flash/nrf5/nrf5.S
@@ -1,20 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2014 Angus Gratton *
* gus@projectgus.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/pic32mx.s b/contrib/loaders/flash/pic32mx.s
index 9f41965..6de4de0 100644
--- a/contrib/loaders/flash/pic32mx.s
+++ b/contrib/loaders/flash/pic32mx.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/rsl10/Makefile b/contrib/loaders/flash/rsl10/Makefile
new file mode 100644
index 0000000..6e99bcc
--- /dev/null
+++ b/contrib/loaders/flash/rsl10/Makefile
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+BIN2C = ../../../../src/helper/bin2char.sh
+
+CROSS_COMPILE ?= arm-none-eabi-
+
+CC=$(CROSS_COMPILE)gcc
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+
+CFLAGS = -static -nostartfiles -mlittle-endian -Wa,-EL
+
+all: rom_launcher.inc
+
+.PHONY: clean
+
+%.elf: %.S
+ $(CC) $(CFLAGS) $< -o $@
+
+%.lst: %.elf
+ $(OBJDUMP) -S $< > $@
+
+%.bin: %.elf
+ $(OBJCOPY) -Obinary $< $@
+
+%.inc: %.bin
+ $(BIN2C) < $< > $@
+
+clean:
+ -rm -f *.elf *.lst *.bin *.inc
diff --git a/contrib/loaders/flash/rsl10/rom_launcher.S b/contrib/loaders/flash/rsl10/rom_launcher.S
new file mode 100644
index 0000000..70f000e
--- /dev/null
+++ b/contrib/loaders/flash/rsl10/rom_launcher.S
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Copyright (C) 2022 by Toms Stūrmanis *
+ * toms.sturmanis@gmail.com *
+ ***************************************************************************/
+
+ .text
+ .syntax unified
+ .cpu cortex-m4
+ .thumb
+ .align 8
+
+/*
+ * Params :
+ * r0-r2 = arguments
+ * r3 = target address in rom
+ */
+
+ .thumb_func
+ .global _start
+_start:
+launch_program_in_rom:
+ // variables are already set, addres to jump is in r3
+ blx r3
+exit:
+ // Wait for OpenOCD
+ bkpt #0x00
diff --git a/contrib/loaders/flash/rsl10/rom_launcher.inc b/contrib/loaders/flash/rsl10/rom_launcher.inc
new file mode 100644
index 0000000..795c8e0
--- /dev/null
+++ b/contrib/loaders/flash/rsl10/rom_launcher.inc
@@ -0,0 +1,2 @@
+/* Autogenerated with ../../../../src/helper/bin2char.sh */
+0x98,0x47,0x00,0xbe,
diff --git a/contrib/loaders/flash/sh_qspi/Makefile b/contrib/loaders/flash/sh_qspi/Makefile
index 2bfbad1..a7e0aea 100644
--- a/contrib/loaders/flash/sh_qspi/Makefile
+++ b/contrib/loaders/flash/sh_qspi/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
CROSS_COMPILE=arm-linux-gnueabihf-
BIN2C = ../../../../src/helper/bin2char.sh
diff --git a/contrib/loaders/flash/sh_qspi/sh_qspi.S b/contrib/loaders/flash/sh_qspi/sh_qspi.S
index 78eb1e8..b46514a 100644
--- a/contrib/loaders/flash/sh_qspi/sh_qspi.S
+++ b/contrib/loaders/flash/sh_qspi/sh_qspi.S
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
+/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* SH QSPI (Quad SPI) driver
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
diff --git a/contrib/loaders/flash/sh_qspi/sh_qspi.ld b/contrib/loaders/flash/sh_qspi/sh_qspi.ld
index 2683c52..71cc3e3 100644
--- a/contrib/loaders/flash/sh_qspi/sh_qspi.ld
+++ b/contrib/loaders/flash/sh_qspi/sh_qspi.ld
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
+/* SPDX-License-Identifier: GPL-2.0-or-later */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
diff --git a/contrib/loaders/flash/sim3x.s b/contrib/loaders/flash/sim3x.s
index cdb3ef6..6031f0c 100644
--- a/contrib/loaders/flash/sim3x.s
+++ b/contrib/loaders/flash/sim3x.s
@@ -1,16 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2014 by Ladislav Bábel *
* ladababel@seznam.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
***************************************************************************/
#define INITIAL_UNLOCK 0x5A
diff --git a/contrib/loaders/flash/stellaris.s b/contrib/loaders/flash/stellaris.s
index 6e1ed69..0f2d0f5 100644
--- a/contrib/loaders/flash/stellaris.s
+++ b/contrib/loaders/flash/stellaris.s
@@ -1,24 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stm32/Makefile b/contrib/loaders/flash/stm32/Makefile
index cee282a..5a97e7b 100644
--- a/contrib/loaders/flash/stm32/Makefile
+++ b/contrib/loaders/flash/stm32/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/stm32/stm32f1x.S b/contrib/loaders/flash/stm32/stm32f1x.S
index a1c4135..fb214da 100644
--- a/contrib/loaders/flash/stm32/stm32f1x.S
+++ b/contrib/loaders/flash/stm32/stm32f1x.S
@@ -1,16 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stm32/stm32f2x.S b/contrib/loaders/flash/stm32/stm32f2x.S
index 8caf5ba..95e5e38 100644
--- a/contrib/loaders/flash/stm32/stm32f2x.S
+++ b/contrib/loaders/flash/stm32/stm32f2x.S
@@ -1,19 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2011 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stm32/stm32h7x.S b/contrib/loaders/flash/stm32/stm32h7x.S
index 8ef42a4..e4a172a 100644
--- a/contrib/loaders/flash/stm32/stm32h7x.S
+++ b/contrib/loaders/flash/stm32/stm32h7x.S
@@ -1,19 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2017 by STMicroelectronics *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stm32/stm32l4x.c b/contrib/loaders/flash/stm32/stm32l4x.c
index 54c88a3..b657ec9 100644
--- a/contrib/loaders/flash/stm32/stm32l4x.c
+++ b/contrib/loaders/flash/stm32/stm32l4x.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/**
* Copyright (C) 2021 Tarek BOCHKATI
diff --git a/contrib/loaders/flash/stm32/stm32lx.S b/contrib/loaders/flash/stm32/stm32lx.S
index 7cfe485..fc90847 100644
--- a/contrib/loaders/flash/stm32/stm32lx.S
+++ b/contrib/loaders/flash/stm32/stm32lx.S
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -10,16 +12,6 @@
* *
* Copyright (C) 2017 Armin van der Togt *
* armin@otheruse.nl *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/Makefile b/contrib/loaders/flash/stmqspi/Makefile
index 810c7e8..b07d452 100644
--- a/contrib/loaders/flash/stmqspi/Makefile
+++ b/contrib/loaders/flash/stmqspi/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
SRCS=stmqspi_erase_check.S stmqspi_crc32.S stmqspi_read.S stmqspi_write.S \
diff --git a/contrib/loaders/flash/stmqspi/gpio_conf_stm32.pl b/contrib/loaders/flash/stmqspi/gpio_conf_stm32.pl
index b753864..49b15c2 100755
--- a/contrib/loaders/flash/stmqspi/gpio_conf_stm32.pl
+++ b/contrib/loaders/flash/stmqspi/gpio_conf_stm32.pl
@@ -1,4 +1,6 @@
#!/usr/bin/perl
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Helper for generating GPIO setup for STM32F0, F4, F7, H7, L0, L1, L4, L4+
# and F1 (for 'stmqspi' and 'cmspi' drivers).
diff --git a/contrib/loaders/flash/stmqspi/stmoctospi_crc32.S b/contrib/loaders/flash/stmqspi/stmoctospi_crc32.S
index 941ea42..338fba3 100644
--- a/contrib/loaders/flash/stmqspi/stmoctospi_crc32.S
+++ b/contrib/loaders/flash/stmqspi/stmoctospi_crc32.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/stmoctospi_erase_check.S b/contrib/loaders/flash/stmqspi/stmoctospi_erase_check.S
index 3af82d4..6593a8e 100644
--- a/contrib/loaders/flash/stmqspi/stmoctospi_erase_check.S
+++ b/contrib/loaders/flash/stmqspi/stmoctospi_erase_check.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/stmoctospi_read.S b/contrib/loaders/flash/stmqspi/stmoctospi_read.S
index fb5ff1f..8cc786e 100644
--- a/contrib/loaders/flash/stmqspi/stmoctospi_read.S
+++ b/contrib/loaders/flash/stmqspi/stmoctospi_read.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/stmoctospi_write.S b/contrib/loaders/flash/stmqspi/stmoctospi_write.S
index 867a024..245b99c 100644
--- a/contrib/loaders/flash/stmqspi/stmoctospi_write.S
+++ b/contrib/loaders/flash/stmqspi/stmoctospi_write.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/stmqspi_crc32.S b/contrib/loaders/flash/stmqspi/stmqspi_crc32.S
index bfb2662..4dd5671 100644
--- a/contrib/loaders/flash/stmqspi/stmqspi_crc32.S
+++ b/contrib/loaders/flash/stmqspi/stmqspi_crc32.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/stmqspi_erase_check.S b/contrib/loaders/flash/stmqspi/stmqspi_erase_check.S
index d011103..5fddbcb 100644
--- a/contrib/loaders/flash/stmqspi/stmqspi_erase_check.S
+++ b/contrib/loaders/flash/stmqspi/stmqspi_erase_check.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/stmqspi_read.S b/contrib/loaders/flash/stmqspi/stmqspi_read.S
index b84d4eb..f6bf876 100644
--- a/contrib/loaders/flash/stmqspi/stmqspi_read.S
+++ b/contrib/loaders/flash/stmqspi/stmqspi_read.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/stmqspi/stmqspi_write.S b/contrib/loaders/flash/stmqspi/stmqspi_write.S
index 40953ac..9991d34 100644
--- a/contrib/loaders/flash/stmqspi/stmqspi_write.S
+++ b/contrib/loaders/flash/stmqspi/stmqspi_write.S
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2016 - 2018 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/str7x.s b/contrib/loaders/flash/str7x.s
index cd19013..8630bb7 100644
--- a/contrib/loaders/flash/str7x.s
+++ b/contrib/loaders/flash/str7x.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/str9x.s b/contrib/loaders/flash/str9x.s
index 279b175..53d3856 100644
--- a/contrib/loaders/flash/str9x.s
+++ b/contrib/loaders/flash/str9x.s
@@ -1,21 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text
diff --git a/contrib/loaders/flash/xmc1xxx/Makefile b/contrib/loaders/flash/xmc1xxx/Makefile
index b97c602..0bda5b7 100644
--- a/contrib/loaders/flash/xmc1xxx/Makefile
+++ b/contrib/loaders/flash/xmc1xxx/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/flash/xmc1xxx/erase.S b/contrib/loaders/flash/xmc1xxx/erase.S
index e5a4808..9d3d992 100644
--- a/contrib/loaders/flash/xmc1xxx/erase.S
+++ b/contrib/loaders/flash/xmc1xxx/erase.S
@@ -1,11 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Infineon XMC1000 flash sectors erase
*
* Copyright (c) 2016 Andreas Färber
*
* Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
*/
#include "xmc1xxx.S"
diff --git a/contrib/loaders/flash/xmc1xxx/erase_check.S b/contrib/loaders/flash/xmc1xxx/erase_check.S
index 6c99344..311c204 100644
--- a/contrib/loaders/flash/xmc1xxx/erase_check.S
+++ b/contrib/loaders/flash/xmc1xxx/erase_check.S
@@ -1,11 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Infineon XMC1000 flash sector erase check
*
* Copyright (c) 2016 Andreas Färber
*
* Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
*/
#include "xmc1xxx.S"
diff --git a/contrib/loaders/flash/xmc1xxx/write.S b/contrib/loaders/flash/xmc1xxx/write.S
index 640f6ca..1754252 100644
--- a/contrib/loaders/flash/xmc1xxx/write.S
+++ b/contrib/loaders/flash/xmc1xxx/write.S
@@ -1,11 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Infineon XMC1000 flash write
*
* Copyright (c) 2016 Andreas Färber
*
* Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
*/
#include "xmc1xxx.S"
diff --git a/contrib/loaders/flash/xmc1xxx/xmc1xxx.S b/contrib/loaders/flash/xmc1xxx/xmc1xxx.S
index dfe7d3f..5be141d 100644
--- a/contrib/loaders/flash/xmc1xxx/xmc1xxx.S
+++ b/contrib/loaders/flash/xmc1xxx/xmc1xxx.S
@@ -1,11 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Infineon XMC1000 flash
*
* Copyright (c) 2016 Andreas Färber
*
* Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
*/
.text
diff --git a/contrib/loaders/reset/espressif/common.mk b/contrib/loaders/reset/espressif/common.mk
new file mode 100644
index 0000000..f77efe6
--- /dev/null
+++ b/contrib/loaders/reset/espressif/common.mk
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# ESP32 Makefile to compile the SoC reset program
+# Copyright (C) 2022 Espressif Systems Ltd.
+
+# Pass V=1 to see the commands being executed by make
+ifneq ("$(V)","1")
+Q = @
+endif
+
+BIN2C = ../../../../../src/helper/bin2char.sh
+
+APP = cpu_reset_handler
+
+BUILD_DIR = build
+
+APP_OBJ = $(BUILD_DIR)/$(APP).o
+APP_BIN = $(BUILD_DIR)/$(APP)_code.bin
+APP_CODE = $(APP)_code.inc
+
+CFLAGS += -mtext-section-literals
+
+.PHONY: all cleanxten
+
+all: $(BUILD_DIR) $(APP_OBJ) $(APP_CODE)
+
+$(BUILD_DIR):
+ $(Q) mkdir $@
+
+$(APP_OBJ): $(SRCS)
+ @echo " CC $^ -> $@"
+ $(Q) $(CROSS)gcc -c $(CFLAGS) -o $@ $^
+
+$(APP_CODE): $(APP_OBJ)
+ @echo " CC $^ -> $@"
+ $(Q) $(CROSS)objcopy -O binary -j.text $^ $(APP_BIN)
+ $(Q) $(BIN2C) < $(APP_BIN) > $@
+
+clean:
+ $(Q) rm -rf $(BUILD_DIR)
diff --git a/contrib/loaders/reset/espressif/esp32/Makefile b/contrib/loaders/reset/espressif/esp32/Makefile
new file mode 100644
index 0000000..a631780
--- /dev/null
+++ b/contrib/loaders/reset/espressif/esp32/Makefile
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# ESP32 Makefile to compile the SoC reset program
+# Copyright (C) 2022 Espressif Systems Ltd.
+
+# Prefix for ESP32 cross compilers (can include a directory path)
+CROSS ?= xtensa-esp32-elf-
+
+APP_ARCH := xtensa
+APP_CHIP := ESP32
+APP_CHIP_PATH := $(shell pwd)
+SRCS := $(APP_CHIP_PATH)/esp32_cpu_reset_handler.S
+
+CFLAGS :=
+LDFLAGS :=
+
+INCLUDES :=
+DEFINES :=
+
+include ../common.mk
diff --git a/contrib/loaders/reset/espressif/esp32/cpu_reset_handler_code.inc b/contrib/loaders/reset/espressif/esp32/cpu_reset_handler_code.inc
new file mode 100644
index 0000000..57ee12d
--- /dev/null
+++ b/contrib/loaders/reset/espressif/esp32/cpu_reset_handler_code.inc
@@ -0,0 +1,15 @@
+/* Autogenerated with ../../../../../src/helper/bin2char.sh */
+0x06,0x1e,0x00,0x00,0x06,0x14,0x00,0x00,0x34,0x80,0xf4,0x3f,0xb0,0x80,0xf4,0x3f,
+0xb4,0x80,0xf4,0x3f,0x70,0x80,0xf4,0x3f,0x10,0x22,0x00,0x00,0x00,0x20,0x49,0x9c,
+0x00,0x80,0xf4,0x3f,0xa1,0x3a,0xd8,0x50,0xa4,0x80,0xf4,0x3f,0x64,0xf0,0xf5,0x3f,
+0x64,0x00,0xf6,0x3f,0x8c,0x80,0xf4,0x3f,0x48,0xf0,0xf5,0x3f,0x48,0x00,0xf6,0x3f,
+0xfc,0xa1,0xf5,0x3f,0x38,0x00,0xf0,0x3f,0x30,0x00,0xf0,0x3f,0x2c,0x00,0xf0,0x3f,
+0x34,0x80,0xf4,0x3f,0x00,0x30,0x00,0x00,0x50,0x55,0x30,0x41,0xeb,0xff,0x59,0x04,
+0x41,0xeb,0xff,0x59,0x04,0x41,0xea,0xff,0x59,0x04,0x41,0xea,0xff,0x31,0xea,0xff,
+0x39,0x04,0x31,0xea,0xff,0x41,0xea,0xff,0x39,0x04,0x00,0x00,0x60,0xeb,0x03,0x60,
+0x61,0x04,0x56,0x66,0x04,0x50,0x55,0x30,0x31,0xe7,0xff,0x41,0xe7,0xff,0x39,0x04,
+0x41,0xe7,0xff,0x39,0x04,0x41,0xe6,0xff,0x39,0x04,0x41,0xe6,0xff,0x59,0x04,0x41,
+0xe6,0xff,0x59,0x04,0x41,0xe6,0xff,0x59,0x04,0x41,0xe5,0xff,0x59,0x04,0x41,0xe5,
+0xff,0x59,0x04,0x41,0xe5,0xff,0x0c,0x13,0x39,0x04,0x41,0xe4,0xff,0x0c,0x13,0x39,
+0x04,0x59,0x04,0x41,0xe3,0xff,0x31,0xe3,0xff,0x32,0x64,0x00,0x00,0x70,0x00,0x46,
+0xfe,0xff,
diff --git a/contrib/loaders/reset/espressif/esp32/esp32_cpu_reset_handler.S b/contrib/loaders/reset/espressif/esp32/esp32_cpu_reset_handler.S
new file mode 100644
index 0000000..506d41e
--- /dev/null
+++ b/contrib/loaders/reset/espressif/esp32/esp32_cpu_reset_handler.S
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Reset stub used by esp32 target *
+ * Copyright (C) 2017 Espressif Systems Ltd. *
+ ***************************************************************************/
+
+#define RTC_CNTL_RESET_STATE_REG 0x3ff48034
+#define RTC_CNTL_RESET_STATE_DEF 0x3000
+#define RTC_CNTL_CLK_CONF_REG 0x3ff48070
+#define RTC_CNTL_CLK_CONF_DEF 0x2210
+#define RTC_CNTL_STORE4_REG 0x3ff480b0
+#define RTC_CNTL_STORE5_REG 0x3ff480b4
+#define WDT_WKEY_VALUE 0x50D83AA1
+#define TIMG0_WDTWPROTECT_REG 0x3ff5f064
+#define TIMG0_WDTCONFIG0_REG 0x3ff5f048
+#define TIMG1_WDTWPROTECT_REG 0x3FF60064
+#define TIMG1_WDTCONFIG0_REG 0x3ff60048
+#define RTC_CNTL_WDTCONFIG0_REG 0x3ff4808c
+#define RTC_CNTL_WDTWPROTECT_REG 0x3ff480a4
+#define JTAG_ENABLE_REG 0x3ff5a1fc
+#define RTC_CNTL_OPTIONS0_REG 0x3ff48000
+#define RTC_CNTL_OPTIONS0_DEF 0x1c492000
+#define RTC_CNTL_SW_SYS_RST 0x80000000
+#define DPORT_APPCPU_CTRL_A_REG 0x3ff0002c
+#define DPORT_APPCPU_RST_EN 0x1
+#define DPORT_APPCPU_CTRL_B_REG 0x3ff00030
+#define DPORT_APPCPU_CLKGATE_EN 0x1
+#define DPORT_APPCPU_CTRL_C_REG 0x3ff00034
+#define DPORT_APPCPU_CTRL_D_REG 0x3ff00038
+
+
+/* This stub is copied to RTC_SLOW_MEM by OpenOCD, and the CPU starts executing
+ * it instead of the ROM code (0x40000400). This stub disables watchdogs and
+ * goes into a loop.
+ * OpenOCD will then halt the target and perform CPU reset using OCD.
+ */
+
+
+/* Has to be at offset 0. This is the entry point of the CPU, once
+ * RTC_CNTL_PROCPU_STAT_VECTOR_SEL is cleared.
+ * CPU will come here after the system reset, triggered by RTC_CNTL_SW_SYS_RST.
+ */
+ .global cpu_at_start_handler
+ .type cpu_at_start_handler,@function
+ .align 4
+cpu_at_start_handler:
+ j start
+
+
+/* Has to be at offset 4. Once the stub code has been uploaded into RTC Slow
+ * memory, OpenOCD will set the PC to this address, and resume execution.
+ * The stub will then jump to 'reset' label and perform the reset.
+ */
+ .global cpu_reset_handler
+ .type cpu_reset_handler,@function
+ .align 4
+cpu_reset_handler:
+ j reset
+
+ .align 4
+ .literal_position
+
+ .align 4
+reset:
+ /* Use a5 as a zero register */
+ xor a5, a5, a5
+ /* Select static reset vector 0 (XCHAL_RESET_VECTOR0_VADDR, 0x50000000) */
+ movi a4, RTC_CNTL_RESET_STATE_REG
+ s32i a5, a4, 0
+ /* Set some clock-related RTC registers to the default values */
+ movi a4, RTC_CNTL_STORE4_REG
+ s32i a5, a4, 0
+ movi a4, RTC_CNTL_STORE5_REG
+ s32i a5, a4, 0
+ movi a4, RTC_CNTL_CLK_CONF_REG
+ movi a3, RTC_CNTL_CLK_CONF_DEF
+ s32i a3, a4, 0
+ /* Reset the digital part of the chip (RTC controller doesn't get reset) */
+ movi a3, (RTC_CNTL_OPTIONS0_DEF | RTC_CNTL_SW_SYS_RST)
+ movi a4, RTC_CNTL_OPTIONS0_REG
+ s32i a3, a4, 0
+ /* Doesn't reach beyond this instruction */
+
+ .align 4
+start:
+ /* If running on the APP CPU, skip directly to the parking loop */
+ rsr.prid a6
+ extui a6, a6, 1, 1
+ bnez a6, parking_loop
+
+ /* Use a5 as a zero register */
+ xor a5, a5, a5
+ /* Disable the watchdogs */
+ movi a3, WDT_WKEY_VALUE
+ movi a4, RTC_CNTL_WDTWPROTECT_REG
+ s32i.n a3, a4, 0
+ movi a4, TIMG0_WDTWPROTECT_REG
+ s32i.n a3, a4, 0
+ movi a4, TIMG1_WDTWPROTECT_REG
+ s32i.n a3, a4, 0
+ movi a4, RTC_CNTL_WDTCONFIG0_REG
+ s32i.n a5, a4, 0
+ movi a4, TIMG0_WDTCONFIG0_REG
+ s32i.n a5, a4, 0
+ movi a4, TIMG1_WDTCONFIG0_REG
+ s32i.n a5, a4, 0
+ /* Enable JTAG (needed since rev. 3) */
+ movi a4, JTAG_ENABLE_REG
+ s32i.n a5, a4, 0
+ /* Clear APP_CPU boot address */
+ movi a4, DPORT_APPCPU_CTRL_D_REG
+ s32i.n a5, a4, 0
+ /* Clear APP_CPU clock gating */
+ movi a4, DPORT_APPCPU_CTRL_B_REG
+ movi a3, DPORT_APPCPU_CLKGATE_EN
+ s32i.n a3, a4, 0
+ /* Set and clear APP_CPU reset */
+ movi a4, DPORT_APPCPU_CTRL_A_REG
+ movi a3, DPORT_APPCPU_RST_EN
+ s32i.n a3, a4, 0
+ s32i.n a5, a4, 0
+ /* Restore the reset vector to ROM */
+ movi a4, RTC_CNTL_RESET_STATE_REG
+ movi a3, RTC_CNTL_RESET_STATE_DEF
+ s32i.n a3, a4, 0
+
+
+parking_loop:
+ /* PRO and APP CPU will be in this loop, until OpenOCD
+ * finds the JTAG taps and puts the CPUs into debug mode.
+ */
+ waiti 0
+ j parking_loop
diff --git a/contrib/loaders/reset/espressif/esp32s3/Makefile b/contrib/loaders/reset/espressif/esp32s3/Makefile
new file mode 100644
index 0000000..37d5f82
--- /dev/null
+++ b/contrib/loaders/reset/espressif/esp32s3/Makefile
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# ESP32 Makefile to compile the SoC reset program
+# Copyright (C) 2022 Espressif Systems Ltd.
+
+# Prefix for ESP32 cross compilers (can include a directory path)
+CROSS ?= xtensa-esp32s3-elf-
+
+APP_ARCH := xtensa
+APP_CHIP := ESP32S3
+APP_CHIP_PATH := $(shell pwd)
+SRCS := $(APP_CHIP_PATH)/esp32s3_cpu_reset_handler.S
+
+CFLAGS :=
+LDFLAGS :=
+
+INCLUDES :=
+DEFINES :=
+
+include ../common.mk
diff --git a/contrib/loaders/reset/espressif/esp32s3/cpu_reset_handler_code.inc b/contrib/loaders/reset/espressif/esp32s3/cpu_reset_handler_code.inc
new file mode 100644
index 0000000..dc9702c
--- /dev/null
+++ b/contrib/loaders/reset/espressif/esp32s3/cpu_reset_handler_code.inc
@@ -0,0 +1,17 @@
+/* Autogenerated with ../../../../../src/helper/bin2char.sh */
+0x06,0x23,0x00,0x00,0x06,0x18,0x00,0x00,0x38,0x80,0x00,0x60,0xc0,0x80,0x00,0x60,
+0xc4,0x80,0x00,0x60,0x90,0x80,0x00,0x60,0x74,0x80,0x00,0x60,0x18,0x32,0x58,0x01,
+0x00,0xa0,0x00,0x9c,0x00,0x80,0x00,0x60,0xa1,0x3a,0xd8,0x50,0xac,0x80,0x00,0x60,
+0x64,0xf0,0x01,0x60,0x64,0x00,0x02,0x60,0x94,0x80,0x00,0x60,0x48,0xf0,0x01,0x60,
+0x48,0x00,0x02,0x60,0xb4,0x80,0x00,0x60,0x2a,0x31,0x1d,0x8f,0xb0,0x80,0x00,0x60,
+0x00,0x00,0xb0,0x84,0x04,0x00,0x0c,0x60,0x00,0x00,0x0c,0x60,0x00,0x00,0x0c,0x60,
+0x38,0x80,0x00,0x60,0x00,0x30,0x00,0x00,0x50,0x55,0x30,0x41,0xe7,0xff,0x59,0x04,
+0x41,0xe7,0xff,0x59,0x04,0x41,0xe6,0xff,0x59,0x04,0x41,0xe6,0xff,0x59,0x04,0x41,
+0xe6,0xff,0x31,0xe6,0xff,0x39,0x04,0x31,0xe6,0xff,0x41,0xe6,0xff,0x39,0x04,0x00,
+0x60,0xeb,0x03,0x60,0x61,0x04,0x56,0x26,0x05,0x50,0x55,0x30,0x31,0xe3,0xff,0x41,
+0xe3,0xff,0x39,0x04,0x41,0xe3,0xff,0x39,0x04,0x41,0xe2,0xff,0x39,0x04,0x41,0xe2,
+0xff,0x59,0x04,0x41,0xe2,0xff,0x59,0x04,0x41,0xe2,0xff,0x59,0x04,0x41,0xe1,0xff,
+0x31,0xe2,0xff,0x39,0x04,0x41,0xe1,0xff,0x31,0xe2,0xff,0x39,0x04,0x41,0xe1,0xff,
+0x59,0x04,0x41,0xe1,0xff,0x0c,0x23,0x39,0x04,0x41,0xe0,0xff,0x0c,0x43,0x39,0x04,
+0x52,0x64,0x00,0x41,0xdf,0xff,0x31,0xdf,0xff,0x32,0x64,0x00,0x00,0x70,0x00,0x46,
+0xfe,0xff,
diff --git a/contrib/loaders/reset/espressif/esp32s3/esp32s3_cpu_reset_handler.S b/contrib/loaders/reset/espressif/esp32s3/esp32s3_cpu_reset_handler.S
new file mode 100644
index 0000000..5fc6357
--- /dev/null
+++ b/contrib/loaders/reset/espressif/esp32s3/esp32s3_cpu_reset_handler.S
@@ -0,0 +1,141 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Reset stub used by esp32s3 target *
+ * Copyright (C) 2020 Espressif Systems (Shanghai) Co. Ltd. *
+ ***************************************************************************/
+
+#define RTC_CNTL_RESET_STATE_REG 0x60008038
+#define RTC_CNTL_RESET_STATE_DEF 0x3000
+#define RTC_CNTL_CLK_CONF_REG 0x60008074
+#define RTC_CNTL_CLK_CONF_DEF 0x1583218
+#define RTC_CNTL_STORE4_REG 0x600080C0
+#define RTC_CNTL_STORE5_REG 0x600080C4
+#define WDT_WKEY_VALUE 0x50D83AA1
+#define TIMG0_WDTWPROTECT_REG 0x6001F064
+#define TIMG0_WDTCONFIG0_REG 0x6001F048
+#define TIMG1_WDTWPROTECT_REG 0x60020064
+#define TIMG1_WDTCONFIG0_REG 0x60020048
+#define RTC_CNTL_WDTCONFIG0_REG 0x60008094
+#define RTC_CNTL_WDTWPROTECT_REG 0x600080AC
+#define RTC_CNTL_OPTIONS0_REG 0x60008000
+#define RTC_CNTL_OPTIONS0_DEF 0x1C00A000
+#define RTC_CNTL_SW_SYS_RST 0x80000000
+#define RTC_CNTL_DIG_PWC_REG 0x60008090
+#define RTC_CNTL_SWD_CONF_REG 0x600080B0
+#define RTC_CNTL_SWD_CONF_VAL 0x84B00000
+#define RTC_CNTL_SWD_WPROTECT_REG 0x600080B4
+#define RTC_CNTL_SWD_WKEY_VALUE 0x8F1D312A
+#define SYSTEM_CORE_1_CONTROL_0_REG 0x600C0000
+#define SYSTEM_CONTROL_CORE_1_RESETING 0x4
+#define SYSTEM_CONTROL_CORE_1_CLKGATE_EN 0x2
+#define SYSTEM_CORE_1_CONTROL_1_REG 0x600C0004
+
+
+/* This stub is copied to RTC_SLOW_MEM by OpenOCD, and the CPU starts executing
+ * it instead of the ROM code (0x40000400). This stub disables watchdogs and
+ * goes into a loop.
+ * OpenOCD will then halt the target and perform CPU reset using OCD.
+ */
+
+
+/* Has to be at offset 0. This is the entry point of the CPU, once
+ * RTC_CNTL_PROCPU_STAT_VECTOR_SEL is cleared.
+ * CPU will come here after the system reset, triggered by RTC_CNTL_SW_SYS_RST.
+ */
+ .global cpu_at_start_handler
+ .type cpu_at_start_handler,@function
+ .align 4
+cpu_at_start_handler:
+ j start
+
+
+/* Has to be at offset 4. Once the stub code has been uploaded into RTC Slow
+ * memory, OpenOCD will set the PC to this address, and resume execution.
+ * The stub will then jump to 'reset' label and perform the reset.
+ */
+ .global cpu_reset_handler
+ .type cpu_reset_handler,@function
+ .align 4
+cpu_reset_handler:
+ j reset
+
+ .align 4
+ .literal_position
+
+ .align 4
+reset:
+ /* Use a5 as a zero register */
+ xor a5, a5, a5
+ /* Select static reset vector 0 (XCHAL_RESET_VECTOR0_VADDR, 0x50000000) */
+ movi a4, RTC_CNTL_RESET_STATE_REG
+ s32i a5, a4, 0
+ /* Set some clock-related RTC registers to the default values */
+ movi a4, RTC_CNTL_STORE4_REG
+ s32i a5, a4, 0
+ movi a4, RTC_CNTL_STORE5_REG
+ s32i a5, a4, 0
+ movi a4, RTC_CNTL_DIG_PWC_REG
+ s32i a5, a4, 0
+ movi a4, RTC_CNTL_CLK_CONF_REG
+ movi a3, RTC_CNTL_CLK_CONF_DEF
+ s32i a3, a4, 0
+ /* Reset the digital part of the chip (RTC controller doesn't get reset) */
+ movi a3, (RTC_CNTL_OPTIONS0_DEF | RTC_CNTL_SW_SYS_RST)
+ movi a4, RTC_CNTL_OPTIONS0_REG
+ s32i a3, a4, 0
+ /* Doesn't reach beyond this instruction */
+
+ .align 4
+start:
+ /* If running on the APP CPU, skip directly to the parking loop */
+ rsr.prid a6
+ extui a6, a6, 1, 1
+ bnez a6, parking_loop
+
+ /* Use a5 as a zero register */
+ xor a5, a5, a5
+ /* Disable the watchdogs */
+ movi a3, WDT_WKEY_VALUE
+ movi a4, RTC_CNTL_WDTWPROTECT_REG
+ s32i.n a3, a4, 0
+ movi a4, TIMG0_WDTWPROTECT_REG
+ s32i.n a3, a4, 0
+ movi a4, TIMG1_WDTWPROTECT_REG
+ s32i.n a3, a4, 0
+ movi a4, RTC_CNTL_WDTCONFIG0_REG
+ s32i.n a5, a4, 0
+ movi a4, TIMG0_WDTCONFIG0_REG
+ s32i.n a5, a4, 0
+ movi a4, TIMG1_WDTCONFIG0_REG
+ s32i.n a5, a4, 0
+ movi a4, RTC_CNTL_SWD_WPROTECT_REG
+ movi a3, RTC_CNTL_SWD_WKEY_VALUE
+ s32i.n a3, a4, 0
+ movi a4, RTC_CNTL_SWD_CONF_REG
+ movi a3, RTC_CNTL_SWD_CONF_VAL
+ s32i.n a3, a4, 0
+ /* Clear APP_CPU boot address */
+ movi a4, SYSTEM_CORE_1_CONTROL_1_REG
+ s32i.n a5, a4, 0
+ /* Clear APP_CPU clock gating */
+ movi a4, SYSTEM_CORE_1_CONTROL_0_REG
+ movi a3, SYSTEM_CONTROL_CORE_1_CLKGATE_EN
+ s32i.n a3, a4, 0
+ /* Set and clear APP_CPU reset */
+ movi a4, SYSTEM_CORE_1_CONTROL_0_REG
+ movi a3, SYSTEM_CONTROL_CORE_1_RESETING
+ s32i.n a3, a4, 0
+ s32i.n a5, a4, 0
+ /* Restore the reset vector to ROM */
+ movi a4, RTC_CNTL_RESET_STATE_REG
+ movi a3, RTC_CNTL_RESET_STATE_DEF
+ s32i.n a3, a4, 0
+
+
+parking_loop:
+ /* PRO and APP CPU will be in this loop, until OpenOCD
+ * finds the JTAG taps and puts the CPUs into debug mode.
+ */
+ waiti 0
+ j parking_loop
diff --git a/contrib/loaders/watchdog/Makefile b/contrib/loaders/watchdog/Makefile
index ed6d8f4..2da9c32 100644
--- a/contrib/loaders/watchdog/Makefile
+++ b/contrib/loaders/watchdog/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
BIN2C = ../../../src/helper/bin2char.sh
ARM_CROSS_COMPILE ?= arm-none-eabi-
diff --git a/contrib/loaders/watchdog/armv7m_kinetis_wdog.s b/contrib/loaders/watchdog/armv7m_kinetis_wdog.s
index 2a7eb89..d4e78ea 100644
--- a/contrib/loaders/watchdog/armv7m_kinetis_wdog.s
+++ b/contrib/loaders/watchdog/armv7m_kinetis_wdog.s
@@ -1,20 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 Tomas Vanek *
* vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
***************************************************************************/
/*
diff --git a/contrib/loaders/watchdog/armv7m_kinetis_wdog32.s b/contrib/loaders/watchdog/armv7m_kinetis_wdog32.s
index 1284ab0..2d96346 100644
--- a/contrib/loaders/watchdog/armv7m_kinetis_wdog32.s
+++ b/contrib/loaders/watchdog/armv7m_kinetis_wdog32.s
@@ -1,20 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2017 Tomas Vanek *
* vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
***************************************************************************/
/*
diff --git a/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c b/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c
index 6cf30c3..9294837 100644
--- a/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c
+++ b/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Paul Fertser <fercerpav@gmail.com> *
* Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/contrib/rpc_examples/ocd_rpc_example.py b/contrib/rpc_examples/ocd_rpc_example.py
index e6146f6..53e3e2a 100755
--- a/contrib/rpc_examples/ocd_rpc_example.py
+++ b/contrib/rpc_examples/ocd_rpc_example.py
@@ -1,4 +1,6 @@
#!/usr/bin/env python3
+# SPDX-License-Identifier: GPL-3.0-or-later
+
"""
OpenOCD RPC example, covered by GNU GPLv3 or later
Copyright (C) 2014 Andreas Ortmann (ortmann@finf.uni-hannover.de)
diff --git a/contrib/rpc_examples/ocdrpc.hs b/contrib/rpc_examples/ocdrpc.hs
index 8598641..6a92366 100644
--- a/contrib/rpc_examples/ocdrpc.hs
+++ b/contrib/rpc_examples/ocdrpc.hs
@@ -1,4 +1,6 @@
--- OpenOCD RPC example, covered by GNU GPLv3 or later
+-- SPDX-License-Identifier: GPL-3.0-or-later
+
+-- OpenOCD RPC example
-- Copyright (C) 2014 Paul Fertser
--
-- Example output:
diff --git a/contrib/rtos-helpers/FreeRTOS-openocd.c b/contrib/rtos-helpers/FreeRTOS-openocd.c
index 81a3ab7..000453d 100644
--- a/contrib/rtos-helpers/FreeRTOS-openocd.c
+++ b/contrib/rtos-helpers/FreeRTOS-openocd.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer
* present in the kernel, so it has to be supplied by other means for
diff --git a/contrib/rtos-helpers/uCOS-III-openocd.c b/contrib/rtos-helpers/uCOS-III-openocd.c
index 5a37bd4..9869adf 100644
--- a/contrib/rtos-helpers/uCOS-III-openocd.c
+++ b/contrib/rtos-helpers/uCOS-III-openocd.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* uC/OS-III does not provide a fixed layout for OS_TCB, which makes it
* impossible to determine the appropriate offsets within the structure
diff --git a/contrib/xsvf_tools/svf2xsvf.py b/contrib/xsvf_tools/svf2xsvf.py
index 6da7ff4..abbac20 100644
--- a/contrib/xsvf_tools/svf2xsvf.py
+++ b/contrib/xsvf_tools/svf2xsvf.py
@@ -1,27 +1,9 @@
#!/usr/bin/python3.0
+# SPDX-License-Identifier: GPL-2.0-or-later
# Copyright 2008, SoftPLC Corporation http://softplc.com
# Dick Hollenbeck dick@softplc.com
-
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; either version 2
-# of the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, you may find one here:
-# http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
-# or you may search the http://www.gnu.org website for the version 2 license,
-# or you may write to the Free Software Foundation, Inc.,
-# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
-
-
# A python program to convert an SVF file to an XSVF file. There is an
# option to include comments containing the source file line number from the origin
# SVF file before each outputted XSVF statement.
diff --git a/contrib/xsvf_tools/xsvfdump.py b/contrib/xsvf_tools/xsvfdump.py
index 0e00ca0..3ed4009 100644
--- a/contrib/xsvf_tools/xsvfdump.py
+++ b/contrib/xsvf_tools/xsvfdump.py
@@ -1,25 +1,9 @@
#!/usr/bin/python3.0
+# SPDX-License-Identifier: GPL-2.0-or-later
# Copyright 2008, SoftPLC Corporation http://softplc.com
# Dick Hollenbeck dick@softplc.com
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; either version 2
-# of the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, you may find one here:
-# http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
-# or you may search the http://www.gnu.org website for the version 2 license,
-# or you may write to the Free Software Foundation, Inc.,
-# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
-
# Dump an Xilinx XSVF file to stdout
# This program is written for python 3.0, and it is not easy to change this
diff --git a/doc/checkpatch.rst b/doc/checkpatch.rst
new file mode 100644
index 0000000..b52452b
--- /dev/null
+++ b/doc/checkpatch.rst
@@ -0,0 +1,1249 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+==========
+Checkpatch
+==========
+
+Checkpatch (scripts/checkpatch.pl) is a perl script which checks for trivial
+style violations in patches and optionally corrects them. Checkpatch can
+also be run on file contexts and without the kernel tree.
+
+Checkpatch is not always right. Your judgement takes precedence over checkpatch
+messages. If your code looks better with the violations, then its probably
+best left alone.
+
+
+Options
+=======
+
+This section will describe the options checkpatch can be run with.
+
+Usage::
+
+ ./scripts/checkpatch.pl [OPTION]... [FILE]...
+
+Available options:
+
+ - -q, --quiet
+
+ Enable quiet mode.
+
+ - -v, --verbose
+ Enable verbose mode. Additional verbose test descriptions are output
+ so as to provide information on why that particular message is shown.
+
+ - --no-tree
+
+ Run checkpatch without the kernel tree.
+
+ - --no-signoff
+
+ Disable the 'Signed-off-by' line check. The sign-off is a simple line at
+ the end of the explanation for the patch, which certifies that you wrote it
+ or otherwise have the right to pass it on as an open-source patch.
+
+ Example::
+
+ Signed-off-by: Random J Developer <random@developer.example.org>
+
+ Setting this flag effectively stops a message for a missing signed-off-by
+ line in a patch context.
+
+ - --patch
+
+ Treat FILE as a patch. This is the default option and need not be
+ explicitly specified.
+
+ - --emacs
+
+ Set output to emacs compile window format. This allows emacs users to jump
+ from the error in the compile window directly to the offending line in the
+ patch.
+
+ - --terse
+
+ Output only one line per report.
+
+ - --showfile
+
+ Show the diffed file position instead of the input file position.
+
+ - -g, --git
+
+ Treat FILE as a single commit or a git revision range.
+
+ Single commit with:
+
+ - <rev>
+ - <rev>^
+ - <rev>~n
+
+ Multiple commits with:
+
+ - <rev1>..<rev2>
+ - <rev1>...<rev2>
+ - <rev>-<count>
+
+ - -f, --file
+
+ Treat FILE as a regular source file. This option must be used when running
+ checkpatch on source files in the kernel.
+
+ - --subjective, --strict
+
+ Enable stricter tests in checkpatch. By default the tests emitted as CHECK
+ do not activate by default. Use this flag to activate the CHECK tests.
+
+ - --list-types
+
+ Every message emitted by checkpatch has an associated TYPE. Add this flag
+ to display all the types in checkpatch.
+
+ Note that when this flag is active, checkpatch does not read the input FILE,
+ and no message is emitted. Only a list of types in checkpatch is output.
+
+ - --types TYPE(,TYPE2...)
+
+ Only display messages with the given types.
+
+ Example::
+
+ ./scripts/checkpatch.pl mypatch.patch --types EMAIL_SUBJECT,BRACES
+
+ - --ignore TYPE(,TYPE2...)
+
+ Checkpatch will not emit messages for the specified types.
+
+ Example::
+
+ ./scripts/checkpatch.pl mypatch.patch --ignore EMAIL_SUBJECT,BRACES
+
+ - --show-types
+
+ By default checkpatch doesn't display the type associated with the messages.
+ Set this flag to show the message type in the output.
+
+ - --max-line-length=n
+
+ Set the max line length (default 100). If a line exceeds the specified
+ length, a LONG_LINE message is emitted.
+
+
+ The message level is different for patch and file contexts. For patches,
+ a WARNING is emitted. While a milder CHECK is emitted for files. So for
+ file contexts, the --strict flag must also be enabled.
+
+ - --min-conf-desc-length=n
+
+ Set the Kconfig entry minimum description length, if shorter, warn.
+
+ - --tab-size=n
+
+ Set the number of spaces for tab (default 8).
+
+ - --root=PATH
+
+ PATH to the kernel tree root.
+
+ This option must be specified when invoking checkpatch from outside
+ the kernel root.
+
+ - --no-summary
+
+ Suppress the per file summary.
+
+ - --mailback
+
+ Only produce a report in case of Warnings or Errors. Milder Checks are
+ excluded from this.
+
+ - --summary-file
+
+ Include the filename in summary.
+
+ - --debug KEY=[0|1]
+
+ Turn on/off debugging of KEY, where KEY is one of 'values', 'possible',
+ 'type', and 'attr' (default is all off).
+
+ - --fix
+
+ This is an EXPERIMENTAL feature. If correctable errors exists, a file
+ <inputfile>.EXPERIMENTAL-checkpatch-fixes is created which has the
+ automatically fixable errors corrected.
+
+ - --fix-inplace
+
+ EXPERIMENTAL - Similar to --fix but input file is overwritten with fixes.
+
+ DO NOT USE this flag unless you are absolutely sure and you have a backup
+ in place.
+
+ - --ignore-perl-version
+
+ Override checking of perl version. Runtime errors maybe encountered after
+ enabling this flag if the perl version does not meet the minimum specified.
+
+ - --codespell
+
+ Use the codespell dictionary for checking spelling errors.
+
+ - --codespellfile
+
+ Use the specified codespell file.
+ Default is '/usr/share/codespell/dictionary.txt'.
+
+ - --typedefsfile
+
+ Read additional types from this file.
+
+ - --color[=WHEN]
+
+ Use colors 'always', 'never', or only when output is a terminal ('auto').
+ Default is 'auto'.
+
+ - --kconfig-prefix=WORD
+
+ Use WORD as a prefix for Kconfig symbols (default is `CONFIG_`).
+
+ - -h, --help, --version
+
+ Display the help text.
+
+Message Levels
+==============
+
+Messages in checkpatch are divided into three levels. The levels of messages
+in checkpatch denote the severity of the error. They are:
+
+ - ERROR
+
+ This is the most strict level. Messages of type ERROR must be taken
+ seriously as they denote things that are very likely to be wrong.
+
+ - WARNING
+
+ This is the next stricter level. Messages of type WARNING requires a
+ more careful review. But it is milder than an ERROR.
+
+ - CHECK
+
+ This is the mildest level. These are things which may require some thought.
+
+Type Descriptions
+=================
+
+This section contains a description of all the message types in checkpatch.
+
+.. Types in this section are also parsed by checkpatch.
+.. The types are grouped into subsections based on use.
+
+
+Allocation style
+----------------
+
+ **ALLOC_ARRAY_ARGS**
+ The first argument for kcalloc or kmalloc_array should be the
+ number of elements. sizeof() as the first argument is generally
+ wrong.
+
+ See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html
+
+ **ALLOC_SIZEOF_STRUCT**
+ The allocation style is bad. In general for family of
+ allocation functions using sizeof() to get memory size,
+ constructs like::
+
+ p = alloc(sizeof(struct foo), ...)
+
+ should be::
+
+ p = alloc(sizeof(*p), ...)
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#allocating-memory
+
+ **ALLOC_WITH_MULTIPLY**
+ Prefer kmalloc_array/kcalloc over kmalloc/kzalloc with a
+ sizeof multiply.
+
+ See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html
+
+
+API usage
+---------
+
+ **ARCH_DEFINES**
+ Architecture specific defines should be avoided wherever
+ possible.
+
+ **ARCH_INCLUDE_LINUX**
+ Whenever asm/file.h is included and linux/file.h exists, a
+ conversion can be made when linux/file.h includes asm/file.h.
+ However this is not always the case (See signal.h).
+ This message type is emitted only for includes from arch/.
+
+ **AVOID_BUG**
+ BUG() or BUG_ON() should be avoided totally.
+ Use WARN() and WARN_ON() instead, and handle the "impossible"
+ error condition as gracefully as possible.
+
+ See: https://www.kernel.org/doc/html/latest/process/deprecated.html#bug-and-bug-on
+
+ **CONSIDER_KSTRTO**
+ The simple_strtol(), simple_strtoll(), simple_strtoul(), and
+ simple_strtoull() functions explicitly ignore overflows, which
+ may lead to unexpected results in callers. The respective kstrtol(),
+ kstrtoll(), kstrtoul(), and kstrtoull() functions tend to be the
+ correct replacements.
+
+ See: https://www.kernel.org/doc/html/latest/process/deprecated.html#simple-strtol-simple-strtoll-simple-strtoul-simple-strtoull
+
+ **CONSTANT_CONVERSION**
+ Use of __constant_<foo> form is discouraged for the following functions::
+
+ __constant_cpu_to_be[x]
+ __constant_cpu_to_le[x]
+ __constant_be[x]_to_cpu
+ __constant_le[x]_to_cpu
+ __constant_htons
+ __constant_ntohs
+
+ Using any of these outside of include/uapi/ is not preferred as using the
+ function without __constant_ is identical when the argument is a
+ constant.
+
+ In big endian systems, the macros like __constant_cpu_to_be32(x) and
+ cpu_to_be32(x) expand to the same expression::
+
+ #define __constant_cpu_to_be32(x) ((__force __be32)(__u32)(x))
+ #define __cpu_to_be32(x) ((__force __be32)(__u32)(x))
+
+ In little endian systems, the macros __constant_cpu_to_be32(x) and
+ cpu_to_be32(x) expand to __constant_swab32 and __swab32. __swab32
+ has a __builtin_constant_p check::
+
+ #define __swab32(x) \
+ (__builtin_constant_p((__u32)(x)) ? \
+ ___constant_swab32(x) : \
+ __fswab32(x))
+
+ So ultimately they have a special case for constants.
+ Similar is the case with all of the macros in the list. Thus
+ using the __constant_... forms are unnecessarily verbose and
+ not preferred outside of include/uapi.
+
+ See: https://lore.kernel.org/lkml/1400106425.12666.6.camel@joe-AO725/
+
+ **DEPRECATED_API**
+ Usage of a deprecated RCU API is detected. It is recommended to replace
+ old flavourful RCU APIs by their new vanilla-RCU counterparts.
+
+ The full list of available RCU APIs can be viewed from the kernel docs.
+
+ See: https://www.kernel.org/doc/html/latest/RCU/whatisRCU.html#full-list-of-rcu-apis
+
+ **DEPRECATED_VARIABLE**
+ EXTRA_{A,C,CPP,LD}FLAGS are deprecated and should be replaced by the new
+ flags added via commit f77bf01425b1 ("kbuild: introduce ccflags-y,
+ asflags-y and ldflags-y").
+
+ The following conversion scheme maybe used::
+
+ EXTRA_AFLAGS -> asflags-y
+ EXTRA_CFLAGS -> ccflags-y
+ EXTRA_CPPFLAGS -> cppflags-y
+ EXTRA_LDFLAGS -> ldflags-y
+
+ See:
+
+ 1. https://lore.kernel.org/lkml/20070930191054.GA15876@uranus.ravnborg.org/
+ 2. https://lore.kernel.org/lkml/1313384834-24433-12-git-send-email-lacombar@gmail.com/
+ 3. https://www.kernel.org/doc/html/latest/kbuild/makefiles.html#compilation-flags
+
+ **DEVICE_ATTR_FUNCTIONS**
+ The function names used in DEVICE_ATTR is unusual.
+ Typically, the store and show functions are used with <attr>_store and
+ <attr>_show, where <attr> is a named attribute variable of the device.
+
+ Consider the following examples::
+
+ static DEVICE_ATTR(type, 0444, type_show, NULL);
+ static DEVICE_ATTR(power, 0644, power_show, power_store);
+
+ The function names should preferably follow the above pattern.
+
+ See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+ **DEVICE_ATTR_RO**
+ The DEVICE_ATTR_RO(name) helper macro can be used instead of
+ DEVICE_ATTR(name, 0444, name_show, NULL);
+
+ Note that the macro automatically appends _show to the named
+ attribute variable of the device for the show method.
+
+ See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+ **DEVICE_ATTR_RW**
+ The DEVICE_ATTR_RW(name) helper macro can be used instead of
+ DEVICE_ATTR(name, 0644, name_show, name_store);
+
+ Note that the macro automatically appends _show and _store to the
+ named attribute variable of the device for the show and store methods.
+
+ See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+ **DEVICE_ATTR_WO**
+ The DEVICE_AATR_WO(name) helper macro can be used instead of
+ DEVICE_ATTR(name, 0200, NULL, name_store);
+
+ Note that the macro automatically appends _store to the
+ named attribute variable of the device for the store method.
+
+ See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+ **DUPLICATED_SYSCTL_CONST**
+ Commit d91bff3011cf ("proc/sysctl: add shared variables for range
+ check") added some shared const variables to be used instead of a local
+ copy in each source file.
+
+ Consider replacing the sysctl range checking value with the shared
+ one in include/linux/sysctl.h. The following conversion scheme may
+ be used::
+
+ &zero -> SYSCTL_ZERO
+ &one -> SYSCTL_ONE
+ &int_max -> SYSCTL_INT_MAX
+
+ See:
+
+ 1. https://lore.kernel.org/lkml/20190430180111.10688-1-mcroce@redhat.com/
+ 2. https://lore.kernel.org/lkml/20190531131422.14970-1-mcroce@redhat.com/
+
+ **ENOSYS**
+ ENOSYS means that a nonexistent system call was called.
+ Earlier, it was wrongly used for things like invalid operations on
+ otherwise valid syscalls. This should be avoided in new code.
+
+ See: https://lore.kernel.org/lkml/5eb299021dec23c1a48fa7d9f2c8b794e967766d.1408730669.git.luto@amacapital.net/
+
+ **ENOTSUPP**
+ ENOTSUPP is not a standard error code and should be avoided in new patches.
+ EOPNOTSUPP should be used instead.
+
+ See: https://lore.kernel.org/netdev/20200510182252.GA411829@lunn.ch/
+
+ **EXPORT_SYMBOL**
+ EXPORT_SYMBOL should immediately follow the symbol to be exported.
+
+ **IN_ATOMIC**
+ in_atomic() is not for driver use so any such use is reported as an ERROR.
+ Also in_atomic() is often used to determine if sleeping is permitted,
+ but it is not reliable in this use model. Therefore its use is
+ strongly discouraged.
+
+ However, in_atomic() is ok for core kernel use.
+
+ See: https://lore.kernel.org/lkml/20080320201723.b87b3732.akpm@linux-foundation.org/
+
+ **LOCKDEP**
+ The lockdep_no_validate class was added as a temporary measure to
+ prevent warnings on conversion of device->sem to device->mutex.
+ It should not be used for any other purpose.
+
+ See: https://lore.kernel.org/lkml/1268959062.9440.467.camel@laptop/
+
+ **MALFORMED_INCLUDE**
+ The #include statement has a malformed path. This has happened
+ because the author has included a double slash "//" in the pathname
+ accidentally.
+
+ **USE_LOCKDEP**
+ lockdep_assert_held() annotations should be preferred over
+ assertions based on spin_is_locked()
+
+ See: https://www.kernel.org/doc/html/latest/locking/lockdep-design.html#annotations
+
+ **UAPI_INCLUDE**
+ No #include statements in include/uapi should use a uapi/ path.
+
+ **USLEEP_RANGE**
+ usleep_range() should be preferred over udelay(). The proper way of
+ using usleep_range() is mentioned in the kernel docs.
+
+ See: https://www.kernel.org/doc/html/latest/timers/timers-howto.html#delays-information-on-the-various-kernel-delay-sleep-mechanisms
+
+
+Comments
+--------
+
+ **BLOCK_COMMENT_STYLE**
+ The comment style is incorrect. The preferred style for multi-
+ line comments is::
+
+ /*
+ * This is the preferred style
+ * for multi line comments.
+ */
+
+ The networking comment style is a bit different, with the first line
+ not empty like the former::
+
+ /* This is the preferred comment style
+ * for files in net/ and drivers/net/
+ */
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting
+
+ **C99_COMMENTS**
+ C99 style single line comments (//) should not be used.
+ Prefer the block comment style instead.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting
+
+ **DATA_RACE**
+ Applications of data_race() should have a comment so as to document the
+ reasoning behind why it was deemed safe.
+
+ See: https://lore.kernel.org/lkml/20200401101714.44781-1-elver@google.com/
+
+ **FSF_MAILING_ADDRESS**
+ Kernel maintainers reject new instances of the GPL boilerplate paragraph
+ directing people to write to the FSF for a copy of the GPL, since the
+ FSF has moved in the past and may do so again.
+ So do not write paragraphs about writing to the Free Software Foundation's
+ mailing address.
+
+ See: https://lore.kernel.org/lkml/20131006222342.GT19510@leaf/
+
+
+Commit message
+--------------
+
+ **BAD_SIGN_OFF**
+ The signed-off-by line does not fall in line with the standards
+ specified by the community.
+
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#developer-s-certificate-of-origin-1-1
+
+ **BAD_STABLE_ADDRESS_STYLE**
+ The email format for stable is incorrect.
+ Some valid options for stable address are::
+
+ 1. stable@vger.kernel.org
+ 2. stable@kernel.org
+
+ For adding version info, the following comment style should be used::
+
+ stable@vger.kernel.org # version info
+
+ **COMMIT_COMMENT_SYMBOL**
+ Commit log lines starting with a '#' are ignored by git as
+ comments. To solve this problem addition of a single space
+ infront of the log line is enough.
+
+ **COMMIT_MESSAGE**
+ The patch is missing a commit description. A brief
+ description of the changes made by the patch should be added.
+
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+ **EMAIL_SUBJECT**
+ Naming the tool that found the issue is not very useful in the
+ subject line. A good subject line summarizes the change that
+ the patch brings.
+
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+ **FROM_SIGN_OFF_MISMATCH**
+ The author's email does not match with that in the Signed-off-by:
+ line(s). This can be sometimes caused due to an improperly configured
+ email client.
+
+ This message is emitted due to any of the following reasons::
+
+ - The email names do not match.
+ - The email addresses do not match.
+ - The email subaddresses do not match.
+ - The email comments do not match.
+
+ **MISSING_SIGN_OFF**
+ The patch is missing a Signed-off-by line. A signed-off-by
+ line should be added according to Developer's certificate of
+ Origin.
+
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
+
+ **NO_AUTHOR_SIGN_OFF**
+ The author of the patch has not signed off the patch. It is
+ required that a simple sign off line should be present at the
+ end of explanation of the patch to denote that the author has
+ written it or otherwise has the rights to pass it on as an open
+ source patch.
+
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
+
+ **DIFF_IN_COMMIT_MSG**
+ Avoid having diff content in commit message.
+ This causes problems when one tries to apply a file containing both
+ the changelog and the diff because patch(1) tries to apply the diff
+ which it found in the changelog.
+
+ See: https://lore.kernel.org/lkml/20150611134006.9df79a893e3636019ad2759e@linux-foundation.org/
+
+ **GERRIT_CHANGE_ID**
+ To be picked up by gerrit, the footer of the commit message might
+ have a Change-Id like::
+
+ Change-Id: Ic8aaa0728a43936cd4c6e1ed590e01ba8f0fbf5b
+ Signed-off-by: A. U. Thor <author@example.com>
+
+ The Change-Id line must be removed before submitting.
+
+ **GIT_COMMIT_ID**
+ The proper way to reference a commit id is:
+ commit <12+ chars of sha1> ("<title line>")
+
+ An example may be::
+
+ Commit e21d2170f36602ae2708 ("video: remove unnecessary
+ platform_set_drvdata()") removed the unnecessary
+ platform_set_drvdata(), but left the variable "dev" unused,
+ delete it.
+
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+
+Comparison style
+----------------
+
+ **ASSIGN_IN_IF**
+ Do not use assignments in if condition.
+ Example::
+
+ if ((foo = bar(...)) < BAZ) {
+
+ should be written as::
+
+ foo = bar(...);
+ if (foo < BAZ) {
+
+ **BOOL_COMPARISON**
+ Comparisons of A to true and false are better written
+ as A and !A.
+
+ See: https://lore.kernel.org/lkml/1365563834.27174.12.camel@joe-AO722/
+
+ **COMPARISON_TO_NULL**
+ Comparisons to NULL in the form (foo == NULL) or (foo != NULL)
+ are better written as (!foo) and (foo).
+
+ **CONSTANT_COMPARISON**
+ Comparisons with a constant or upper case identifier on the left
+ side of the test should be avoided.
+
+
+Indentation and Line Breaks
+---------------------------
+
+ **CODE_INDENT**
+ Code indent should use tabs instead of spaces.
+ Outside of comments, documentation and Kconfig,
+ spaces are never used for indentation.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation
+
+ **DEEP_INDENTATION**
+ Indentation with 6 or more tabs usually indicate overly indented
+ code.
+
+ It is suggested to refactor excessive indentation of
+ if/else/for/do/while/switch statements.
+
+ See: https://lore.kernel.org/lkml/1328311239.21255.24.camel@joe2Laptop/
+
+ **SWITCH_CASE_INDENT_LEVEL**
+ switch should be at the same indent as case.
+ Example::
+
+ switch (suffix) {
+ case 'G':
+ case 'g':
+ mem <<= 30;
+ break;
+ case 'M':
+ case 'm':
+ mem <<= 20;
+ break;
+ case 'K':
+ case 'k':
+ mem <<= 10;
+ fallthrough;
+ default:
+ break;
+ }
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation
+
+ **LONG_LINE**
+ The line has exceeded the specified maximum length.
+ To use a different maximum line length, the --max-line-length=n option
+ may be added while invoking checkpatch.
+
+ Earlier, the default line length was 80 columns. Commit bdc48fa11e46
+ ("checkpatch/coding-style: deprecate 80-column warning") increased the
+ limit to 100 columns. This is not a hard limit either and it's
+ preferable to stay within 80 columns whenever possible.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings
+
+ **LONG_LINE_STRING**
+ A string starts before but extends beyond the maximum line length.
+ To use a different maximum line length, the --max-line-length=n option
+ may be added while invoking checkpatch.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings
+
+ **LONG_LINE_COMMENT**
+ A comment starts before but extends beyond the maximum line length.
+ To use a different maximum line length, the --max-line-length=n option
+ may be added while invoking checkpatch.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings
+
+ **SPLIT_STRING**
+ Quoted strings that appear as messages in userspace and can be
+ grepped, should not be split across multiple lines.
+
+ See: https://lore.kernel.org/lkml/20120203052727.GA15035@leaf/
+
+ **MULTILINE_DEREFERENCE**
+ A single dereferencing identifier spanned on multiple lines like::
+
+ struct_identifier->member[index].
+ member = <foo>;
+
+ is generally hard to follow. It can easily lead to typos and so makes
+ the code vulnerable to bugs.
+
+ If fixing the multiple line dereferencing leads to an 80 column
+ violation, then either rewrite the code in a more simple way or if the
+ starting part of the dereferencing identifier is the same and used at
+ multiple places then store it in a temporary variable, and use that
+ temporary variable only at all the places. For example, if there are
+ two dereferencing identifiers::
+
+ member1->member2->member3.foo1;
+ member1->member2->member3.foo2;
+
+ then store the member1->member2->member3 part in a temporary variable.
+ It not only helps to avoid the 80 column violation but also reduces
+ the program size by removing the unnecessary dereferences.
+
+ But if none of the above methods work then ignore the 80 column
+ violation because it is much easier to read a dereferencing identifier
+ on a single line.
+
+ **TRAILING_STATEMENTS**
+ Trailing statements (for example after any conditional) should be
+ on the next line.
+ Statements, such as::
+
+ if (x == y) break;
+
+ should be::
+
+ if (x == y)
+ break;
+
+
+Macros, Attributes and Symbols
+------------------------------
+
+ **ARRAY_SIZE**
+ The ARRAY_SIZE(foo) macro should be preferred over
+ sizeof(foo)/sizeof(foo[0]) for finding number of elements in an
+ array.
+
+ The macro is defined in include/linux/kernel.h::
+
+ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+ **AVOID_EXTERNS**
+ Function prototypes don't need to be declared extern in .h
+ files. It's assumed by the compiler and is unnecessary.
+
+ **AVOID_L_PREFIX**
+ Local symbol names that are prefixed with `.L` should be avoided,
+ as this has special meaning for the assembler; a symbol entry will
+ not be emitted into the symbol table. This can prevent `objtool`
+ from generating correct unwind info.
+
+ Symbols with STB_LOCAL binding may still be used, and `.L` prefixed
+ local symbol names are still generally usable within a function,
+ but `.L` prefixed local symbol names should not be used to denote
+ the beginning or end of code regions via
+ `SYM_CODE_START_LOCAL`/`SYM_CODE_END`
+
+ **BIT_MACRO**
+ Defines like: 1 << <digit> could be BIT(digit).
+ The BIT() macro is defined via include/linux/bits.h::
+
+ #define BIT(nr) (1UL << (nr))
+
+ **CONST_READ_MOSTLY**
+ When a variable is tagged with the __read_mostly annotation, it is a
+ signal to the compiler that accesses to the variable will be mostly
+ reads and rarely(but NOT never) a write.
+
+ const __read_mostly does not make any sense as const data is already
+ read-only. The __read_mostly annotation thus should be removed.
+
+ **DATE_TIME**
+ It is generally desirable that building the same source code with
+ the same set of tools is reproducible, i.e. the output is always
+ exactly the same.
+
+ The kernel does *not* use the ``__DATE__`` and ``__TIME__`` macros,
+ and enables warnings if they are used as they can lead to
+ non-deterministic builds.
+
+ See: https://www.kernel.org/doc/html/latest/kbuild/reproducible-builds.html#timestamps
+
+ **DEFINE_ARCH_HAS**
+ The ARCH_HAS_xyz and ARCH_HAVE_xyz patterns are wrong.
+
+ For big conceptual features use Kconfig symbols instead. And for
+ smaller things where we have compatibility fallback functions but
+ want architectures able to override them with optimized ones, we
+ should either use weak functions (appropriate for some cases), or
+ the symbol that protects them should be the same symbol we use.
+
+ See: https://lore.kernel.org/lkml/CA+55aFycQ9XJvEOsiM3txHL5bjUc8CeKWJNR_H+MiicaddB42Q@mail.gmail.com/
+
+ **DO_WHILE_MACRO_WITH_TRAILING_SEMICOLON**
+ do {} while(0) macros should not have a trailing semicolon.
+
+ **INIT_ATTRIBUTE**
+ Const init definitions should use __initconst instead of
+ __initdata.
+
+ Similarly init definitions without const require a separate
+ use of const.
+
+ **INLINE_LOCATION**
+ The inline keyword should sit between storage class and type.
+
+ For example, the following segment::
+
+ inline static int example_function(void)
+ {
+ ...
+ }
+
+ should be::
+
+ static inline int example_function(void)
+ {
+ ...
+ }
+
+ **MISPLACED_INIT**
+ It is possible to use section markers on variables in a way
+ which gcc doesn't understand (or at least not the way the
+ developer intended)::
+
+ static struct __initdata samsung_pll_clock exynos4_plls[nr_plls] = {
+
+ does not put exynos4_plls in the .initdata section. The __initdata
+ marker can be virtually anywhere on the line, except right after
+ "struct". The preferred location is before the "=" sign if there is
+ one, or before the trailing ";" otherwise.
+
+ See: https://lore.kernel.org/lkml/1377655732.3619.19.camel@joe-AO722/
+
+ **MULTISTATEMENT_MACRO_USE_DO_WHILE**
+ Macros with multiple statements should be enclosed in a
+ do - while block. Same should also be the case for macros
+ starting with `if` to avoid logic defects::
+
+ #define macrofun(a, b, c) \
+ do { \
+ if (a == 5) \
+ do_this(b, c); \
+ } while (0)
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#macros-enums-and-rtl
+
+ **PREFER_FALLTHROUGH**
+ Use the `fallthrough;` pseudo keyword instead of
+ `/* fallthrough */` like comments.
+
+ **TRAILING_SEMICOLON**
+ Macro definition should not end with a semicolon. The macro
+ invocation style should be consistent with function calls.
+ This can prevent any unexpected code paths::
+
+ #define MAC do_something;
+
+ If this macro is used within a if else statement, like::
+
+ if (some_condition)
+ MAC;
+
+ else
+ do_something;
+
+ Then there would be a compilation error, because when the macro is
+ expanded there are two trailing semicolons, so the else branch gets
+ orphaned.
+
+ See: https://lore.kernel.org/lkml/1399671106.2912.21.camel@joe-AO725/
+
+ **SINGLE_STATEMENT_DO_WHILE_MACRO**
+ For the multi-statement macros, it is necessary to use the do-while
+ loop to avoid unpredictable code paths. The do-while loop helps to
+ group the multiple statements into a single one so that a
+ function-like macro can be used as a function only.
+
+ But for the single statement macros, it is unnecessary to use the
+ do-while loop. Although the code is syntactically correct but using
+ the do-while loop is redundant. So remove the do-while loop for single
+ statement macros.
+
+ **WEAK_DECLARATION**
+ Using weak declarations like __attribute__((weak)) or __weak
+ can have unintended link defects. Avoid using them.
+
+
+Functions and Variables
+-----------------------
+
+ **CAMELCASE**
+ Avoid CamelCase Identifiers.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#naming
+
+ **CONST_CONST**
+ Using `const <type> const *` is generally meant to be
+ written `const <type> * const`.
+
+ **CONST_STRUCT**
+ Using const is generally a good idea. Checkpatch reads
+ a list of frequently used structs that are always or
+ almost always constant.
+
+ The existing structs list can be viewed from
+ `scripts/const_structs.checkpatch`.
+
+ See: https://lore.kernel.org/lkml/alpine.DEB.2.10.1608281509480.3321@hadrien/
+
+ **EMBEDDED_FUNCTION_NAME**
+ Embedded function names are less appropriate to use as
+ refactoring can cause function renaming. Prefer the use of
+ "%s", __func__ to embedded function names.
+
+ Note that this does not work with -f (--file) checkpatch option
+ as it depends on patch context providing the function name.
+
+ **FUNCTION_ARGUMENTS**
+ This warning is emitted due to any of the following reasons:
+
+ 1. Arguments for the function declaration do not follow
+ the identifier name. Example::
+
+ void foo
+ (int bar, int baz)
+
+ This should be corrected to::
+
+ void foo(int bar, int baz)
+
+ 2. Some arguments for the function definition do not
+ have an identifier name. Example::
+
+ void foo(int)
+
+ All arguments should have identifier names.
+
+ **FUNCTION_WITHOUT_ARGS**
+ Function declarations without arguments like::
+
+ int foo()
+
+ should be::
+
+ int foo(void)
+
+ **GLOBAL_INITIALISERS**
+ Global variables should not be initialized explicitly to
+ 0 (or NULL, false, etc.). Your compiler (or rather your
+ loader, which is responsible for zeroing out the relevant
+ sections) automatically does it for you.
+
+ **INITIALISED_STATIC**
+ Static variables should not be initialized explicitly to zero.
+ Your compiler (or rather your loader) automatically does
+ it for you.
+
+ **MULTIPLE_ASSIGNMENTS**
+ Multiple assignments on a single line makes the code unnecessarily
+ complicated. So on a single line assign value to a single variable
+ only, this makes the code more readable and helps avoid typos.
+
+ **RETURN_PARENTHESES**
+ return is not a function and as such doesn't need parentheses::
+
+ return (bar);
+
+ can simply be::
+
+ return bar;
+
+
+Permissions
+-----------
+
+ **DEVICE_ATTR_PERMS**
+ The permissions used in DEVICE_ATTR are unusual.
+ Typically only three permissions are used - 0644 (RW), 0444 (RO)
+ and 0200 (WO).
+
+ See: https://www.kernel.org/doc/html/latest/filesystems/sysfs.html#attributes
+
+ **EXECUTE_PERMISSIONS**
+ There is no reason for source files to be executable. The executable
+ bit can be removed safely.
+
+ **EXPORTED_WORLD_WRITABLE**
+ Exporting world writable sysfs/debugfs files is usually a bad thing.
+ When done arbitrarily they can introduce serious security bugs.
+ In the past, some of the debugfs vulnerabilities would seemingly allow
+ any local user to write arbitrary values into device registers - a
+ situation from which little good can be expected to emerge.
+
+ See: https://lore.kernel.org/linux-arm-kernel/cover.1296818921.git.segoon@openwall.com/
+
+ **NON_OCTAL_PERMISSIONS**
+ Permission bits should use 4 digit octal permissions (like 0700 or 0444).
+ Avoid using any other base like decimal.
+
+ **SYMBOLIC_PERMS**
+ Permission bits in the octal form are more readable and easier to
+ understand than their symbolic counterparts because many command-line
+ tools use this notation. Experienced kernel developers have been using
+ these traditional Unix permission bits for decades and so they find it
+ easier to understand the octal notation than the symbolic macros.
+ For example, it is harder to read S_IWUSR|S_IRUGO than 0644, which
+ obscures the developer's intent rather than clarifying it.
+
+ See: https://lore.kernel.org/lkml/CA+55aFw5v23T-zvDZp-MmD_EYxF8WbafwwB59934FV7g21uMGQ@mail.gmail.com/
+
+
+Spacing and Brackets
+--------------------
+
+ **ASSIGNMENT_CONTINUATIONS**
+ Assignment operators should not be written at the start of a
+ line but should follow the operand at the previous line.
+
+ **BRACES**
+ The placement of braces is stylistically incorrect.
+ The preferred way is to put the opening brace last on the line,
+ and put the closing brace first::
+
+ if (x is true) {
+ we do y
+ }
+
+ This applies for all non-functional blocks.
+ However, there is one special case, namely functions: they have the
+ opening brace at the beginning of the next line, thus::
+
+ int function(int x)
+ {
+ body of function
+ }
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+ **BRACKET_SPACE**
+ Whitespace before opening bracket '[' is prohibited.
+ There are some exceptions:
+
+ 1. With a type on the left::
+
+ int [] a;
+
+ 2. At the beginning of a line for slice initialisers::
+
+ [0...10] = 5,
+
+ 3. Inside a curly brace::
+
+ = { [0...10] = 5 }
+
+ **CONCATENATED_STRING**
+ Concatenated elements should have a space in between.
+ Example::
+
+ printk(KERN_INFO"bar");
+
+ should be::
+
+ printk(KERN_INFO "bar");
+
+ **ELSE_AFTER_BRACE**
+ `else {` should follow the closing block `}` on the same line.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+ **LINE_SPACING**
+ Vertical space is wasted given the limited number of lines an
+ editor window can display when multiple blank lines are used.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **OPEN_BRACE**
+ The opening brace should be following the function definitions on the
+ next line. For any non-functional block it should be on the same line
+ as the last construct.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+ **POINTER_LOCATION**
+ When using pointer data or a function that returns a pointer type,
+ the preferred use of * is adjacent to the data name or function name
+ and not adjacent to the type name.
+ Examples::
+
+ char *linux_banner;
+ unsigned long long memparse(char *ptr, char **retptr);
+ char *match_strdup(substring_t *s);
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **SPACING**
+ Whitespace style used in the kernel sources is described in kernel docs.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **TRAILING_WHITESPACE**
+ Trailing whitespace should always be removed.
+ Some editors highlight the trailing whitespace and cause visual
+ distractions when editing files.
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **UNNECESSARY_PARENTHESES**
+ Parentheses are not required in the following cases:
+
+ 1. Function pointer uses::
+
+ (foo->bar)();
+
+ could be::
+
+ foo->bar();
+
+ 2. Comparisons in if::
+
+ if ((foo->bar) && (foo->baz))
+ if ((foo == bar))
+
+ could be::
+
+ if (foo->bar && foo->baz)
+ if (foo == bar)
+
+ 3. addressof/dereference single Lvalues::
+
+ &(foo->bar)
+ *(foo->bar)
+
+ could be::
+
+ &foo->bar
+ *foo->bar
+
+ **WHILE_AFTER_BRACE**
+ while should follow the closing bracket on the same line::
+
+ do {
+ ...
+ } while(something);
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+
+Others
+------
+
+ **CONFIG_DESCRIPTION**
+ Kconfig symbols should have a help text which fully describes
+ it.
+
+ **CORRUPTED_PATCH**
+ The patch seems to be corrupted or lines are wrapped.
+ Please regenerate the patch file before sending it to the maintainer.
+
+ **CVS_KEYWORD**
+ Since linux moved to git, the CVS markers are no longer used.
+ So, CVS style keywords ($Id$, $Revision$, $Log$) should not be
+ added.
+
+ **DEFAULT_NO_BREAK**
+ switch default case is sometimes written as "default:;". This can
+ cause new cases added below default to be defective.
+
+ A "break;" should be added after empty default statement to avoid
+ unwanted fallthrough.
+
+ **DOS_LINE_ENDINGS**
+ For DOS-formatted patches, there are extra ^M symbols at the end of
+ the line. These should be removed.
+
+ **DT_SCHEMA_BINDING_PATCH**
+ DT bindings moved to a json-schema based format instead of
+ freeform text.
+
+ See: https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-schema.html
+
+ **DT_SPLIT_BINDING_PATCH**
+ Devicetree bindings should be their own patch. This is because
+ bindings are logically independent from a driver implementation,
+ they have a different maintainer (even though they often
+ are applied via the same tree), and it makes for a cleaner history in the
+ DT only tree created with git-filter-branch.
+
+ See: https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html#i-for-patch-submitters
+
+ **EMBEDDED_FILENAME**
+ Embedding the complete filename path inside the file isn't particularly
+ useful as often the path is moved around and becomes incorrect.
+
+ **FILE_PATH_CHANGES**
+ Whenever files are added, moved, or deleted, the MAINTAINERS file
+ patterns can be out of sync or outdated.
+
+ So MAINTAINERS might need updating in these cases.
+
+ **MEMSET**
+ The memset use appears to be incorrect. This may be caused due to
+ badly ordered parameters. Please recheck the usage.
+
+ **NOT_UNIFIED_DIFF**
+ The patch file does not appear to be in unified-diff format. Please
+ regenerate the patch file before sending it to the maintainer.
+
+ **PRINTF_0XDECIMAL**
+ Prefixing 0x with decimal output is defective and should be corrected.
+
+ **SPDX_LICENSE_TAG**
+ The source file is missing or has an improper SPDX identifier tag.
+ The Linux kernel requires the precise SPDX identifier in all source files,
+ and it is thoroughly documented in the kernel docs.
+
+ See: https://www.kernel.org/doc/html/latest/process/license-rules.html
+
+ **TYPO_SPELLING**
+ Some words may have been misspelled. Consider reviewing them.
diff --git a/doc/manual/endianness.txt b/doc/manual/endianness.txt
new file mode 100644
index 0000000..bba2116
--- /dev/null
+++ b/doc/manual/endianness.txt
@@ -0,0 +1,197 @@
+/** @page endianness About endianness
+
+OpenOCD has to potentially deal with different endianness between:
+- the host PC endianness;
+- the data endianness during communication between host and adapter;
+- the target CPU endianness.
+
+The whole OpenOCD code should be written to handle any endianness
+mismatch and should run on either little and big endian hosts.
+
+Big-endian host PC are becoming less and less common since Apple&trade; has
+switched away from big-endian PowerPC&trade; in favor of little-endian intel
+X86&trade;.
+
+The lack of commercial big-endian hosts makes hard testing OpenOCD correctness
+on big-endian hosts. Running OpenOCD on low-cost commercial routers based on
+big-endian MIPS is possible, but it's tricky to properly setup the system and
+the cross-compiling environment.
+
+In next sections there are two example on how to compile and test OpenOCD in an
+emulated big-endian environment.
+
+
+@section endianness_helpers OpenOCD API for handling endianness
+
+Use the following OpenOCD API to handle endianness conversions:
+- host endianness to/from little endian:
+ - le_to_h_u64(), le_to_h_u32(), le_to_h_u16();
+ - h_u64_to_le(), h_u32_to_le(), h_u16_to_le();
+ - buf_get_u32(), buf_get_u64();
+ - buf_set_u32(), buf_set_u64();
+- host endianness to/from big endian:
+ - be_to_h_u64(), be_to_h_u32(), be_to_h_u16();
+ - h_u64_to_be(), h_u32_to_be(), h_u16_to_be();
+- host endianness to/from target endianness:
+ - target_read_u64(), target_read_u32(), target_read_u16();
+ - target_write_u64(), target_write_u32(), target_write_u16();
+ - target_write_phys_u64(), target_write_phys_u32(), target_write_phys_u16();
+ - target_buffer_get_u64(), target_buffer_get_u32(), target_buffer_get_u24(), target_buffer_get_u16();
+ - target_buffer_set_u64(), target_buffer_set_u32(), target_buffer_set_u24(), target_buffer_set_u16();
+- byte swap:
+ - buf_bswap32(), buf_bswap16().
+
+
+@section endianness_docker Use dockers to run different endianness
+
+
+Docker can run a full Linux image that includes the toolchain through QEMU
+emulator.
+By selecting a big-endian image, it's possible to compile and execute OpenOCD
+in big-endian.
+There are, so far, not many options for big-endian images; s390x is one of the
+few available.
+
+To be expanded.
+
+User should:
+- install docker;
+- download the big-endian image;
+- run the image in docker;
+- download, in the image, the OpenOCD code to test;
+- recompile OpenOCD code in the image;
+- run OpenOCD binary in the image.
+
+From https://github.com/multiarch/qemu-user-static
+
+ @code{.unparsed}
+ docker run --rm -t s390x/ubuntu bash
+ @endcode
+
+
+@section endianness_qemu Use buildroot and QEMU to run different endianness
+
+QEMU User Mode Emulation is an efficient method to launch, on host's CPU,
+applications compiled for another CPU and/or for different endianness.
+It works either on Linux and BSD. More info available on
+https://www.qemu.org/docs/master/user/index.html
+
+With QEMU User Mode Emulation is thus possible running, on a commonly available
+little-endian X86 Linux host, OpenOCD compiled for a big-endian host.
+
+The following example will show how to use buildroot to:
+- build big-endian toolchain and libraries;
+- compile OpenOCD for big-endian;
+- run the big-endian OpenOCD on little-endian Linux PC.
+
+The example will use ARM Cortex-A7 big-endian only because I personally feel
+comfortable reading ARM assembly during debug. User can select other CPU
+architectures, as this does not impact the result.
+
+A similar method can be used to test OpenOCD compiled for 32 vs 64 bit host.
+
+@note
+- the version of autotools locally installer in your Linux host can be
+ incompatible with the version of autotools used by buildroot. This can cause
+ the build to fail if buildroot has to run its autotools on a partially
+ configured OpenOCD folder. Use either a clean copy of OpenOCD code in 2., or
+ run "./bootstrap" in OpenOCD folder to prevent buildroot from using its own
+ autotools;
+- the configuration tool in 4. and 5. matches the version of OpenOCD used by
+ buildroot. Some new driver could be not listed in. OpenOCD will build every
+ driver that is not disabled and with satisfied dependencies. If the driver
+ you plan to use is not listed, try a first build and check OpenOCD with
+ command "adapter list", then try to hack the buildroot files Config.in and
+ openocd.mk in folder package/openocd/ and use "make openocd-reconfigure" to
+ rerun the build starting with configuration;
+- using pre-built toolchains, you need 2GB of disk space for buildroot build.
+ To also rebuild the toolchains you will need ~5GB and much longer time for
+ the first build (it takes ~2 hour on my crap 10+ years old laptop);
+- you need to install few tools for buildroot dependency, listed in
+ https://buildroot.org/downloads/manual/manual.html#requirement ;
+- you need to install qemu-armeb. On Arch Linux it's in package qemu-arch-extra;
+ on Ubuntu/debian it's packaged in qemu-user.
+ Buildroot can also be configured to build qemu for the host, if you prefer,
+ by enabling BR2_PACKAGE_HOST_QEMU_LINUX_USER_MODE, but this takes longer
+ compile time;
+- don't use qemu-system-arm, as it emulates a complete system and requires a
+ fully bootable ARM image;
+- while QEMU User Mode Emulation is available for both Linux and BSD, buildroot
+ only builds binaries for Linux target. This example can only be used with
+ Linux hosts emulating the Linux target.
+
+
+Steps to run big-endian OpenOCD on little-endian host Linux PC:
+
+1. Get buildroot source. Today's latest version is "2022.02":
+ @code{.unparsed}
+ wget https://buildroot.org/downloads/buildroot-2022.02.tar.xz
+ tar xf buildroot-2022.02.tar.xz
+ cd buildroot-2022.02
+ @endcode
+
+2. Override the source repo for OpenOCD in order to build your own code version
+ in place of the default OpenOCD release version:
+ @code{.unparsed}
+ echo OPENOCD_OVERRIDE_SRCDIR=/home/me/openocd.git >> local.mk
+ @endcode
+
+3. Copy default config for OpenOCD big-endian. This used:
+ - ARM Cortex-A7 big-endian target,
+ - external Linaro armeb toolchain (to speed up first build),
+ - OpenOCD all configure options enabled.
+
+ @code{.unparsed}
+ cp $OPENOCD_OVERRIDE_SRCDIR/contrib/buildroot/openocd_be_defconfig configs/
+ @endcode
+
+4. Configure buildroot with default config for OpenOCD big-endian:
+ @code{.unparsed}
+ make openocd_be_defconfig
+ @endcode
+
+5. Optional, change buildroot configuration:
+ @code{.unparsed}
+ make menuconfig
+ @endcode
+ These are the options selected with default config for OpenOCD big-endian:
+ @code{.unparsed}
+ Target options --->
+ Target Architecture --->
+ ARM (big endian)
+ Target Architecture Variant --->
+ cortex-A7
+ Toolchain --->
+ Toolchain type --->
+ External toolchain
+ Toolchain --->
+ Linaro armeb 2018.05
+ Toolchain origin --->
+ Toolchain to be downloaded and installed
+ Target packages --->
+ Hardware handling --->
+ openocd
+ All adapters selected
+ @endcode
+ Save and exit
+
+6. Build (and take a long coffee break ...):
+ @code{.unparsed}
+ make openocd
+ @endcode
+
+7. Execute big-endian OpenOCD:
+ @code{.unparsed}
+ cd output/target
+ qemu-armeb -cpu cortex-a7 -L . usr/bin/openocd -s usr/share/openocd/scripts/ -f board/st_nucleo_f4.cfg
+ @endcode
+
+8. Optional, to rebuild after any source code modification in ${OPENOCD_OVERRIDE_SRCDIR}:
+ @code{.unparsed}
+ make openocd-rebuild
+ @endcode
+
+ */
+/** @file
+This file contains the @ref endianness page.
+ */
diff --git a/doc/manual/main.txt b/doc/manual/main.txt
index 14c64c2..c28fbe2 100644
--- a/doc/manual/main.txt
+++ b/doc/manual/main.txt
@@ -19,6 +19,8 @@ check the mailing list archives to find the status of your feature (or bug).
- The @subpage bugs page contains the content of the BUGS file, which
provides instructions for submitting bug reports to the maintainers.
- The @subpage releases page describes the project's release process.
+- The @subpage endianness provides hints about writing and testing
+ endianness independent code for OpenOCD.
@ref primer provide introductory materials for new developers on various
specific topics.
diff --git a/doc/openocd.texi b/doc/openocd.texi
index b66627f..115b538 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -19,7 +19,7 @@ dated @value{UPDATED},
of the Open On-Chip Debugger (OpenOCD).
@itemize @bullet
-@item Copyright @copyright{} 2008 The OpenOCD Project
+@item Copyright @copyright{} 2008-2022 The OpenOCD Project
@item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
@item Copyright @copyright{} 2008-2010 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
@item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
@@ -594,8 +594,8 @@ produced, PDF schematics are easily found and it is easy to make.
@item @b{vdebug}
@* A driver for Cadence virtual Debug Interface to emulated or simulated targets.
It implements a client connecting to the vdebug server, which in turn communicates
-with the emulated or simulated RTL model through a transactor. The current version
-supports only JTAG as a transport, but other virtual transports, like DAP are planned.
+with the emulated or simulated RTL model through a transactor. The driver supports
+JTAG and DAP-level transports.
@item @b{jtag_dpi}
@* A JTAG driver acting as a client for the SystemVerilog Direct Programming
@@ -613,6 +613,9 @@ emulation model of target hardware.
@* A bitbang JTAG driver using Linux legacy sysfs GPIO.
This is deprecated from Linux v5.3; prefer using @b{linuxgpiod}.
+@item @b{esp_usb_jtag}
+@* A JTAG driver to communicate with builtin debug modules of Espressif ESP32-C3 and ESP32-S3 chips using OpenOCD.
+
@end itemize
@node About Jim-Tcl
@@ -2409,7 +2412,57 @@ when external configuration (such as jumpering) changes what
the hardware can support.
@end deffn
+@anchor{adapter gpio}
+@deffn {Config Command} {adapter gpio [ @
+ @option{tdo} | @option{tdi} | @option{tms} | @option{tck} | @option{trst} | @
+ @option{swdio} | @option{swdio_dir} | @option{swclk} | @option{srst} | @
+ @option{led} @
+ [ @
+ gpio_number | @option{-chip} chip_number | @
+ @option{-active-high} | @option{-active-low} | @
+ @option{-push-pull} | @option{-open-drain} | @option{-open-source} | @
+ @option{-pull-none} | @option{-pull-up} | @option{-pull-down} | @
+ @option{-init-inactive} | @option{-init-active} | @option{-init-input} @
+ ] ]}
+
+Define the GPIO mapping that the adapter will use. The following signals can be
+defined:
+
+@itemize @minus
+@item @option{tdo}, @option{tdi}, @option{tms}, @option{tck}, @option{trst}:
+JTAG transport signals
+@item @option{swdio}, @option{swclk}: SWD transport signals
+@item @option{swdio_dir}: optional swdio buffer control signal
+@item @option{srst}: system reset signal
+@item @option{led}: optional activity led
+@end itemize
+
+Some adapters require that the GPIO chip number is set in addition to the GPIO
+number. The configuration options enable signals to be defined as active-high or
+active-low. The output drive mode can be set to push-pull, open-drain or
+open-source. Most adapters will have to emulate open-drain or open-source drive
+modes by switching between an input and output. Input and output signals can be
+instructed to use a pull-up or pull-down resistor, assuming it is supported by
+the adaptor driver and hardware. The initial state of outputs may also be set,
+"active" state means 1 for active-high outputs and 0 for active-low outputs.
+Bidirectional signals may also be initialized as an input. If the swdio signal
+is buffered the buffer direction can be controlled with the swdio_dir signal;
+the active state means that the buffer should be set as an output with respect
+to the adapter. The command options are cumulative with later commands able to
+override settings defined by earlier ones. The two commands @command{gpio led 7
+-active-high} and @command{gpio led -chip 1 -active-low} sent sequentially are
+equivalent to issuing the single command @command{gpio led 7 -chip 1
+-active-low}. It is not permissible to set the drive mode or initial state for
+signals which are inputs. The drive mode for the srst and trst signals must be
+set with the @command{adapter reset_config} command. It is not permissible to
+set the initial state of swdio_dir as it is derived from the initial state of
+swdio. The command @command{adapter gpio} prints the current configuration for
+all GPIOs while the command @command{adapter gpio gpio_name} prints the current
+configuration for gpio_name. Not all adapters support this generic GPIO mapping,
+some require their own commands to define the GPIOs used. Adapters that support
+the generic mapping may not support all of the listed options.
+@end deffn
@deffn {Command} {adapter name}
Returns the name of the debug adapter driver being used.
@@ -3268,66 +3321,12 @@ able to coexist nicely with both sysfs bitbanging and various
peripherals' kernel drivers. The driver restores the previous
configuration on exit.
-GPIO numbers >= 32 can't be used for performance reasons.
+GPIO numbers >= 32 can't be used for performance reasons. GPIO configuration is
+handled by the generic command @ref{adapter gpio, @command{adapter gpio}}.
See @file{interface/raspberrypi-native.cfg} for a sample config and
pinout.
-@deffn {Config Command} {bcm2835gpio jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}
-Set JTAG transport GPIO numbers for TCK, TMS, TDI, and TDO (in that order).
-Must be specified to enable JTAG transport. These pins can also be specified
-individually.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio tck_num} @var{tck}
-Set TCK GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{bcm2835gpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio tms_num} @var{tms}
-Set TMS GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{bcm2835gpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio tdo_num} @var{tdo}
-Set TDO GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{bcm2835gpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio tdi_num} @var{tdi}
-Set TDI GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{bcm2835gpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio swd_nums} @var{swclk} @var{swdio}
-Set SWD transport GPIO numbers for SWCLK and SWDIO (in that order). Must be
-specified to enable SWD transport. These pins can also be specified individually.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio swclk_num} @var{swclk}
-Set SWCLK GPIO number. Must be specified to enable SWD transport. Can also be
-specified using the configuration command @command{bcm2835gpio swd_nums}.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio swdio_num} @var{swdio}
-Set SWDIO GPIO number. Must be specified to enable SWD transport. Can also be
-specified using the configuration command @command{bcm2835gpio swd_nums}.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio swdio_dir_num} @var{swdio} @var{dir}
-Set SWDIO direction control pin GPIO number. If specified, this pin can be used
-to control the direction of an external buffer on the SWDIO pin (set=output
-mode, clear=input mode). If not specified, this feature is disabled.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio srst_num} @var{srst}
-Set SRST GPIO number. Must be specified to enable SRST.
-@end deffn
-
-@deffn {Config Command} {bcm2835gpio trst_num} @var{trst}
-Set TRST GPIO number. Must be specified to enable TRST.
-@end deffn
-
@deffn {Config Command} {bcm2835gpio speed_coeffs} @var{speed_coeff} @var{speed_offset}
Set SPEED_COEFF and SPEED_OFFSET for delay calculations. If unspecified,
speed_coeff defaults to 113714, and speed_offset defaults to 28.
@@ -3363,171 +3362,28 @@ registers directly. The memory mapping requires read and write permission to
kernel memory; if /dev/gpiomem exists it will be used, otherwise /dev/mem will
be used. The driver restores the GPIO state on exit.
-All four GPIO ports are available. GPIOs numbered 0 to 31 are mapped to GPIO port
-0, GPIO numbers 32 to 63 are mapped to GPIO port 1 and so on.
-
-See @file{interface/beaglebone-swd-native.cfg} for a sample configuration file.
-
-@deffn {Config Command} {am335xgpio jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}
-Set JTAG transport GPIO numbers for TCK, TMS, TDI, and TDO (in that order).
-Must be specified to enable JTAG transport. These pins can also be specified
-individually.
-@end deffn
-
-@deffn {Config Command} {am335xgpio tck_num} @var{tck}
-Set TCK GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{am335xgpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {am335xgpio tms_num} @var{tms}
-Set TMS GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{am335xgpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {am335xgpio tdo_num} @var{tdo}
-Set TDO GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{am335xgpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {am335xgpio tdi_num} @var{tdi}
-Set TDI GPIO number. Must be specified to enable JTAG transport. Can also be
-specified using the configuration command @command{am335xgpio jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {am335xgpio swd_nums} @var{swclk} @var{swdio}
-Set SWD transport GPIO numbers for SWCLK and SWDIO (in that order). Must be
-specified to enable SWD transport. These pins can also be specified individually.
-@end deffn
-
-@deffn {Config Command} {am335xgpio swclk_num} @var{swclk}
-Set SWCLK GPIO number. Must be specified to enable SWD transport. Can also be
-specified using the configuration command @command{am335xgpio swd_nums}.
-@end deffn
-
-@deffn {Config Command} {am335xgpio swdio_num} @var{swdio}
-Set SWDIO GPIO number. Must be specified to enable SWD transport. Can also be
-specified using the configuration command @command{am335xgpio swd_nums}.
-@end deffn
-
-@deffn {Config Command} {am335xgpio swdio_dir_num} @var{swdio_dir}
-Set SWDIO direction control pin GPIO number. If specified, this pin can be used
-to control the direction of an external buffer on the SWDIO pin. The direction
-control state can be set with the command @command{am335xgpio
-swdio_dir_output_state}. If not specified this feature is disabled.
-@end deffn
-
-@deffn {Config Command} {am335xgpio swdio_dir_output_state} @var{output_state}
-Set the state required for an external SWDIO buffer to be an output. Valid
-values are @option{on} (default) and @option{off}.
-@end deffn
-
-@deffn {Config Command} {am335xgpio srst_num} @var{srst}
-Set SRST GPIO number. Must be specified to enable SRST.
-@end deffn
-
-@deffn {Config Command} {am335xgpio trst_num} @var{trst}
-Set TRST GPIO number. Must be specified to enable TRST.
-@end deffn
-
-@deffn {Config Command} {am335xgpio led_num} @var{led}
-Set activity LED GPIO number. If not specified an activity LED is not enabled.
-@end deffn
-
-@deffn {Config Command} {am335xgpio led_on_state} @var{on_state}
-Set required logic level for the LED to be on. Valid values are @option{on}
-(default) and @option{off}.
-@end deffn
+All four GPIO ports are available. GPIO configuration is handled by the generic
+command @ref{adapter gpio, @command{adapter gpio}}.
@deffn {Config Command} {am335xgpio speed_coeffs} @var{speed_coeff} @var{speed_offset}
Set SPEED_COEFF and SPEED_OFFSET for delay calculations. If unspecified
speed_coeff defaults to 600000 and speed_offset defaults to 575.
@end deffn
-@end deffn
-
-
-@deffn {Interface Driver} {linuxgpiod}
-Linux provides userspace access to GPIO through libgpiod since Linux kernel version v4.6.
-The driver emulates either JTAG or SWD transport through bitbanging.
-
-See @file{interface/dln-2-gpiod.cfg} for a sample config.
-
-@deffn {Config Command} {linuxgpiod gpiochip} @var{chip}
-Set the GPIO chip number for all GPIOs used by linuxgpiod. If GPIOs use
-different GPIO chips then the individual GPIO configuration commands (i.e., not
-@command{linuxgpiod jtag_nums} or @command{linuxgpiod swd_nums}) can be used to
-set chip numbers independently for each GPIO.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}
-Set JTAG transport GPIO numbers for TCK, TMS, TDI, and TDO (in that order). Must
-be specified to enable JTAG transport. These pins can also be specified
-individually.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod tck_num} [@var{chip}] @var{tck}
-Set TCK GPIO number, and optionally TCK chip number. Must be specified to enable
-JTAG transport. Can also be specified using the configuration command
-@command{linuxgpiod jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod tms_num} [@var{chip}] @var{tms}
-Set TMS GPIO number, and optionally TMS chip number. Must be specified to enable
-JTAG transport. Can also be specified using the configuration command
-@command{linuxgpiod jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod tdo_num} [@var{chip}] @var{tdo}
-Set TDO GPIO number, and optionally TDO chip number. Must be specified to enable
-JTAG transport. Can also be specified using the configuration command
-@command{linuxgpiod jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod tdi_num} [@var{chip}] @var{tdi}
-Set TDI GPIO number, and optionally TDI chip number. Must be specified to enable
-JTAG transport. Can also be specified using the configuration command
-@command{linuxgpiod jtag_nums}.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod trst_num} [@var{chip}] @var{trst}
-Set TRST GPIO number, and optionally TRST chip number. Must be specified to
-enable TRST.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod swd_nums} @var{swclk} @var{swdio}
-Set SWD transport GPIO numbers for SWCLK and SWDIO (in that order). Must be
-specified to enable SWD transport. These pins can also be specified
-individually.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod swclk_num} [@var{chip}] @var{swclk}
-Set SWCLK GPIO number, and optionally SWCLK chip number. Must be specified to
-enable SWD transport. Can also be specified using the configuration command
-@command{linuxgpiod swd_nums}.
-@end deffn
-
-@deffn {Config Command} {linuxgpiod swdio_num} [@var{chip}] @var{swdio}
-Set SWDIO GPIO number, and optionally SWDIO chip number. Must be specified to
-enable SWD transport. Can also be specified using the configuration command
-@command{linuxgpiod swd_nums}.
-@end deffn
+See @file{interface/beaglebone-swd-native.cfg} for a sample configuration file.
-@deffn {Config Command} {linuxgpiod swdio_dir_num} [@var{chip}] @var{swdio_dir}
-Set SWDIO direction control GPIO number, and optionally SWDIO direction control
-chip number. If specified, this GPIO can be used to control the direction of an
-external buffer connected to the SWDIO GPIO (set=output mode, clear=input mode).
@end deffn
-@deffn {Config Command} {linuxgpiod srst_num} [@var{chip}] @var{srst}
-Set SRST GPIO number, and optionally SRST chip number. Must be specified to
-enable SRST.
-@end deffn
-@deffn {Config Command} {linuxgpiod led_num} [@var{chip}] @var{led}
-Set activity LED GPIO number, and optionally activity LED chip number. If not
-specified an activity LED is not enabled.
-@end deffn
+@deffn {Interface Driver} {linuxgpiod}
+Linux provides userspace access to GPIO through libgpiod since Linux kernel
+version v4.6. The driver emulates either JTAG or SWD transport through
+bitbanging. There are no driver-specific commands, all GPIO configuration is
+handled by the generic command @ref{adapter gpio, @command{adapter gpio}}. This
+driver supports the resistor pull options provided by the @command{adapter gpio}
+command but the underlying hardware may not be able to support them.
+See @file{interface/dln-2-gpiod.cfg} for a sample configuration file.
@end deffn
@@ -3672,6 +3528,44 @@ buspirate led 1
@end deffn
+@deffn {Interface Driver} {esp_usb_jtag}
+Espressif JTAG driver to communicate with ESP32-C3, ESP32-S3 chips and ESP USB Bridge board using OpenOCD.
+These chips have built-in JTAG circuitry and can be debugged without any additional hardware.
+Only an USB cable connected to the D+/D- pins is necessary.
+
+@deffn {Config Command} {espusbjtag tdo}
+Returns the current state of the TDO line
+@end deffn
+
+@deffn {Config Command} {espusbjtag setio} setio
+Manually set the status of the output lines with the order of (tdi tms tck trst srst)
+@example
+espusbjtag setio 0 1 0 1 0
+@end example
+@end deffn
+
+@deffn {Config Command} {espusbjtag vid_pid} vid_pid
+Set vendor ID and product ID for the ESP usb jtag driver
+@example
+espusbjtag vid_pid 0x303a 0x1001
+@end example
+@end deffn
+
+@deffn {Config Command} {espusbjtag caps_descriptor} caps_descriptor
+Set the jtag descriptor to read capabilities of ESP usb jtag driver
+@example
+espusbjtag caps_descriptor 0x2000
+@end example
+@end deffn
+
+@deffn {Config Command} {espusbjtag chip_id} chip_id
+Set chip id to transfer to the ESP USB bridge board
+@example
+espusbjtag chip_id 1
+@end example
+@end deffn
+
+@end deffn
@section Transport Configuration
@cindex Transport
@@ -4675,8 +4569,12 @@ There can only be one DAP for each JTAG tap in the system.
A DAP may also provide optional @var{configparams}:
@itemize @bullet
+@item @code{-adiv5}
+Specify that it's an ADIv5 DAP. This is the default if not specified.
+@item @code{-adiv6}
+Specify that it's an ADIv6 DAP.
@item @code{-ignore-syspwrupack}
-@*Specify this to ignore the CSYSPWRUPACK bit in the ARM DAP DP CTRL/STAT
+Specify this to ignore the CSYSPWRUPACK bit in the ARM DAP DP CTRL/STAT
register during initial examination and when checking the sticky error bit.
This bit is normally checked after setting the CSYSPWRUPREQ bit, but some
devices do not set the ack bit until sometime later.
@@ -4702,9 +4600,12 @@ This command returns a list of all registered DAP objects. It it useful mainly
for TCL scripting.
@end deffn
-@deffn {Command} {dap info} [num]
+@deffn {Command} {dap info} [@var{num}|@option{root}]
Displays the ROM table for MEM-AP @var{num},
defaulting to the currently selected AP of the currently selected target.
+On ADIv5 DAP @var{num} is the numeric index of the AP.
+On ADIv6 DAP @var{num} is the base address of the AP.
+With ADIv6 only, @option{root} specifies the root ROM table.
@end deffn
@deffn {Command} {dap init}
@@ -4715,24 +4616,33 @@ initialization, too.
The following commands exist as subcommands of DAP instances:
-@deffn {Command} {$dap_name info} [num]
+@deffn {Command} {$dap_name info} [@var{num}|@option{root}]
Displays the ROM table for MEM-AP @var{num},
defaulting to the currently selected AP.
+On ADIv5 DAP @var{num} is the numeric index of the AP.
+On ADIv6 DAP @var{num} is the base address of the AP.
+With ADIv6 only, @option{root} specifies the root ROM table.
@end deffn
@deffn {Command} {$dap_name apid} [num]
Displays ID register from AP @var{num}, defaulting to the currently selected AP.
+On ADIv5 DAP @var{num} is the numeric index of the AP.
+On ADIv6 DAP @var{num} is the base address of the AP.
@end deffn
@anchor{DAP subcommand apreg}
@deffn {Command} {$dap_name apreg} ap_num reg [value]
Displays content of a register @var{reg} from AP @var{ap_num}
or set a new value @var{value}.
+On ADIv5 DAP @var{ap_num} is the numeric index of the AP.
+On ADIv6 DAP @var{ap_num} is the base address of the AP.
@var{reg} is byte address of a word register, 0, 4, 8 ... 0xfc.
@end deffn
@deffn {Command} {$dap_name apsel} [num]
Select AP @var{num}, defaulting to 0.
+On ADIv5 DAP @var{num} is the numeric index of the AP.
+On ADIv6 DAP @var{num} is the base address of the AP.
@end deffn
@deffn {Command} {$dap_name dpreg} reg [value]
@@ -4750,6 +4660,8 @@ background activity by OpenOCD while you are operating at such low-level.
@deffn {Command} {$dap_name baseaddr} [num]
Displays debug base address from MEM-AP @var{num},
defaulting to the currently selected AP.
+On ADIv5 DAP @var{num} is the numeric index of the AP.
+On ADIv6 DAP @var{num} is the base address of the AP.
@end deffn
@deffn {Command} {$dap_name memaccess} [value]
@@ -4806,6 +4718,10 @@ Set/get quirks mode for TI TMS450/TMS570 processors
Disabled by default
@end deffn
+@deffn {Config Command} {$dap_name nu_npcx_quirks} [@option{enable}]
+Set/get quirks mode for Nuvoton NPCX/NPCD MCU families
+Disabled by default
+@end deffn
@node CPU Configuration
@chapter CPU Configuration
@@ -4924,9 +4840,11 @@ compact Thumb2 instruction set. Supports also ARMv6-M and ARMv8-M cores
@item @code{dsp5680xx} -- implements Freescale's 5680x DSP.
@item @code{esirisc} -- this is an EnSilica eSi-RISC core.
The current implementation supports eSi-32xx cores.
+@item @code{esp32} -- this is an Espressif SoC with dual Xtensa cores.
@item @code{esp32c2} -- this is an Espressif SoC with single RISC-V core.
@item @code{esp32c3} -- this is an Espressif SoC with single RISC-V core.
@item @code{esp32s2} -- this is an Espressif SoC with single Xtensa core.
+@item @code{esp32s3} -- this is an Espressif SoC with dual Xtensa cores.
@item @code{fa526} -- resembles arm920 (w/o Thumb).
@item @code{feroceon} -- resembles arm926.
@item @code{hla_target} -- a Cortex-M alternative to work with HL adapters like ST-Link.
@@ -4965,6 +4883,7 @@ And two debug interfaces cores:
@item @code{testee} -- a dummy target for cases without a real CPU, e.g. CPLD.
@item @code{xscale} -- this is actually an architecture,
not a CPU type. It is based on the ARMv5 architecture.
+@item @code{xtensa} -- this is a generic Cadence/Tensilica Xtensa core.
@end itemize
@end deffn
@@ -5115,7 +5034,7 @@ The value should normally correspond to a static mapping for the
@anchor{rtostype}
@item @code{-rtos} @var{rtos_type} -- enable rtos support for target,
-@var{rtos_type} can be one of @option{auto}, @option{eCos},
+@var{rtos_type} can be one of @option{auto}, @option{none}, @option{eCos},
@option{ThreadX}, @option{FreeRTOS}, @option{linux}, @option{ChibiOS},
@option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx},
@option{RIOT}, @option{Zephyr}
@@ -5125,8 +5044,9 @@ The value should normally correspond to a static mapping for the
scan and after a reset. A manual call to arp_examine is required to
access the target for debugging.
-@item @code{-ap-num} @var{ap_number} -- set DAP access port for target,
-@var{ap_number} is the numeric index of the DAP AP the target is connected to.
+@item @code{-ap-num} @var{ap_number} -- set DAP access port for target.
+On ADIv5 DAP @var{ap_number} is the numeric index of the DAP AP the target is connected to.
+On ADIv6 DAP @var{ap_number} is the base address of the DAP AP the target is connected to.
Use this option with systems where multiple, independent cores are connected
to separate access ports of the same DAP.
@@ -7453,6 +7373,31 @@ flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME
@end example
@end deffn
+@deffn {Flash Driver} {rsl10}
+Supports Onsemi RSL10 microcontroller flash memory. Uses functions
+stored in ROM to control flash memory interface.
+
+@example
+flash bank $_FLASHNAME rsl10 $_FLASHBASE $_FLASHSIZE 0 0 $_TARGETNAME
+@end example
+
+@deffn {Command} {rsl10 lock} key1 key2 key3 key4
+Writes @var{key1 key2 key3 key4} words to @var{0x81044 0x81048 0x8104c
+0x8050}. Locks debug port by writing @var{0x4C6F634B} to @var{0x81040}.
+
+To unlock use the @command{rsl10 unlock key1 key2 key3 key4} command.
+@end deffn
+
+@deffn {Command} {rsl10 unlock} key1 key2 key3 key4
+Unlocks debug port, by writing @var{key1 key2 key3 key4} words to
+registers through DAP, and clears @var{0x81040} address in flash to 0x1.
+@end deffn
+
+@deffn {Command} {rsl10 mass_erase}
+Erases all unprotected flash sectors.
+@end deffn
+@end deffn
+
@deffn {Flash Driver} {sim3x}
All members of the SiM3 microcontroller family from Silicon Laboratories
include internal flash and use ARM Cortex-M3 cores. It supports both JTAG
@@ -9476,7 +9421,10 @@ the @emph{cti} group of commands.
@deffn {Command} {cti create} cti_name @option{-dap} dap_name @option{-ap-num} apn @option{-baseaddr} base_address
Creates a CTI instance @var{cti_name} on the DAP instance @var{dap_name} on MEM-AP
-@var{apn}. The @var{base_address} must match the base address of the CTI
+@var{apn}.
+On ADIv5 DAP @var{apn} is the numeric index of the DAP AP the CTI is connected to.
+On ADIv6 DAP @var{apn} is the base address of the DAP AP the CTI is connected to.
+The @var{base_address} must match the base address of the CTI
on the respective MEM-AP. All arguments are mandatory. This creates a
new command @command{$cti_name} which is used for various purposes
including additional configuration.
@@ -10141,8 +10089,9 @@ using the @command{$tpiu_name cget} command.
@item @code{-dap} @var{dap_name} -- names the DAP used to access this
TPIU. @xref{dapdeclaration,,DAP declaration}, on how to create and manage DAP instances.
-@item @code{-ap-num} @var{ap_number} -- sets DAP access port for TPIU,
-@var{ap_number} is the numeric index of the DAP AP the TPIU is connected to.
+@item @code{-ap-num} @var{ap_number} -- sets DAP access port for TPIU.
+On ADIv5 DAP @var{ap_number} is the numeric index of the DAP AP the TPIU is connected to.
+On ADIv6 DAP @var{ap_number} is the base address of the DAP AP the TPIU is connected to.
@item @code{-baseaddr} @var{base_address} -- sets the TPIU @var{base_address} where
to access the TPIU in the DAP AP memory space.
@@ -10708,13 +10657,13 @@ CSRs.
@example
# Expose a single RISC-V CSR number 128 under the name "csr128":
-$_TARGETNAME expose_csrs 128
+riscv expose_csrs 128
# Expose multiple RISC-V CSRs 128..132 under names "csr128" through "csr132":
-$_TARGETNAME expose_csrs 128-132
+riscv expose_csrs 128-132
# Expose a single RISC-V CSR number 1996 under custom name "csr_myregister":
-$_TARGETNAME expose_csrs 1996=myregister
+riscv expose_csrs 1996=myregister
@end example
@end deffn
@@ -11146,33 +11095,150 @@ OpenOCD supports debugging STM8 through the STMicroelectronics debug
protocol SWIM, @pxref{swimtransport,,SWIM}.
@section Xtensa Architecture
-Xtensa processors are based on a modular, highly flexible 32-bit RISC architecture
-that can easily scale from a tiny, cache-less controller or task engine to a high-performance
-SIMD/VLIW DSP provided by Cadence.
-@url{https://www.cadence.com/en_US/home/tools/ip/tensilica-ip/tensilica-xtensa-controllers-and-extensible-processors.html}.
-OpenOCD supports generic Xtensa processors implementation which can be customized by
-simply providing vendor-specific core configuration which controls every configurable
+Xtensa is a highly-customizable, user-extensible microprocessor and DSP
+architecture for complex embedded systems provided by Cadence Design
+Systems, Inc. See the
+@uref{https://www.cadence.com/en_US/home/tools/ip/tensilica-ip.html, Tensilica IP}
+website for additional information and documentation.
+
+OpenOCD supports generic Xtensa processor implementations which can be customized by
+providing a core-specific configuration file which describes every enabled
Xtensa architecture option, e.g. number of address registers, exceptions, reduced
-size instructions support, memory banks configuration etc. Also OpenOCD supports SMP
-configurations for Xtensa processors with any number of cores and allows to configure
-their debug signals interconnection (so-called "break/stall networks") which control how
-debug signals are distributed among cores. Xtensa "break networks" are compatible with
-ARM's Cross Trigger Interface (CTI). For debugging code on Xtensa chips OpenOCD
-uses JTAG protocol. Currently OpenOCD implements several Epsressif Xtensa-based chips of
+size instructions support, memory banks configuration etc. OpenOCD also supports SMP
+configurations for Xtensa processors with any number of cores and allows configuring
+their debug interconnect (termed "break/stall networks"), which control how debug
+signals are distributed among cores. Xtensa "break networks" are compatible with
+ARM's Cross Trigger Interface (CTI). OpenOCD implements both generic Xtensa targets
+as well as several Espressif Xtensa-based chips from the
@uref{https://www.espressif.com/en/products/socs, ESP32 family}.
-@subsection General Xtensa Commands
+OCD sessions for Xtensa processor and DSP targets are accessed via the Xtensa
+Debug Module (XDM), which provides external connectivity either through a
+traditional JTAG interface or an ARM DAP interface. If used, the DAP interface
+can control Xtensa targets through JTAG or SWD probes.
+
+@subsection Xtensa Core Configuration
+
+Due to the high level of configurability in Xtensa cores, the Xtensa target
+configuration comprises two categories:
+
+@enumerate
+@item Base Xtensa support common to all core configurations, and
+@item Core-specific support as configured for individual cores.
+@end enumerate
+
+All common Xtensa support is built into the OpenOCD Xtensa target layer and
+is enabled through a combination of TCL scripts: the target-specific
+@file{target/xtensa.cfg} and a board-specific @file{board/xtensa-*.cfg},
+similar to other target architectures.
+
+Importantly, core-specific configuration information must be provided by
+the user, and takes the form of an @file{xtensa-core-XXX.cfg} TCL script that
+defines the core's configurable features through a series of Xtensa
+configuration commands (detailed below).
+
+This core-specific @file{xtensa-core-XXX.cfg} file is typically either:
+
+@itemize @bullet
+@item Located within the Xtensa core configuration build as
+@file{src/config/xtensa-core-openocd.cfg}, or
+@item Generated by running the command @code{xt-gdb --dump-oocd-config}
+from the Xtensa processor tool-chain's command-line tools.
+@end itemize
+
+NOTE: @file{xtensa-core-XXX.cfg} must match the target Xtensa hardware
+connected to OpenOCD.
+
+Some example Xtensa configurations are bundled with OpenOCD for reference:
+@itemize @bullet
+@item Cadence Palladium VDebug emulation target. The user can combine their
+@file{xtensa-core-XXX.cfg} with the provided
+@file{board/xtensa-palladium-vdebug.cfg} to debug an emulated Xtensa RTL design.
+@item NXP MIMXRT685-EVK evaluation kit. The relevant configuration files are
+@file{board/xtensa-rt685-jlink.cfg} and @file{board/xtensa-core-nxp_rt600.cfg}.
+Additional information is provided by
+@uref{https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt600-evaluation-kit:MIMXRT685-EVK,
+NXP}.
+@end itemize
+
+@subsection Xtensa Configuration Commands
+
+@deffn {Command} {xtensa xtdef} (@option{LX}|@option{NX})
+Configure the Xtensa target architecture. Currently, Xtensa support is limited
+to LX6, LX7, and NX cores.
+@end deffn
+
+@deffn {Command} {xtensa xtopt} option value
+Configure Xtensa target options that are relevant to the debug subsystem.
+@var{option} is one of: @option{arnum}, @option{windowed},
+@option{cpenable}, @option{exceptions}, @option{intnum}, @option{hipriints},
+@option{excmlevel}, @option{intlevels}, @option{debuglevel},
+@option{ibreaknum}, or @option{dbreaknum}. @var{value} is an integer with
+the exact range determined by each particular option.
+
+NOTE: Some options are specific to Xtensa LX or Xtensa NX architecture, while
+others may be common to both but have different valid ranges.
+@end deffn
+
+@deffn {Command} {xtensa xtmem} (@option{iram}|@option{dram}|@option{sram}|@option{irom}|@option{drom}|@option{srom}) baseaddr bytes
+Configure Xtensa target memory. Memory type determines access rights,
+where RAMs are read/write while ROMs are read-only. @var{baseaddr} and
+@var{bytes} are both integers, typically hexadecimal and decimal, respectively.
+@end deffn
+
+@deffn {Command} {xtensa xtmem} (@option{icache}|@option{dcache}) linebytes cachebytes ways [writeback]
+Configure Xtensa processor cache. All parameters are required except for
+the optional @option{writeback} parameter; all are integers.
+@end deffn
+
+@deffn {Command} {xtensa xtmpu} numfgseg minsegsz lockable execonly
+Configure an Xtensa Memory Protection Unit (MPU). MPUs can restrict access
+and/or control cacheability of specific address ranges, but are lighter-weight
+than a full traditional MMU. All parameters are required; all are integers.
+@end deffn
+
+@deffn {Command} {xtensa xtmmu} numirefillentries numdrefillentries
+(Xtensa-LX only) Configure an Xtensa Memory Management Unit (MMU). Both
+parameters are required; both are integers.
+@end deffn
+
+@deffn {Command} {xtensa xtregs} numregs
+Configure the total number of registers for the Xtensa core. Configuration
+logic expects to subsequently process this number of @code{xtensa xtreg}
+definitions. @var{numregs} is an integer.
+@end deffn
+
+@deffn {Command} {xtensa xtregfmt} (@option{sparse}|@option{contiguous}) [general]
+Configure the type of register map used by GDB to access the Xtensa core.
+Generic Xtensa tools (e.g. xt-gdb) require @option{sparse} mapping (default) while
+Espressif tools expect @option{contiguous} mapping. Contiguous mapping takes an
+additional, optional integer parameter @option{numgregs}, which specifies the number
+of general registers used in handling g/G packets.
+@end deffn
+
+@deffn {Command} {xtensa xtreg} name offset
+Configure an Xtensa core register. All core registers are 32 bits wide,
+while TIE and user registers may have variable widths. @var{name} is a
+character string identifier while @var{offset} is a hexadecimal integer.
+@end deffn
+
+@subsection Xtensa Operation Commands
+
+@deffn {Command} {xtensa maskisr} (@option{on}|@option{off})
+(Xtensa-LX only) Mask or unmask Xtensa interrupts during instruction step.
+When masked, an interrupt that occurs during a step operation is handled and
+its ISR is executed, with the user's debug session returning after potentially
+executing many instructions. When unmasked, a triggered interrupt will result
+in execution progressing the requested number of instructions into the relevant
+vector/ISR code.
+@end deffn
@deffn {Command} {xtensa set_permissive} (0|1)
By default accessing memory beyond defined regions is forbidden. This commnd controls memory access address check.
When set to (1), skips access controls and address range check before read/write memory.
@end deffn
-@deffn {Command} {xtensa maskisr} (on|off)
-Selects whether interrupts will be disabled during stepping over single instruction. The default configuration is (off).
-@end deffn
-
@deffn {Command} {xtensa smpbreak} [none|breakinout|runstall] | [BreakIn] [BreakOut] [RunStallIn] [DebugModeOut]
Configures debug signals connection ("break network") for currently selected core.
@itemize @bullet
@@ -11196,6 +11262,13 @@ This feature is not well implemented and tested yet.
@end itemize
@end deffn
+@deffn {Command} {xtensa exe} <ascii-encoded hexadecimal instruction bytes>
+Execute arbitrary instruction(s) provided as an ascii string. The string represents an integer
+number of instruction bytes, thus its length must be even.
+@end deffn
+
+@subsection Xtensa Performance Monitor Configuration
+
@deffn {Command} {xtensa perfmon_enable} <counter_id> <select> [mask] [kernelcnt] [tracelevel]
Enable and start performance counter.
@itemize @bullet
@@ -11215,6 +11288,8 @@ whether to count.
Dump performance counter value. If no argument specified, dumps all counters.
@end deffn
+@subsection Xtensa Trace Configuration
+
@deffn {Command} {xtensa tracestart} [pc <pcval>/[<maskbitcount>]] [after <n> [ins|words]]
Set up and start a HW trace. Optionally set PC address range to trigger tracing stop when reached during program execution.
This command also allows to specify the amount of data to capture after stop trigger activation.
@@ -11966,6 +12041,11 @@ Currently supported rtos's include:
@item @option{Zephyr}
@end itemize
+At any time, it's possible to drop the selected RTOS using:
+@example
+$_TARGETNAME configure -rtos none
+@end example
+
Before an RTOS can be detected, it must export certain symbols; otherwise, it cannot
be used by OpenOCD. Below is a list of the required symbols for each supported RTOS.
diff --git a/src/Makefile.am b/src/Makefile.am
index 432c31e..6d79cd6 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libopenocd.la
bin_PROGRAMS += %D%/openocd
diff --git a/src/flash/Makefile.am b/src/flash/Makefile.am
index 4c70702..c5eb248 100644
--- a/src/flash/Makefile.am
+++ b/src/flash/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libflash.la
%C%_libflash_la_SOURCES = \
%D%/common.c %D%/common.h
diff --git a/src/flash/common.c b/src/flash/common.c
index 0e7fe13..ebd9396 100644
--- a/src/flash/common.c
+++ b/src/flash/common.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/common.h b/src/flash/common.h
index 69f60d9..15aea5b 100644
--- a/src/flash/common.h
+++ b/src/flash/common.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_COMMON_H
diff --git a/src/flash/nand/Makefile.am b/src/flash/nand/Makefile.am
index abe90f8..6a1a9b1 100644
--- a/src/flash/nand/Makefile.am
+++ b/src/flash/nand/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libocdflashnand.la
%C%_libocdflashnand_la_SOURCES = \
diff --git a/src/flash/nand/arm_io.c b/src/flash/nand/arm_io.c
index 2b0c081..80bd0cf 100644
--- a/src/flash/nand/arm_io.c
+++ b/src/flash/nand/arm_io.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2009 by Marvell Semiconductors, Inc.
* Written by Nicolas Pitre <nico at marvell.com>
*
* Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/arm_io.h b/src/flash/nand/arm_io.h
index 8bb3114..10f0e66 100644
--- a/src/flash/nand/arm_io.h
+++ b/src/flash/nand/arm_io.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_FLASH_NAND_ARM_IO_H
#define OPENOCD_FLASH_NAND_ARM_IO_H
diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index c8886d1..bfbba67 100644
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2009 by Dean Glazeski
* dnglaze@gmail.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/core.c b/src/flash/nand/core.c
index c1f1bc4..37e1d12 100644
--- a/src/flash/nand/core.c
+++ b/src/flash/nand/core.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* *
* Partially based on drivers/mtd/nand_ids.c from Linux. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/core.h b/src/flash/nand/core.h
index 12fc2b7..19c53d1 100644
--- a/src/flash/nand/core.h
+++ b/src/flash/nand/core.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
@@ -6,19 +8,6 @@
* Copyright (C) 2000 David Woodhouse <dwmw2@mvhi.com> *
* Copyright (C) 2000 Steven J. Hill <sjhill@realitydiluted.com> *
* Copyright (C) 2000 Thomas Gleixner <tglx@linutronix.de> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_CORE_H
diff --git a/src/flash/nand/davinci.c b/src/flash/nand/davinci.c
index 1aa7ffc..b7169fe 100644
--- a/src/flash/nand/davinci.c
+++ b/src/flash/nand/davinci.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by David Brownell *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c
index b525f3d..02e5c09 100644
--- a/src/flash/nand/driver.c
+++ b/src/flash/nand/driver.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/driver.h b/src/flash/nand/driver.h
index 690ee91..a874cc8 100644
--- a/src/flash/nand/driver.h
+++ b/src/flash/nand/driver.h
@@ -1,21 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_DRIVER_H
diff --git a/src/flash/nand/ecc.c b/src/flash/nand/ecc.c
index 25b2eb1..20b8ba8 100644
--- a/src/flash/nand/ecc.c
+++ b/src/flash/nand/ecc.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later WITH eCos-exception-2.0
+
/*
* This file contains an ECC algorithm from Toshiba that allows for detection
* and correction of 1-bit errors in a 256 byte block of data.
@@ -10,30 +12,6 @@
* Toshiba America Electronics Components, Inc.
*
* Copyright (C) 2006 Thomas Gleixner <tglx at linutronix.de>
- *
- * This file is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 or (at your option) any
- * later version.
- *
- * This file is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * As a special exception, if other files instantiate templates or use
- * macros or inline functions from these files, or you compile these
- * files and link them with other works to produce a work based on these
- * files, these files do not by themselves cause the resulting work to be
- * covered by the GNU General Public License. However the source code for
- * these files must still be made available in accordance with section (3)
- * of the GNU General Public License.
- *
- * This exception does not invalidate any other reasons why a work based on
- * this file might be covered by the GNU General Public License.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/ecc_kw.c b/src/flash/nand/ecc_kw.c
index fb3481d..cea1a5a 100644
--- a/src/flash/nand/ecc_kw.c
+++ b/src/flash/nand/ecc_kw.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Reed-Solomon ECC handling for the Marvell Kirkwood SOC
* Copyright (C) 2009 Marvell Semiconductor, Inc.
*
* Authors: Lennert Buytenhek <buytenh@wantstofly.org>
* Nicolas Pitre <nico@fluxnic.net>
- *
- * This file is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 or (at your option) any
- * later version.
- *
- * This file is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/fileio.c b/src/flash/nand/fileio.c
index b9c7f79..ca618b3 100644
--- a/src/flash/nand/fileio.c
+++ b/src/flash/nand/fileio.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* *
* Partially based on drivers/mtd/nand_ids.c from Linux. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/fileio.h b/src/flash/nand/fileio.h
index 6a094c2..a8d2524 100644
--- a/src/flash/nand/fileio.h
+++ b/src/flash/nand/fileio.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_FILEIO_H
diff --git a/src/flash/nand/imp.h b/src/flash/nand/imp.h
index c8a4ed9..7b4f38e 100644
--- a/src/flash/nand/imp.h
+++ b/src/flash/nand/imp.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_IMP_H
diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index bda7b87..c1af1d7 100644
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
*
* Copyright (C) 2010 richard vegh <vegh.ricsi@gmail.com> *
* Copyright (C) 2010 Oyvind Harboe <oyvind.harboe@zylin.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/lpc3180.h b/src/flash/nand/lpc3180.h
index c02ee5b..519be7e 100644
--- a/src/flash/nand/lpc3180.h
+++ b/src/flash/nand/lpc3180.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_LPC3180_H
diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c
index 49890c2..2c578d1 100644
--- a/src/flash/nand/lpc32xx.c
+++ b/src/flash/nand/lpc32xx.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -9,19 +11,6 @@
* Based on a combination of the lpc3180 driver and code from *
* uboot-2009.03-lpc32xx by Kevin Wells. *
* Any bugs are mine. --BSt *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/lpc32xx.h b/src/flash/nand/lpc32xx.h
index 12c8f48..f399142 100644
--- a/src/flash/nand/lpc32xx.h
+++ b/src/flash/nand/lpc32xx.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_LPC32XX_H
diff --git a/src/flash/nand/mx3.c b/src/flash/nand/mx3.c
index dc8d619..86e9468 100644
--- a/src/flash/nand/mx3.c
+++ b/src/flash/nand/mx3.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/mx3.h b/src/flash/nand/mx3.h
index 00664d8..b272962 100644
--- a/src/flash/nand/mx3.h
+++ b/src/flash/nand/mx3.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_MX3_H
diff --git a/src/flash/nand/mxc.c b/src/flash/nand/mxc.c
index 7aac721..845a3bb 100644
--- a/src/flash/nand/mxc.c
+++ b/src/flash/nand/mxc.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
@@ -8,19 +10,6 @@
* *
* Copyright (C) 2011 by Erik Ahlen *
* Avalon Innovation, Sweden *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/mxc.h b/src/flash/nand/mxc.h
index a188728..ae2c03a 100644
--- a/src/flash/nand/mxc.h
+++ b/src/flash/nand/mxc.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
@@ -5,19 +7,6 @@
* *
* Copyright (C) 2011 by Erik Ahlen *
* Avalon Innovation, Sweden *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_MXC_H
diff --git a/src/flash/nand/nonce.c b/src/flash/nand/nonce.c
index 6fda261..bce4ed0 100644
--- a/src/flash/nand/nonce.c
+++ b/src/flash/nand/nonce.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/nuc910.c b/src/flash/nand/nuc910.c
index 9546f2f..d7f69e6 100644
--- a/src/flash/nand/nuc910.c
+++ b/src/flash/nand/nuc910.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/nuc910.h b/src/flash/nand/nuc910.h
index 8877cf6..3d633dc 100644
--- a/src/flash/nand/nuc910.h
+++ b/src/flash/nand/nuc910.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/orion.c b/src/flash/nand/orion.c
index 69814ec..7b19cbd 100644
--- a/src/flash/nand/orion.c
+++ b/src/flash/nand/orion.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Marvell Semiconductors, Inc. *
* Written by Nicolas Pitre <nico at marvell.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/s3c2410.c b/src/flash/nand/s3c2410.c
index 57b51b4..98268eb 100644
--- a/src/flash/nand/s3c2410.c
+++ b/src/flash/nand/s3c2410.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007, 2008 by Ben Dooks *
* ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/s3c2412.c b/src/flash/nand/s3c2412.c
index 002378a..0eec35f 100644
--- a/src/flash/nand/s3c2412.c
+++ b/src/flash/nand/s3c2412.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007, 2008 by Ben Dooks *
* ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/s3c2440.c b/src/flash/nand/s3c2440.c
index 44670e6..789144c 100644
--- a/src/flash/nand/s3c2440.c
+++ b/src/flash/nand/s3c2440.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007, 2008 by Ben Dooks *
* ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/s3c2443.c b/src/flash/nand/s3c2443.c
index ffd3864..7166702 100644
--- a/src/flash/nand/s3c2443.c
+++ b/src/flash/nand/s3c2443.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007, 2008 by Ben Dooks *
* ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/s3c24xx.c b/src/flash/nand/s3c24xx.c
index c0471ed..5c2f2bc 100644
--- a/src/flash/nand/s3c24xx.c
+++ b/src/flash/nand/s3c24xx.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007, 2008 by Ben Dooks *
* ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/s3c24xx.h b/src/flash/nand/s3c24xx.h
index 4b0c02f..6b196a1 100644
--- a/src/flash/nand/s3c24xx.h
+++ b/src/flash/nand/s3c24xx.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007, 2008 by Ben Dooks *
* ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NAND_S3C24XX_H
diff --git a/src/flash/nand/s3c24xx_regs.h b/src/flash/nand/s3c24xx_regs.h
index 46bda6b..3960cb3 100644
--- a/src/flash/nand/s3c24xx_regs.h
+++ b/src/flash/nand/s3c24xx_regs.h
@@ -1,19 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
/***************************************************************************
* Copyright (C) 2004, 2005 by Simtec Electronics *
* linux@simtec.co.uk *
* http://www.simtec.co.uk/products/SWLINUX/ *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; version 2 of the License. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nand/s3c6400.c b/src/flash/nand/s3c6400.c
index 7058133..aebe044 100644
--- a/src/flash/nand/s3c6400.c
+++ b/src/flash/nand/s3c6400.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Peter Korsgaard <jacmet@sunsite.dk> *
* Heavily based on s3c2412.c by Ben Dooks <ben@fluff.org> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nand/tcl.c b/src/flash/nand/tcl.c
index b796fb7..4bb15fa 100644
--- a/src/flash/nand/tcl.c
+++ b/src/flash/nand/tcl.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* *
* Partially based on drivers/mtd/nand_ids.c from Linux. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/Makefile.am b/src/flash/nor/Makefile.am
index a5ef422..f04f0d2 100644
--- a/src/flash/nor/Makefile.am
+++ b/src/flash/nor/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libocdflashnor.la
%C%_libocdflashnor_la_SOURCES = \
%D%/core.c \
@@ -54,6 +56,7 @@ NOR_DRIVERS = \
%D%/psoc6.c \
%D%/renesas_rpchf.c \
%D%/rp2040.c \
+ %D%/rsl10.c \
%D%/sfdp.c \
%D%/sh_qspi.c \
%D%/sim3x.c \
diff --git a/src/flash/nor/aduc702x.c b/src/flash/nor/aduc702x.c
index 492b658..ea7f5e3 100644
--- a/src/flash/nor/aduc702x.c
+++ b/src/flash/nor/aduc702x.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Kevin McGuire *
* Copyright (C) 2008 by Marcel Wijlaars *
* Copyright (C) 2009 by Michael Ashton *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/aducm360.c b/src/flash/nor/aducm360.c
index 4e816fd..ce9bf24 100644
--- a/src/flash/nor/aducm360.c
+++ b/src/flash/nor/aducm360.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Ivan Buliev *
* i.buliev@mikrosistemi.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/***************************************************************************
diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c
index 6eda928..2b458bc 100644
--- a/src/flash/nor/ambiqmicro.c
+++ b/src/flash/nor/ambiqmicro.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
/******************************************************************************
*
* @file ambiqmicro.c
@@ -14,33 +16,6 @@
* Copyright (c) 2015-2016, Ambiq Micro, Inc.
*
* All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
*****************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index cec86fc..fb6d98b 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -1,59 +1,17 @@
-/***************************************************************************
- * Copyright (C) 2009 by Duane Ellis *
- * openocd@duaneellis.com *
- * *
- * Copyright (C) 2010 by Olaf Lüke (at91sam3s* support) *
- * olaf@uni-paderborn.de *
- * *
- * Copyright (C) 2011 by Olivier Schonken (at91sam3x* support) * *
- * and Jim Norris *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
-****************************************************************************/
-
-/* Some of the lower level code was based on code supplied by
- * ATMEL under this copyright. */
-
-/* BEGIN ATMEL COPYRIGHT */
-/* ----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support
- * ----------------------------------------------------------------------------
- * Copyright (c) 2009, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-Source-Code)
+
+/*
+ * Copyright (C) 2009 by Duane Ellis <openocd@duaneellis.com>
*
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
+ * at91sam3s* support
+ * Copyright (C) 2010 by Olaf Lüke <olaf@uni-paderborn.de>
+ * Copyright (C) 2011 by Olivier Schonken and Jim Norris
*
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
+ * Some of the lower level code was based on code supplied by
+ * ATMEL under BSD-Source-Code License and this copyright.
+ * ATMEL Microcontroller Software Support
+ * Copyright (c) 2009, Atmel Corporation. All rights reserved.
*/
-/* END ATMEL COPYRIGHT */
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 4ec2ee8..6b94373 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -1,60 +1,19 @@
-/***************************************************************************
- * Copyright (C) 2009 by Duane Ellis *
- * openocd@duaneellis.com *
- * *
- * Copyright (C) 2010 by Olaf Lüke (at91sam3s* support) *
- * olaf@uni-paderborn.de *
- * *
- * Copyright (C) 2011 by Olivier Schonken, Jim Norris *
- * (at91sam3x* & at91sam4 support)* *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
-****************************************************************************/
-
-/* Some of the lower level code was based on code supplied by
- * ATMEL under this copyright. */
-
-/* BEGIN ATMEL COPYRIGHT */
-/* ----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support
- * ----------------------------------------------------------------------------
- * Copyright (c) 2009, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-Source-Code)
+
+/*
+ * Copyright (C) 2009 by Duane Ellis <openocd@duaneellis.com>
*
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
+ * at91sam3s* support
+ * Copyright (C) 2010 by Olaf Lüke <olaf@uni-paderborn.de>
*
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
+ * at91sam3x* & at91sam4 support
+ * Copyright (C) 2011 by Olivier Schonken, Jim Norris
*
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
+ * Some of the lower level code was based on code supplied by
+ * ATMEL under BSD-Source-Code License and this copyright.
+ * ATMEL Microcontroller Software Support
+ * Copyright (c) 2009, Atmel Corporation. All rights reserved.
*/
-/* END ATMEL COPYRIGHT */
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/flash/nor/at91sam4l.c b/src/flash/nor/at91sam4l.c
index 77dc07f..ddf42a8 100644
--- a/src/flash/nor/at91sam4l.c
+++ b/src/flash/nor/at91sam4l.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Andrey Yurovsky *
* Andrey Yurovsky <yurovsky@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c
index f98d186..8d8cf22 100644
--- a/src/flash/nor/at91sam7.c
+++ b/src/flash/nor/at91sam7.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
* Copyright (C) 2008 by Gheorghe Guran (atlas) *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
****************************************************************************/
/***************************************************************************
@@ -587,8 +576,6 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
t_bank->bank_number = bnk;
t_bank->base = base_address + bnk * bank_size;
t_bank->size = bank_size;
- t_bank->chip_width = 0;
- t_bank->bus_width = 4;
t_bank->num_sectors = sectors_num;
/* allocate sectors */
@@ -702,8 +689,6 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
uint32_t bank_size;
uint32_t ext_freq = 0;
- unsigned int chip_width;
- unsigned int bus_width;
unsigned int banks_num;
unsigned int num_sectors;
@@ -727,9 +712,6 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], base_address);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[3], chip_width);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[4], bus_width);
-
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[8], banks_num);
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[9], num_sectors);
COMMAND_PARSE_NUMBER(u16, CMD_ARGV[10], pages_per_sector);
@@ -743,7 +725,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
at91sam7_info->ext_freq = ext_freq;
}
- if ((bus_width == 0) || (banks_num == 0) || (num_sectors == 0) ||
+ if ((banks_num == 0) || (num_sectors == 0) ||
(pages_per_sector == 0) || (page_size == 0) || (num_nvmbits == 0)) {
at91sam7_info->flash_autodetection = 1;
return ERROR_OK;
@@ -772,8 +754,6 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
t_bank->bank_number = bnk;
t_bank->base = base_address + bnk * bank_size;
t_bank->size = bank_size;
- t_bank->chip_width = chip_width;
- t_bank->bus_width = bus_width;
t_bank->num_sectors = num_sectors;
/* allocate sectors */
diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index 5f314d8..a0252a2 100644
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Andrey Yurovsky *
* Andrey Yurovsky <yurovsky@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c
index 394b6dd..1d1ec02 100644
--- a/src/flash/nor/ath79.c
+++ b/src/flash/nor/ath79.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Tobias Diedrich *
* <ranma+openwrt@tdiedrich.de> *
@@ -5,20 +7,6 @@
* based on the stmsmi code written by Antonio Borneo *
* <borneo.antonio@gmail.com> *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
- * *
***************************************************************************/
/*
* Driver for the Atheros AR7xxx/AR9xxx SPI flash interface.
diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c
index fbf0fb2..fdd610f 100644
--- a/src/flash/nor/atsame5.c
+++ b/src/flash/nor/atsame5.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Tomas Vanek *
* vanekt@fbl.cz *
@@ -5,19 +7,6 @@
* Based on at91samd.c *
* Copyright (C) 2013 by Andrey Yurovsky *
* Andrey Yurovsky <yurovsky@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c
index efc2423..67533fc 100644
--- a/src/flash/nor/atsamv.c
+++ b/src/flash/nor/atsamv.c
@@ -1,63 +1,22 @@
-/***************************************************************************
- * Copyright (C) 2009 by Duane Ellis *
- * openocd@duaneellis.com *
- * *
- * Copyright (C) 2010 by Olaf Lüke (at91sam3s* support) *
- * olaf@uni-paderborn.de *
- * *
- * Copyright (C) 2011 by Olivier Schonken, Jim Norris *
- * (at91sam3x* & at91sam4 support)* *
- * *
- * Copyright (C) 2015 Morgan Quigley *
- * (atsamv, atsams, and atsame support) *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
-
-/* Some of the lower level code was based on code supplied by
- * ATMEL under this copyright. */
-
-/* BEGIN ATMEL COPYRIGHT */
-/* ----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support
- * ----------------------------------------------------------------------------
- * Copyright (c) 2009, Atmel Corporation
- *
- * All rights reserved.
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-Source-Code)
+
+/*
+ * Copyright (C) 2009 by Duane Ellis <openocd@duaneellis.com>
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * at91sam3s* support
+ * Copyright (C) 2010 by Olaf Lüke <olaf@uni-paderborn.de>
*
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
+ * at91sam3x* & at91sam4 support
+ * Copyright (C) 2011 by Olivier Schonken and Jim Norris
*
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
+ * atsamv, atsams, and atsame support
+ * Copyright (C) 2015 Morgan Quigley
*
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
+ * Some of the lower level code was based on code supplied by
+ * ATMEL under BSD-Source-Code License and this copyright.
+ * ATMEL Microcontroller Software Support
+ * Copyright (c) 2009, Atmel Corporation. All rights reserved.
*/
-/* END ATMEL COPYRIGHT */
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c
index 634f739..0e2e263 100644
--- a/src/flash/nor/avrf.c
+++ b/src/flash/nor/avrf.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Simon Qian *
* SimonQian@SimonQian.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index 16075ec..9ced2e9 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Michele Sardo *
* msmttchr@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -247,7 +236,7 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
struct target *target = bank->target;
uint32_t buffer_size = 16384 + 8;
struct working_area *write_algorithm;
- struct working_area *write_algorithm_sp;
+ struct working_area *write_algorithm_stack;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[5];
@@ -296,10 +285,10 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
- /* Stack pointer area */
+ /* Stack area */
if (target_alloc_working_area(target, 128,
- &write_algorithm_sp) != ERROR_OK) {
- LOG_DEBUG("no working area for write code stack pointer");
+ &write_algorithm_stack) != ERROR_OK) {
+ LOG_DEBUG("no working area for target algorithm stack");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@@ -311,8 +300,19 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT);
init_reg_param(&reg_params[4], "sp", 32, PARAM_OUT);
- /* Put the parameter at the first available stack location */
- init_mem_param(&mem_params[0], write_algorithm_sp->address + 80, 32, PARAM_OUT);
+ /* Put the 4th parameter at the location in the stack frame of target write() function.
+ * See contrib/loaders/flash/bluenrg-x/bluenrg-x_write.lst
+ * 34 ldr r6, [sp, #80]
+ * ^^^ offset
+ */
+ init_mem_param(&mem_params[0], write_algorithm_stack->address + 80, 32, PARAM_OUT);
+ /* Stack for target write algorithm - target write() function has
+ * __attribute__((naked)) so it does not setup the new stack frame.
+ * Therefore the stack frame uses the area from SP upwards!
+ * Interrupts are disabled and no subroutines are called from write()
+ * so no need to allocate stack below SP.
+ * TODO: remove __attribute__((naked)) and use similar parameter passing as stm32l4x */
+ buf_set_u32(reg_params[4].value, 0, 32, write_algorithm_stack->address);
/* FIFO start address (first two words used for write and read pointers) */
buf_set_u32(reg_params[0].value, 0, 32, source->address);
@@ -322,14 +322,12 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
buf_set_u32(reg_params[2].value, 0, 32, address);
/* Number of bytes */
buf_set_u32(reg_params[3].value, 0, 32, count);
- /* Stack pointer for program working area */
- buf_set_u32(reg_params[4].value, 0, 32, write_algorithm_sp->address);
/* Flash register base address */
buf_set_u32(mem_params[0].value, 0, 32, bluenrgx_info->flash_ptr->flash_regs_base);
LOG_DEBUG("source->address = " TARGET_ADDR_FMT, source->address);
LOG_DEBUG("source->address+ source->size = " TARGET_ADDR_FMT, source->address+source->size);
- LOG_DEBUG("write_algorithm_sp->address = " TARGET_ADDR_FMT, write_algorithm_sp->address);
+ LOG_DEBUG("write_algorithm_stack->address = " TARGET_ADDR_FMT, write_algorithm_stack->address);
LOG_DEBUG("address = %08" PRIx32, address);
LOG_DEBUG("count = %08" PRIx32, count);
@@ -368,7 +366,7 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
}
target_free_working_area(target, source);
target_free_working_area(target, write_algorithm);
- target_free_working_area(target, write_algorithm_sp);
+ target_free_working_area(target, write_algorithm_stack);
destroy_reg_param(&reg_params[0]);
destroy_reg_param(&reg_params[1]);
diff --git a/src/flash/nor/bluenrg-x.h b/src/flash/nor/bluenrg-x.h
index 3b84b8b..720cb6e 100644
--- a/src/flash/nor/bluenrg-x.h
+++ b/src/flash/nor/bluenrg-x.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by STMicroelectronics. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_BLUENRGX_H
diff --git a/src/flash/nor/cc26xx.c b/src/flash/nor/cc26xx.c
index 7e52649..6256ba6 100644
--- a/src/flash/nor/cc26xx.c
+++ b/src/flash/nor/cc26xx.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -45,6 +34,16 @@ struct cc26xx_bank {
uint32_t params_addr[2];
};
+/* Flash helper algorithm for CC26x0 Chameleon targets */
+static const uint8_t cc26x0_algo[] = {
+#include "../../../contrib/loaders/flash/cc26xx/cc26x0_algo.inc"
+};
+
+/* Flash helper algorithm for CC26x2 Agama targets */
+static const uint8_t cc26x2_algo[] = {
+#include "../../../contrib/loaders/flash/cc26xx/cc26x2_algo.inc"
+};
+
static int cc26xx_auto_probe(struct flash_bank *bank);
static uint32_t cc26xx_device_type(uint32_t icepick_id, uint32_t user_id)
diff --git a/src/flash/nor/cc26xx.h b/src/flash/nor/cc26xx.h
index 51a09f1..83fc940 100644
--- a/src/flash/nor/cc26xx.h
+++ b/src/flash/nor/cc26xx.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2017 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_CC26XX_H
@@ -88,14 +77,4 @@ struct cc26xx_algo_params {
uint8_t status[4];
};
-/* Flash helper algorithm for CC26x0 Chameleon targets */
-const uint8_t cc26x0_algo[] = {
-#include "../../../contrib/loaders/flash/cc26xx/cc26x0_algo.inc"
-};
-
-/* Flash helper algorithm for CC26x2 Agama targets */
-const uint8_t cc26x2_algo[] = {
-#include "../../../contrib/loaders/flash/cc26xx/cc26x2_algo.inc"
-};
-
#endif /* OPENOCD_FLASH_NOR_CC26XX_H */
diff --git a/src/flash/nor/cc3220sf.c b/src/flash/nor/cc3220sf.c
index 723e605..432a393 100644
--- a/src/flash/nor/cc3220sf.c
+++ b/src/flash/nor/cc3220sf.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -33,6 +22,11 @@ struct cc3220sf_bank {
struct armv7m_algorithm armv7m_info;
};
+/* Flash helper algorithm for CC3220SF */
+static const uint8_t cc3220sf_algo[] = {
+#include "../../../contrib/loaders/flash/cc3220sf/cc3220sf.inc"
+};
+
static int cc3220sf_mass_erase(struct flash_bank *bank)
{
struct target *target = bank->target;
diff --git a/src/flash/nor/cc3220sf.h b/src/flash/nor/cc3220sf.h
index 36c17be..eb2a6c6 100644
--- a/src/flash/nor/cc3220sf.h
+++ b/src/flash/nor/cc3220sf.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2017 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_CC3220SF_H
@@ -37,9 +26,4 @@
#define FMC_ERASE_VALUE (FMC_DEFAULT_VALUE | FMC_ERASE_BIT)
#define FMC_MERASE_VALUE (FMC_DEFAULT_VALUE | FMC_MERASE_BIT)
-/* Flash helper algorithm for CC3220SF */
-const uint8_t cc3220sf_algo[] = {
-#include "../../../contrib/loaders/flash/cc3220sf/cc3220sf.inc"
-};
-
#endif /* OPENOCD_FLASH_NOR_CC3220SF_H */
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 8511586..78bc91e 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -5,19 +7,6 @@
* michael@schwingen.org *
* Copyright (C) 2010 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/cfi.h b/src/flash/nor/cfi.h
index f8ca290..ec7f474 100644
--- a/src/flash/nor/cfi.h
+++ b/src/flash/nor/cfi.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_CFI_H
diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c
index f4ff5df..5e6c971 100644
--- a/src/flash/nor/core.c
+++ b/src/flash/nor/core.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007-2010 Øyvind Harboe <oyvind.harboe@zylin.com> *
@@ -5,19 +7,6 @@
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
* Copyright (C) 2017-2018 Tomas Vanek <vanekt@fbl.cz> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/core.h b/src/flash/nor/core.h
index 97a368e..8c26ba0 100644
--- a/src/flash/nor/core.h
+++ b/src/flash/nor/core.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_CORE_H
@@ -31,8 +20,6 @@
struct image;
-#define FLASH_MAX_ERROR_STR (128)
-
/**
* Describes the geometry and status of a single flash sector
* within a flash bank. A single bank typically consists of multiple
diff --git a/src/flash/nor/driver.h b/src/flash/nor/driver.h
index 7a5be65..931f794 100644
--- a/src/flash/nor/driver.h
+++ b/src/flash/nor/driver.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_DRIVER_H
diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c
index 387fc71..bd3363b 100644
--- a/src/flash/nor/drivers.c
+++ b/src/flash/nor/drivers.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -90,6 +79,7 @@ extern const struct flash_driver w600_flash;
extern const struct flash_driver xcf_flash;
extern const struct flash_driver xmc1xxx_flash;
extern const struct flash_driver xmc4xxx_flash;
+extern const struct flash_driver rsl10_flash;
/**
* The list of built-in flash drivers.
@@ -166,6 +156,7 @@ static const struct flash_driver * const flash_drivers[] = {
&xmc1xxx_flash,
&xmc4xxx_flash,
&w600_flash,
+ &rsl10_flash,
NULL,
};
diff --git a/src/flash/nor/dsp5680xx_flash.c b/src/flash/nor/dsp5680xx_flash.c
index 858b669..b1625f1 100644
--- a/src/flash/nor/dsp5680xx_flash.c
+++ b/src/flash/nor/dsp5680xx_flash.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Rodrigo L. Rosa *
* rodrigorosa.LG@gmail.com *
@@ -6,19 +8,6 @@
* Kevin McGuire *
* Marcel Wijlaars *
* Michael Ashton *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c
index 2c5a502..3a49afc 100644
--- a/src/flash/nor/efm32.c
+++ b/src/flash/nor/efm32.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -16,19 +18,6 @@
* *
* Copyright (C) 2021 Doug Brunner *
* doug.a.brunner@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -1086,8 +1075,8 @@ static int efm32x_probe(struct flash_bank *bank)
LOG_INFO("detected part: %s Gecko, rev %d",
efm32_mcu_info->family_data->name, efm32_mcu_info->prod_rev);
- LOG_INFO("flash size = %dkbytes", efm32_mcu_info->flash_sz_kib);
- LOG_INFO("flash page size = %dbytes", efm32_mcu_info->page_size);
+ LOG_INFO("flash size = %d KiB", efm32_mcu_info->flash_sz_kib);
+ LOG_INFO("flash page size = %d B", efm32_mcu_info->page_size);
assert(efm32_mcu_info->page_size != 0);
diff --git a/src/flash/nor/em357.c b/src/flash/nor/em357.c
index 705c1b3..043494c 100644
--- a/src/flash/nor/em357.c
+++ b/src/flash/nor/em357.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
*
* Copyright (C) 2011 by Erik Botö
* erik.boto@pelagicore.com
- *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -720,7 +709,7 @@ static int em357_probe(struct flash_bank *bank)
em357_info->ppage_size = 4;
- LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
+ LOG_INFO("flash size = %d KiB", num_pages*page_size/1024);
free(bank->sectors);
diff --git a/src/flash/nor/esirisc_flash.c b/src/flash/nor/esirisc_flash.c
index 23fd01e..938d0f6 100644
--- a/src/flash/nor/esirisc_flash.c
+++ b/src/flash/nor/esirisc_flash.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
* James Zhao <hjz@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/faux.c b/src/flash/nor/faux.c
index 7646e4b..e76dc49 100644
--- a/src/flash/nor/faux.c
+++ b/src/flash/nor/faux.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c
index 5474ffa..9191764 100644
--- a/src/flash/nor/fespi.c
+++ b/src/flash/nor/fespi.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
* Modified by Megan Wachs <megan@sifive.com> from the original stmsmi.c *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* The Freedom E SPI controller is a SPI bus controller
@@ -523,6 +512,12 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
}
}
+ struct riscv_info *riscv = riscv_info(target);
+ if (!is_riscv(riscv)) {
+ LOG_ERROR("Unexpected target type");
+ return ERROR_FAIL;
+ }
+
unsigned int xlen = riscv_xlen(target);
struct working_area *algorithm_wa = NULL;
struct working_area *data_wa = NULL;
diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c
index 831f342..48f4493 100644
--- a/src/flash/nor/fm3.c
+++ b/src/flash/nor/fm3.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Marc Willam, Holger Wech *
* openOCD.fseu(AT)de.fujitsu.com *
@@ -5,19 +7,6 @@
* *
* Copyright (C) 2013 Nemui Trinomius *
* nemuisan_kawausogasuki@live.jp *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/fm4.c b/src/flash/nor/fm4.c
index 09865d2..979ae84 100644
--- a/src/flash/nor/fm4.c
+++ b/src/flash/nor/fm4.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Spansion FM4 flash
*
@@ -686,24 +688,8 @@ FLASH_BANK_COMMAND_HANDLER(fm4_flash_bank_command)
return ret;
}
-static const struct command_registration fm4_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration fm4_command_handlers[] = {
- {
- .name = "fm4",
- .mode = COMMAND_ANY,
- .help = "fm4 flash command group",
- .usage = "",
- .chain = fm4_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
const struct flash_driver fm4_flash = {
.name = "fm4",
- .commands = fm4_command_handlers,
.flash_bank_command = fm4_flash_bank_command,
.info = fm4_get_info_command,
.probe = fm4_probe,
diff --git a/src/flash/nor/imp.h b/src/flash/nor/imp.h
index f66cf03..199d670 100644
--- a/src/flash/nor/imp.h
+++ b/src/flash/nor/imp.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_IMP_H
diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c
index a5672c6..c176ca8 100644
--- a/src/flash/nor/jtagspi.c
+++ b/src/flash/nor/jtagspi.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 Robert Jordens <jordens@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c
index edb4eb5..7137b4a 100644
--- a/src/flash/nor/kinetis.c
+++ b/src/flash/nor/kinetis.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* kesmtp@freenet.de *
@@ -13,19 +15,6 @@
* *
* Copyright (C) 2015 Tomas Vanek *
* vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -108,6 +97,8 @@
#define SMC_PMSTAT 0x4007E003
#define SMC32_PMCTRL 0x4007E00C
#define SMC32_PMSTAT 0x4007E014
+#define PMC_REGSC 0x4007D002
+#define MC_PMCTRL 0x4007E003
#define MCM_PLACR 0xF000300C
/* Offsets */
@@ -199,6 +190,9 @@
#define KINETIS_K_SDID_K60_M150 0x000001C0
#define KINETIS_K_SDID_K70_M150 0x000001D0
+#define KINETIS_K_REVID_MASK 0x0000F000
+#define KINETIS_K_REVID_SHIFT 12
+
#define KINETIS_SDID_SERIESID_MASK 0x00F00000
#define KINETIS_SDID_SERIESID_K 0x00000000
#define KINETIS_SDID_SERIESID_KL 0x00100000
@@ -309,6 +303,7 @@ struct kinetis_chip {
enum {
KINETIS_SMC,
KINETIS_SMC32,
+ KINETIS_MC,
} sysmodectrlr_type;
char name[40];
@@ -402,16 +397,23 @@ static int kinetis_auto_probe(struct flash_bank *bank);
static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
{
- int retval;
LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
- retval = dap_queue_ap_write(dap_ap(dap, MDM_AP), reg, value);
+ struct adiv5_ap *ap = dap_get_ap(dap, MDM_AP);
+ if (!ap) {
+ LOG_DEBUG("MDM: failed to get AP");
+ return ERROR_FAIL;
+ }
+
+ int retval = dap_queue_ap_write(ap, reg, value);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: failed to queue a write request");
+ dap_put_ap(ap);
return retval;
}
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: dap_run failed");
return retval;
@@ -423,15 +425,21 @@ static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint3
static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
{
- int retval;
+ struct adiv5_ap *ap = dap_get_ap(dap, MDM_AP);
+ if (!ap) {
+ LOG_DEBUG("MDM: failed to get AP");
+ return ERROR_FAIL;
+ }
- retval = dap_queue_ap_read(dap_ap(dap, MDM_AP), reg, result);
+ int retval = dap_queue_ap_read(ap, reg, result);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: failed to queue a read request");
+ dap_put_ap(ap);
return retval;
}
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: dap_run failed");
return retval;
@@ -787,12 +795,18 @@ COMMAND_HANDLER(kinetis_check_flash_security_status)
if ((val & (MDM_STAT_SYSSEC | MDM_STAT_FREADY)) != MDM_STAT_FREADY) {
uint32_t stats[32];
+ struct adiv5_ap *ap = dap_get_ap(dap, MDM_AP);
+ if (!ap) {
+ LOG_ERROR("MDM: failed to get AP");
+ return ERROR_OK;
+ }
for (unsigned int i = 0; i < 32; i++) {
stats[i] = MDM_STAT_FREADY;
- dap_queue_ap_read(dap_ap(dap, MDM_AP), MDM_REG_STAT, &stats[i]);
+ dap_queue_ap_read(ap, MDM_REG_STAT, &stats[i]);
}
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: dap_run failed when validating secured state");
return ERROR_OK;
@@ -934,7 +948,7 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
unsigned num_blocks;
struct kinetis_flash_bank *k_bank;
struct flash_bank *bank;
- char base_name[69], name[80], num[4];
+ char base_name[69], name[87], num[11];
char *class, *p;
num_blocks = k_chip->num_pflash_blocks + k_chip->num_nvm_blocks;
@@ -1529,6 +1543,17 @@ static int kinetis_read_pmstat(struct kinetis_chip *k_chip, uint8_t *pmstat)
if (result == ERROR_OK)
*pmstat = stat32 & 0xff;
return result;
+
+ case KINETIS_MC:
+ /* emulate SMC by reading PMC_REGSC bit 3 (VLPRS) */
+ result = target_read_u8(target, PMC_REGSC, pmstat);
+ if (result == ERROR_OK) {
+ if (*pmstat & 0x08)
+ *pmstat = PM_STAT_VLPR;
+ else
+ *pmstat = PM_STAT_RUN;
+ }
+ return result;
}
return ERROR_FAIL;
}
@@ -1569,6 +1594,10 @@ static int kinetis_check_run_mode(struct kinetis_chip *k_chip)
case KINETIS_SMC32:
result = target_write_u32(target, SMC32_PMCTRL, PM_CTRL_RUNM_RUN);
break;
+
+ case KINETIS_MC:
+ result = target_write_u32(target, MC_PMCTRL, PM_CTRL_RUNM_RUN);
+ break;
}
if (result != ERROR_OK)
return result;
@@ -2135,6 +2164,24 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip)
}
}
+ /* first revision of some devices has no SMC */
+ switch (mcu_type) {
+ case KINETIS_K_SDID_K10_M100:
+ case KINETIS_K_SDID_K20_M100:
+ case KINETIS_K_SDID_K30_M100:
+ case KINETIS_K_SDID_K40_M100:
+ case KINETIS_K_SDID_K60_M100:
+ {
+ uint32_t revid = (k_chip->sim_sdid & KINETIS_K_REVID_MASK) >> KINETIS_K_REVID_SHIFT;
+ /* highest bit set corresponds to rev 2.x */
+ if (revid <= 7) {
+ k_chip->sysmodectrlr_type = KINETIS_MC;
+ strcat(name, " Rev 1.x");
+ }
+ }
+ break;
+ }
+
} else {
/* Newer K-series or KL series MCU */
familyid = (k_chip->sim_sdid & KINETIS_SDID_FAMILYID_MASK) >> KINETIS_SDID_FAMILYID_SHIFT;
@@ -2615,12 +2662,12 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip)
snprintf(k_chip->name, sizeof(k_chip->name), name, flash_marking);
LOG_INFO("Kinetis %s detected: %u flash blocks", k_chip->name, num_blocks);
- LOG_INFO("%u PFlash banks: %" PRIu32 "k total", k_chip->num_pflash_blocks, pflash_size_k);
+ LOG_INFO("%u PFlash banks: %" PRIu32 " KiB total", k_chip->num_pflash_blocks, pflash_size_k);
if (k_chip->num_nvm_blocks) {
nvm_size_k = k_chip->nvm_size / 1024;
dflash_size_k = k_chip->dflash_size / 1024;
- LOG_INFO("%u FlexNVM banks: %" PRIu32 "k total, %" PRIu32 "k available as data flash, %" PRIu32 "bytes FlexRAM",
- k_chip->num_nvm_blocks, nvm_size_k, dflash_size_k, ee_size);
+ LOG_INFO("%u FlexNVM banks: %" PRIu32 " KiB total, %" PRIu32 " KiB available as data flash, %"
+ PRIu32 " bytes FlexRAM", k_chip->num_nvm_blocks, nvm_size_k, dflash_size_k, ee_size);
}
k_chip->probed = true;
diff --git a/src/flash/nor/kinetis_ke.c b/src/flash/nor/kinetis_ke.c
index 48749e6..c069f3a 100644
--- a/src/flash/nor/kinetis_ke.c
+++ b/src/flash/nor/kinetis_ke.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Ivan Meleca *
* ivan@artekit.eu *
@@ -18,19 +20,6 @@
* *
* Copyright (C) 2015 Tomas Vanek *
* vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -147,16 +136,23 @@ struct kinetis_ke_flash_bank {
static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
{
- int retval;
LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
- retval = dap_queue_ap_write(dap_ap(dap, 1), reg, value);
+ struct adiv5_ap *ap = dap_get_ap(dap, 1);
+ if (!ap) {
+ LOG_DEBUG("MDM: failed to get AP");
+ return ERROR_FAIL;
+ }
+
+ int retval = dap_queue_ap_write(ap, reg, value);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: failed to queue a write request");
+ dap_put_ap(ap);
return retval;
}
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: dap_run failed");
return retval;
@@ -167,14 +163,21 @@ static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, ui
static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
{
- int retval;
- retval = dap_queue_ap_read(dap_ap(dap, 1), reg, result);
+ struct adiv5_ap *ap = dap_get_ap(dap, 1);
+ if (!ap) {
+ LOG_DEBUG("MDM: failed to get AP");
+ return ERROR_FAIL;
+ }
+
+ int retval = dap_queue_ap_read(ap, reg, result);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: failed to queue a read request");
+ dap_put_ap(ap);
return retval;
}
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: dap_run failed");
return retval;
diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c
index 465199d..f12eef7 100644
--- a/src/flash/nor/lpc2000.c
+++ b/src/flash/nor/lpc2000.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -14,19 +16,6 @@
* *
* LPC8N04/HNS31xx support Copyright (C) 2018 *
* by Jean-Christian de Rivaz jcdr [at] innodelec [dot] ch *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/lpc288x.c b/src/flash/nor/lpc288x.c
index 1c10e50..3006db1 100644
--- a/src/flash/nor/lpc288x.c
+++ b/src/flash/nor/lpc288x.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by *
* Karl RobinSod <karl.robinsod@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/***************************************************************************
diff --git a/src/flash/nor/lpc2900.c b/src/flash/nor/lpc2900.c
index 4bf5297..c30fa76 100644
--- a/src/flash/nor/lpc2900.c
+++ b/src/flash/nor/lpc2900.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by *
* Rolf Meeser <rolfm_9dq@yahoo.de> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c
index 160e2dc..f950f21 100644
--- a/src/flash/nor/lpcspifi.c
+++ b/src/flash/nor/lpcspifi.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index e7a690d..51d6ae2 100644
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016 by Maxim Integrated *
* Kevin Gillespie <kevin.gillespie@maximintegrated.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/mdr.c b/src/flash/nor/mdr.c
index f3c8552..f6285de 100644
--- a/src/flash/nor/mdr.c
+++ b/src/flash/nor/mdr.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2013 by Paul Fertser *
* fercerpav@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/mrvlqspi.c b/src/flash/nor/mrvlqspi.c
index a752f09..4eb6522 100644
--- a/src/flash/nor/mrvlqspi.c
+++ b/src/flash/nor/mrvlqspi.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2014 by Mahavir Jain <mjain@marvell.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c
index 61741c8..d9b9695 100644
--- a/src/flash/nor/msp432.c
+++ b/src/flash/nor/msp432.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -56,6 +45,21 @@ struct msp432_bank {
struct armv7m_algorithm armv7m_info;
};
+/* Flash helper algorithm for MSP432P401x targets */
+static const uint8_t msp432p401x_algo[] = {
+#include "../../../contrib/loaders/flash/msp432/msp432p401x_algo.inc"
+};
+
+/* Flash helper algorithm for MSP432P411x targets */
+static const uint8_t msp432p411x_algo[] = {
+#include "../../../contrib/loaders/flash/msp432/msp432p411x_algo.inc"
+};
+
+/* Flash helper algorithm for MSP432E4x targets */
+static const uint8_t msp432e4x_algo[] = {
+#include "../../../contrib/loaders/flash/msp432/msp432e4x_algo.inc"
+};
+
static int msp432_auto_probe(struct flash_bank *bank);
static int msp432_device_type(uint32_t family_type, uint32_t device_id,
diff --git a/src/flash/nor/msp432.h b/src/flash/nor/msp432.h
index af1d40c..d0a62c4 100644
--- a/src/flash/nor/msp432.h
+++ b/src/flash/nor/msp432.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_MSP432_H
@@ -112,19 +101,4 @@ struct msp432_algo_params {
uint8_t unlock_bsl[4];
};
-/* Flash helper algorithm for MSP432P401x targets */
-const uint8_t msp432p401x_algo[] = {
-#include "../../../contrib/loaders/flash/msp432/msp432p401x_algo.inc"
-};
-
-/* Flash helper algorithm for MSP432P411x targets */
-const uint8_t msp432p411x_algo[] = {
-#include "../../../contrib/loaders/flash/msp432/msp432p411x_algo.inc"
-};
-
-/* Flash helper algorithm for MSP432E4x targets */
-const uint8_t msp432e4x_algo[] = {
-#include "../../../contrib/loaders/flash/msp432/msp432e4x_algo.inc"
-};
-
#endif /* OPENOCD_FLASH_NOR_MSP432_H */
diff --git a/src/flash/nor/niietcm4.c b/src/flash/nor/niietcm4.c
index 6f9a5d3..0c36e2c 100644
--- a/src/flash/nor/niietcm4.c
+++ b/src/flash/nor/niietcm4.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Bogdan Kolbov *
* kolbov@niiet.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/non_cfi.c b/src/flash/nor/non_cfi.c
index 1566f38..f096ba6 100644
--- a/src/flash/nor/non_cfi.c
+++ b/src/flash/nor/non_cfi.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2009 Michael Schwingen *
* michael@schwingen.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/non_cfi.h b/src/flash/nor/non_cfi.h
index c411cb8..47d7e59 100644
--- a/src/flash/nor/non_cfi.h
+++ b/src/flash/nor/non_cfi.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_NON_CFI_H
diff --git a/src/flash/nor/npcx.c b/src/flash/nor/npcx.c
index a4d6395..bc84753 100644
--- a/src/flash/nor/npcx.c
+++ b/src/flash/nor/npcx.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 by Nuvoton Technology Corporation
@@ -17,7 +17,7 @@
#include "../../../contrib/loaders/flash/npcx/npcx_flash.h"
/* NPCX flash loader */
-const uint8_t npcx_algo[] = {
+static const uint8_t npcx_algo[] = {
#include "../../../contrib/loaders/flash/npcx/npcx_algo.inc"
};
diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index c964155..d5de4a4 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Synapse Product Development *
* Andrey Smirnov <andrew.smironv@gmail.com> *
* Angus Gratton <gus@projectgus.com> *
* Erdem U. Altunyurt <spamjunkeater@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -147,7 +136,7 @@ struct nrf5_device_spec {
};
struct nrf5_info {
- uint32_t refcount;
+ unsigned int refcount;
struct nrf5_bank {
struct nrf5_info *chip;
diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c
index 3487508..1a73eb2 100644
--- a/src/flash/nor/numicro.c
+++ b/src/flash/nor/numicro.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by James K. Larson *
* jlarson@pacifier.com *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2015 Nemui Trinomius *
* nemuisan_kawausogasuki@live.jp *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/ocl.c b/src/flash/nor/ocl.c
index 813537d..e00c365 100644
--- a/src/flash/nor/ocl.c
+++ b/src/flash/nor/ocl.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/ocl.h b/src/flash/nor/ocl.h
index b1fe308..4c86495 100644
--- a/src/flash/nor/ocl.h
+++ b/src/flash/nor/ocl.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_OCL_H
diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index 31433e0..9a1a634 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by John McCarthy *
* jgmcc@magma.ca *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -770,7 +759,7 @@ static int pic32mx_probe(struct flash_bank *bank)
}
}
- LOG_INFO("flash size = %" PRIu32 "kbytes", num_pages / 1024);
+ LOG_INFO("flash size = %" PRIu32 " KiB", num_pages / 1024);
free(bank->sectors);
diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c
index 0a2702a..c935bd5 100644
--- a/src/flash/nor/psoc4.c
+++ b/src/flash/nor/psoc4.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2014 by Tomas Vanek (PSoC 4 support derived from STM32) *
* vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -662,8 +651,8 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
if (row_offset)
memset(row_buffer, bank->default_padded_value, row_offset);
- bool save_poll = jtag_poll_get_enabled();
- jtag_poll_set_enabled(false);
+ /* Mask automatic polling triggered by execution of halted events */
+ bool save_poll_mask = jtag_poll_mask();
while (count) {
uint32_t chunk_size = psoc4_info->row_size - row_offset;
@@ -704,7 +693,7 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
}
cleanup:
- jtag_poll_set_enabled(save_poll);
+ jtag_poll_unmask(save_poll_mask);
free(sysrq_buffer);
return retval;
@@ -785,7 +774,7 @@ static int psoc4_probe(struct flash_bank *bank)
num_macros++;
}
- LOG_DEBUG("SPCIF geometry: %" PRIu32 " kb flash, row %" PRIu32 " bytes.",
+ LOG_DEBUG("SPCIF geometry: %" PRIu32 " KiB flash, row %" PRIu32 " bytes.",
flash_size_in_kb, row_size);
/* if the user sets the size manually then ignore the probed value
@@ -799,7 +788,7 @@ static int psoc4_probe(struct flash_bank *bank)
if (num_macros > 1)
snprintf(macros_txt, sizeof(macros_txt), " in %" PRIu32 " macros", num_macros);
- LOG_INFO("flash size = %" PRIu32 " kbytes%s", flash_size_in_kb, macros_txt);
+ LOG_INFO("flash size = %" PRIu32 " KiB%s", flash_size_in_kb, macros_txt);
/* calculate number of pages */
uint32_t num_rows = flash_size_in_kb * 1024 / row_size;
diff --git a/src/flash/nor/psoc5lp.c b/src/flash/nor/psoc5lp.c
index f383213..407efbc 100644
--- a/src/flash/nor/psoc5lp.c
+++ b/src/flash/nor/psoc5lp.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* PSoC 5LP flash driver
*
* Copyright (c) 2016 Andreas Färber
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
@@ -822,24 +811,8 @@ FLASH_BANK_COMMAND_HANDLER(psoc5lp_nvl_flash_bank_command)
return ERROR_OK;
}
-static const struct command_registration psoc5lp_nvl_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration psoc5lp_nvl_command_handlers[] = {
- {
- .name = "psoc5lp_nvl",
- .mode = COMMAND_ANY,
- .help = "PSoC 5LP NV Latch command group",
- .usage = "",
- .chain = psoc5lp_nvl_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
const struct flash_driver psoc5lp_nvl_flash = {
.name = "psoc5lp_nvl",
- .commands = psoc5lp_nvl_command_handlers,
.flash_bank_command = psoc5lp_nvl_flash_bank_command,
.info = psoc5lp_nvl_get_info_command,
.probe = psoc5lp_nvl_probe,
@@ -1021,24 +994,8 @@ FLASH_BANK_COMMAND_HANDLER(psoc5lp_eeprom_flash_bank_command)
return ERROR_OK;
}
-static const struct command_registration psoc5lp_eeprom_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration psoc5lp_eeprom_command_handlers[] = {
- {
- .name = "psoc5lp_eeprom",
- .mode = COMMAND_ANY,
- .help = "PSoC 5LP EEPROM command group",
- .usage = "",
- .chain = psoc5lp_eeprom_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
const struct flash_driver psoc5lp_eeprom_flash = {
.name = "psoc5lp_eeprom",
- .commands = psoc5lp_eeprom_command_handlers,
.flash_bank_command = psoc5lp_eeprom_flash_bank_command,
.info = psoc5lp_eeprom_get_info_command,
.probe = psoc5lp_eeprom_probe,
diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index c6166af..b7ba102 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* *
* Copyright (C) 2018 by Bohdan Tymkiv *
* bohdan.tymkiv@cypress.com bohdan200@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -602,8 +591,7 @@ static int psoc6_probe(struct flash_bank *bank)
unsigned int num_sectors = bank_size / row_sz;
bank->size = bank_size;
- bank->chip_width = 4;
- bank->bus_width = 4;
+
bank->erased_value = 0;
bank->default_padded_value = 0;
diff --git a/src/flash/nor/renesas_rpchf.c b/src/flash/nor/renesas_rpchf.c
index f99749f..6c51b8f 100644
--- a/src/flash/nor/renesas_rpchf.c
+++ b/src/flash/nor/renesas_rpchf.c
@@ -1,4 +1,5 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Renesas RCar Gen3 RPC Hyperflash driver
* Based on U-Boot RPC Hyperflash driver
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index fb34172..667498c 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/flash/nor/rsl10.c b/src/flash/nor/rsl10.c
new file mode 100644
index 0000000..d92c4b8
--- /dev/null
+++ b/src/flash/nor/rsl10.c
@@ -0,0 +1,843 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * Copyright (C) 2022 by Toms Stūrmanis *
+ * toms.sturmanis@gmail.com *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdint.h>
+
+#include <helper/binarybuffer.h>
+#include <helper/bits.h>
+
+#include <target/algorithm.h>
+#include <target/arm_adi_v5.h>
+#include <target/armv7m.h>
+#include <target/cortex_m.h>
+
+#include "imp.h"
+
+#define RSL10_FLASH_ADDRESS_MAIN 0x00100000
+#define RSL10_FLASH_ADDRESS_NVR1 0x00080000
+#define RSL10_FLASH_ADDRESS_NVR2 0x00080800
+#define RSL10_FLASH_ADDRESS_NVR3 0x00081000
+#define RSL10_FLASH_ADDRESS_NVR4 0x00081800
+#define RSL10_FLASH_ADDRESS_LOCK_INFO_SETTING 0x00081040
+
+#define RSL10_REG_ID 0x1FFFFFFC
+
+#define RSL10_FLASH_REG_MAIN_WRITE_UNLOCK 0x40000504
+#define RSL10_FLASH_REG_MAIN_CTRL 0x40000508
+#define RSL10_FLASH_REG_IF_STATUS 0x40000538
+#define RSL10_FLASH_REG_NVR_WRITE_UNLOCK 0x40000548
+#define RSL10_FLASH_REG_NVR_CTRL 0x4000054C
+
+#define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY1 0x400000F0
+#define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY2 0x400000F4
+#define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY3 0x400000F8
+#define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY4 0x400000FC
+
+#define RSL10_NVR3_USER_KEY_OFFSET 0x40
+
+#define RSL10_ID 0x09010106
+#define RSL10_FLASH_KEY_MAIN 0xDBC8264E
+#define RSL10_FLASH_KEY_NVR 0x71B371F5
+#define RSL10_KEY_DEBUG_LOCK 0x4C6F634B
+
+#define RSL10_FLASH_REG_MAIN_CTRL_LOW_W_ENABLE BIT(0)
+#define RSL10_FLASH_REG_MAIN_CTRL_MIDDLE_W_ENABLE BIT(1)
+#define RSL10_FLASH_REG_MAIN_CTRL_HIGH_W_ENABLE BIT(2)
+
+#define RSL10_FLASH_REG_NVR_CTRL_NVR1_W_ENABLE BIT(1)
+#define RSL10_FLASH_REG_NVR_CTRL_NVR2_W_ENABLE BIT(2)
+#define RSL10_FLASH_REG_NVR_CTRL_NVR3_W_ENABLE BIT(3)
+
+#define RSL10_FLASH_REG_STATUS_LOW_W_UNLOCKED BIT(0)
+#define RSL10_FLASH_REG_STATUS_MIDDLE_W_UNLOCKED BIT(1)
+#define RSL10_FLASH_REG_STATUS_HIGH_W_UNLOCKED BIT(2)
+#define RSL10_FLASH_REG_STATUS_NVR1_W_UNLOCKED BIT(4)
+#define RSL10_FLASH_REG_STATUS_NVR2_W_UNLOCKED BIT(5)
+#define RSL10_FLASH_REG_STATUS_NVR3_W_UNLOCKED BIT(6)
+
+#define RSL10_ROM_CMD_WRITE_WORD_PAIR 0x3C
+#define RSL10_ROM_CMD_WRITE_BUFFER 0x40
+#define RSL10_ROM_CMD_ERASE_SECTOR 0x44
+#define RSL10_ROM_CMD_ERASE_ALL 0x48
+
+#define FLASH_SECTOR_SIZE 0x2000
+
+#define RSL10_ROM_CMD_WRITE_BUFFER_MAX_SIZE FLASH_SECTOR_SIZE
+
+#define ALGO_STACK_POINTER_ADDR 0x20002000
+
+/* Used to launch flash related functions from ROM
+ * Params :
+ * r0-r2 = arguments
+ * r3 = target address in rom
+ */
+static const uint8_t rsl10_rom_launcher_code[] = {
+#include "../../../contrib/loaders/flash/rsl10/rom_launcher.inc"
+};
+
+enum rsl10_flash_status {
+ RSL10_FLASH_ERR_NONE = 0x0,
+ RSL10_FLASH_ERR_GENERAL_FAILURE = 0x1,
+ RSL10_FLASH_ERR_WRITE_NOT_ENABLED = 0x2,
+ RSL10_FLASH_ERR_BAD_ADDRESS = 0x3,
+ RSL10_FLASH_ERR_ERASE_FAILED = 0x4,
+ RSL10_FLASH_ERR_BAD_LENGTH = 0x5,
+ RSL10_FLASH_ERR_INACCESSIBLE = 0x6,
+ RSL10_FLASH_ERR_COPIER_BUSY = 0x7,
+ RSL10_FLASH_ERR_PROG_FAILED = 0x8,
+ RSL10_FLASH_MAX_ERR_CODES /* must be the last one */
+};
+
+static const char *const rsl10_error_list[] = {
+ [RSL10_FLASH_ERR_GENERAL_FAILURE] = "general failure",
+ [RSL10_FLASH_ERR_WRITE_NOT_ENABLED] = "write not enabled, protected",
+ [RSL10_FLASH_ERR_BAD_ADDRESS] = "bad address",
+ [RSL10_FLASH_ERR_ERASE_FAILED] = "erase failed",
+ [RSL10_FLASH_ERR_BAD_LENGTH] = "bad length",
+ [RSL10_FLASH_ERR_INACCESSIBLE] = "inaccessible: not powered up, or isolated",
+ [RSL10_FLASH_ERR_COPIER_BUSY] = "copier busy",
+ [RSL10_FLASH_ERR_PROG_FAILED] = "prog failed",
+};
+
+const char *rsl10_error(enum rsl10_flash_status x)
+{
+ if (x >= RSL10_FLASH_MAX_ERR_CODES || !rsl10_error_list[x])
+ return "unknown";
+ return rsl10_error_list[x];
+}
+
+const struct flash_driver rsl10_flash;
+
+struct rsl10_info {
+ unsigned int refcount;
+
+ struct rsl10_bank {
+ struct rsl10_info *chip;
+ bool probed;
+ } bank[5];
+ struct target *target;
+
+ unsigned int flash_size_kb;
+};
+
+static bool rsl10_bank_is_probed(const struct flash_bank *bank)
+{
+ struct rsl10_bank *nbank = bank->driver_priv;
+ assert(nbank);
+ return nbank->probed;
+}
+
+static int rsl10_probe(struct flash_bank *bank);
+
+static int rsl10_get_probed_chip_if_halted(struct flash_bank *bank, struct rsl10_info **chip)
+{
+ if (bank->target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ struct rsl10_bank *nbank = bank->driver_priv;
+ *chip = nbank->chip;
+
+ if (rsl10_bank_is_probed(bank))
+ return ERROR_OK;
+
+ return rsl10_probe(bank);
+}
+
+static int rsl10_protect_check(struct flash_bank *bank)
+{
+ struct rsl10_bank *nbank = bank->driver_priv;
+ struct rsl10_info *chip = nbank->chip;
+
+ assert(chip);
+
+ uint32_t status;
+
+ int retval = target_read_u32(bank->target, RSL10_FLASH_REG_IF_STATUS, &status);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (bank->base == RSL10_FLASH_ADDRESS_MAIN) {
+ for (unsigned int i = 0; i < bank->num_prot_blocks; i++)
+ bank->prot_blocks[i].is_protected = (status & (1 << i)) ? 0 : 1;
+
+ } else {
+ uint32_t test_bit = 0;
+ switch (bank->base) {
+ case RSL10_FLASH_ADDRESS_NVR1:
+ test_bit = RSL10_FLASH_REG_STATUS_NVR1_W_UNLOCKED;
+ break;
+ case RSL10_FLASH_ADDRESS_NVR2:
+ test_bit = RSL10_FLASH_REG_STATUS_NVR2_W_UNLOCKED;
+ break;
+ case RSL10_FLASH_ADDRESS_NVR3:
+ test_bit = RSL10_FLASH_REG_STATUS_NVR3_W_UNLOCKED;
+ break;
+ default:
+ break;
+ }
+
+ bank->sectors[0].is_protected = (status & test_bit) ? 0 : 1;
+ }
+ return ERROR_OK;
+}
+
+static int rsl10_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
+{
+
+ struct rsl10_info *chip;
+ int retval = rsl10_get_probed_chip_if_halted(bank, &chip);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (bank->base == RSL10_FLASH_ADDRESS_MAIN) {
+ uint32_t status;
+ retval = target_read_u32(bank->target, RSL10_FLASH_REG_MAIN_CTRL, &status);
+ if (retval != ERROR_OK)
+ return retval;
+
+ for (unsigned int i = first; i <= last; i++) {
+ if (set)
+ status &= ~(1 << i);
+ else
+ status |= (1 << i);
+ }
+
+ retval = target_write_u32(bank->target, RSL10_FLASH_REG_MAIN_CTRL, status);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = target_write_u32(bank->target, RSL10_FLASH_REG_MAIN_WRITE_UNLOCK, RSL10_FLASH_KEY_MAIN);
+ if (retval != ERROR_OK)
+ return retval;
+ } else {
+ uint32_t bit = 0;
+ switch (bank->base) {
+ case RSL10_FLASH_ADDRESS_NVR1:
+ bit = RSL10_FLASH_REG_NVR_CTRL_NVR1_W_ENABLE;
+ break;
+ case RSL10_FLASH_ADDRESS_NVR2:
+ bit = RSL10_FLASH_REG_NVR_CTRL_NVR2_W_ENABLE;
+ break;
+ case RSL10_FLASH_ADDRESS_NVR3:
+ bit = RSL10_FLASH_REG_NVR_CTRL_NVR3_W_ENABLE;
+ break;
+ default:
+ break;
+ }
+
+ uint32_t status;
+ retval = target_read_u32(bank->target, RSL10_FLASH_REG_NVR_CTRL, &status);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (set)
+ status &= ~bit;
+ else
+ status |= bit;
+
+ retval = target_write_u32(bank->target, RSL10_FLASH_REG_NVR_CTRL, status);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = target_write_u32(bank->target, RSL10_FLASH_REG_NVR_WRITE_UNLOCK, RSL10_FLASH_KEY_NVR);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
+ return ERROR_OK;
+}
+
+static int rsl10_check_device(struct flash_bank *bank)
+{
+ uint32_t configid;
+ int retval = target_read_u32(bank->target, RSL10_REG_ID, &configid);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (configid != RSL10_ID) {
+ LOG_ERROR("This is not supported (RSL10) device, use other flash driver!!!");
+ return ERROR_TARGET_INVALID;
+ }
+ return ERROR_OK;
+}
+
+static int rsl10_probe(struct flash_bank *bank)
+{
+ struct rsl10_bank *nbank = bank->driver_priv;
+ struct rsl10_info *chip = nbank->chip;
+
+ int retval = rsl10_check_device(bank);
+ if (retval != ERROR_OK)
+ return retval;
+
+ unsigned int bank_id;
+ unsigned int num_prot_blocks = 0;
+ switch (bank->base) {
+ case RSL10_FLASH_ADDRESS_MAIN:
+ bank_id = 0;
+ num_prot_blocks = 3;
+ break;
+ case RSL10_FLASH_ADDRESS_NVR1:
+ bank_id = 1;
+ break;
+ case RSL10_FLASH_ADDRESS_NVR2:
+ bank_id = 2;
+ break;
+ case RSL10_FLASH_ADDRESS_NVR3:
+ bank_id = 3;
+ break;
+ default:
+ return ERROR_FAIL;
+ }
+
+ uint32_t flash_page_size = 2048;
+
+ bank->write_start_alignment = 8;
+ bank->write_end_alignment = 8;
+
+ bank->num_sectors = bank->size / flash_page_size;
+ chip->flash_size_kb = bank->size / 1024;
+
+ free(bank->sectors);
+ bank->sectors = NULL;
+
+ bank->sectors = alloc_block_array(0, flash_page_size, bank->num_sectors);
+ if (!bank->sectors)
+ return ERROR_FAIL;
+
+ free(bank->prot_blocks);
+ bank->prot_blocks = NULL;
+
+ if (num_prot_blocks > 0) {
+ bank->num_prot_blocks = num_prot_blocks;
+ bank->prot_blocks = alloc_block_array(0, bank->num_sectors / 3 * flash_page_size, bank->num_prot_blocks);
+ if (!bank->prot_blocks)
+ return ERROR_FAIL;
+ }
+
+ chip->bank[bank_id].probed = true;
+ return ERROR_OK;
+}
+
+static int rsl10_auto_probe(struct flash_bank *bank)
+{
+ if (rsl10_bank_is_probed(bank))
+ return ERROR_OK;
+
+ return rsl10_probe(bank);
+}
+
+static int rsl10_ll_flash_erase(struct rsl10_info *chip, uint32_t address)
+{
+ struct target *target = chip->target;
+ struct working_area *write_algorithm;
+
+ LOG_DEBUG("erasing buffer flash address=0x%" PRIx32, address);
+
+ int retval = target_alloc_working_area(target, sizeof(rsl10_rom_launcher_code), &write_algorithm);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
+ return ERROR_FAIL;
+ }
+
+ retval =
+ target_write_buffer(target, write_algorithm->address, sizeof(rsl10_rom_launcher_code), rsl10_rom_launcher_code);
+ if (retval != ERROR_OK)
+ goto free_algorithm;
+
+ struct reg_param reg_params[3];
+ struct armv7m_algorithm armv7m_info;
+ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
+
+ init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* address */
+ init_reg_param(&reg_params[1], "r3", 32, PARAM_OUT); /* cmd */
+ init_reg_param(&reg_params[2], "sp", 32, PARAM_OUT); /* stack pointer */
+
+ buf_set_u32(reg_params[0].value, 0, 32, address);
+ uint32_t cmd;
+ retval = target_read_u32(target, RSL10_ROM_CMD_ERASE_SECTOR, &cmd);
+ if (retval != ERROR_OK)
+ goto free_reg_params;
+ buf_set_u32(reg_params[1].value, 0, 32, cmd);
+ buf_set_u32(reg_params[2].value, 0, 32, ALGO_STACK_POINTER_ADDR);
+
+ retval = target_run_algorithm(
+ target, 0, NULL, ARRAY_SIZE(reg_params), reg_params, write_algorithm->address,
+ write_algorithm->address + sizeof(rsl10_rom_launcher_code) - 2, 1000, &armv7m_info
+ );
+ if (retval != ERROR_OK)
+ goto free_reg_params;
+
+ int algo_ret = buf_get_u32(reg_params[0].value, 0, 32);
+ if (algo_ret != RSL10_FLASH_ERR_NONE) {
+ LOG_ERROR("RSL10 ERASE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
+ retval = ERROR_FLASH_SECTOR_NOT_ERASED;
+ }
+
+free_reg_params:
+ for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
+ destroy_reg_param(&reg_params[i]);
+
+free_algorithm:
+ target_free_working_area(target, write_algorithm);
+ return retval;
+}
+
+static int rsl10_ll_flash_write(struct rsl10_info *chip, uint32_t address, const uint8_t *buffer, uint32_t bytes)
+{
+ struct target *target = chip->target;
+ struct working_area *write_algorithm;
+
+ if (bytes == 8) {
+ uint32_t data;
+ data = buf_get_u32(buffer, 0, 32);
+ LOG_DEBUG("Writing 0x%" PRIx32 " to flash address=0x%" PRIx32 " bytes=0x%" PRIx32, data, address, bytes);
+ } else
+ LOG_DEBUG("Writing buffer to flash address=0x%" PRIx32 " bytes=0x%" PRIx32, address, bytes);
+
+ /* allocate working area with flash programming code */
+ int retval = target_alloc_working_area(target, sizeof(rsl10_rom_launcher_code), &write_algorithm);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
+ return ERROR_FAIL;
+ }
+
+ retval =
+ target_write_buffer(target, write_algorithm->address, sizeof(rsl10_rom_launcher_code), rsl10_rom_launcher_code);
+ if (retval != ERROR_OK)
+ goto free_algorithm;
+
+ /* memory buffer, rounded down, to be multiple of 8 */
+ uint32_t buffer_avail = target_get_working_area_avail(target) & ~7;
+ uint32_t buffer_size = MIN(RSL10_ROM_CMD_WRITE_BUFFER_MAX_SIZE, buffer_avail);
+ struct working_area *source;
+ retval = target_alloc_working_area(target, buffer_size, &source);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
+ goto free_algorithm;
+ }
+
+ struct reg_param reg_params[5];
+ struct armv7m_algorithm armv7m_info;
+ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
+
+ init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* start addr, return value */
+ init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* length */
+ init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* data */
+ init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT); /* cmd */
+ init_reg_param(&reg_params[4], "sp", 32, PARAM_OUT); /* stack pointer */
+ buf_set_u32(reg_params[4].value, 0, 32, ALGO_STACK_POINTER_ADDR);
+
+ uint32_t cmd = 0;
+ uint32_t sent_bytes = 0;
+ uint32_t write_address = 0;
+ uint32_t bytes_to_send = 0;
+ uint32_t remaining_bytes = 0;
+
+ retval = target_read_u32(target, RSL10_ROM_CMD_WRITE_BUFFER, &cmd);
+ if (retval != ERROR_OK)
+ goto free_everything;
+
+ while (sent_bytes < bytes) {
+ remaining_bytes = bytes - sent_bytes;
+ bytes_to_send = remaining_bytes >= buffer_size ? buffer_size : remaining_bytes;
+
+ retval = target_write_buffer(target, source->address, bytes_to_send, buffer + sent_bytes);
+ if (retval != ERROR_OK)
+ goto free_everything;
+
+ write_address = address + sent_bytes;
+
+ LOG_DEBUG(
+ "write_address: 0x%" PRIx32 ", words: 0x%" PRIx32 ", source: 0x%" PRIx64 ", cmd: 0x%" PRIx32, write_address,
+ bytes_to_send / 4, source->address, cmd
+ );
+ buf_set_u32(reg_params[0].value, 0, 32, write_address);
+ buf_set_u32(reg_params[1].value, 0, 32, bytes_to_send / 4);
+ buf_set_u32(reg_params[2].value, 0, 32, source->address);
+ buf_set_u32(reg_params[3].value, 0, 32, cmd);
+
+ retval = target_run_algorithm(
+ target, 0, NULL, ARRAY_SIZE(reg_params), reg_params, write_algorithm->address,
+ write_algorithm->address + sizeof(rsl10_rom_launcher_code) - 2, 1000, &armv7m_info
+ );
+ if (retval != ERROR_OK)
+ goto free_everything;
+
+ int algo_ret = buf_get_u32(reg_params[0].value, 0, 32);
+ if (algo_ret != RSL10_FLASH_ERR_NONE) {
+ LOG_ERROR("RSL10 WRITE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
+ retval = ERROR_FLASH_OPERATION_FAILED;
+ goto free_everything;
+ }
+
+ sent_bytes += bytes_to_send;
+ }
+
+free_everything:
+ target_free_working_area(target, source);
+
+ for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
+ destroy_reg_param(&reg_params[i]);
+
+free_algorithm:
+ target_free_working_area(target, write_algorithm);
+
+ return retval;
+}
+
+static int rsl10_mass_erase(struct target *target)
+{
+ struct working_area *write_algorithm;
+
+ int retval = target_alloc_working_area(target, sizeof(rsl10_rom_launcher_code), &write_algorithm);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
+ return ERROR_FAIL;
+ }
+
+ retval =
+ target_write_buffer(target, write_algorithm->address, sizeof(rsl10_rom_launcher_code), rsl10_rom_launcher_code);
+ if (retval != ERROR_OK)
+ goto free_algorithm;
+
+ struct reg_param reg_params[3];
+ struct armv7m_algorithm armv7m_info;
+ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
+
+ init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* return value */
+ init_reg_param(&reg_params[1], "r3", 32, PARAM_OUT); /* cmd */
+ init_reg_param(&reg_params[2], "sp", 32, PARAM_OUT); /* stack pointer */
+
+ uint32_t cmd;
+ retval = target_read_u32(target, RSL10_ROM_CMD_ERASE_ALL, &cmd);
+ if (retval != ERROR_OK)
+ goto free_reg_params;
+ buf_set_u32(reg_params[1].value, 0, 32, cmd);
+ buf_set_u32(reg_params[2].value, 0, 32, ALGO_STACK_POINTER_ADDR);
+
+ retval = target_run_algorithm(
+ target, 0, NULL, ARRAY_SIZE(reg_params), reg_params, write_algorithm->address,
+ write_algorithm->address + sizeof(rsl10_rom_launcher_code) - 2, 1000, &armv7m_info
+ );
+ if (retval != ERROR_OK)
+ goto free_reg_params;
+
+ int algo_ret = buf_get_u32(reg_params[0].value, 0, 32);
+ if (algo_ret != RSL10_FLASH_ERR_NONE) {
+ LOG_ERROR("RSL10 MASS ERASE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
+ retval = ERROR_FLASH_OPERATION_FAILED;
+ }
+
+free_reg_params:
+ for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
+ destroy_reg_param(&reg_params[i]);
+
+free_algorithm:
+ target_free_working_area(target, write_algorithm);
+ return retval;
+}
+
+static int rsl10_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
+{
+ struct rsl10_info *chip;
+
+ int retval = rsl10_get_probed_chip_if_halted(bank, &chip);
+ if (retval != ERROR_OK)
+ return retval;
+
+ return rsl10_ll_flash_write(chip, bank->base + offset, buffer, count);
+}
+
+static int rsl10_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
+{
+ LOG_INFO("erase bank: %x, %x", first, last);
+ int retval;
+ struct rsl10_info *chip;
+
+ retval = rsl10_get_probed_chip_if_halted(bank, &chip);
+ if (retval != ERROR_OK)
+ return retval;
+
+ for (unsigned int i = first; i <= last; i++) {
+ retval = rsl10_ll_flash_erase(chip, bank->base + i * 0x800);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
+ return ERROR_OK;
+}
+
+static void rsl10_free_driver_priv(struct flash_bank *bank)
+{
+ struct rsl10_bank *nbank = bank->driver_priv;
+ struct rsl10_info *chip = nbank->chip;
+ if (!chip)
+ return;
+
+ chip->refcount--;
+ if (chip->refcount == 0) {
+ free(chip);
+ bank->driver_priv = NULL;
+ }
+}
+
+static struct rsl10_info *rsl10_get_chip(struct target *target)
+{
+ struct flash_bank *bank_iter;
+
+ /* iterate over rsl10 banks of same target */
+ for (bank_iter = flash_bank_list(); bank_iter; bank_iter = bank_iter->next) {
+ if (bank_iter->driver != &rsl10_flash)
+ continue;
+
+ if (bank_iter->target != target)
+ continue;
+
+ struct rsl10_bank *nbank = bank_iter->driver_priv;
+ if (!nbank)
+ continue;
+
+ if (nbank->chip)
+ return nbank->chip;
+ }
+ return NULL;
+}
+
+FLASH_BANK_COMMAND_HANDLER(rsl10_flash_bank_command)
+{
+ struct rsl10_info *chip = NULL;
+ struct rsl10_bank *nbank = NULL;
+ LOG_INFO("Creating flash @ " TARGET_ADDR_FMT, bank->base);
+
+ switch (bank->base) {
+ case RSL10_FLASH_ADDRESS_MAIN:
+ case RSL10_FLASH_ADDRESS_NVR1:
+ case RSL10_FLASH_ADDRESS_NVR2:
+ case RSL10_FLASH_ADDRESS_NVR3:
+ case RSL10_FLASH_ADDRESS_NVR4:
+ break;
+ default:
+ LOG_ERROR("Invalid bank address " TARGET_ADDR_FMT, bank->base);
+ return ERROR_FAIL;
+ }
+
+ chip = rsl10_get_chip(bank->target);
+ if (!chip) {
+ chip = calloc(1, sizeof(*chip));
+ if (!chip)
+ return ERROR_FAIL;
+
+ chip->target = bank->target;
+ }
+
+ switch (bank->base) {
+ case RSL10_FLASH_ADDRESS_MAIN:
+ nbank = &chip->bank[0];
+ break;
+ case RSL10_FLASH_ADDRESS_NVR1:
+ nbank = &chip->bank[1];
+ break;
+ case RSL10_FLASH_ADDRESS_NVR2:
+ nbank = &chip->bank[2];
+ break;
+ case RSL10_FLASH_ADDRESS_NVR3:
+ nbank = &chip->bank[3];
+ break;
+ case RSL10_FLASH_ADDRESS_NVR4:
+ nbank = &chip->bank[4];
+ break;
+ }
+ assert(nbank);
+
+ chip->refcount++;
+ nbank->chip = chip;
+ nbank->probed = false;
+ bank->driver_priv = nbank;
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(rsl10_lock_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+
+ if (CMD_ARGC != 4)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct flash_bank *bank;
+ int retval = get_flash_bank_by_addr(target, RSL10_FLASH_ADDRESS_NVR3, true, &bank);
+ if (retval != ERROR_OK)
+ return retval;
+
+ LOG_INFO("Keys used: %s %s %s %s", CMD_ARGV[0], CMD_ARGV[1], CMD_ARGV[2], CMD_ARGV[3]);
+
+ uint32_t user_key[4];
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], user_key[0]);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], user_key[1]);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], user_key[2]);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], user_key[3]);
+
+ uint8_t write_buffer[6 * 4];
+ target_buffer_set_u32(target, write_buffer, RSL10_KEY_DEBUG_LOCK);
+ target_buffer_set_u32_array(target, &write_buffer[4], 4, user_key);
+ /* pad the end to 64-bit word boundary */
+ memset(&write_buffer[5 * 4], bank->default_padded_value, 4);
+
+ retval = rsl10_erase(bank, 0, 0);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = rsl10_write(bank, write_buffer, RSL10_NVR3_USER_KEY_OFFSET, sizeof(write_buffer));
+ if (retval != ERROR_OK) {
+ /* erase sector, if write fails, otherwise it can lock debug with wrong keys */
+ return rsl10_erase(bank, 0, 0);
+ }
+
+ command_print(
+ CMD, "****** WARNING ******\n"
+ "rsl10 device has been successfully prepared to lock.\n"
+ "Debug port is locked after restart.\n"
+ "Unlock with 'rsl10_unlock key0 key1 key2 key3'\n"
+ "****** ....... ******\n"
+ );
+
+ return rsl10_protect(bank, true, 0, 0);
+}
+
+COMMAND_HANDLER(rsl10_unlock_command)
+{
+ if (CMD_ARGC != 4)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct target *target = get_current_target(CMD_CTX);
+ struct cortex_m_common *cortex_m = target_to_cm(target);
+
+ struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
+ struct adiv5_ap *ap = dap_get_ap(dap, 0);
+
+ uint32_t user_key[4];
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], user_key[0]);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], user_key[1]);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], user_key[2]);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], user_key[3]);
+
+ uint8_t write_buffer1[4 * 4];
+ target_buffer_set_u32_array(target, write_buffer1, 4, user_key);
+ int retval = mem_ap_write_buf(ap, write_buffer1, 4, 4, RSL10_FLASH_REG_DEBUG_UNLOCK_KEY1);
+ if (retval != ERROR_OK) {
+ dap_put_ap(ap);
+ return retval;
+ }
+
+ dap_put_ap(ap);
+
+ uint32_t key;
+ retval = mem_ap_read_atomic_u32(ap, RSL10_FLASH_ADDRESS_LOCK_INFO_SETTING, &key);
+ if (retval != ERROR_OK)
+ return retval;
+ LOG_INFO("mem read: 0x%08" PRIx32, key);
+
+ if (key == RSL10_KEY_DEBUG_LOCK) {
+ retval = command_run_line(CMD_CTX, "reset init");
+ if (retval != ERROR_OK)
+ return retval;
+
+ struct flash_bank *bank;
+ retval = get_flash_bank_by_addr(target, RSL10_FLASH_ADDRESS_NVR3, true, &bank);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = rsl10_protect(bank, false, 0, 0);
+ if (retval != ERROR_OK)
+ return retval;
+
+ uint8_t write_buffer2[4 * 2];
+ target_buffer_set_u32(target, write_buffer2, 0x1);
+ /* pad the end to 64-bit word boundary */
+ memset(&write_buffer2[4], bank->default_padded_value, 4);
+
+ /* let it fail, because sector is not erased, maybe just erase all? */
+ (void)rsl10_write(bank, write_buffer2, RSL10_NVR3_USER_KEY_OFFSET, sizeof(write_buffer2));
+ command_print(CMD, "Debug port is unlocked!");
+ }
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(rsl10_mass_erase_command)
+{
+ if (CMD_ARGC)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct target *target = get_current_target(CMD_CTX);
+
+ int retval = rsl10_mass_erase(target);
+ if (retval != ERROR_OK)
+ return retval;
+
+ command_print(CMD, "Mass erase was succesfull!");
+ return ERROR_OK;
+}
+
+static const struct command_registration rsl10_exec_command_handlers[] = {
+ {
+ .name = "lock",
+ .handler = rsl10_lock_command,
+ .mode = COMMAND_EXEC,
+ .help = "Lock rsl10 debug, with passed keys",
+ .usage = "key1 key2 key3 key4",
+ },
+ {
+ .name = "unlock",
+ .handler = rsl10_unlock_command,
+ .mode = COMMAND_EXEC,
+ .help = "Unlock rsl10 debug, with passed keys",
+ .usage = "key1 key2 key3 key4",
+ },
+ {
+ .name = "mass_erase",
+ .handler = rsl10_mass_erase_command,
+ .mode = COMMAND_EXEC,
+ .help = "Mass erase all unprotected flash areas",
+ .usage = "",
+ },
+ COMMAND_REGISTRATION_DONE};
+
+static const struct command_registration rsl10_command_handlers[] = {
+ {
+ .name = "rsl10",
+ .mode = COMMAND_ANY,
+ .help = "rsl10 flash command group",
+ .usage = "",
+ .chain = rsl10_exec_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE};
+
+const struct flash_driver rsl10_flash = {
+ .name = "rsl10",
+ .commands = rsl10_command_handlers,
+ .flash_bank_command = rsl10_flash_bank_command,
+ .erase = rsl10_erase,
+ .protect = rsl10_protect,
+ .write = rsl10_write,
+ .read = default_flash_read,
+ .probe = rsl10_probe,
+ .auto_probe = rsl10_auto_probe,
+ .erase_check = default_flash_blank_check,
+ .protect_check = rsl10_protect_check,
+ .free_driver_priv = rsl10_free_driver_priv,
+};
diff --git a/src/flash/nor/sfdp.c b/src/flash/nor/sfdp.c
index 88d3b96..5bfb541 100644
--- a/src/flash/nor/sfdp.c
+++ b/src/flash/nor/sfdp.c
@@ -1,17 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch <andreas.bolsch@mni.thm.de *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/sfdp.h b/src/flash/nor/sfdp.h
index f924a4e..1c9af32 100644
--- a/src/flash/nor/sfdp.h
+++ b/src/flash/nor/sfdp.h
@@ -1,17 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Andreas Bolsch <andreas.bolsch@mni.thm.de *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_SFDP_H
diff --git a/src/flash/nor/sh_qspi.c b/src/flash/nor/sh_qspi.c
index 02af17a..e8ca626 100644
--- a/src/flash/nor/sh_qspi.c
+++ b/src/flash/nor/sh_qspi.c
@@ -1,4 +1,5 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+// SPDX-License-Identifier: GPL-2.0-only
+
/*
* SH QSPI (Quad SPI) driver
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c
index 8913838..42550d0 100644
--- a/src/flash/nor/sim3x.c
+++ b/src/flash/nor/sim3x.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2014 by Ladislav Bábel *
* ladababel@seznam.cz *
* *
* Copyright (C) 2015 by Andreas Bomholtz *
* andreas@seluxit.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -872,16 +861,23 @@ static int sim3x_flash_info(struct flash_bank *bank, struct command_invocation *
*/
static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
{
- int retval;
LOG_DEBUG("DAP_REG[0x%02x] <- %08" PRIX32, reg, value);
- retval = dap_queue_ap_write(dap_ap(dap, SIM3X_AP), reg, value);
+ struct adiv5_ap *ap = dap_get_ap(dap, SIM3X_AP);
+ if (!ap) {
+ LOG_DEBUG("DAP: failed to get AP");
+ return ERROR_FAIL;
+ }
+
+ int retval = dap_queue_ap_write(ap, reg, value);
if (retval != ERROR_OK) {
LOG_DEBUG("DAP: failed to queue a write request");
+ dap_put_ap(ap);
return retval;
}
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK) {
LOG_DEBUG("DAP: dap_run failed");
return retval;
@@ -892,15 +888,21 @@ static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value
static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
{
- int retval;
+ struct adiv5_ap *ap = dap_get_ap(dap, SIM3X_AP);
+ if (!ap) {
+ LOG_DEBUG("DAP: failed to get AP");
+ return ERROR_FAIL;
+ }
- retval = dap_queue_ap_read(dap_ap(dap, SIM3X_AP), reg, result);
+ int retval = dap_queue_ap_read(ap, reg, result);
if (retval != ERROR_OK) {
LOG_DEBUG("DAP: failed to queue a read request");
+ dap_put_ap(ap);
return retval;
}
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK) {
LOG_DEBUG("DAP: dap_run failed");
return retval;
diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index 627bb41..eed747b 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2010 by Antonio Borneo *
* borneo.antonio@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -96,8 +85,8 @@ const struct flash_device flash_devices[] = {
FLASH_ID("micron n25q256 1.8v", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0019bb20, 0x100, 0x10000, 0x2000000),
FLASH_ID("micron mt25ql512", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0020ba20, 0x100, 0x10000, 0x4000000),
FLASH_ID("micron mt25ql01", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0021ba20, 0x100, 0x10000, 0x8000000),
- FLASH_ID("micron mt25ql02", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0022ba20, 0x100, 0x10000, 0x10000000),
FLASH_ID("micron mt25qu01", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0021bb20, 0x100, 0x10000, 0x8000000),
+ FLASH_ID("micron mt25ql02", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0022ba20, 0x100, 0x10000, 0x10000000),
FLASH_ID("win w25q80bv", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001440ef, 0x100, 0x10000, 0x100000),
FLASH_ID("win w25q16jv", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001540ef, 0x100, 0x10000, 0x200000),
FLASH_ID("win w25q16jv", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001570ef, 0x100, 0x10000, 0x200000), /* QPI / DTR */
diff --git a/src/flash/nor/spi.h b/src/flash/nor/spi.h
index f8a0a65..807af12 100644
--- a/src/flash/nor/spi.h
+++ b/src/flash/nor/spi.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018-2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2010 by Antonio Borneo *
* borneo.antonio@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_SPI_H
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index 6135c95..3a78952 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/***************************************************************************
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index b5b10af..292b66d 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2011 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
- *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -1017,7 +1006,7 @@ static int stm32x_probe(struct flash_bank *bank)
flash_size_in_kb = stm32x_info->user_bank_size / 1024;
}
- LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
+ LOG_INFO("flash size = %d KiB", flash_size_in_kb);
/* did we assign flash size? */
assert(flash_size_in_kb != 0xffff);
diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c
index 622ef34..36b7a0d 100644
--- a/src/flash/nor/stm32f2x.c
+++ b/src/flash/nor/stm32f2x.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2011 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -1136,7 +1125,7 @@ static int stm32x_probe(struct flash_bank *bank)
flash_size_in_kb = stm32x_info->user_bank_size / 1024;
}
- LOG_INFO("flash size = %" PRIu16 " kbytes", flash_size_in_kb);
+ LOG_INFO("flash size = %" PRIu16 " KiB", flash_size_in_kb);
/* did we assign flash size? */
assert(flash_size_in_kb != 0xffff);
diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c
index d2914eb..8be8037 100644
--- a/src/flash/nor/stm32h7x.c
+++ b/src/flash/nor/stm32h7x.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by STMicroelectronics *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 0a9d59c..7a6ec3f 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Uwe Bonnes *
* bon@elektron.ikp.physik.tu-darmstadt.de *
* *
* Copyright (C) 2019 by Tarek Bochkati for STMicroelectronics *
* tarek.bouchkati@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -300,7 +289,7 @@ static const struct stm32l4_rev stm32l45_l46xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x2001, "Y" },
};
-static const struct stm32l4_rev stm32l41_L42xx_revs[] = {
+static const struct stm32l4_rev stm32l41_l42xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x2001, "Y" },
};
@@ -431,8 +420,8 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
},
{
.id = DEVID_STM32L41_L42XX,
- .revs = stm32l41_L42xx_revs,
- .num_revs = ARRAY_SIZE(stm32l41_L42xx_revs),
+ .revs = stm32l41_l42xx_revs,
+ .num_revs = ARRAY_SIZE(stm32l41_l42xx_revs),
.device_str = "STM32L41/L42xx",
.max_flash_size_kb = 128,
.flags = F_NONE,
@@ -1827,7 +1816,7 @@ static int stm32l4_probe(struct flash_bank *bank)
flash_size_kb = stm32l4_info->user_bank_size / 1024;
}
- LOG_INFO("flash size = %dkbytes", flash_size_kb);
+ LOG_INFO("flash size = %d KiB", flash_size_kb);
/* did we assign a flash size? */
assert((flash_size_kb != 0xffff) && flash_size_kb);
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 4458c08..06cc66d 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by Uwe Bonnes *
* bon@elektron.ikp.physik.tu-darmstadt.de *
- *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_STM32L4X
diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c
index f6a8ffc..860bab3 100644
--- a/src/flash/nor/stm32lx.c
+++ b/src/flash/nor/stm32lx.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2011 by Clement Burin des Roziers *
* clement.burin-des-roziers@hikob.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -152,7 +141,7 @@ static const struct stm32lx_rev stm32_429_revs[] = {
{ 0x1000, "A" }, { 0x1018, "Z" },
};
static const struct stm32lx_rev stm32_436_revs[] = {
- { 0x1000, "A" }, { 0x1008, "Z" }, { 0x1018, "Y" },
+ { 0x1000, "A" }, { 0x1008, "Z" }, { 0x1018, "Y" }, { 0x1038, "X" },
};
static const struct stm32lx_rev stm32_437_revs[] = {
{ 0x1000, "A" },
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c
index 8278601..9c266e9 100644
--- a/src/flash/nor/stmqspi.c
+++ b/src/flash/nor/stmqspi.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016 - 2019 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
* *
* Copyright (C) 2010 by Antonio Borneo *
* borneo.antonio@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* STM QuadSPI (QSPI) and OctoSPI (OCTOSPI) controller are SPI bus controllers
@@ -765,13 +754,13 @@ COMMAND_HANDLER(stmqspi_handle_set)
bank->sectors = sectors;
stmqspi_info->dev.name = stmqspi_info->devname;
if (stmqspi_info->dev.size_in_bytes / 4096)
- LOG_INFO("flash \'%s\' id = unknown\nchip size = %" PRIu32 "kbytes,"
- " bank size = %" PRIu32 "kbytes", stmqspi_info->dev.name,
+ LOG_INFO("flash \'%s\' id = unknown\nchip size = %" PRIu32 " KiB,"
+ " bank size = %" PRIu32 " KiB", stmqspi_info->dev.name,
stmqspi_info->dev.size_in_bytes / 1024,
(stmqspi_info->dev.size_in_bytes / 1024) << dual);
else
- LOG_INFO("flash \'%s\' id = unknown\nchip size = %" PRIu32 "bytes,"
- " bank size = %" PRIu32 "bytes", stmqspi_info->dev.name,
+ LOG_INFO("flash \'%s\' id = unknown\nchip size = %" PRIu32 " B,"
+ " bank size = %" PRIu32 " B", stmqspi_info->dev.name,
stmqspi_info->dev.size_in_bytes,
stmqspi_info->dev.size_in_bytes << dual);
@@ -2217,10 +2206,10 @@ static int stmqspi_probe(struct flash_bank *bank)
memcpy(&stmqspi_info->dev, p, sizeof(stmqspi_info->dev));
if (p->size_in_bytes / 4096)
LOG_INFO("flash1 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32
- "kbytes", p->name, id1, p->size_in_bytes / 1024);
+ " KiB", p->name, id1, p->size_in_bytes / 1024);
else
LOG_INFO("flash1 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32
- "bytes", p->name, id1, p->size_in_bytes);
+ " B", p->name, id1, p->size_in_bytes);
break;
}
}
@@ -2239,7 +2228,7 @@ static int stmqspi_probe(struct flash_bank *bank)
if (retval == ERROR_OK) {
LOG_INFO("flash1 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32
- "kbytes", temp.name, id1, temp.size_in_bytes / 1024);
+ " KiB", temp.name, id1, temp.size_in_bytes / 1024);
/* save info and retrieved *good* id as spi_sfdp clears all info */
memcpy(&stmqspi_info->dev, &temp, sizeof(stmqspi_info->dev));
stmqspi_info->dev.device_id = id1;
@@ -2257,10 +2246,10 @@ static int stmqspi_probe(struct flash_bank *bank)
if (p->device_id == id2) {
if (p->size_in_bytes / 4096)
LOG_INFO("flash2 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32
- "kbytes", p->name, id2, p->size_in_bytes / 1024);
+ " KiB", p->name, id2, p->size_in_bytes / 1024);
else
LOG_INFO("flash2 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32
- "bytes", p->name, id2, p->size_in_bytes);
+ " B", p->name, id2, p->size_in_bytes);
if (!id1)
memcpy(&stmqspi_info->dev, p, sizeof(stmqspi_info->dev));
@@ -2297,7 +2286,7 @@ static int stmqspi_probe(struct flash_bank *bank)
if (retval == ERROR_OK)
LOG_INFO("flash2 \'%s\' id = 0x%06" PRIx32 " size = %" PRIu32
- "kbytes", temp.name, id2, temp.size_in_bytes / 1024);
+ " KiB", temp.name, id2, temp.size_in_bytes / 1024);
else {
/* even not identified by SFDP, then give up */
LOG_WARNING("Unknown flash2 device id = 0x%06" PRIx32
@@ -2403,22 +2392,22 @@ static int get_stmqspi_info(struct flash_bank *bank, struct command_invocation *
}
command_print_sameline(cmd, "flash%s%s \'%s\', device id = 0x%06" PRIx32
- ", flash size = %" PRIu32 "%sbytes\n(page size = %" PRIu32
+ ", flash size = %" PRIu32 "%s B\n(page size = %" PRIu32
", read = 0x%02" PRIx8 ", qread = 0x%02" PRIx8
", pprog = 0x%02" PRIx8 ", mass_erase = 0x%02" PRIx8
- ", sector size = %" PRIu32 "%sbytes, sector_erase = 0x%02" PRIx8 ")",
+ ", sector size = %" PRIu32 " %sB, sector_erase = 0x%02" PRIx8 ")",
((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) |
BIT(SPI_FSEL_FLASH))) != BIT(SPI_FSEL_FLASH)) ? "1" : "",
((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) |
BIT(SPI_FSEL_FLASH))) != 0) ? "2" : "",
stmqspi_info->dev.name, stmqspi_info->dev.device_id,
bank->size / 4096 ? bank->size / 1024 : bank->size,
- bank->size / 4096 ? "k" : "", stmqspi_info->dev.pagesize,
+ bank->size / 4096 ? "Ki" : "", stmqspi_info->dev.pagesize,
stmqspi_info->dev.read_cmd, stmqspi_info->dev.qread_cmd,
stmqspi_info->dev.pprog_cmd, stmqspi_info->dev.chip_erase_cmd,
stmqspi_info->dev.sectorsize / 4096 ?
stmqspi_info->dev.sectorsize / 1024 : stmqspi_info->dev.sectorsize,
- stmqspi_info->dev.sectorsize / 4096 ? "k" : "",
+ stmqspi_info->dev.sectorsize / 4096 ? "Ki" : "",
stmqspi_info->dev.erase_cmd);
return ERROR_OK;
diff --git a/src/flash/nor/stmqspi.h b/src/flash/nor/stmqspi.h
index 85da25f..245df40 100644
--- a/src/flash/nor/stmqspi.h
+++ b/src/flash/nor/stmqspi.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2016 - 2018 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_NOR_STMQSPI_H
diff --git a/src/flash/nor/stmsmi.c b/src/flash/nor/stmsmi.c
index 553bf29..1aa2447 100644
--- a/src/flash/nor/stmsmi.c
+++ b/src/flash/nor/stmsmi.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* STM Serial Memory Interface (SMI) controller is a SPI bus controller
diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c
index 9b977bf..b91e22e 100644
--- a/src/flash/nor/str7x.c
+++ b/src/flash/nor/str7x.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/str9x.c b/src/flash/nor/str9x.c
index 8f39d75..1a26b83 100644
--- a/src/flash/nor/str9x.c
+++ b/src/flash/nor/str9x.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
*
* Copyright (C) 2008 by Oyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c
index da66a99..c39eb3a 100644
--- a/src/flash/nor/str9xpec.c
+++ b/src/flash/nor/str9xpec.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/swm050.c b/src/flash/nor/swm050.c
index be7452b..89e59ae 100644
--- a/src/flash/nor/swm050.c
+++ b/src/flash/nor/swm050.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io> *
* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c
index 05db314..0562906 100644
--- a/src/flash/nor/tcl.c
+++ b/src/flash/nor/tcl.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* Copyright (C) 2017-2018 Tomas Vanek <vanekt@fbl.cz> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c
index 37f0933..e01d2df 100644
--- a/src/flash/nor/tms470.c
+++ b/src/flash/nor/tms470.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007,2008 by Christopher Kilgour *
* techie |_at_| whiterocker |_dot_| com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -259,9 +248,6 @@ static int tms470_read_part_info(struct flash_bank *bank)
target_write_u32(target, 0xFFFFFFE4, 0x00000000);
target_write_u32(target, 0xFFFFFFE0, 0x00000000);
- bank->chip_width = 32;
- bank->bus_width = 32;
-
LOG_INFO("Identified %s, ver=%d, core=%s, nvmem=%s.",
part_name,
(int)(silicon_version),
diff --git a/src/flash/nor/virtual.c b/src/flash/nor/virtual.c
index 01a9247..c5e3338 100644
--- a/src/flash/nor/virtual.c
+++ b/src/flash/nor/virtual.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/w600.c b/src/flash/nor/w600.c
index cd2aa01..20968dc 100644
--- a/src/flash/nor/w600.c
+++ b/src/flash/nor/w600.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Simon Qian *
* SimonQian@SimonQian.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -323,7 +312,7 @@ static int w600_probe(struct flash_bank *bank)
flash_size = 1 << flash_size;
}
- LOG_INFO("flash size = %" PRIu32 "kbytes", flash_size / 1024);
+ LOG_INFO("flash size = %" PRIu32 " KiB", flash_size / 1024);
/* calculate numbers of pages */
size_t num_pages = flash_size / W600_FLASH_SECSIZE;
diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index c6de1ac..2870725 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016 by Uladzimir Pylinski aka barthess *
* barthess@yandex.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c
index 9e5f0a3..6e30fc1 100644
--- a/src/flash/nor/xmc1xxx.c
+++ b/src/flash/nor/xmc1xxx.c
@@ -1,9 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* XMC1000 flash driver
*
* Copyright (c) 2016 Andreas Färber
- *
- * License: GPL-2.0+
*/
#ifdef HAVE_CONFIG_H
@@ -520,24 +520,8 @@ FLASH_BANK_COMMAND_HANDLER(xmc1xxx_flash_bank_command)
return ERROR_OK;
}
-static const struct command_registration xmc1xxx_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration xmc1xxx_command_handlers[] = {
- {
- .name = "xmc1xxx",
- .mode = COMMAND_ANY,
- .help = "xmc1xxx flash command group",
- .usage = "",
- .chain = xmc1xxx_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
const struct flash_driver xmc1xxx_flash = {
.name = "xmc1xxx",
- .commands = xmc1xxx_command_handlers,
.flash_bank_command = xmc1xxx_flash_bank_command,
.info = xmc1xxx_get_info_command,
.probe = xmc1xxx_probe,
diff --git a/src/flash/nor/xmc4xxx.c b/src/flash/nor/xmc4xxx.c
index 1668e89..54fd5a5 100644
--- a/src/flash/nor/xmc4xxx.c
+++ b/src/flash/nor/xmc4xxx.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/**************************************************************************
* Copyright (C) 2015 Jeff Ciesielski <jeffciesielski@gmail.com> *
-* *
-* This program is free software; you can redistribute it and/or modify *
-* it under the terms of the GNU General Public License as published by *
-* the Free Software Foundation; either version 2 of the License, or *
-* (at your option) any later version. *
-* *
-* This program is distributed in the hope that it will be useful, *
-* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-* GNU General Public License for more details. *
-* *
-* You should have received a copy of the GNU General Public License *
-* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/flash/startup.tcl b/src/flash/startup.tcl
index 16cbe19..654f201 100644
--- a/src/flash/startup.tcl
+++ b/src/flash/startup.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Defines basic Tcl procs for OpenOCD flash module
#
diff --git a/src/hello.c b/src/hello.c
index 9d078c0..4a4ce01 100644
--- a/src/hello.c
+++ b/src/hello.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/hello.h b/src/hello.h
index c88c89d..1a087b1 100644
--- a/src/hello.h
+++ b/src/hello.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELLO_H
diff --git a/src/helper/Makefile.am b/src/helper/Makefile.am
index 822578a..0268694 100644
--- a/src/helper/Makefile.am
+++ b/src/helper/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libhelper.la
%C%_libhelper_la_SOURCES = \
diff --git a/src/helper/bin2char.sh b/src/helper/bin2char.sh
index 128ea9a..b89433d 100755
--- a/src/helper/bin2char.sh
+++ b/src/helper/bin2char.sh
@@ -1,4 +1,5 @@
#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0-or-later
[ $# != 0 ] && {
echo "Usage: $0"
diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index e2dfa87..5f38b43 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2004, 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h
index 36d6adc..a8a5ef8 100644
--- a/src/helper/binarybuffer.h
+++ b/src/helper/binarybuffer.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2004, 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_BINARYBUFFER_H
diff --git a/src/helper/bits.h b/src/helper/bits.h
index 6151b33..4e2a345 100644
--- a/src/helper/bits.h
+++ b/src/helper/bits.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
* Author(s): Antonio Borneo <borneo.antonio@gmail.com> for STMicroelectronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
diff --git a/src/helper/command.c b/src/helper/command.c
index 1e769d7..6898e2d 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* part of this file is taken from libcli (libcli.sourceforge.net) *
* Copyright (C) David Parrish (david@dparrish.com) *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -713,14 +702,12 @@ static int jim_capture(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
* This is necessary in order to avoid accidentally getting a non-empty
* string for tcl fn's.
*/
- bool save_poll = jtag_poll_get_enabled();
-
- jtag_poll_set_enabled(false);
+ bool save_poll_mask = jtag_poll_mask();
const char *str = Jim_GetString(argv[1], NULL);
int retcode = Jim_Eval_Named(interp, str, __THIS__FILE__, __LINE__);
- jtag_poll_set_enabled(save_poll);
+ jtag_poll_unmask(save_poll_mask);
command_log_capture_finish(state);
@@ -949,7 +936,19 @@ static int jim_command_dispatch(Jim_Interp *interp, int argc, Jim_Obj * const *a
if (!command_can_run(cmd_ctx, c, Jim_GetString(argv[0], NULL)))
return JIM_ERR;
- target_call_timer_callbacks_now();
+ /*
+ * TODO: to be removed after v0.12.0
+ * workaround for https://sourceforge.net/p/openocd/tickets/362/
+ * After syntax change of "expr" in jimtcl 0.81
+ * the replacement of jimtcl "expr" with openocd version in
+ * https://review.openocd.org/6510/
+ * introduces too many target polling during math expressions with
+ * "expr" commands.
+ * After v0.12.0 replace the following two lines with
+ * target_call_timer_callbacks();
+ */
+ if (strcmp(c->name, "expr"))
+ target_call_timer_callbacks_now();
/*
* Black magic of overridden current target:
diff --git a/src/helper/command.h b/src/helper/command.h
index 796cd9d..478e5c8 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_COMMAND_H
diff --git a/src/helper/configuration.c b/src/helper/configuration.c
index 7e791d0..16732eb 100644
--- a/src/helper/configuration.c
+++ b/src/helper/configuration.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2004, 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -148,6 +137,10 @@ int parse_config_file(struct command_context *cmd_ctx)
char *get_home_dir(const char *append_path)
{
+#ifdef _WIN32
+ char homepath[MAX_PATH];
+#endif
+
char *home = getenv("HOME");
if (!home) {
@@ -156,8 +149,6 @@ char *get_home_dir(const char *append_path)
home = getenv("USERPROFILE");
if (!home) {
-
- char homepath[MAX_PATH];
char *drive = getenv("HOMEDRIVE");
char *path = getenv("HOMEPATH");
if (drive && path) {
diff --git a/src/helper/configuration.h b/src/helper/configuration.h
index cc28efc..295ea59 100644
--- a/src/helper/configuration.h
+++ b/src/helper/configuration.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2004, 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_CONFIGURATION_H
diff --git a/src/helper/fileio.c b/src/helper/fileio.c
index cec7dec..a290a5d 100644
--- a/src/helper/fileio.c
+++ b/src/helper/fileio.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/fileio.h b/src/helper/fileio.h
index 16c1046..6b4be8e 100644
--- a/src/helper/fileio.h
+++ b/src/helper/fileio.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_FILEIO_H
diff --git a/src/helper/jep106.c b/src/helper/jep106.c
index 5cf769a..d422561 100644
--- a/src/helper/jep106.c
+++ b/src/helper/jep106.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/jep106.h b/src/helper/jep106.h
index 61b177a..c554dae 100644
--- a/src/helper/jep106.h
+++ b/src/helper/jep106.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_JEP106_H
diff --git a/src/helper/jep106.inc b/src/helper/jep106.inc
index 41afdb8..01c3aac 100644
--- a/src/helper/jep106.inc
+++ b/src/helper/jep106.inc
@@ -1,9 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
- * Should be autogenerated with update_jep106.pl but latest
- * file from JEDEC is only available in PDF form. The PDF
- * also breaks the pdftotext flow due to embedded watermarks.
- * Created with a mix of scripts and manual editing.
+ * The manufacturer's standard identification code list appears in JEP106.
+ * Copyright (c) 2022 JEDEC. All rights reserved.
+ *
+ * JEP106 is regularly updated. For the current manufacturer's standard
+ * identification code list, please visit the JEDEC website at www.jedec.org .
*/
+
+/* This file is aligned to revision JEP106BE January 2022. */
+
[0][0x01 - 1] = "AMD",
[0][0x02 - 1] = "AMI",
[0][0x03 - 1] = "Fairchild",
@@ -1553,7 +1559,7 @@
[12][0x23 - 1] = "Tangem AG",
[12][0x24 - 1] = "FuturePath Technology (Shenzhen) Co",
[12][0x25 - 1] = "RC Module",
-[12][0x26 - 1] = "Team Research Inc",
+[12][0x26 - 1] = "Timetec International Inc",
[12][0x27 - 1] = "ICMAX Technologies Co Limited",
[12][0x28 - 1] = "Lynxi Technologies Ltd Co",
[12][0x29 - 1] = "Guangzhou Taisupanke Computer Equipment",
@@ -1571,7 +1577,7 @@
[12][0x35 - 1] = "Shenzhen Xinxinshun Technology Co",
[12][0x36 - 1] = "Galois Inc",
[12][0x37 - 1] = "Ubilite Inc",
-[12][0x38 - 1] = "Shenzhen Quanzing Technology Co Ltd",
+[12][0x38 - 1] = "Shenzhen Quanxing Technology Co Ltd",
[12][0x39 - 1] = "Group RZX Technology LTDA",
[12][0x3a - 1] = "Yottac Technology (XI'AN) Cooperation",
[12][0x3b - 1] = "Shenzhen RuiRen Technology Co Ltd",
@@ -1611,4 +1617,92 @@
[12][0x5d - 1] = "OLOy Technology",
[12][0x5e - 1] = "Wuhan P&S Semiconductor Co Ltd",
[12][0x5f - 1] = "Sitrus Technology",
+[12][0x60 - 1] = "AnHui Conner Storage Co Ltd",
+[12][0x61 - 1] = "Rochester Electronics",
+[12][0x62 - 1] = "Wuxi Petabyte Technologies Co Ltd",
+[12][0x63 - 1] = "Star Memory",
+[12][0x64 - 1] = "Agile Memory Technology Co Ltd",
+[12][0x65 - 1] = "MEJEC",
+[12][0x66 - 1] = "Rockchip Electronics Co Ltd",
+[12][0x67 - 1] = "Dongguan Guanma e-commerce Co Ltd",
+[12][0x68 - 1] = "Rayson Hi-Tech (SZ) Limited",
+[12][0x69 - 1] = "MINRES Technologies GmbH",
+[12][0x6a - 1] = "Himax Technologies Inc",
+[12][0x6b - 1] = "Shenzhen Cwinner Technology Co Ltd",
+[12][0x6c - 1] = "Tecmiyo",
+[12][0x6d - 1] = "Shenzhen Suhuicun Technology Co Ltd",
+[12][0x6e - 1] = "Vickter Electronics Co. Ltd.",
+[12][0x6f - 1] = "lowRISC",
+[12][0x70 - 1] = "EXEGate FZE",
+[12][0x71 - 1] = "Shenzhen 9 Chapter Technologies Co",
+[12][0x72 - 1] = "Addlink",
+[12][0x73 - 1] = "Starsway",
+[12][0x74 - 1] = "Pensando Systems Inc.",
+[12][0x75 - 1] = "AirDisk",
+[12][0x76 - 1] = "Shenzhen Speedmobile Technology Co",
+[12][0x77 - 1] = "PEZY Computing",
+[12][0x78 - 1] = "Extreme Engineering Solutions Inc",
+[12][0x79 - 1] = "Shangxin Technology Co Ltd",
+[12][0x7a - 1] = "Shanghai Zhaoxin Semiconductor Co",
+[12][0x7b - 1] = "Xsight Labs Ltd",
+[12][0x7c - 1] = "Hangzhou Hikstorage Technology Co",
+[12][0x7d - 1] = "Dell Technologies",
+[12][0x7e - 1] = "Guangdong StarFive Technology Co",
+[13][0x01 - 1] = "TECOTON",
+[13][0x02 - 1] = "Abko Co Ltd",
+[13][0x03 - 1] = "Shenzhen Feisrike Technology Co Ltd",
+[13][0x04 - 1] = "Shenzhen Sunhome Electronics Co Ltd",
+[13][0x05 - 1] = "Global Mixed-mode Technology Inc",
+[13][0x06 - 1] = "Shenzhen Weien Electronics Co. Ltd.",
+[13][0x07 - 1] = "Shenzhen Cooyes Technology Co Ltd",
+[13][0x08 - 1] = "Keymos Electronics Co., Limited",
+[13][0x09 - 1] = "E-Rockic Technology Company Limited",
+[13][0x0a - 1] = "Aerospace Science Memory Shenzhen",
+[13][0x0b - 1] = "Shenzhen Quanji Technology Co Ltd",
+[13][0x0c - 1] = "Dukosi",
+[13][0x0d - 1] = "Maxell Corporation of America",
+[13][0x0e - 1] = "Shenshen Xinxintao Electronics Co Ltd",
+[13][0x0f - 1] = "Zhuhai Sanxia Semiconductor Co Ltd",
+[13][0x10 - 1] = "Groq Inc",
+[13][0x11 - 1] = "AstraTek",
+[13][0x12 - 1] = "Shenzhen Xinyuze Technology Co Ltd",
+[13][0x13 - 1] = "All Bit Semiconductor",
+[13][0x14 - 1] = "ACFlow",
+[13][0x15 - 1] = "Shenzhen Sipeed Technology Co Ltd",
+[13][0x16 - 1] = "Linzhi Hong Kong Co Limited",
+[13][0x17 - 1] = "Supreme Wise Limited",
+[13][0x18 - 1] = "Blue Cheetah Analog Design Inc",
+[13][0x19 - 1] = "Hefei Laiku Technology Co Ltd",
+[13][0x1a - 1] = "Zord",
+[13][0x1b - 1] = "SBO Hearing A/S",
+[13][0x1c - 1] = "Regent Sharp International Limited",
+[13][0x1d - 1] = "Permanent Potential Limited",
+[13][0x1e - 1] = "Creative World International Limited",
+[13][0x1f - 1] = "Base Creation International Limited",
+[13][0x20 - 1] = "Shenzhen Zhixin Chuanglian Technology",
+[13][0x21 - 1] = "Protected Logic Corporation",
+[13][0x22 - 1] = "Sabrent",
+[13][0x23 - 1] = "Union Memory",
+[13][0x24 - 1] = "NEUCHIPS Corporation",
+[13][0x25 - 1] = "Ingenic Semiconductor Co Ltd",
+[13][0x26 - 1] = "SiPearl",
+[13][0x27 - 1] = "Shenzhen Actseno Information Technology",
+[13][0x28 - 1] = "RIVAI Technologies (Shenzhen) Co Ltd",
+[13][0x29 - 1] = "Shenzhen Sunny Technology Co Ltd",
+[13][0x2a - 1] = "Cott Electronics Ltd",
+[13][0x2b - 1] = "Shanghai Synsense Technologies Co Ltd",
+[13][0x2c - 1] = "Shenzhen Jintang Fuming Optoelectronics",
+[13][0x2d - 1] = "CloudBEAR LLC",
+[13][0x2e - 1] = "Emzior, LLC",
+[13][0x2f - 1] = "Ehiway Microelectronic Science Tech Co",
+[13][0x30 - 1] = "UNIM Innovation Technology (Wu XI)",
+[13][0x31 - 1] = "GDRAMARS",
+[13][0x32 - 1] = "Meminsights Technology",
+[13][0x33 - 1] = "Zhuzhou Hongda Electronics Corp Ltd",
+[13][0x34 - 1] = "Luminous Computing Inc",
+[13][0x35 - 1] = "PROXMEM",
+[13][0x36 - 1] = "Draper Labs",
+[13][0x37 - 1] = "ORICO Technologies Co. Ltd.",
+[13][0x38 - 1] = "Space Exploration Technologies Corp",
+[13][0x39 - 1] = "AONDEVICES Inc",
/* EOF */
diff --git a/src/helper/jim-nvp.c b/src/helper/jim-nvp.c
index 0409a83..e1ab64a 100644
--- a/src/helper/jim-nvp.c
+++ b/src/helper/jim-nvp.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: BSD-2-Clause-Views
+
/* Jim - A small embeddable Tcl interpreter
*
* Copyright 2005 Salvatore Sanfilippo <antirez@invece.org>
@@ -11,34 +13,7 @@
* Copyright 2009 Nico Coesel <ncoesel@dealogic.nl>
* Copyright 2009 Zachary T Welch zw@superlucidity.net
* Copyright 2009 David Brownell
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials
- * provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE JIM TCL PROJECT ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * JIM TCL PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * The views and conclusions contained in the software and documentation
- * are those of the authors and should not be interpreted as representing
- * official policies, either expressed or implied, of the Jim Tcl Project.
+ * Copyright (c) 2005-2011 Jim Tcl Project. All rights reserved.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/jim-nvp.h b/src/helper/jim-nvp.h
index 00e4af9..11824ca 100644
--- a/src/helper/jim-nvp.h
+++ b/src/helper/jim-nvp.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause-Views */
+
/* Jim - A small embeddable Tcl interpreter
*
* Copyright 2005 Salvatore Sanfilippo <antirez@invece.org>
@@ -11,34 +13,7 @@
* Copyright 2009 Nico Coesel <ncoesel@dealogic.nl>
* Copyright 2009 Zachary T Welch zw@superlucidity.net
* Copyright 2009 David Brownell
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials
- * provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE JIM TCL PROJECT ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * JIM TCL PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * The views and conclusions contained in the software and documentation
- * are those of the authors and should not be interpreted as representing
- * official policies, either expressed or implied, of the Jim Tcl Project.
+ * Copyright (c) 2005-2011 Jim Tcl Project. All rights reserved.
*/
#ifndef OPENOCD_HELPER_JIM_NVP_H
@@ -326,144 +301,4 @@ void jim_getopt_nvp_unknown(struct jim_getopt_info *goi, const struct jim_nvp *l
*/
int jim_getopt_enum(struct jim_getopt_info *goi, const char *const *lookup, int *puthere);
-/*
- * DEPRECATED API
- * Do not use these API anymore, as they do not comply with OpenOCD coding style
- * They are listed here to avoid breaking build after merge of patches already queued in gerrit
- */
-
-static inline __attribute__ ((deprecated))
-const char *Jim_Debug_ArgvString(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- return jim_debug_argv_string(interp, argc, argv);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetNvp(Jim_Interp *interp, Jim_Obj *objptr, const struct jim_nvp *nvp_table, const struct jim_nvp **result)
-{
- return jim_get_nvp(interp, objptr, nvp_table, result);
-}
-
-static inline __attribute__ ((deprecated))
-void Jim_GetOpt_Debug(struct jim_getopt_info *goi)
-{
- jim_getopt_debug(goi);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetOpt_Double(struct jim_getopt_info *goi, double *puthere)
-{
- return jim_getopt_double(goi, puthere);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetOpt_Enum(struct jim_getopt_info *goi, const char *const *lookup, int *puthere)
-{
- return jim_getopt_enum(goi, lookup, puthere);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetOpt_Nvp(struct jim_getopt_info *goi, const struct jim_nvp *lookup, struct jim_nvp **puthere)
-{
- return jim_getopt_nvp(goi, lookup, puthere);
-}
-
-static inline __attribute__ ((deprecated))
-void Jim_GetOpt_NvpUnknown(struct jim_getopt_info *goi, const struct jim_nvp *lookup, int hadprefix)
-{
- jim_getopt_nvp_unknown(goi, lookup, hadprefix);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetOpt_Obj(struct jim_getopt_info *goi, Jim_Obj **puthere)
-{
- return jim_getopt_obj(goi, puthere);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetOpt_Setup(struct jim_getopt_info *goi, Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- return jim_getopt_setup(goi, interp, argc, argv);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetOpt_String(struct jim_getopt_info *goi, const char **puthere, int *len)
-{
- return jim_getopt_string(goi, puthere, len);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_GetOpt_Wide(struct jim_getopt_info *goi, jim_wide *puthere)
-{
- return jim_getopt_wide(goi, puthere);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_Nvp_name2value(Jim_Interp *interp, const struct jim_nvp *nvp_table, const char *name, struct jim_nvp **result)
-{
- return jim_nvp_name2value(interp, nvp_table, name, result);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_Nvp_name2value_nocase(Jim_Interp *interp, const struct jim_nvp *nvp_table, const char *name,
- struct jim_nvp **result)
-{
- return jim_nvp_name2value_nocase(interp, nvp_table, name, result);
-}
-
-static inline __attribute__ ((deprecated))
-struct jim_nvp *Jim_Nvp_name2value_nocase_simple(const struct jim_nvp *nvp_table, const char *name)
-{
- return jim_nvp_name2value_nocase_simple(nvp_table, name);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_Nvp_name2value_obj(Jim_Interp *interp, const struct jim_nvp *nvp_table, Jim_Obj *name_obj,
- struct jim_nvp **result)
-{
- return jim_nvp_name2value_obj(interp, nvp_table, name_obj, result);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_Nvp_name2value_obj_nocase(Jim_Interp *interp, const struct jim_nvp *nvp_table, Jim_Obj *name_obj,
- struct jim_nvp **result)
-{
- return jim_nvp_name2value_obj_nocase(interp, nvp_table, name_obj, result);
-}
-
-static inline __attribute__ ((deprecated))
-struct jim_nvp *Jim_Nvp_name2value_simple(const struct jim_nvp *nvp_table, const char *name)
-{
- return jim_nvp_name2value_simple(nvp_table, name);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_Nvp_value2name(Jim_Interp *interp, const struct jim_nvp *nvp_table, int value, struct jim_nvp **result)
-{
- return jim_nvp_value2name(interp, nvp_table, value, result);
-}
-
-static inline __attribute__ ((deprecated))
-int Jim_Nvp_value2name_obj(Jim_Interp *interp, const struct jim_nvp *nvp_table, Jim_Obj *value_obj,
- struct jim_nvp **result)
-{
- return jim_nvp_value2name_obj(interp, nvp_table, value_obj, result);
-}
-
-static inline __attribute__ ((deprecated))
-struct jim_nvp *Jim_Nvp_value2name_simple(const struct jim_nvp *nvp_table, int v)
-{
- return jim_nvp_value2name_simple(nvp_table, v);
-}
-
-static inline __attribute__ ((deprecated))
-void Jim_SetResult_NvpUnknown(Jim_Interp *interp, Jim_Obj *param_name, Jim_Obj *param_value,
- const struct jim_nvp *nvp_table)
-{
- jim_set_result_nvp_unknown(interp, param_name, param_value, nvp_table);
-}
-
-typedef struct jim_getopt_info Jim_GetOptInfo __attribute__ ((deprecated));
-typedef struct jim_nvp Jim_Nvp __attribute__ ((deprecated));
-
#endif /* OPENOCD_HELPER_JIM_NVP_H */
diff --git a/src/helper/log.c b/src/helper/log.c
index 106d228..e6a70a3 100644
--- a/src/helper/log.c
+++ b/src/helper/log.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -306,12 +295,6 @@ void log_exit(void)
log_output = NULL;
}
-int set_log_output(struct command_context *cmd_ctx, FILE *output)
-{
- log_output = output;
- return ERROR_OK;
-}
-
/* add/remove log callback handler */
int log_add_callback(log_callback_fn fn, void *priv)
{
diff --git a/src/helper/log.h b/src/helper/log.h
index f0378ae..ee71bf0 100644
--- a/src/helper/log.h
+++ b/src/helper/log.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_LOG_H
@@ -73,7 +62,6 @@ __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6)));
*/
void log_init(void);
void log_exit(void);
-int set_log_output(struct command_context *cmd_ctx, FILE *output);
int log_register_commands(struct command_context *cmd_ctx);
diff --git a/src/helper/options.c b/src/helper/options.c
index 1996727..327c418 100644
--- a/src/helper/options.c
+++ b/src/helper/options.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2004, 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007-2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/replacements.c b/src/helper/replacements.c
index c34b17e..b30dbd5 100644
--- a/src/helper/replacements.c
+++ b/src/helper/replacements.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* DANGER!!!! These must be defined *BEFORE* replacements.h and the malloc() macro!!!! */
diff --git a/src/helper/replacements.h b/src/helper/replacements.h
index 4d70d9c..9eac4d2 100644
--- a/src/helper/replacements.h
+++ b/src/helper/replacements.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_REPLACEMENTS_H
diff --git a/src/helper/startup.tcl b/src/helper/startup.tcl
index 6389262..5a0d479 100644
--- a/src/helper/startup.tcl
+++ b/src/helper/startup.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Defines basic Tcl procs that must exist for OpenOCD scripts to work.
#
# Embedded into OpenOCD executable
diff --git a/src/helper/system.h b/src/helper/system.h
index 0d8be64..bd96d62 100644
--- a/src/helper/system.h
+++ b/src/helper/system.h
@@ -1,21 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007-2008 by Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 by Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_SYSTEM_H
diff --git a/src/helper/time_support.c b/src/helper/time_support.c
index 861889e..dda3cb3 100644
--- a/src/helper/time_support.c
+++ b/src/helper/time_support.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/time_support.h b/src/helper/time_support.h
index b83c0ac..c984296 100644
--- a/src/helper/time_support.h
+++ b/src/helper/time_support.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_TIME_SUPPORT_H
diff --git a/src/helper/time_support_common.c b/src/helper/time_support_common.c
index b733c27..9d17a31 100644
--- a/src/helper/time_support_common.c
+++ b/src/helper/time_support_common.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/types.h b/src/helper/types.h
index 010529f..b99ece1 100644
--- a/src/helper/types.h
+++ b/src/helper/types.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2004, 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_TYPES_H
diff --git a/src/helper/update_jep106.pl b/src/helper/update_jep106.pl
index 561e04b..60472e3 100755
--- a/src/helper/update_jep106.pl
+++ b/src/helper/update_jep106.pl
@@ -1,4 +1,6 @@
#!/usr/bin/perl
+# SPDX-License-Identifier: GPL-2.0-or-later
+
use strict;
use warnings;
use File::Basename;
diff --git a/src/helper/util.c b/src/helper/util.c
index be163b2..bf18f8e 100644
--- a/src/helper/util.c
+++ b/src/helper/util.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Øyvind Harboe *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* this file contains various functionality useful to standalone systems */
diff --git a/src/helper/util.h b/src/helper/util.h
index c9a11dd..3ccdc4f 100644
--- a/src/helper/util.h
+++ b/src/helper/util.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Øyvind Harboe *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_HELPER_UTIL_H
diff --git a/src/jtag/Makefile.am b/src/jtag/Makefile.am
index 23424f5..43c6f8b 100644
--- a/src/jtag/Makefile.am
+++ b/src/jtag/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libjtag.la
%C%_libjtag_la_LIBADD =
diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c
index 1c34a26..58d97d3 100644
--- a/src/jtag/adapter.c
+++ b/src/jtag/adapter.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de>
* Copyright (C) 2007-2010 Øyvind Harboe <oyvind.harboe@zylin.com>
@@ -32,6 +32,8 @@ enum adapter_clk_mode {
CLOCK_MODE_RCLK
};
+#define DEFAULT_CLOCK_SPEED_KHZ 100U
+
/**
* Adapter configuration
*/
@@ -42,13 +44,74 @@ static struct {
enum adapter_clk_mode clock_mode;
int speed_khz;
int rclk_fallback_speed_khz;
+ struct adapter_gpio_config gpios[ADAPTER_GPIO_IDX_NUM];
+ bool gpios_initialized; /* Initialization of GPIOs to their unset values performed at run time */
} adapter_config;
+static const struct gpio_map {
+ const char *name;
+ enum adapter_gpio_direction direction;
+ bool permit_drive_option;
+ bool permit_init_state_option;
+} gpio_map[ADAPTER_GPIO_IDX_NUM] = {
+ [ADAPTER_GPIO_IDX_TDO] = { "tdo", ADAPTER_GPIO_DIRECTION_INPUT, false, true, },
+ [ADAPTER_GPIO_IDX_TDI] = { "tdi", ADAPTER_GPIO_DIRECTION_OUTPUT, true, true, },
+ [ADAPTER_GPIO_IDX_TMS] = { "tms", ADAPTER_GPIO_DIRECTION_OUTPUT, true, true, },
+ [ADAPTER_GPIO_IDX_TCK] = { "tck", ADAPTER_GPIO_DIRECTION_OUTPUT, true, true, },
+ [ADAPTER_GPIO_IDX_SWDIO] = { "swdio", ADAPTER_GPIO_DIRECTION_BIDIRECTIONAL, true, true, },
+ [ADAPTER_GPIO_IDX_SWDIO_DIR] = { "swdio_dir", ADAPTER_GPIO_DIRECTION_OUTPUT, true, false, },
+ [ADAPTER_GPIO_IDX_SWCLK] = { "swclk", ADAPTER_GPIO_DIRECTION_OUTPUT, true, true, },
+ [ADAPTER_GPIO_IDX_TRST] = { "trst", ADAPTER_GPIO_DIRECTION_OUTPUT, false, true, },
+ [ADAPTER_GPIO_IDX_SRST] = { "srst", ADAPTER_GPIO_DIRECTION_OUTPUT, false, true, },
+ [ADAPTER_GPIO_IDX_LED] = { "led", ADAPTER_GPIO_DIRECTION_OUTPUT, true, true, },
+};
+
bool is_adapter_initialized(void)
{
return adapter_config.adapter_initialized;
}
+/* For convenience of the bit-banging drivers keep the gpio_config drive
+ * settings for srst and trst in sync with values set by the "adapter
+ * reset_config" command.
+ */
+static void sync_adapter_reset_with_gpios(void)
+{
+ enum reset_types cfg = jtag_get_reset_config();
+ if (cfg & RESET_SRST_PUSH_PULL)
+ adapter_config.gpios[ADAPTER_GPIO_IDX_SRST].drive = ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL;
+ else
+ adapter_config.gpios[ADAPTER_GPIO_IDX_SRST].drive = ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN;
+ if (cfg & RESET_TRST_OPEN_DRAIN)
+ adapter_config.gpios[ADAPTER_GPIO_IDX_TRST].drive = ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN;
+ else
+ adapter_config.gpios[ADAPTER_GPIO_IDX_TRST].drive = ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL;
+}
+
+static void adapter_driver_gpios_init(void)
+{
+ if (adapter_config.gpios_initialized)
+ return;
+
+ for (int i = 0; i < ADAPTER_GPIO_IDX_NUM; ++i) {
+ adapter_config.gpios[i].gpio_num = -1;
+ adapter_config.gpios[i].chip_num = -1;
+ if (gpio_map[i].direction == ADAPTER_GPIO_DIRECTION_INPUT)
+ adapter_config.gpios[i].init_state = ADAPTER_GPIO_INIT_STATE_INPUT;
+ }
+
+ /* Drivers assume active low, and this is the normal behaviour for reset
+ * lines so should be the default. */
+ adapter_config.gpios[ADAPTER_GPIO_IDX_SRST].active_low = true;
+ adapter_config.gpios[ADAPTER_GPIO_IDX_TRST].active_low = true;
+ sync_adapter_reset_with_gpios();
+
+ /* JTAG GPIOs should be inactive except for tms */
+ adapter_config.gpios[ADAPTER_GPIO_IDX_TMS].init_state = ADAPTER_GPIO_INIT_STATE_ACTIVE;
+
+ adapter_config.gpios_initialized = true;
+}
+
/**
* Do low-level setup like initializing registers, output signals,
* and clocking.
@@ -65,7 +128,21 @@ int adapter_init(struct command_context *cmd_ctx)
return ERROR_JTAG_INVALID_INTERFACE;
}
+ adapter_driver_gpios_init();
+
int retval;
+
+ if (adapter_config.clock_mode == CLOCK_MODE_UNSELECTED) {
+ LOG_WARNING("An adapter speed is not selected in the init scripts."
+ " OpenOCD will try to run the adapter at the low speed (%d kHz)",
+ DEFAULT_CLOCK_SPEED_KHZ);
+ LOG_WARNING("To remove this warnings and achieve reasonable communication speed with the target,"
+ " set \"adapter speed\" or \"jtag_rclk\" in the init scripts.");
+ retval = adapter_config_khz(DEFAULT_CLOCK_SPEED_KHZ);
+ if (retval != ERROR_OK)
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
retval = adapter_driver->init();
if (retval != ERROR_OK)
return retval;
@@ -76,12 +153,6 @@ int adapter_init(struct command_context *cmd_ctx)
return ERROR_OK;
}
- if (adapter_config.clock_mode == CLOCK_MODE_UNSELECTED) {
- LOG_ERROR("An adapter speed is not selected in the init script."
- " Insert a call to \"adapter speed\" or \"jtag_rclk\" to proceed.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
int requested_khz = adapter_get_speed_khz();
int actual_khz = requested_khz;
int speed_var = 0;
@@ -528,6 +599,8 @@ next:
old_cfg &= ~mask;
new_cfg |= old_cfg;
jtag_set_reset_config(new_cfg);
+ sync_adapter_reset_with_gpios();
+
} else
new_cfg = jtag_get_reset_config();
@@ -758,6 +831,218 @@ COMMAND_HANDLER(handle_adapter_reset_de_assert)
(srst == VALUE_DEASSERT) ? SRST_DEASSERT : SRST_ASSERT);
}
+static int get_gpio_index(const char *signal_name)
+{
+ for (int i = 0; i < ADAPTER_GPIO_IDX_NUM; ++i) {
+ if (strcmp(gpio_map[i].name, signal_name) == 0)
+ return i;
+ }
+ return -1;
+}
+
+static COMMAND_HELPER(helper_adapter_gpio_print_config, enum adapter_gpio_config_index gpio_idx)
+{
+ struct adapter_gpio_config *gpio_config = &adapter_config.gpios[gpio_idx];
+ const char *active_state = gpio_config->active_low ? "low" : "high";
+ const char *dir = "";
+ const char *drive = "";
+ const char *pull = "";
+ const char *init_state = "";
+
+ switch (gpio_map[gpio_idx].direction) {
+ case ADAPTER_GPIO_DIRECTION_INPUT:
+ dir = "input";
+ break;
+ case ADAPTER_GPIO_DIRECTION_OUTPUT:
+ dir = "output";
+ break;
+ case ADAPTER_GPIO_DIRECTION_BIDIRECTIONAL:
+ dir = "bidirectional";
+ break;
+ }
+
+ if (gpio_map[gpio_idx].permit_drive_option) {
+ switch (gpio_config->drive) {
+ case ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL:
+ drive = ", push-pull";
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN:
+ drive = ", open-drain";
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE:
+ drive = ", open-source";
+ break;
+ }
+ }
+
+ switch (gpio_config->pull) {
+ case ADAPTER_GPIO_PULL_NONE:
+ pull = ", pull-none";
+ break;
+ case ADAPTER_GPIO_PULL_UP:
+ pull = ", pull-up";
+ break;
+ case ADAPTER_GPIO_PULL_DOWN:
+ pull = ", pull-down";
+ break;
+ }
+
+ if (gpio_map[gpio_idx].permit_init_state_option) {
+ switch (gpio_config->init_state) {
+ case ADAPTER_GPIO_INIT_STATE_INACTIVE:
+ init_state = ", init-state inactive";
+ break;
+ case ADAPTER_GPIO_INIT_STATE_ACTIVE:
+ init_state = ", init-state active";
+ break;
+ case ADAPTER_GPIO_INIT_STATE_INPUT:
+ init_state = ", init-state input";
+ break;
+ }
+ }
+
+ command_print(CMD, "adapter gpio %s (%s): num %d, chip %d, active-%s%s%s%s",
+ gpio_map[gpio_idx].name, dir, gpio_config->gpio_num, gpio_config->chip_num, active_state,
+ drive, pull, init_state);
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(helper_adapter_gpio_print_all_configs)
+{
+ for (int i = 0; i < ADAPTER_GPIO_IDX_NUM; ++i)
+ CALL_COMMAND_HANDLER(helper_adapter_gpio_print_config, i);
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(adapter_gpio_config_handler)
+{
+ unsigned int i = 1;
+ struct adapter_gpio_config *gpio_config;
+
+ adapter_driver_gpios_init();
+
+ if (CMD_ARGC == 0) {
+ CALL_COMMAND_HANDLER(helper_adapter_gpio_print_all_configs);
+ return ERROR_OK;
+ }
+
+ int gpio_idx = get_gpio_index(CMD_ARGV[0]);
+ if (gpio_idx == -1) {
+ LOG_ERROR("adapter has no gpio named %s", CMD_ARGV[0]);
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ if (CMD_ARGC == 1) {
+ CALL_COMMAND_HANDLER(helper_adapter_gpio_print_config, gpio_idx);
+ return ERROR_OK;
+ }
+
+ gpio_config = &adapter_config.gpios[gpio_idx];
+ while (i < CMD_ARGC) {
+ LOG_DEBUG("Processing %s", CMD_ARGV[i]);
+
+ if (isdigit(*CMD_ARGV[i])) {
+ int gpio_num; /* Use a meaningful output parameter for more helpful error messages */
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[i], gpio_num);
+ gpio_config->gpio_num = gpio_num;
+ ++i;
+ continue;
+ }
+
+ if (strcmp(CMD_ARGV[i], "-chip") == 0) {
+ if (CMD_ARGC - i < 2) {
+ LOG_ERROR("-chip option requires a parameter");
+ return ERROR_FAIL;
+ }
+ LOG_DEBUG("-chip arg is %s", CMD_ARGV[i + 1]);
+ int chip_num; /* Use a meaningful output parameter for more helpful error messages */
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[i + 1], chip_num);
+ gpio_config->chip_num = chip_num;
+ i += 2;
+ continue;
+ }
+
+ if (strcmp(CMD_ARGV[i], "-active-high") == 0) {
+ ++i;
+ gpio_config->active_low = false;
+ continue;
+ }
+ if (strcmp(CMD_ARGV[i], "-active-low") == 0) {
+ ++i;
+ gpio_config->active_low = true;
+ continue;
+ }
+
+ if (gpio_map[gpio_idx].permit_drive_option) {
+ if (strcmp(CMD_ARGV[i], "-push-pull") == 0) {
+ ++i;
+ gpio_config->drive = ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL;
+ continue;
+ }
+ if (strcmp(CMD_ARGV[i], "-open-drain") == 0) {
+ ++i;
+ gpio_config->drive = ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN;
+ continue;
+ }
+ if (strcmp(CMD_ARGV[i], "-open-source") == 0) {
+ ++i;
+ gpio_config->drive = ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE;
+ continue;
+ }
+ }
+
+ if (strcmp(CMD_ARGV[i], "-pull-none") == 0) {
+ ++i;
+ gpio_config->pull = ADAPTER_GPIO_PULL_NONE;
+ continue;
+ }
+ if (strcmp(CMD_ARGV[i], "-pull-up") == 0) {
+ ++i;
+ gpio_config->pull = ADAPTER_GPIO_PULL_UP;
+ continue;
+ }
+ if (strcmp(CMD_ARGV[i], "-pull-down") == 0) {
+ ++i;
+ gpio_config->pull = ADAPTER_GPIO_PULL_DOWN;
+ continue;
+ }
+
+ if (gpio_map[gpio_idx].permit_init_state_option) {
+ if (strcmp(CMD_ARGV[i], "-init-inactive") == 0) {
+ ++i;
+ gpio_config->init_state = ADAPTER_GPIO_INIT_STATE_INACTIVE;
+ continue;
+ }
+ if (strcmp(CMD_ARGV[i], "-init-active") == 0) {
+ ++i;
+ gpio_config->init_state = ADAPTER_GPIO_INIT_STATE_ACTIVE;
+ continue;
+ }
+
+ if (gpio_map[gpio_idx].direction == ADAPTER_GPIO_DIRECTION_BIDIRECTIONAL &&
+ strcmp(CMD_ARGV[i], "-init-input") == 0) {
+ ++i;
+ gpio_config->init_state = ADAPTER_GPIO_INIT_STATE_INPUT;
+ continue;
+ }
+ }
+
+ LOG_ERROR("illegal option for adapter %s %s: %s",
+ CMD_NAME, gpio_map[gpio_idx].name, CMD_ARGV[i]);
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ /* Force swdio_dir init state to be compatible with swdio init state */
+ if (gpio_idx == ADAPTER_GPIO_IDX_SWDIO)
+ adapter_config.gpios[ADAPTER_GPIO_IDX_SWDIO_DIR].init_state =
+ (gpio_config->init_state == ADAPTER_GPIO_INIT_STATE_INPUT) ?
+ ADAPTER_GPIO_INIT_STATE_INACTIVE :
+ ADAPTER_GPIO_INIT_STATE_ACTIVE;
+
+ return ERROR_OK;
+}
+
#ifdef HAVE_LIBUSB_GET_PORT_NUMBERS
COMMAND_HANDLER(handle_usb_location_command)
{
@@ -875,6 +1160,19 @@ static const struct command_registration adapter_command_handlers[] = {
.help = "Controls SRST and TRST lines.",
.usage = "|assert [srst|trst [deassert|assert srst|trst]]",
},
+ {
+ .name = "gpio",
+ .handler = adapter_gpio_config_handler,
+ .mode = COMMAND_CONFIG,
+ .help = "gpio adapter command group",
+ .usage = "[ tdo|tdi|tms|tck|trst|swdio|swdio_dir|swclk|srst|led"
+ "[gpio_number] "
+ "[-chip chip_number] "
+ "[-active-high|-active-low] "
+ "[-push-pull|-open-drain|-open-source] "
+ "[-pull-none|-pull-up|-pull-down]"
+ "[-init-inactive|-init-active|-init-input] ]",
+ },
COMMAND_REGISTRATION_DONE
};
@@ -911,3 +1209,14 @@ int adapter_register_commands(struct command_context *ctx)
{
return register_commands(ctx, NULL, interface_command_handlers);
}
+
+const char *adapter_gpio_get_name(enum adapter_gpio_config_index idx)
+{
+ return gpio_map[idx].name;
+}
+
+/* Allow drivers access to the GPIO configuration */
+const struct adapter_gpio_config *adapter_gpio_get_config(void)
+{
+ return adapter_config.gpios;
+}
diff --git a/src/jtag/adapter.h b/src/jtag/adapter.h
index 300769c..682fc10 100644
--- a/src/jtag/adapter.h
+++ b/src/jtag/adapter.h
@@ -11,6 +11,59 @@
#include <stddef.h>
#include <stdint.h>
+/** Supported output drive modes for adaptor GPIO */
+enum adapter_gpio_drive_mode {
+ ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL,
+ ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN,
+ ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE,
+};
+
+/** Supported GPIO directions */
+enum adapter_gpio_direction {
+ ADAPTER_GPIO_DIRECTION_INPUT,
+ ADAPTER_GPIO_DIRECTION_OUTPUT,
+ ADAPTER_GPIO_DIRECTION_BIDIRECTIONAL,
+};
+
+/** Supported initial states for GPIO */
+enum adapter_gpio_init_state {
+ ADAPTER_GPIO_INIT_STATE_INACTIVE, /* Should be zero so it is the default state */
+ ADAPTER_GPIO_INIT_STATE_ACTIVE,
+ ADAPTER_GPIO_INIT_STATE_INPUT,
+};
+
+/** Supported pull directions for GPIO */
+enum adapter_gpio_pull {
+ ADAPTER_GPIO_PULL_NONE,
+ ADAPTER_GPIO_PULL_UP,
+ ADAPTER_GPIO_PULL_DOWN,
+};
+
+/** Adapter GPIO */
+enum adapter_gpio_config_index {
+ ADAPTER_GPIO_IDX_TDO,
+ ADAPTER_GPIO_IDX_TDI,
+ ADAPTER_GPIO_IDX_TMS,
+ ADAPTER_GPIO_IDX_TCK,
+ ADAPTER_GPIO_IDX_TRST,
+ ADAPTER_GPIO_IDX_SWDIO,
+ ADAPTER_GPIO_IDX_SWDIO_DIR,
+ ADAPTER_GPIO_IDX_SWCLK,
+ ADAPTER_GPIO_IDX_SRST,
+ ADAPTER_GPIO_IDX_LED,
+ ADAPTER_GPIO_IDX_NUM, /* must be the last item */
+};
+
+/** Configuration options for a single GPIO */
+struct adapter_gpio_config {
+ int gpio_num;
+ int chip_num;
+ enum adapter_gpio_drive_mode drive; /* For outputs only */
+ enum adapter_gpio_init_state init_state;
+ bool active_low;
+ enum adapter_gpio_pull pull;
+};
+
struct command_context;
/** Register the adapter's commands */
@@ -58,4 +111,14 @@ unsigned int adapter_get_speed_khz(void);
/** Retrieves the serial number set with command 'adapter serial' */
const char *adapter_get_required_serial(void);
+/**
+ * Retrieves gpio name
+ */
+const char *adapter_gpio_get_name(enum adapter_gpio_config_index idx);
+
+/**
+ * Retrieves gpio configuration set with command "adapter gpio <signal_name>"
+ */
+const struct adapter_gpio_config *adapter_gpio_get_config(void);
+
#endif /* OPENOCD_JTAG_ADAPTER_H */
diff --git a/src/jtag/aice/Makefile.am b/src/jtag/aice/Makefile.am
index b6a7ba9..bc5dac1 100644
--- a/src/jtag/aice/Makefile.am
+++ b/src/jtag/aice/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libocdaice.la
%C%_libocdaice_la_CPPFLAGS = -I$(top_srcdir)/src/jtag/drivers $(AM_CPPFLAGS) $(LIBUSB1_CFLAGS)
diff --git a/src/jtag/aice/aice_interface.c b/src/jtag/aice/aice_interface.c
index cb126c6..89f82a0 100644
--- a/src/jtag/aice/aice_interface.c
+++ b/src/jtag/aice/aice_interface.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/aice/aice_interface.h b/src/jtag/aice/aice_interface.h
index 3bddfa3..615e90f 100644
--- a/src/jtag/aice/aice_interface.h
+++ b/src/jtag/aice/aice_interface.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_AICE_AICE_INTERFACE_H
diff --git a/src/jtag/aice/aice_pipe.c b/src/jtag/aice/aice_pipe.c
index e464b86..d2befde 100644
--- a/src/jtag/aice/aice_pipe.c
+++ b/src/jtag/aice/aice_pipe.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/jtag/aice/aice_pipe.h b/src/jtag/aice/aice_pipe.h
index 467ad0a..5a1f410 100644
--- a/src/jtag/aice/aice_pipe.h
+++ b/src/jtag/aice/aice_pipe.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_AICE_AICE_PIPE_H
diff --git a/src/jtag/aice/aice_port.c b/src/jtag/aice/aice_port.c
index 2fa346c..ac38cec 100644
--- a/src/jtag/aice/aice_port.c
+++ b/src/jtag/aice/aice_port.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/jtag/aice/aice_port.h b/src/jtag/aice/aice_port.h
index 1593688..fb914d8 100644
--- a/src/jtag/aice/aice_port.h
+++ b/src/jtag/aice/aice_port.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_AICE_AICE_PORT_H
diff --git a/src/jtag/aice/aice_transport.c b/src/jtag/aice/aice_transport.c
index 2f2542e..49f899d 100644
--- a/src/jtag/aice/aice_transport.c
+++ b/src/jtag/aice/aice_transport.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/aice/aice_transport.h b/src/jtag/aice/aice_transport.h
index 3af8bc2..b000031 100644
--- a/src/jtag/aice/aice_transport.h
+++ b/src/jtag/aice/aice_transport.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_AICE_AICE_TRANSPORT_H
diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c
index fc46e37..ef0ac63 100644
--- a/src/jtag/aice/aice_usb.c
+++ b/src/jtag/aice/aice_usb.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/jtag/aice/aice_usb.h b/src/jtag/aice/aice_usb.h
index 04021de..d85d25f 100644
--- a/src/jtag/aice/aice_usb.h
+++ b/src/jtag/aice/aice_usb.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 by Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_AICE_AICE_USB_H
diff --git a/src/jtag/commands.c b/src/jtag/commands.c
index 206c5e8..43cda8a 100644
--- a/src/jtag/commands.c
+++ b/src/jtag/commands.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/commands.h b/src/jtag/commands.h
index c037596..a8c7ffd 100644
--- a/src/jtag/commands.h
+++ b/src/jtag/commands.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_COMMANDS_H
diff --git a/src/jtag/core.c b/src/jtag/core.c
index bbc9877..5748011 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -147,14 +136,19 @@ int jtag_error_clear(void)
/************/
-static bool jtag_poll = 1;
+static bool jtag_poll = true;
+static bool jtag_poll_en = true;
bool is_jtag_poll_safe(void)
{
/* Polling can be disabled explicitly with set_enabled(false).
+ * It can also be masked with mask().
* It is also implicitly disabled while TRST is active and
* while SRST is gating the JTAG clock.
*/
+ if (!jtag_poll_en)
+ return false;
+
if (!transport_is_jtag())
return jtag_poll;
@@ -173,6 +167,18 @@ void jtag_poll_set_enabled(bool value)
jtag_poll = value;
}
+bool jtag_poll_mask(void)
+{
+ bool retval = jtag_poll_en;
+ jtag_poll_en = false;
+ return retval;
+}
+
+void jtag_poll_unmask(bool saved)
+{
+ jtag_poll_en = saved;
+}
+
/************/
struct jtag_tap *jtag_all_taps(void)
diff --git a/src/jtag/drivers/Makefile.am b/src/jtag/drivers/Makefile.am
index d05b7b9..6410f37 100644
--- a/src/jtag/drivers/Makefile.am
+++ b/src/jtag/drivers/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libocdjtagdrivers.la
%C%_libocdjtagdrivers_la_LIBADD =
@@ -106,6 +108,9 @@ endif
if PRESTO
DRIVERFILES += %D%/presto.c
endif
+if ESP_USB_JTAG
+DRIVERFILES += %D%/esp_usb_jtag.c
+endif
if USBPROG
DRIVERFILES += %D%/usbprog.c
endif
diff --git a/src/jtag/drivers/Makefile.rlink b/src/jtag/drivers/Makefile.rlink
index 6168332..538228d 100644
--- a/src/jtag/drivers/Makefile.rlink
+++ b/src/jtag/drivers/Makefile.rlink
@@ -1,20 +1,9 @@
-#***************************************************************************
-#* Copyright (C) 2008 Lou Deluxe *
-#* lou.openocd012@fixit.nospammail.net *
-#* *
-#* This program is free software; you can redistribute it and/or modify *
-#* it under the terms of the GNU General Public License as published by *
-#* the Free Software Foundation; either version 2 of the License, or *
-#* (at your option) any later version. *
-#* *
-#* This program is distributed in the hope that it will be useful, *
-#* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-#* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-#* GNU General Public License for more details. *
-#* *
-#* You should have received a copy of the GNU General Public License *
-#* along with this program. If not, see <http://www.gnu.org/licenses/>. *
-#***************************************************************************
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Copyright (C) 2008 Lou Deluxe
+# lou.openocd012@fixit.nospammail.net
+#
TOP = ../../..
INTERFACE_NAME = rlink
diff --git a/src/jtag/drivers/OpenULINK/Makefile b/src/jtag/drivers/OpenULINK/Makefile
index 9f6acc6..d65edcb 100644
--- a/src/jtag/drivers/OpenULINK/Makefile
+++ b/src/jtag/drivers/OpenULINK/Makefile
@@ -1,20 +1,9 @@
-############################################################################
-# Copyright (C) 2011 by Martin Schmoelzer #
-# <martin.schmoelzer@student.tuwien.ac.at> #
-# #
-# This program is free software; you can redistribute it and/or modify #
-# it under the terms of the GNU General Public License as published by #
-# the Free Software Foundation; either version 2 of the License, or #
-# (at your option) any later version. #
-# #
-# This program is distributed in the hope that it will be useful, #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the #
-# GNU General Public License for more details. #
-# #
-# You should have received a copy of the GNU General Public License #
-# along with this program. If not, see <http://www.gnu.org/licenses/>. #
-############################################################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Copyright (C) 2011 by Martin Schmoelzer
+# <martin.schmoelzer@student.tuwien.ac.at>
+#
# Define the name of our tools. Some distributions (e. g. Fedora) prefix
# the SDCC executables, change this accordingly!
diff --git a/src/jtag/drivers/OpenULINK/include/common.h b/src/jtag/drivers/OpenULINK/include/common.h
index 56222fe..8f41fd0 100644
--- a/src/jtag/drivers/OpenULINK/include/common.h
+++ b/src/jtag/drivers/OpenULINK/include/common.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __COMMON_H
diff --git a/src/jtag/drivers/OpenULINK/include/delay.h b/src/jtag/drivers/OpenULINK/include/delay.h
index ed454be..be0d762 100644
--- a/src/jtag/drivers/OpenULINK/include/delay.h
+++ b/src/jtag/drivers/OpenULINK/include/delay.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __DELAY_H
diff --git a/src/jtag/drivers/OpenULINK/include/io.h b/src/jtag/drivers/OpenULINK/include/io.h
index 497c235..1330ebd 100644
--- a/src/jtag/drivers/OpenULINK/include/io.h
+++ b/src/jtag/drivers/OpenULINK/include/io.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __IO_H
diff --git a/src/jtag/drivers/OpenULINK/include/jtag.h b/src/jtag/drivers/OpenULINK/include/jtag.h
index fa492b9..1b5c3af 100644
--- a/src/jtag/drivers/OpenULINK/include/jtag.h
+++ b/src/jtag/drivers/OpenULINK/include/jtag.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __JTAG_H
diff --git a/src/jtag/drivers/OpenULINK/include/main.h b/src/jtag/drivers/OpenULINK/include/main.h
index 9e7dd5a..d399c33 100644
--- a/src/jtag/drivers/OpenULINK/include/main.h
+++ b/src/jtag/drivers/OpenULINK/include/main.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __MAIN_H
diff --git a/src/jtag/drivers/OpenULINK/include/msgtypes.h b/src/jtag/drivers/OpenULINK/include/msgtypes.h
index f761a84..ae61ddb 100644
--- a/src/jtag/drivers/OpenULINK/include/msgtypes.h
+++ b/src/jtag/drivers/OpenULINK/include/msgtypes.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
diff --git a/src/jtag/drivers/OpenULINK/include/protocol.h b/src/jtag/drivers/OpenULINK/include/protocol.h
index 0b6a7d6..91b5640 100644
--- a/src/jtag/drivers/OpenULINK/include/protocol.h
+++ b/src/jtag/drivers/OpenULINK/include/protocol.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __PROTOCOL_H
diff --git a/src/jtag/drivers/OpenULINK/include/reg_ezusb.h b/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
index 4988367..6c38ab6 100644
--- a/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
+++ b/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef REG_EZUSB_H
diff --git a/src/jtag/drivers/OpenULINK/include/usb.h b/src/jtag/drivers/OpenULINK/include/usb.h
index 9a261fe..30968b3 100644
--- a/src/jtag/drivers/OpenULINK/include/usb.h
+++ b/src/jtag/drivers/OpenULINK/include/usb.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __USB_H
diff --git a/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51 b/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51
index f10ad48..f62508b 100644
--- a/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51
+++ b/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51
@@ -1,20 +1,9 @@
-;--------------------------------------------------------------------------;
-; Copyright (C) 2011-2013 by Martin Schmoelzer ;
-; <martin.schmoelzer@student.tuwien.ac.at> ;
-; ;
-; This program is free software; you can redistribute it and/or modify ;
-; it under the terms of the GNU General Public License as published by ;
-; the Free Software Foundation; either version 2 of the License, or ;
-; (at your option) any later version. ;
-; ;
-; This program is distributed in the hope that it will be useful, ;
-; but WITHOUT ANY WARRANTY; without even the implied warranty of ;
-; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;
-; GNU General Public License for more details. ;
-; ;
-; You should have received a copy of the GNU General Public License ;
-; along with this program. If not, see <http://www.gnu.org/licenses/>. ;
-;--------------------------------------------------------------------------;
+; SPDX-License-Identifier: GPL-2.0-or-later
+
+;
+; Copyright (C) 2011-2013 by Martin Schmoelzer
+; <martin.schmoelzer@student.tuwien.ac.at>
+;
.module JUMPTABLE
.globl USB_AutoVector
diff --git a/src/jtag/drivers/OpenULINK/src/delay.c b/src/jtag/drivers/OpenULINK/src/delay.c
index 3260567..b68e814 100644
--- a/src/jtag/drivers/OpenULINK/src/delay.c
+++ b/src/jtag/drivers/OpenULINK/src/delay.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "delay.h"
diff --git a/src/jtag/drivers/OpenULINK/src/jtag.c b/src/jtag/drivers/OpenULINK/src/jtag.c
index c76f034..c9253a3 100644
--- a/src/jtag/drivers/OpenULINK/src/jtag.c
+++ b/src/jtag/drivers/OpenULINK/src/jtag.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "jtag.h"
diff --git a/src/jtag/drivers/OpenULINK/src/main.c b/src/jtag/drivers/OpenULINK/src/main.c
index f331c9e..51d3a3b 100644
--- a/src/jtag/drivers/OpenULINK/src/main.c
+++ b/src/jtag/drivers/OpenULINK/src/main.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "main.h"
diff --git a/src/jtag/drivers/OpenULINK/src/protocol.c b/src/jtag/drivers/OpenULINK/src/protocol.c
index f8f84ed..b3d5622 100644
--- a/src/jtag/drivers/OpenULINK/src/protocol.c
+++ b/src/jtag/drivers/OpenULINK/src/protocol.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "protocol.h"
diff --git a/src/jtag/drivers/OpenULINK/src/usb.c b/src/jtag/drivers/OpenULINK/src/usb.c
index 032b23b..408e212 100644
--- a/src/jtag/drivers/OpenULINK/src/usb.c
+++ b/src/jtag/drivers/OpenULINK/src/usb.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011-2013 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
diff --git a/src/jtag/drivers/am335xgpio.c b/src/jtag/drivers/am335xgpio.c
index e04c44c..e641a4f 100644
--- a/src/jtag/drivers/am335xgpio.c
+++ b/src/jtag/drivers/am335xgpio.c
@@ -1,43 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2022 by Steve Marple, stevemarple@googlemail.com *
* *
* Based on bcm2835gpio.c and linuxgpiod.c *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
+#include <jtag/adapter.h>
#include <jtag/interface.h>
#include <transport/transport.h>
#include "bitbang.h"
#include <sys/mman.h>
-/*
- * GPIO register base addresses. Values taken from "AM335x and AMIC110 Sitara
+/* GPIO register base addresses. Values taken from "AM335x and AMIC110 Sitara
* Processors Technical Reference Manual", Chapter 2 Memory Map.
*/
-#define AM335XGPIO_NUM_GPIO_PORTS 4
+#define AM335XGPIO_NUM_GPIO_PER_CHIP 32
+#define AM335XGPIO_NUM_GPIO_CHIPS 4
#define AM335XGPIO_GPIO0_HW_ADDR 0x44E07000
#define AM335XGPIO_GPIO1_HW_ADDR 0x4804C000
#define AM335XGPIO_GPIO2_HW_ADDR 0x481AC000
#define AM335XGPIO_GPIO3_HW_ADDR 0x481AE000
-/* 32-bit offsets from GPIO port base address. Values taken from "AM335x and
+/* 32-bit offsets from GPIO chip base address. Values taken from "AM335x and
* AMIC110 Sitara Processors Technical Reference Manual", Chapter 25
* General-Purpose Input/Output.
*/
@@ -47,34 +37,34 @@
#define AM335XGPIO_GPIO_CLEARDATAOUT_OFFSET (0x190 / 4)
#define AM335XGPIO_GPIO_SETDATAOUT_OFFSET (0x194 / 4)
-/* GPIOs are integer values; need to map to a port module, and the pin within
- * that module. GPIOs 0 to 31 map to GPIO0, 32 to 63 to GPIO1 etc. This scheme
- * matches that used by Linux on the BeagleBone.
- */
-#define AM335XGPIO_PORT_NUM(gpio_num) ((gpio_num) / 32)
-#define AM335XGPIO_BIT_NUM(gpio_num) ((gpio_num) % 32)
-#define AM335XGPIO_BIT_MASK(gpio_num) BIT(AM335XGPIO_BIT_NUM(gpio_num))
+#define AM335XGPIO_READ_REG(chip_num, offset) \
+ (*(am335xgpio_gpio_chip_mmap_addr[(chip_num)] + (offset)))
-#define AM335XGPIO_READ_REG(gpio_num, offset) \
- (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)))
+#define AM335XGPIO_WRITE_REG(chip_num, offset, value) \
+ (*(am335xgpio_gpio_chip_mmap_addr[(chip_num)] + (offset)) = (value))
-#define AM335XGPIO_WRITE_REG(gpio_num, offset, value) \
- (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)) = (value))
+#define AM335XGPIO_SET_REG_BITS(chip_num, offset, bit_mask) \
+ (*(am335xgpio_gpio_chip_mmap_addr[(chip_num)] + (offset)) |= (bit_mask))
-#define AM335XGPIO_SET_REG_BITS(gpio_num, offset, bit_mask) \
- (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)) |= (bit_mask))
+#define AM335XGPIO_CLEAR_REG_BITS(chip_num, offset, bit_mask) \
+ (*(am335xgpio_gpio_chip_mmap_addr[(chip_num)] + (offset)) &= ~(bit_mask))
-#define AM335XGPIO_CLEAR_REG_BITS(gpio_num, offset, bit_mask) \
- (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + (offset)) &= ~(bit_mask))
+#define AM335XGPIO_SET_INPUT(gpio_config) \
+ AM335XGPIO_SET_REG_BITS((gpio_config)->chip_num, AM335XGPIO_GPIO_OE_OFFSET, BIT((gpio_config)->gpio_num))
+#define AM335XGPIO_SET_OUTPUT(gpio_config) \
+ AM335XGPIO_CLEAR_REG_BITS((gpio_config)->chip_num, AM335XGPIO_GPIO_OE_OFFSET, BIT((gpio_config)->gpio_num))
+#define AM335XGPIO_SET_HIGH(gpio_config) \
+ AM335XGPIO_WRITE_REG((gpio_config)->chip_num, AM335XGPIO_GPIO_SETDATAOUT_OFFSET, BIT((gpio_config)->gpio_num))
+#define AM335XGPIO_SET_LOW(gpio_config) \
+ AM335XGPIO_WRITE_REG((gpio_config)->chip_num, AM335XGPIO_GPIO_CLEARDATAOUT_OFFSET, BIT((gpio_config)->gpio_num))
-enum amx335gpio_gpio_mode {
+enum amx335gpio_initial_gpio_mode {
AM335XGPIO_GPIO_MODE_INPUT,
- AM335XGPIO_GPIO_MODE_OUTPUT, /* To set output mode but not state */
AM335XGPIO_GPIO_MODE_OUTPUT_LOW,
AM335XGPIO_GPIO_MODE_OUTPUT_HIGH,
};
-static const uint32_t am335xgpio_gpio_port_hw_addr[AM335XGPIO_NUM_GPIO_PORTS] = {
+static const uint32_t am335xgpio_gpio_chip_hw_addr[AM335XGPIO_NUM_GPIO_CHIPS] = {
AM335XGPIO_GPIO0_HW_ADDR,
AM335XGPIO_GPIO1_HW_ADDR,
AM335XGPIO_GPIO2_HW_ADDR,
@@ -82,117 +72,151 @@ static const uint32_t am335xgpio_gpio_port_hw_addr[AM335XGPIO_NUM_GPIO_PORTS] =
};
/* Memory-mapped address pointers */
-static volatile uint32_t *am335xgpio_gpio_port_mmap_addr[AM335XGPIO_NUM_GPIO_PORTS];
+static volatile uint32_t *am335xgpio_gpio_chip_mmap_addr[AM335XGPIO_NUM_GPIO_CHIPS];
static int dev_mem_fd;
-
-/* GPIO numbers for each signal. Negative values are invalid */
-static int tck_gpio = -1;
-static enum amx335gpio_gpio_mode tck_gpio_mode;
-static int tms_gpio = -1;
-static enum amx335gpio_gpio_mode tms_gpio_mode;
-static int tdi_gpio = -1;
-static enum amx335gpio_gpio_mode tdi_gpio_mode;
-static int tdo_gpio = -1;
-static enum amx335gpio_gpio_mode tdo_gpio_mode;
-static int trst_gpio = -1;
-static enum amx335gpio_gpio_mode trst_gpio_mode;
-static int srst_gpio = -1;
-static enum amx335gpio_gpio_mode srst_gpio_mode;
-static int swclk_gpio = -1;
-static enum amx335gpio_gpio_mode swclk_gpio_mode;
-static int swdio_gpio = -1;
-static enum amx335gpio_gpio_mode swdio_gpio_mode;
-static int swdio_dir_gpio = -1;
-static enum amx335gpio_gpio_mode swdio_dir_gpio_mode;
-static int led_gpio = -1;
-static enum amx335gpio_gpio_mode led_gpio_mode = -1;
-
-static bool swdio_dir_is_active_high = true; /* Active state means output */
-static bool led_is_active_high = true;
+static enum amx335gpio_initial_gpio_mode initial_gpio_mode[ADAPTER_GPIO_IDX_NUM];
/* Transition delay coefficients */
static int speed_coeff = 600000;
static int speed_offset = 575;
static unsigned int jtag_delay;
-static int is_gpio_valid(int gpio_num)
-{
- return gpio_num >= 0 && gpio_num < (32 * AM335XGPIO_NUM_GPIO_PORTS);
-}
+static const struct adapter_gpio_config *adapter_gpio_config;
-static int get_gpio_value(int gpio_num)
+static bool is_gpio_config_valid(const struct adapter_gpio_config *gpio_config)
{
- unsigned int shift = AM335XGPIO_BIT_NUM(gpio_num);
- return (AM335XGPIO_READ_REG(gpio_num, AM335XGPIO_GPIO_DATAIN_OFFSET) >> shift) & 1;
+ return gpio_config->chip_num >= 0
+ && gpio_config->chip_num < AM335XGPIO_NUM_GPIO_CHIPS
+ && gpio_config->gpio_num >= 0
+ && gpio_config->gpio_num < AM335XGPIO_NUM_GPIO_PER_CHIP;
}
-static void set_gpio_value(int gpio_num, int value)
+static int get_gpio_value(const struct adapter_gpio_config *gpio_config)
{
- if (value)
- AM335XGPIO_WRITE_REG(gpio_num, AM335XGPIO_GPIO_SETDATAOUT_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
- else
- AM335XGPIO_WRITE_REG(gpio_num, AM335XGPIO_GPIO_CLEARDATAOUT_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
+ unsigned int shift = gpio_config->gpio_num;
+ uint32_t value = AM335XGPIO_READ_REG(gpio_config->chip_num, AM335XGPIO_GPIO_DATAIN_OFFSET);
+ value = (value >> shift) & 1;
+ return value ^ (gpio_config->active_low ? 1 : 0);
}
-static enum amx335gpio_gpio_mode get_gpio_mode(int gpio_num)
+static void set_gpio_value(const struct adapter_gpio_config *gpio_config, int value)
{
- if (AM335XGPIO_READ_REG(gpio_num, AM335XGPIO_GPIO_OE_OFFSET) & AM335XGPIO_BIT_MASK(gpio_num)) {
- return AM335XGPIO_GPIO_MODE_INPUT;
- } else {
- /* Return output level too so that pin mode can be fully restored */
- if (AM335XGPIO_READ_REG(gpio_num, AM335XGPIO_GPIO_DATAOUT_OFFSET) & AM335XGPIO_BIT_MASK(gpio_num))
- return AM335XGPIO_GPIO_MODE_OUTPUT_HIGH;
+ value = value ^ (gpio_config->active_low ? 1 : 0);
+ switch (gpio_config->drive) {
+ case ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL:
+ if (value)
+ AM335XGPIO_SET_HIGH(gpio_config);
else
- return AM335XGPIO_GPIO_MODE_OUTPUT_LOW;
+ AM335XGPIO_SET_LOW(gpio_config);
+ /* For performance reasons assume the GPIO is already set as an output
+ * and therefore the call can be omitted here.
+ */
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN:
+ if (value) {
+ AM335XGPIO_SET_INPUT(gpio_config);
+ } else {
+ AM335XGPIO_SET_LOW(gpio_config);
+ AM335XGPIO_SET_OUTPUT(gpio_config);
+ }
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE:
+ if (value) {
+ AM335XGPIO_SET_HIGH(gpio_config);
+ AM335XGPIO_SET_OUTPUT(gpio_config);
+ } else {
+ AM335XGPIO_SET_INPUT(gpio_config);
+ }
+ break;
}
}
-static void set_gpio_mode(int gpio_num, enum amx335gpio_gpio_mode gpio_mode)
+static enum amx335gpio_initial_gpio_mode get_gpio_mode(const struct adapter_gpio_config *gpio_config)
{
- if (gpio_mode == AM335XGPIO_GPIO_MODE_INPUT) {
- AM335XGPIO_SET_REG_BITS(gpio_num, AM335XGPIO_GPIO_OE_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
- return;
- }
-
- if (gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_LOW)
- set_gpio_value(gpio_num, 0);
- if (gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_HIGH)
- set_gpio_value(gpio_num, 1);
+ if (AM335XGPIO_READ_REG(gpio_config->chip_num, AM335XGPIO_GPIO_OE_OFFSET) & BIT(gpio_config->gpio_num))
+ return AM335XGPIO_GPIO_MODE_INPUT;
- if (gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT ||
- gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_LOW ||
- gpio_mode == AM335XGPIO_GPIO_MODE_OUTPUT_HIGH) {
- AM335XGPIO_CLEAR_REG_BITS(gpio_num, AM335XGPIO_GPIO_OE_OFFSET, AM335XGPIO_BIT_MASK(gpio_num));
- }
+ /* Return output level too so that pin mode can be fully restored */
+ if (AM335XGPIO_READ_REG(gpio_config->chip_num, AM335XGPIO_GPIO_DATAOUT_OFFSET) & BIT(gpio_config->gpio_num))
+ return AM335XGPIO_GPIO_MODE_OUTPUT_HIGH;
+ return AM335XGPIO_GPIO_MODE_OUTPUT_LOW;
}
-static const char *get_gpio_mode_name(enum amx335gpio_gpio_mode gpio_mode)
+static const char *get_gpio_mode_name(enum amx335gpio_initial_gpio_mode gpio_mode)
{
switch (gpio_mode) {
case AM335XGPIO_GPIO_MODE_INPUT:
return "input";
- case AM335XGPIO_GPIO_MODE_OUTPUT:
- return "output";
case AM335XGPIO_GPIO_MODE_OUTPUT_LOW:
return "output (low)";
case AM335XGPIO_GPIO_MODE_OUTPUT_HIGH:
return "output (high)";
- default:
- return "unknown";
+ }
+ return "unknown";
+}
+
+static void initialize_gpio(enum adapter_gpio_config_index idx)
+{
+ if (!is_gpio_config_valid(&adapter_gpio_config[idx]))
+ return;
+
+ initial_gpio_mode[idx] = get_gpio_mode(&adapter_gpio_config[idx]);
+ LOG_DEBUG("saved GPIO mode for %s (GPIO %d %d): %s",
+ adapter_gpio_get_name(idx), adapter_gpio_config[idx].chip_num, adapter_gpio_config[idx].gpio_num,
+ get_gpio_mode_name(initial_gpio_mode[idx]));
+
+ if (adapter_gpio_config[idx].pull != ADAPTER_GPIO_PULL_NONE) {
+ LOG_WARNING("am335xgpio does not support pull-up or pull-down settings (signal %s)",
+ adapter_gpio_get_name(idx));
+ }
+
+ switch (adapter_gpio_config[idx].init_state) {
+ case ADAPTER_GPIO_INIT_STATE_INACTIVE:
+ set_gpio_value(&adapter_gpio_config[idx], 0);
+ break;
+ case ADAPTER_GPIO_INIT_STATE_ACTIVE:
+ set_gpio_value(&adapter_gpio_config[idx], 1);
+ break;
+ case ADAPTER_GPIO_INIT_STATE_INPUT:
+ AM335XGPIO_SET_INPUT(&adapter_gpio_config[idx]);
+ break;
+ }
+
+ /* Direction for non push-pull is already set by set_gpio_value() */
+ if (adapter_gpio_config[idx].drive == ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL)
+ AM335XGPIO_SET_OUTPUT(&adapter_gpio_config[idx]);
+}
+
+static void restore_gpio(enum adapter_gpio_config_index idx)
+{
+ if (is_gpio_config_valid(&adapter_gpio_config[idx])) {
+ switch (initial_gpio_mode[idx]) {
+ case AM335XGPIO_GPIO_MODE_INPUT:
+ AM335XGPIO_SET_INPUT(&adapter_gpio_config[idx]);
+ break;
+ case AM335XGPIO_GPIO_MODE_OUTPUT_LOW:
+ AM335XGPIO_SET_LOW(&adapter_gpio_config[idx]);
+ AM335XGPIO_SET_OUTPUT(&adapter_gpio_config[idx]);
+ break;
+ case AM335XGPIO_GPIO_MODE_OUTPUT_HIGH:
+ AM335XGPIO_SET_HIGH(&adapter_gpio_config[idx]);
+ AM335XGPIO_SET_OUTPUT(&adapter_gpio_config[idx]);
+ break;
+ }
}
}
static bb_value_t am335xgpio_read(void)
{
- return get_gpio_value(tdo_gpio) ? BB_HIGH : BB_LOW;
+ return get_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TDO]) ? BB_HIGH : BB_LOW;
}
static int am335xgpio_write(int tck, int tms, int tdi)
{
- set_gpio_value(tdi_gpio, tdi);
- set_gpio_value(tms_gpio, tms);
- set_gpio_value(tck_gpio, tck); /* Write clock last */
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TDI], tdi);
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TMS], tms);
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TCK], tck); /* Write clock last */
for (unsigned int i = 0; i < jtag_delay; ++i)
asm volatile ("");
@@ -202,8 +226,8 @@ static int am335xgpio_write(int tck, int tms, int tdi)
static int am335xgpio_swd_write(int swclk, int swdio)
{
- set_gpio_value(swdio_gpio, swdio);
- set_gpio_value(swclk_gpio, swclk); /* Write clock last */
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO], swdio);
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK], swclk); /* Write clock last */
for (unsigned int i = 0; i < jtag_delay; ++i)
asm volatile ("");
@@ -214,49 +238,45 @@ static int am335xgpio_swd_write(int swclk, int swdio)
/* (1) assert or (0) deassert reset lines */
static int am335xgpio_reset(int trst, int srst)
{
- /* assume active low */
- if (is_gpio_valid(srst_gpio)) {
- if (jtag_get_reset_config() & RESET_SRST_PUSH_PULL)
- set_gpio_mode(srst_gpio, srst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
- else
- set_gpio_mode(srst_gpio, srst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_INPUT);
- }
+ /* As the "adapter reset_config" command keeps the srst and trst gpio drive
+ * mode settings in sync we can use our standard set_gpio_value() function
+ * that honours drive mode and active low.
+ */
+ if (is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_SRST]))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SRST], srst);
- /* assume active low */
- if (is_gpio_valid(trst_gpio)) {
- if (jtag_get_reset_config() & RESET_TRST_OPEN_DRAIN)
- set_gpio_mode(trst_gpio, trst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_INPUT);
- else
- set_gpio_mode(trst_gpio, trst ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
- }
+ if (is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_TRST]))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TRST], trst);
- LOG_DEBUG("am335xgpio_reset(%d, %d), trst_gpio: %d (%s), srst_gpio: %d (%s)",
+ LOG_DEBUG("am335xgpio_reset(%d, %d), trst_gpio: %d %d, srst_gpio: %d %d",
trst, srst,
- trst_gpio, get_gpio_mode_name(get_gpio_mode(trst_gpio)),
- srst_gpio, get_gpio_mode_name(get_gpio_mode(srst_gpio)));
+ adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].gpio_num,
+ adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].gpio_num);
return ERROR_OK;
}
static void am335xgpio_swdio_drive(bool is_output)
{
if (is_output) {
- set_gpio_value(swdio_dir_gpio, swdio_dir_is_active_high ? 1 : 0);
- set_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_OUTPUT);
+ if (is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR]))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);
+ AM335XGPIO_SET_OUTPUT(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO]);
} else {
- set_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_INPUT);
- set_gpio_value(swdio_dir_gpio, swdio_dir_is_active_high ? 0 : 1);
+ AM335XGPIO_SET_INPUT(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO]);
+ if (is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR]))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 0);
}
}
static int am335xgpio_swdio_read(void)
{
- return get_gpio_value(swdio_gpio);
+ return get_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO]);
}
static int am335xgpio_blink(int on)
{
- if (is_gpio_valid(led_gpio))
- set_gpio_value(led_gpio, (!on ^ led_is_active_high) ? 1 : 0);
+ if (is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED]))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED], on);
return ERROR_OK;
}
@@ -294,144 +314,6 @@ static int am335xgpio_speed(int speed)
return ERROR_OK;
}
-COMMAND_HANDLER(am335xgpio_handle_jtag_gpionums)
-{
- if (CMD_ARGC == 4) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], tms_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], tdi_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], tdo_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD, "AM335x GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
- tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tck)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
-
- command_print(CMD, "AM335x GPIO config: tck = %d", tck_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tms)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tms_gpio);
-
- command_print(CMD, "AM335x GPIO config: tms = %d", tms_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tdo)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdo_gpio);
-
- command_print(CMD, "AM335x GPIO config: tdo = %d", tdo_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_tdi)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdi_gpio);
-
- command_print(CMD, "AM335x GPIO config: tdi = %d", tdi_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_srst)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], srst_gpio);
-
- command_print(CMD, "AM335x GPIO config: srst = %d", srst_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_jtag_gpionum_trst)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], trst_gpio);
-
- command_print(CMD, "AM335x GPIO config: trst = %d", trst_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_swd_gpionums)
-{
- if (CMD_ARGC == 2) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD, "AM335x GPIO config: swclk = %d, swdio = %d", swclk_gpio, swdio_gpio);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_swd_gpionum_swclk)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
-
- command_print(CMD, "AM335x GPIO config: swclk = %d", swclk_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_swd_gpionum_swdio)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio);
-
- command_print(CMD, "AM335x GPIO config: swdio = %d", swdio_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_swd_gpionum_swdio_dir)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_dir_gpio);
-
- command_print(CMD, "AM335x GPIO config: swdio_dir = %d", swdio_dir_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_swd_dir_output_state)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_BOOL(CMD_ARGV[0], swdio_dir_is_active_high, "high", "low");
-
- command_print(CMD, "AM335x GPIO config: swdio_dir_output_state = %s", swdio_dir_is_active_high ? "high" : "low");
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_gpionum_led)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], led_gpio);
-
- command_print(CMD, "AM335x GPIO config: led = %d", led_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(am335xgpio_handle_led_on_state)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_BOOL(CMD_ARGV[0], led_is_active_high, "high", "low");
-
- command_print(CMD, "AM335x GPIO config: led_on_state = %s", led_is_active_high ? "high" : "low");
- return ERROR_OK;
-}
-
COMMAND_HANDLER(am335xgpio_handle_speed_coeffs)
{
if (CMD_ARGC == 2) {
@@ -446,104 +328,6 @@ COMMAND_HANDLER(am335xgpio_handle_speed_coeffs)
static const struct command_registration am335xgpio_subcommand_handlers[] = {
{
- .name = "jtag_nums",
- .handler = am335xgpio_handle_jtag_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for tck, tms, tdi, tdo (in that order).",
- .usage = "[tck tms tdi tdo]",
- },
- {
- .name = "tck_num",
- .handler = am335xgpio_handle_jtag_gpionum_tck,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tck.",
- .usage = "[tck]",
- },
- {
- .name = "tms_num",
- .handler = am335xgpio_handle_jtag_gpionum_tms,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tms.",
- .usage = "[tms]",
- },
- {
- .name = "tdo_num",
- .handler = am335xgpio_handle_jtag_gpionum_tdo,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tdo.",
- .usage = "[tdo]",
- },
- {
- .name = "tdi_num",
- .handler = am335xgpio_handle_jtag_gpionum_tdi,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tdi.",
- .usage = "[tdi]",
- },
- {
- .name = "swd_nums",
- .handler = am335xgpio_handle_swd_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for swclk, swdio (in that order).",
- .usage = "[swclk swdio]",
- },
- {
- .name = "swclk_num",
- .handler = am335xgpio_handle_swd_gpionum_swclk,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swclk.",
- .usage = "[swclk]",
- },
- {
- .name = "swdio_num",
- .handler = am335xgpio_handle_swd_gpionum_swdio,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swdio.",
- .usage = "[swdio]",
- },
- {
- .name = "swdio_dir_num",
- .handler = am335xgpio_handle_swd_gpionum_swdio_dir,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swdio direction control pin.",
- .usage = "[swdio_dir]",
- },
- {
- .name = "swdio_dir_output_state",
- .handler = am335xgpio_handle_swd_dir_output_state,
- .mode = COMMAND_CONFIG,
- .help = "required state for swdio_dir pin to select SWDIO buffer to be output.",
- .usage = "['off'|'on']",
- },
- {
- .name = "srst_num",
- .handler = am335xgpio_handle_jtag_gpionum_srst,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for srst.",
- .usage = "[srst]",
- },
- {
- .name = "trst_num",
- .handler = am335xgpio_handle_jtag_gpionum_trst,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for trst.",
- .usage = "[trst]",
- },
- {
- .name = "led_num",
- .handler = am335xgpio_handle_gpionum_led,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for led.",
- .usage = "[led]",
- },
- {
- .name = "led_on_state",
- .handler = am335xgpio_handle_led_on_state,
- .mode = COMMAND_CONFIG,
- .help = "required state for led pin to turn on LED.",
- .usage = "['off'|'on']",
- },
- {
.name = "speed_coeffs",
.handler = am335xgpio_handle_speed_coeffs,
.mode = COMMAND_CONFIG,
@@ -573,32 +357,40 @@ static struct jtag_interface am335xgpio_interface = {
static bool am335xgpio_jtag_mode_possible(void)
{
- if (!is_gpio_valid(tck_gpio))
+ if (!is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_TCK]))
return false;
- if (!is_gpio_valid(tms_gpio))
+ if (!is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_TMS]))
return false;
- if (!is_gpio_valid(tdi_gpio))
+ if (!is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_TDI]))
return false;
- if (!is_gpio_valid(tdo_gpio))
+ if (!is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_TDO]))
return false;
return true;
}
static bool am335xgpio_swd_mode_possible(void)
{
- if (!is_gpio_valid(swclk_gpio))
+ if (!is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK]))
return false;
- if (!is_gpio_valid(swdio_gpio))
+ if (!is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO]))
return false;
return true;
}
-static int am335xgpio_init(void)
+static void am335xgpio_munmap(void)
{
- bitbang_interface = &am335xgpio_bitbang;
+ for (unsigned int i = 0; i < AM335XGPIO_NUM_GPIO_CHIPS && am335xgpio_gpio_chip_mmap_addr[i] != MAP_FAILED; ++i)
+ if (munmap((void *)am335xgpio_gpio_chip_mmap_addr[i], sysconf(_SC_PAGE_SIZE)) < 0)
+ LOG_ERROR("Cannot unmap GPIO memory for chip %d: %s", i, strerror(errno));
+}
+static int am335xgpio_init(void)
+{
LOG_INFO("AM335x GPIO JTAG/SWD bitbang driver");
+ bitbang_interface = &am335xgpio_bitbang;
+ adapter_gpio_config = adapter_gpio_get_config();
+
if (transport_is_jtag() && !am335xgpio_jtag_mode_possible()) {
LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode");
return ERROR_JTAG_INIT_FAILED;
@@ -619,99 +411,81 @@ static int am335xgpio_init(void)
return ERROR_JTAG_INIT_FAILED;
}
- for (unsigned int i = 0; i < AM335XGPIO_NUM_GPIO_PORTS; ++i) {
- am335xgpio_gpio_port_mmap_addr[i] = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
- MAP_SHARED, dev_mem_fd, am335xgpio_gpio_port_hw_addr[i]);
+ for (unsigned int i = 0; i < AM335XGPIO_NUM_GPIO_CHIPS; ++i) {
+ am335xgpio_gpio_chip_mmap_addr[i] = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
+ MAP_SHARED, dev_mem_fd, am335xgpio_gpio_chip_hw_addr[i]);
- if (am335xgpio_gpio_port_mmap_addr[i] == MAP_FAILED) {
+ if (am335xgpio_gpio_chip_mmap_addr[i] == MAP_FAILED) {
LOG_ERROR("mmap: %s", strerror(errno));
+ am335xgpio_munmap();
close(dev_mem_fd);
return ERROR_JTAG_INIT_FAILED;
}
}
+ close(dev_mem_fd);
- /*
- * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST as outputs.
- * Drive TDI and TCK low, and TMS high.
+ /* Configure JTAG/SWD signals. Default directions and initial states are handled
+ * by adapter.c and "adapter gpio" command.
*/
if (transport_is_jtag()) {
- tdo_gpio_mode = get_gpio_mode(tdo_gpio);
- tdi_gpio_mode = get_gpio_mode(tdi_gpio);
- tck_gpio_mode = get_gpio_mode(tck_gpio);
- tms_gpio_mode = get_gpio_mode(tms_gpio);
- LOG_DEBUG("saved GPIO mode for tdo (GPIO #%d): %s", tdo_gpio, get_gpio_mode_name(tdo_gpio_mode));
- LOG_DEBUG("saved GPIO mode for tdi (GPIO #%d): %s", tdi_gpio, get_gpio_mode_name(tdi_gpio_mode));
- LOG_DEBUG("saved GPIO mode for tck (GPIO #%d): %s", tck_gpio, get_gpio_mode_name(tck_gpio_mode));
- LOG_DEBUG("saved GPIO mode for tms (GPIO #%d): %s", tms_gpio, get_gpio_mode_name(tms_gpio_mode));
-
- set_gpio_mode(tdo_gpio, AM335XGPIO_GPIO_MODE_INPUT);
- set_gpio_mode(tdi_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
- set_gpio_mode(tms_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
- set_gpio_mode(tck_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
-
- if (is_gpio_valid(trst_gpio)) {
- trst_gpio_mode = get_gpio_mode(trst_gpio);
- LOG_DEBUG("saved GPIO mode for trst (GPIO #%d): %s", trst_gpio, get_gpio_mode_name(trst_gpio_mode));
- }
+ initialize_gpio(ADAPTER_GPIO_IDX_TDO);
+ initialize_gpio(ADAPTER_GPIO_IDX_TDI);
+ initialize_gpio(ADAPTER_GPIO_IDX_TMS);
+ initialize_gpio(ADAPTER_GPIO_IDX_TCK);
+ initialize_gpio(ADAPTER_GPIO_IDX_TRST);
}
if (transport_is_swd()) {
- swclk_gpio_mode = get_gpio_mode(swclk_gpio);
- swdio_gpio_mode = get_gpio_mode(swdio_gpio);
- LOG_DEBUG("saved GPIO mode for swclk (GPIO #%d): %s", swclk_gpio, get_gpio_mode_name(swclk_gpio_mode));
- LOG_DEBUG("saved GPIO mode for swdio (GPIO #%d): %s", swdio_gpio, get_gpio_mode_name(swdio_gpio_mode));
- if (is_gpio_valid(swdio_dir_gpio)) {
- swdio_dir_gpio_mode = get_gpio_mode(swdio_dir_gpio);
- LOG_DEBUG("saved GPIO mode for swdio_dir (GPIO #%d): %s",
- swdio_dir_gpio, get_gpio_mode_name(swdio_dir_gpio_mode));
- set_gpio_mode(swdio_dir_gpio,
- swdio_dir_is_active_high ? AM335XGPIO_GPIO_MODE_OUTPUT_HIGH : AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
-
+ /* swdio and its buffer should be initialized in the order that prevents
+ * two outputs from being connected together. This will occur if the
+ * swdio GPIO of the AM335x is configured as an output while its
+ * external buffer is configured to send the swdio signal from the
+ * target to the AM335x.
+ */
+ if (adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].init_state == ADAPTER_GPIO_INIT_STATE_INPUT) {
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO);
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ } else {
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO);
}
- set_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
- set_gpio_mode(swclk_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);
- }
- if (is_gpio_valid(srst_gpio)) {
- srst_gpio_mode = get_gpio_mode(srst_gpio);
- LOG_DEBUG("saved GPIO mode for srst (GPIO #%d): %s", srst_gpio, get_gpio_mode_name(srst_gpio_mode));
+ initialize_gpio(ADAPTER_GPIO_IDX_SWCLK);
}
- if (is_gpio_valid(led_gpio)) {
- led_gpio_mode = get_gpio_mode(led_gpio);
- LOG_DEBUG("saved GPIO mode for led (GPIO #%d): %s", led_gpio, get_gpio_mode_name(led_gpio_mode));
- set_gpio_mode(led_gpio,
- led_is_active_high ? AM335XGPIO_GPIO_MODE_OUTPUT_LOW : AM335XGPIO_GPIO_MODE_OUTPUT_HIGH);
- }
+ initialize_gpio(ADAPTER_GPIO_IDX_SRST);
+ initialize_gpio(ADAPTER_GPIO_IDX_LED);
- /* Set GPIO modes for TRST and SRST and make both inactive */
- am335xgpio_reset(0, 0);
return ERROR_OK;
}
static int am335xgpio_quit(void)
{
if (transport_is_jtag()) {
- set_gpio_mode(tdo_gpio, tdo_gpio_mode);
- set_gpio_mode(tdi_gpio, tdi_gpio_mode);
- set_gpio_mode(tck_gpio, tck_gpio_mode);
- set_gpio_mode(tms_gpio, tms_gpio_mode);
- if (is_gpio_valid(trst_gpio))
- set_gpio_mode(trst_gpio, trst_gpio_mode);
+ restore_gpio(ADAPTER_GPIO_IDX_TDO);
+ restore_gpio(ADAPTER_GPIO_IDX_TDI);
+ restore_gpio(ADAPTER_GPIO_IDX_TMS);
+ restore_gpio(ADAPTER_GPIO_IDX_TCK);
+ restore_gpio(ADAPTER_GPIO_IDX_TRST);
}
if (transport_is_swd()) {
- set_gpio_mode(swclk_gpio, swclk_gpio_mode);
- set_gpio_mode(swdio_gpio, swdio_gpio_mode);
- if (is_gpio_valid(swdio_dir_gpio))
- set_gpio_mode(swdio_dir_gpio, swdio_dir_gpio_mode);
+ /* Restore swdio/swdio_dir to their initial modes, even if that means
+ * connecting two outputs. Begin by making swdio an input so that the
+ * current and final states of swdio and swdio_dir do not have to be
+ * considered to calculate the safe restoration order.
+ */
+ AM335XGPIO_SET_INPUT(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO]);
+ restore_gpio(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ restore_gpio(ADAPTER_GPIO_IDX_SWDIO);
+
+ restore_gpio(ADAPTER_GPIO_IDX_SWCLK);
}
- if (is_gpio_valid(srst_gpio))
- set_gpio_mode(srst_gpio, srst_gpio_mode);
+ restore_gpio(ADAPTER_GPIO_IDX_SRST);
+ restore_gpio(ADAPTER_GPIO_IDX_LED);
- if (is_gpio_valid(led_gpio))
- set_gpio_mode(led_gpio, led_gpio_mode);
+ am335xgpio_munmap();
return ERROR_OK;
}
diff --git a/src/jtag/drivers/amt_jtagaccel.c b/src/jtag/drivers/amt_jtagaccel.c
index c204f23..a4c8f32 100644
--- a/src/jtag/drivers/amt_jtagaccel.c
+++ b/src/jtag/drivers/amt_jtagaccel.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index 7033789..a3e9e17 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Dimitar Dimitrov <dinuxbg@gmail.com> *
* based on Dominic Rath's and Benedikt Sauter's usbprog.c *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/at91rm9200.c b/src/jtag/drivers/at91rm9200.c
index 7bb5d85..08daa00 100644
--- a/src/jtag/drivers/at91rm9200.c
+++ b/src/jtag/drivers/at91rm9200.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Anders Larsen *
* al@alarsen.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 22d237f..bd44fca 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -1,28 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Paul Fertser, fercerpav@gmail.com *
* *
* Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
* Based on at91rm9200.c (c) Anders Larsen *
* and RPi GPIO examples by Gert van Loo & Dom *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
+#include <jtag/adapter.h>
#include <jtag/interface.h>
#include <transport/transport.h>
#include "bitbang.h"
@@ -35,79 +25,142 @@ uint32_t bcm2835_peri_base = 0x20000000;
#define BCM2835_PADS_GPIO_0_27 (bcm2835_peri_base + 0x100000)
#define BCM2835_PADS_GPIO_0_27_OFFSET (0x2c / 4)
+/* See "GPIO Function Select Registers (GPFSELn)" in "Broadcom BCM2835 ARM Peripherals" datasheet. */
+#define BCM2835_GPIO_MODE_INPUT 0
+#define BCM2835_GPIO_MODE_OUTPUT 1
+
/* GPIO setup macros */
#define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7)
#define INP_GPIO(g) do { *(pio_base+((g)/10)) &= ~(7<<(((g)%10)*3)); } while (0)
#define SET_MODE_GPIO(g, m) do { /* clear the mode bits first, then set as necessary */ \
INP_GPIO(g); \
*(pio_base+((g)/10)) |= ((m)<<(((g)%10)*3)); } while (0)
-#define OUT_GPIO(g) SET_MODE_GPIO(g, 1)
+#define OUT_GPIO(g) SET_MODE_GPIO(g, BCM2835_GPIO_MODE_OUTPUT)
#define GPIO_SET (*(pio_base+7)) /* sets bits which are 1, ignores bits which are 0 */
#define GPIO_CLR (*(pio_base+10)) /* clears bits which are 1, ignores bits which are 0 */
#define GPIO_LEV (*(pio_base+13)) /* current level of the pin */
static int dev_mem_fd;
-static volatile uint32_t *pio_base;
-
-static bb_value_t bcm2835gpio_read(void);
-static int bcm2835gpio_write(int tck, int tms, int tdi);
-
-static int bcm2835_swdio_read(void);
-static void bcm2835_swdio_drive(bool is_output);
-static int bcm2835gpio_swd_write(int swclk, int swdio);
-
-static int bcm2835gpio_init(void);
-static int bcm2835gpio_quit(void);
-
-static struct bitbang_interface bcm2835gpio_bitbang = {
- .read = bcm2835gpio_read,
- .write = bcm2835gpio_write,
- .swdio_read = bcm2835_swdio_read,
- .swdio_drive = bcm2835_swdio_drive,
- .swd_write = bcm2835gpio_swd_write,
- .blink = NULL
-};
-
-/* GPIO numbers for each signal. Negative values are invalid */
-static int tck_gpio = -1;
-static int tck_gpio_mode;
-static int tms_gpio = -1;
-static int tms_gpio_mode;
-static int tdi_gpio = -1;
-static int tdi_gpio_mode;
-static int tdo_gpio = -1;
-static int tdo_gpio_mode;
-static int trst_gpio = -1;
-static int trst_gpio_mode;
-static int srst_gpio = -1;
-static int srst_gpio_mode;
-static int swclk_gpio = -1;
-static int swclk_gpio_mode;
-static int swdio_gpio = -1;
-static int swdio_gpio_mode;
-static int swdio_dir_gpio = -1;
-static int swdio_dir_gpio_mode;
+static volatile uint32_t *pio_base = MAP_FAILED;
+static volatile uint32_t *pads_base = MAP_FAILED;
/* Transition delay coefficients */
static int speed_coeff = 113714;
static int speed_offset = 28;
static unsigned int jtag_delay;
-static int is_gpio_valid(int gpio)
+static const struct adapter_gpio_config *adapter_gpio_config;
+static struct initial_gpio_state {
+ unsigned int mode;
+ unsigned int output_level;
+} initial_gpio_state[ADAPTER_GPIO_IDX_NUM];
+static uint32_t initial_drive_strength_etc;
+
+static bool is_gpio_config_valid(enum adapter_gpio_config_index idx)
+{
+ /* Only chip 0 is supported, accept unset value (-1) too */
+ return adapter_gpio_config[idx].chip_num >= -1
+ && adapter_gpio_config[idx].chip_num <= 0
+ && adapter_gpio_config[idx].gpio_num >= 0
+ && adapter_gpio_config[idx].gpio_num <= 31;
+}
+
+static void set_gpio_value(const struct adapter_gpio_config *gpio_config, int value)
+{
+ value = value ^ (gpio_config->active_low ? 1 : 0);
+ switch (gpio_config->drive) {
+ case ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL:
+ if (value)
+ GPIO_SET = 1 << gpio_config->gpio_num;
+ else
+ GPIO_CLR = 1 << gpio_config->gpio_num;
+ /* For performance reasons assume the GPIO is already set as an output
+ * and therefore the call can be omitted here.
+ */
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN:
+ if (value) {
+ INP_GPIO(gpio_config->gpio_num);
+ } else {
+ GPIO_CLR = 1 << gpio_config->gpio_num;
+ OUT_GPIO(gpio_config->gpio_num);
+ }
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE:
+ if (value) {
+ GPIO_SET = 1 << gpio_config->gpio_num;
+ OUT_GPIO(gpio_config->gpio_num);
+ } else {
+ INP_GPIO(gpio_config->gpio_num);
+ }
+ break;
+ }
+}
+
+static void restore_gpio(enum adapter_gpio_config_index idx)
+{
+ if (is_gpio_config_valid(idx)) {
+ SET_MODE_GPIO(adapter_gpio_config[idx].gpio_num, initial_gpio_state[idx].mode);
+ if (initial_gpio_state[idx].mode == BCM2835_GPIO_MODE_OUTPUT) {
+ if (initial_gpio_state[idx].output_level)
+ GPIO_SET = 1 << adapter_gpio_config[idx].gpio_num;
+ else
+ GPIO_CLR = 1 << adapter_gpio_config[idx].gpio_num;
+ }
+ }
+}
+
+static void initialize_gpio(enum adapter_gpio_config_index idx)
{
- return gpio >= 0 && gpio <= 31;
+ if (!is_gpio_config_valid(idx))
+ return;
+
+ initial_gpio_state[idx].mode = MODE_GPIO(adapter_gpio_config[idx].gpio_num);
+ unsigned int shift = adapter_gpio_config[idx].gpio_num;
+ initial_gpio_state[idx].output_level = (GPIO_LEV >> shift) & 1;
+ LOG_DEBUG("saved GPIO mode for %s (GPIO %d %d): %d",
+ adapter_gpio_get_name(idx), adapter_gpio_config[idx].chip_num, adapter_gpio_config[idx].gpio_num,
+ initial_gpio_state[idx].mode);
+
+ if (adapter_gpio_config[idx].pull != ADAPTER_GPIO_PULL_NONE) {
+ LOG_WARNING("BCM2835 GPIO does not support pull-up or pull-down settings (signal %s)",
+ adapter_gpio_get_name(idx));
+ }
+
+ switch (adapter_gpio_config[idx].init_state) {
+ case ADAPTER_GPIO_INIT_STATE_INACTIVE:
+ set_gpio_value(&adapter_gpio_config[idx], 0);
+ break;
+ case ADAPTER_GPIO_INIT_STATE_ACTIVE:
+ set_gpio_value(&adapter_gpio_config[idx], 1);
+ break;
+ case ADAPTER_GPIO_INIT_STATE_INPUT:
+ INP_GPIO(adapter_gpio_config[idx].gpio_num);
+ break;
+ }
+
+ /* Direction for non push-pull is already set by set_gpio_value() */
+ if (adapter_gpio_config[idx].drive == ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL)
+ OUT_GPIO(adapter_gpio_config[idx].gpio_num);
}
static bb_value_t bcm2835gpio_read(void)
{
- return (GPIO_LEV & 1<<tdo_gpio) ? BB_HIGH : BB_LOW;
+ unsigned int shift = adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].gpio_num;
+ uint32_t value = (GPIO_LEV >> shift) & 1;
+ return value ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].active_low ? BB_HIGH : BB_LOW);
+
}
static int bcm2835gpio_write(int tck, int tms, int tdi)
{
- uint32_t set = tck<<tck_gpio | tms<<tms_gpio | tdi<<tdi_gpio;
- uint32_t clear = !tck<<tck_gpio | !tms<<tms_gpio | !tdi<<tdi_gpio;
+ uint32_t set = tck << adapter_gpio_config[ADAPTER_GPIO_IDX_TCK].gpio_num |
+ tms << adapter_gpio_config[ADAPTER_GPIO_IDX_TMS].gpio_num |
+ tdi << adapter_gpio_config[ADAPTER_GPIO_IDX_TDI].gpio_num;
+ uint32_t clear = !tck << adapter_gpio_config[ADAPTER_GPIO_IDX_TCK].gpio_num |
+ !tms << adapter_gpio_config[ADAPTER_GPIO_IDX_TMS].gpio_num |
+ !tdi << adapter_gpio_config[ADAPTER_GPIO_IDX_TDI].gpio_num;
GPIO_SET = set;
GPIO_CLR = clear;
@@ -118,10 +171,16 @@ static int bcm2835gpio_write(int tck, int tms, int tdi)
return ERROR_OK;
}
-static int bcm2835gpio_swd_write(int swclk, int swdio)
+/* Requires push-pull drive mode for swclk and swdio */
+static int bcm2835gpio_swd_write_fast(int swclk, int swdio)
{
- uint32_t set = swclk << swclk_gpio | swdio << swdio_gpio;
- uint32_t clear = !swclk << swclk_gpio | !swdio << swdio_gpio;
+ swclk = swclk ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK].active_low ? 1 : 0);
+ swdio = swdio ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].active_low ? 1 : 0);
+
+ uint32_t set = swclk << adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK].gpio_num |
+ swdio << adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num;
+ uint32_t clear = !swclk << adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK].gpio_num |
+ !swdio << adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num;
GPIO_SET = set;
GPIO_CLR = clear;
@@ -132,55 +191,62 @@ static int bcm2835gpio_swd_write(int swclk, int swdio)
return ERROR_OK;
}
-/* (1) assert or (0) deassert reset lines */
-static int bcm2835gpio_reset(int trst, int srst)
+/* Generic mode that works for open-drain/open-source drive modes, but slower */
+static int bcm2835gpio_swd_write_generic(int swclk, int swdio)
{
- uint32_t set = 0;
- uint32_t clear = 0;
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO], swdio);
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK], swclk); /* Write clock last */
- if (is_gpio_valid(trst_gpio)) {
- set |= !trst<<trst_gpio;
- clear |= trst<<trst_gpio;
- }
+ for (unsigned int i = 0; i < jtag_delay; ++i)
+ asm volatile ("");
- if (is_gpio_valid(srst_gpio)) {
- set |= !srst<<srst_gpio;
- clear |= srst<<srst_gpio;
- }
+ return ERROR_OK;
+}
- GPIO_SET = set;
- GPIO_CLR = clear;
+/* (1) assert or (0) deassert reset lines */
+static int bcm2835gpio_reset(int trst, int srst)
+{
+ /* As the "adapter reset_config" command keeps the srst and trst gpio drive
+ * mode settings in sync we can use our standard set_gpio_value() function
+ * that honours drive mode and active low.
+ */
+ if (is_gpio_config_valid(ADAPTER_GPIO_IDX_SRST))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SRST], srst);
+ if (is_gpio_config_valid(ADAPTER_GPIO_IDX_TRST))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TRST], trst);
+
+ LOG_DEBUG("BCM2835 GPIO: bcm2835gpio_reset(%d, %d), trst_gpio: %d %d, srst_gpio: %d %d",
+ trst, srst,
+ adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].gpio_num,
+ adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].gpio_num);
return ERROR_OK;
}
static void bcm2835_swdio_drive(bool is_output)
{
- if (is_gpio_valid(swdio_dir_gpio)) {
- if (is_output) {
- GPIO_SET = 1 << swdio_dir_gpio;
- OUT_GPIO(swdio_gpio);
- } else {
- INP_GPIO(swdio_gpio);
- GPIO_CLR = 1 << swdio_dir_gpio;
- }
+ if (is_output) {
+ if (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);
+ OUT_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);
} else {
- if (is_output)
- OUT_GPIO(swdio_gpio);
- else
- INP_GPIO(swdio_gpio);
+ INP_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);
+ if (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 0);
}
}
static int bcm2835_swdio_read(void)
{
- return !!(GPIO_LEV & 1 << swdio_gpio);
+ unsigned int shift = adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num;
+ uint32_t value = (GPIO_LEV >> shift) & 1;
+ return value ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].active_low ? 1 : 0);
}
static int bcm2835gpio_khz(int khz, int *jtag_speed)
{
if (!khz) {
- LOG_DEBUG("RCLK not supported");
+ LOG_DEBUG("BCM2835 GPIO: RCLK not supported");
return ERROR_FAIL;
}
*jtag_speed = speed_coeff/khz - speed_offset;
@@ -201,121 +267,6 @@ static int bcm2835gpio_speed(int speed)
return ERROR_OK;
}
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionums)
-{
- if (CMD_ARGC == 4) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], tms_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], tdi_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], tdo_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD,
- "BCM2835 GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
- tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tck)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
-
- command_print(CMD, "BCM2835 GPIO config: tck = %d", tck_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tms)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tms_gpio);
-
- command_print(CMD, "BCM2835 GPIO config: tms = %d", tms_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdo)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdo_gpio);
-
- command_print(CMD, "BCM2835 GPIO config: tdo = %d", tdo_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdi)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdi_gpio);
-
- command_print(CMD, "BCM2835 GPIO config: tdi = %d", tdi_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_srst)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], srst_gpio);
-
- command_print(CMD, "BCM2835 GPIO config: srst = %d", srst_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_trst)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], trst_gpio);
-
- command_print(CMD, "BCM2835 GPIO config: trst = %d", trst_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionums)
-{
- if (CMD_ARGC == 2) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD,
- "BCM2835 GPIO nums: swclk = %d, swdio = %d",
- swclk_gpio, swdio_gpio);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swclk)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
-
- command_print(CMD, "BCM2835 num: swclk = %d", swclk_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swdio)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio);
-
- command_print(CMD, "BCM2835 num: swdio = %d", swdio_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_swd_dir_gpionum_swdio)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_dir_gpio);
-
- command_print(CMD, "BCM2835 num: swdio_dir = %d", swdio_dir_gpio);
- return ERROR_OK;
-}
-
COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs)
{
if (CMD_ARGC == 2) {
@@ -340,83 +291,6 @@ COMMAND_HANDLER(bcm2835gpio_handle_peripheral_base)
static const struct command_registration bcm2835gpio_subcommand_handlers[] = {
{
- .name = "jtag_nums",
- .handler = &bcm2835gpio_handle_jtag_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)",
- .usage = "[tck tms tdi tdo]",
- },
- {
- .name = "tck_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tck,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tck.",
- .usage = "[tck]",
- },
- {
- .name = "tms_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tms,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tms.",
- .usage = "[tms]",
- },
- {
- .name = "tdo_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tdo,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tdo.",
- .usage = "[tdo]",
- },
- {
- .name = "tdi_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tdi,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tdi.",
- .usage = "[tdi]",
- },
- {
- .name = "swd_nums",
- .handler = &bcm2835gpio_handle_swd_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for swclk, swdio. (in that order)",
- .usage = "[swclk swdio]",
- },
- {
- .name = "swclk_num",
- .handler = &bcm2835gpio_handle_swd_gpionum_swclk,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swclk.",
- .usage = "[swclk]",
- },
- {
- .name = "swdio_num",
- .handler = &bcm2835gpio_handle_swd_gpionum_swdio,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swdio.",
- .usage = "[swdio]",
- },
- {
- .name = "swdio_dir_num",
- .handler = &bcm2835gpio_handle_swd_dir_gpionum_swdio,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swdio direction control pin (set=output mode, clear=input mode)",
- .usage = "[swdio_dir]",
- },
- {
- .name = "srst_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_srst,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for srst.",
- .usage = "[srst]",
- },
- {
- .name = "trst_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_trst,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for trst.",
- .usage = "[trst]",
- },
- {
.name = "speed_coeffs",
.handler = &bcm2835gpio_handle_speed_coeffs,
.mode = COMMAND_CONFIG,
@@ -445,57 +319,65 @@ static const struct command_registration bcm2835gpio_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-static const char * const bcm2835_transports[] = { "jtag", "swd", NULL };
-
-static struct jtag_interface bcm2835gpio_interface = {
- .supported = DEBUG_CAP_TMS_SEQ,
- .execute_queue = bitbang_execute_queue,
-};
-
-struct adapter_driver bcm2835gpio_adapter_driver = {
- .name = "bcm2835gpio",
- .transports = bcm2835_transports,
- .commands = bcm2835gpio_command_handlers,
-
- .init = bcm2835gpio_init,
- .quit = bcm2835gpio_quit,
- .reset = bcm2835gpio_reset,
- .speed = bcm2835gpio_speed,
- .khz = bcm2835gpio_khz,
- .speed_div = bcm2835gpio_speed_div,
-
- .jtag_ops = &bcm2835gpio_interface,
- .swd_ops = &bitbang_swd,
-};
-
static bool bcm2835gpio_jtag_mode_possible(void)
{
- if (!is_gpio_valid(tck_gpio))
- return 0;
- if (!is_gpio_valid(tms_gpio))
- return 0;
- if (!is_gpio_valid(tdi_gpio))
- return 0;
- if (!is_gpio_valid(tdo_gpio))
- return 0;
- return 1;
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TCK))
+ return false;
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TMS))
+ return false;
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TDI))
+ return false;
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TDO))
+ return false;
+ return true;
}
static bool bcm2835gpio_swd_mode_possible(void)
{
- if (!is_gpio_valid(swclk_gpio))
- return 0;
- if (!is_gpio_valid(swdio_gpio))
- return 0;
- return 1;
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_SWCLK))
+ return false;
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO))
+ return false;
+ return true;
}
-static int bcm2835gpio_init(void)
+static void bcm2835gpio_munmap(void)
{
- bitbang_interface = &bcm2835gpio_bitbang;
+ if (pio_base != MAP_FAILED) {
+ munmap((void *)pio_base, sysconf(_SC_PAGE_SIZE));
+ pio_base = MAP_FAILED;
+ }
+
+ if (pads_base != MAP_FAILED) {
+ munmap((void *)pads_base, sysconf(_SC_PAGE_SIZE));
+ pads_base = MAP_FAILED;
+ }
+}
+
+static int bcm2835gpio_blink(int on)
+{
+ if (is_gpio_config_valid(ADAPTER_GPIO_IDX_LED))
+ set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_LED], on);
+
+ return ERROR_OK;
+}
+
+static struct bitbang_interface bcm2835gpio_bitbang = {
+ .read = bcm2835gpio_read,
+ .write = bcm2835gpio_write,
+ .swdio_read = bcm2835_swdio_read,
+ .swdio_drive = bcm2835_swdio_drive,
+ .swd_write = bcm2835gpio_swd_write_generic,
+ .blink = bcm2835gpio_blink,
+};
+static int bcm2835gpio_init(void)
+{
LOG_INFO("BCM2835 GPIO JTAG/SWD bitbang driver");
+ bitbang_interface = &bcm2835gpio_bitbang;
+ adapter_gpio_config = adapter_gpio_get_config();
+
if (transport_is_jtag() && !bcm2835gpio_jtag_mode_possible()) {
LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode");
return ERROR_JTAG_INIT_FAILED;
@@ -525,71 +407,62 @@ static int bcm2835gpio_init(void)
return ERROR_JTAG_INIT_FAILED;
}
- static volatile uint32_t *pads_base;
pads_base = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
MAP_SHARED, dev_mem_fd, BCM2835_PADS_GPIO_0_27);
if (pads_base == MAP_FAILED) {
LOG_ERROR("mmap: %s", strerror(errno));
+ bcm2835gpio_munmap();
close(dev_mem_fd);
return ERROR_JTAG_INIT_FAILED;
}
+ close(dev_mem_fd);
+
/* set 4mA drive strength, slew rate limited, hysteresis on */
+ initial_drive_strength_etc = pads_base[BCM2835_PADS_GPIO_0_27_OFFSET] & 0x1f;
pads_base[BCM2835_PADS_GPIO_0_27_OFFSET] = 0x5a000008 + 1;
- /*
- * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
- * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
+ /* Configure JTAG/SWD signals. Default directions and initial states are handled
+ * by adapter.c and "adapter gpio" command.
*/
if (transport_is_jtag()) {
- tdo_gpio_mode = MODE_GPIO(tdo_gpio);
- tdi_gpio_mode = MODE_GPIO(tdi_gpio);
- tck_gpio_mode = MODE_GPIO(tck_gpio);
- tms_gpio_mode = MODE_GPIO(tms_gpio);
-
- INP_GPIO(tdo_gpio);
-
- GPIO_CLR = 1<<tdi_gpio | 1<<tck_gpio;
- GPIO_SET = 1<<tms_gpio;
-
- OUT_GPIO(tdi_gpio);
- OUT_GPIO(tck_gpio);
- OUT_GPIO(tms_gpio);
-
- if (is_gpio_valid(trst_gpio)) {
- trst_gpio_mode = MODE_GPIO(trst_gpio);
- GPIO_SET = 1 << trst_gpio;
- OUT_GPIO(trst_gpio);
- }
+ initialize_gpio(ADAPTER_GPIO_IDX_TDO);
+ initialize_gpio(ADAPTER_GPIO_IDX_TDI);
+ initialize_gpio(ADAPTER_GPIO_IDX_TMS);
+ initialize_gpio(ADAPTER_GPIO_IDX_TCK);
+ initialize_gpio(ADAPTER_GPIO_IDX_TRST);
}
if (transport_is_swd()) {
- /* Make buffer an output before the GPIO connected to it */
- if (is_gpio_valid(swdio_dir_gpio)) {
- swdio_dir_gpio_mode = MODE_GPIO(swdio_dir_gpio);
- GPIO_SET = 1 << swdio_dir_gpio;
- OUT_GPIO(swdio_dir_gpio);
+ /* swdio and its buffer should be initialized in the order that prevents
+ * two outputs from being connected together. This will occur if the
+ * swdio GPIO of the AM335x is configured as an output while its
+ * external buffer is configured to send the swdio signal from the
+ * target to the AM335x.
+ */
+ if (adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].init_state == ADAPTER_GPIO_INIT_STATE_INPUT) {
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO);
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ } else {
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ initialize_gpio(ADAPTER_GPIO_IDX_SWDIO);
}
- swclk_gpio_mode = MODE_GPIO(swclk_gpio);
- swdio_gpio_mode = MODE_GPIO(swdio_gpio);
-
- GPIO_CLR = 1<<swdio_gpio | 1<<swclk_gpio;
-
- OUT_GPIO(swclk_gpio);
- OUT_GPIO(swdio_gpio);
- }
+ initialize_gpio(ADAPTER_GPIO_IDX_SWCLK);
- if (is_gpio_valid(srst_gpio)) {
- srst_gpio_mode = MODE_GPIO(srst_gpio);
- GPIO_SET = 1 << srst_gpio;
- OUT_GPIO(srst_gpio);
+ if (adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK].drive == ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL &&
+ adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].drive == ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL) {
+ LOG_DEBUG("BCM2835 GPIO using fast mode for SWD write");
+ bcm2835gpio_bitbang.swd_write = bcm2835gpio_swd_write_fast;
+ } else {
+ LOG_DEBUG("BCM2835 GPIO using generic mode for SWD write");
+ bcm2835gpio_bitbang.swd_write = bcm2835gpio_swd_write_generic;
+ }
}
- LOG_DEBUG("saved pinmux settings: tck %d tms %d tdi %d "
- "tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode,
- tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode);
+ initialize_gpio(ADAPTER_GPIO_IDX_SRST);
+ initialize_gpio(ADAPTER_GPIO_IDX_LED);
return ERROR_OK;
}
@@ -597,24 +470,54 @@ static int bcm2835gpio_init(void)
static int bcm2835gpio_quit(void)
{
if (transport_is_jtag()) {
- SET_MODE_GPIO(tdo_gpio, tdo_gpio_mode);
- SET_MODE_GPIO(tdi_gpio, tdi_gpio_mode);
- SET_MODE_GPIO(tck_gpio, tck_gpio_mode);
- SET_MODE_GPIO(tms_gpio, tms_gpio_mode);
- if (is_gpio_valid(trst_gpio))
- SET_MODE_GPIO(trst_gpio, trst_gpio_mode);
+ restore_gpio(ADAPTER_GPIO_IDX_TDO);
+ restore_gpio(ADAPTER_GPIO_IDX_TDI);
+ restore_gpio(ADAPTER_GPIO_IDX_TCK);
+ restore_gpio(ADAPTER_GPIO_IDX_TMS);
+ restore_gpio(ADAPTER_GPIO_IDX_TRST);
}
if (transport_is_swd()) {
- SET_MODE_GPIO(swclk_gpio, swclk_gpio_mode);
- SET_MODE_GPIO(swdio_gpio, swdio_gpio_mode);
+ /* Restore swdio/swdio_dir to their initial modes, even if that means
+ * connecting two outputs. Begin by making swdio an input so that the
+ * current and final states of swdio and swdio_dir do not have to be
+ * considered to calculate the safe restoration order.
+ */
+ INP_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);
+ restore_gpio(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ restore_gpio(ADAPTER_GPIO_IDX_SWDIO);
+ restore_gpio(ADAPTER_GPIO_IDX_SWCLK);
}
- if (is_gpio_valid(srst_gpio))
- SET_MODE_GPIO(srst_gpio, srst_gpio_mode);
+ restore_gpio(ADAPTER_GPIO_IDX_SRST);
+ restore_gpio(ADAPTER_GPIO_IDX_LED);
- if (is_gpio_valid(swdio_dir_gpio))
- SET_MODE_GPIO(swdio_dir_gpio, swdio_dir_gpio_mode);
+ /* Restore drive strength. MSB is password ("5A") */
+ pads_base[BCM2835_PADS_GPIO_0_27_OFFSET] = 0x5A000000 | initial_drive_strength_etc;
+ bcm2835gpio_munmap();
return ERROR_OK;
}
+
+
+static const char * const bcm2835_transports[] = { "jtag", "swd", NULL };
+
+static struct jtag_interface bcm2835gpio_interface = {
+ .supported = DEBUG_CAP_TMS_SEQ,
+ .execute_queue = bitbang_execute_queue,
+};
+struct adapter_driver bcm2835gpio_adapter_driver = {
+ .name = "bcm2835gpio",
+ .transports = bcm2835_transports,
+ .commands = bcm2835gpio_command_handlers,
+
+ .init = bcm2835gpio_init,
+ .quit = bcm2835gpio_quit,
+ .reset = bcm2835gpio_reset,
+ .speed = bcm2835gpio_speed,
+ .khz = bcm2835gpio_khz,
+ .speed_div = bcm2835gpio_speed_div,
+
+ .jtag_ops = &bcm2835gpio_interface,
+ .swd_ops = &bitbang_swd,
+};
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index 78dcb29..d49e16f 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* 2014-12: Addition of the SWD protocol support is based on the initial work
diff --git a/src/jtag/drivers/bitbang.h b/src/jtag/drivers/bitbang.h
index bc2c506..4ea1cc0 100644
--- a/src/jtag/drivers/bitbang.h
+++ b/src/jtag/drivers/bitbang.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_BITBANG_H
diff --git a/src/jtag/drivers/bitq.c b/src/jtag/drivers/bitq.c
index 04fc78b..59e4f35 100644
--- a/src/jtag/drivers/bitq.c
+++ b/src/jtag/drivers/bitq.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
-* *
-* This program is free software; you can redistribute it and/or modify *
-* it under the terms of the GNU General Public License as published by *
-* the Free Software Foundation; either version 2 of the License, or *
-* (at your option) any later version. *
-* *
-* This program is distributed in the hope that it will be useful, *
-* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-* GNU General Public License for more details. *
-* *
-* You should have received a copy of the GNU General Public License *
-* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/bitq.h b/src/jtag/drivers/bitq.h
index df6a08d..8e06fcf 100644
--- a/src/jtag/drivers/bitq.h
+++ b/src/jtag/drivers/bitq.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_BITQ_H
diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c
index 51ace61..03b48e6 100644
--- a/src/jtag/drivers/buspirate.c
+++ b/src/jtag/drivers/buspirate.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Michal Demin *
* based on usbprog.c and arm-jtag-ew.c *
* Several fixes by R. Diez in 2013. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index eaa65ab..e708d52 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2021 by Adrian Negreanu *
* groleo@gmail.com *
@@ -19,19 +21,6 @@
* *
* Copyright (C) 2013 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h
index 7c64d49..cf929b0 100644
--- a/src/jtag/drivers/cmsis_dap.h
+++ b/src/jtag/drivers/cmsis_dap.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
#ifndef OPENOCD_JTAG_DRIVERS_CMSIS_DAP_H
#define OPENOCD_JTAG_DRIVERS_CMSIS_DAP_H
diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c
index 819596b..a738200 100644
--- a/src/jtag/drivers/cmsis_dap_usb_bulk.c
+++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Mickaël Thomas *
* mickael9@gmail.com *
@@ -16,19 +18,6 @@
* *
* Copyright (C) 2013 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/cmsis_dap_usb_hid.c b/src/jtag/drivers/cmsis_dap_usb_hid.c
index 912ba39..592eb09 100644
--- a/src/jtag/drivers/cmsis_dap_usb_hid.c
+++ b/src/jtag/drivers/cmsis_dap_usb_hid.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Mickaël Thomas *
* mickael9@gmail.com *
@@ -16,19 +18,6 @@
* *
* Copyright (C) 2013 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index dbe3b08..409b800 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/dummy.c b/src/jtag/drivers/dummy.c
index e66cb6b..1b1e573 100644
--- a/src/jtag/drivers/dummy.c
+++ b/src/jtag/drivers/dummy.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/ep93xx.c b/src/jtag/drivers/ep93xx.c
index 94d6550..393fc7e 100644
--- a/src/jtag/drivers/ep93xx.c
+++ b/src/jtag/drivers/ep93xx.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -35,7 +24,7 @@
static uint8_t output_value;
static int dev_mem_fd;
-static void *gpio_controller;
+static uint8_t *gpio_controller;
static volatile uint8_t *gpio_data_register;
static volatile uint8_t *gpio_data_direction_register;
@@ -121,19 +110,16 @@ static int ep93xx_reset(int trst, int srst)
static int set_gonk_mode(void)
{
- void *syscon;
- uint32_t devicecfg;
-
- syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
+ void *syscon = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
MAP_SHARED, dev_mem_fd, 0x80930000);
if (syscon == MAP_FAILED) {
LOG_ERROR("mmap: %s", strerror(errno));
return ERROR_JTAG_INIT_FAILED;
}
- devicecfg = *((volatile int *)(syscon + 0x80));
- *((volatile int *)(syscon + 0xc0)) = 0xaa;
- *((volatile int *)(syscon + 0x80)) = devicecfg | 0x08000000;
+ uint32_t devicecfg = *((volatile uint32_t *)((uintptr_t)syscon + 0x80));
+ *((volatile uint32_t *)((uintptr_t)syscon + 0xc0)) = 0xaa;
+ *((volatile uint32_t *)((uintptr_t)syscon + 0x80)) = devicecfg | 0x08000000;
munmap(syscon, 4096);
diff --git a/src/jtag/drivers/esp_usb_jtag.c b/src/jtag/drivers/esp_usb_jtag.c
new file mode 100644
index 0000000..65293ee
--- /dev/null
+++ b/src/jtag/drivers/esp_usb_jtag.c
@@ -0,0 +1,796 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * Espressif USB to Jtag adapter *
+ * Copyright (C) 2020 Espressif Systems (Shanghai) Co. Ltd. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <jtag/adapter.h>
+#include <jtag/interface.h>
+#include <helper/time_support.h>
+#include <helper/bits.h>
+#include "bitq.h"
+#include "libusb_helper.h"
+
+#define __packed __attribute__((packed))
+
+/*
+Holy Crap, it's protocol documentation, and it's even vendor-provided!
+
+A device that speaks this protocol has two endpoints intended for JTAG debugging: one
+OUT for the host to send encoded commands to, one IN from which the host can read any read
+TDO bits. The device will also respond to vendor-defined interface requests on ep0.
+
+The main communication method is over the IN/OUT endpoints. The commands that are expected
+on the OUT endpoint are one nibble wide and are processed high-nibble-first, low-nibble-second,
+and in the order the bytes come in. Commands are defined as follows:
+
+ bit 3 2 1 0
+CMD_CLK [ 0 cap tdi tms ]
+CMD_RST [ 1 0 0 srst ]
+CMD_FLUSH [ 1 0 1 0 ]
+CMD_RSV [ 1 0 1 1 ]
+CMD_REP [ 1 1 R1 R0 ]
+
+CMD_CLK sets the TDI and TMS lines to the value of `tdi` and `tms` and lowers, then raises, TCK. If
+`cap` is 1, the value of TDO is captured and can be retrieved over the IN endpoint. The bytes read from
+the IN endpoint specifically are these bits, with the lowest it in every byte captured first and the
+bytes returned in the order the data in them was captured. The durations of TCK being high / low can
+be set using the VEND_JTAG_SETDIV vendor-specific interface request.
+
+CMD_RST controls the SRST line; as soon as the command is processed, the SRST line will be set
+to the value of `srst`.
+
+CMD_FLUSH flushes the IN endpoint; zeroes will be added to the amount of bits in the endpoint until
+the payload is a multiple of bytes, and the data is offered to the host. If the IN endpoint has
+no data, this effectively becomes a no-op; the endpoint won't send any 0-byte payloads.
+
+CMD_RSV is reserved for future use.
+
+CMD_REP repeats the last command that is not CMD_REP. The amount of times a CMD_REP command will
+re-execute this command is (r1*2+r0)<<(2*n), where n is the amount of previous repeat commands executed
+since the command to be repeated.
+
+An example for CMD_REP: Say the host queues:
+1. CMD_CLK - This will execute one CMD_CLK.
+2. CMD_REP with r1=0 and r0=1 - This will execute 1. another (0*2+1)<<(2*0)=1 time.
+3. CMD_REP with r1=1 and r0=0 - This will execute 1. another (1*2+0)<<(2*1)=4 times.
+4. CMD_REP with r1=0 and r0=1 - This will execute 1. another (0*2+1)<<(2*2)=8 time.
+5. CMD_FLUSH - This will flush the IN pipeline.
+6. CMD_CLK - This will execute one CMD_CLK
+7. CMD_REP with r1=1 and r0=0 - This will execute 6. another (1*2+0)<<(2*0)=2 times.
+8. CMD_FLUSH - This will flush the IN pipeline.
+
+Note that the net effect of the repetitions is that command 1 is executed (1+1+4+8=) 14 times and
+command 6 is executed (1+2=) 3 times.
+
+Note that the device only has a fairly limited amount of endpoint RAM. It's probably best to keep
+an eye on the amount of bytes that are supposed to be in the IN endpoint and grab those before stuffing
+more commands into the OUT endpoint: the OUT endpoint will not accept any more commands (writes will
+time out) when the IN endpoint buffers are all filled up.
+
+The device also supports some vendor-specific interface requests. These requests are sent as control
+transfers on endpoint 0 to the JTAG endpoint. Note that these commands bypass the data in the OUT
+endpoint; if timing is important, it's important that this endpoint is empty. This can be done by
+e.g sending one CMD_CLK capturing TDI, then one CMD_FLUSH, then waiting until the bit appears on the
+IN endpoint.
+
+bmRequestType bRequest wValue wIndex wLength Data
+01000000b VEND_JTAG_SETDIV [divide] interface 0 None
+01000000b VEND_JTAG_SETIO [iobits] interface 0 None
+11000000b VEND_JTAG_GETTDO 0 interface 1 [iostate]
+10000000b GET_DESCRIPTOR(6) 0x2000 0 256 [jtag cap desc]
+
+VEND_JTAG_SETDIV indirectly controls the speed of the TCK clock. The value written here is the length
+of a TCK cycle, in ticks of the adapters base clock. Both the base clock value as well as the
+minimum and maximum divider can be read from the jtag capabilities descriptor, as explained
+below. Note that this should not be set to a value outside of the range described there,
+otherwise results are undefined.
+
+VEND_JTAG_SETIO can be controlled to directly set the IO pins. The format of [iobits] normally is
+{11'b0, srst, trst, tck, tms, tdi}
+Note that the first 11 0 bits are reserved for future use, current hardware ignores them.
+
+VEND_JTAG_GETTDO returns one byte, of which bit 0 indicates the current state of the TDO input.
+Note that other bits are reserved for future use and should be ignored.
+
+To describe the capabilities of the JTAG adapter, a specific descriptor (0x20) can be retrieved.
+The format of the descriptor documented below. The descriptor works in the same fashion as USB
+descriptors: a header indicating the version and total length followed by descriptors with a
+specific type and size. Forward compatibility is guaranteed as software can skip over an unknown
+descriptor.
+
+*/
+
+#define JTAG_PROTO_CAPS_VER 1 /* Version field. At the moment, only version 1 is defined. */
+struct jtag_proto_caps_hdr {
+ uint8_t proto_ver; /* Protocol version. Expects JTAG_PROTO_CAPS_VER for now. */
+ uint8_t length; /* of this plus any following descriptors */
+} __packed;
+
+/* start of the descriptor headers */
+#define JTAG_BUILTIN_DESCR_START_OFF 0 /* Devices with builtin usb jtag */
+/*
+* ESP USB Bridge https://github.com/espressif/esp-usb-bridge uses string descriptor.
+* Skip 1 byte length and 1 byte descriptor type
+*/
+#define JTAG_EUB_DESCR_START_OFF 2 /* ESP USB Bridge */
+
+/*
+Note: At the moment, there is only a speed_caps version indicating the base speed of the JTAG
+hardware is derived from the APB bus speed of the SoC. If later on, there are standalone
+converters using the protocol, we should define e.g. JTAG_PROTO_CAPS_SPEED_FIXED_TYPE to distinguish
+between the two.
+
+Note: If the JTAG device has larger buffers than endpoint-size-plus-a-bit, we should have some kind
+of caps header to assume this. If no such caps exist, assume a minimum (in) buffer of endpoint size + 4.
+*/
+
+struct jtag_gen_hdr {
+ uint8_t type;
+ uint8_t length;
+} __packed;
+
+struct jtag_proto_caps_speed_apb {
+ uint8_t type; /* Type, always JTAG_PROTO_CAPS_SPEED_APB_TYPE */
+ uint8_t length; /* Length of this */
+ uint8_t apb_speed_10khz[2]; /* ABP bus speed, in 10KHz increments. Base speed is half this. */
+ uint8_t div_min[2]; /* minimum divisor (to base speed), inclusive */
+ uint8_t div_max[2]; /* maximum divisor (to base speed), inclusive */
+} __packed;
+
+#define JTAG_PROTO_CAPS_DATA_LEN 255
+#define JTAG_PROTO_CAPS_SPEED_APB_TYPE 1
+
+#define VEND_DESCR_BUILTIN_JTAG_CAPS 0x2000
+
+#define VEND_JTAG_SETDIV 0
+#define VEND_JTAG_SETIO 1
+#define VEND_JTAG_GETTDO 2
+#define VEND_JTAG_SET_CHIPID 3
+
+#define VEND_JTAG_SETIO_TDI BIT(0)
+#define VEND_JTAG_SETIO_TMS BIT(1)
+#define VEND_JTAG_SETIO_TCK BIT(2)
+#define VEND_JTAG_SETIO_TRST BIT(3)
+#define VEND_JTAG_SETIO_SRST BIT(4)
+
+#define CMD_CLK(cap, tdi, tms) ((cap ? BIT(2) : 0) | (tms ? BIT(1) : 0) | (tdi ? BIT(0) : 0))
+#define CMD_RST(srst) (0x8 | (srst ? BIT(0) : 0))
+#define CMD_FLUSH 0xA
+#define CMD_RSVD 0xB
+#define CMD_REP(r) (0xC + ((r) & 3))
+
+/* The internal repeats register is 10 bits, which means we can have 5 repeat commands in a
+ *row at max. This translates to ('b1111111111+1=)1024 reps max. */
+#define CMD_REP_MAX_REPS 1024
+
+/* Currently we only support one USB device. */
+#define USB_CONFIGURATION 0
+
+/* Buffer size; is equal to the endpoint size. In bytes
+ * TODO for future adapters: read from device configuration? */
+#define OUT_EP_SZ 64
+/* Out data can be buffered for longer without issues (as long as the in buffer does not overflow),
+ * so we'll use an out buffer that is much larger than the out ep size. */
+#define OUT_BUF_SZ (OUT_EP_SZ * 32)
+/* The in buffer cannot be larger than the device can offer, though. */
+#define IN_BUF_SZ 64
+
+/* Because a series of out commands can lead to a multitude of IN_BUF_SZ-sized in packets
+ *to be read, we have multiple buffers to store those before the bitq interface reads them out. */
+#define IN_BUF_CT 8
+
+#define ESP_USB_INTERFACE 1
+
+/* Private data */
+struct esp_usb_jtag {
+ struct libusb_device_handle *usb_device;
+ uint32_t base_speed_khz;
+ uint16_t div_min;
+ uint16_t div_max;
+ uint8_t out_buf[OUT_BUF_SZ];
+ unsigned int out_buf_pos_nibbles; /* write position in out_buf */
+
+ uint8_t in_buf[IN_BUF_CT][IN_BUF_SZ];
+ unsigned int in_buf_size_bits[IN_BUF_CT]; /* size in bits of the data stored in an in_buf */
+ unsigned int cur_in_buf_rd, cur_in_buf_wr; /* read/write index */
+ unsigned int in_buf_pos_bits; /* which bit in the in buf needs to be returned to bitq next */
+
+ unsigned int read_ep;
+ unsigned int write_ep;
+
+ unsigned int prev_cmd; /* previous command, stored here for RLEing. */
+ int prev_cmd_repct; /* Amount of repetitions of that command we have seen until now */
+
+ /* This is the total number of in bits we need to read, including in unsent commands */
+ unsigned int pending_in_bits;
+
+ unsigned int hw_in_fifo_len;
+
+ struct bitq_interface bitq_interface;
+};
+
+/* For now, we only use one static private struct. Technically, we can re-work this, but I don't think
+ * OpenOCD supports multiple JTAG adapters anyway. */
+static struct esp_usb_jtag esp_usb_jtag_priv;
+static struct esp_usb_jtag *priv = &esp_usb_jtag_priv;
+
+static int esp_usb_vid;
+static int esp_usb_pid;
+static int esp_usb_jtag_caps;
+static int esp_usb_target_chip_id;
+
+static int esp_usb_jtag_init(void);
+static int esp_usb_jtag_quit(void);
+
+/* Try to receive from USB endpoint into the current priv->in_buf */
+static int esp_usb_jtag_recv_buf(void)
+{
+ if (priv->in_buf_size_bits[priv->cur_in_buf_wr] != 0)
+ LOG_ERROR("esp_usb_jtag: IN buffer overflow! (%d, size %d)",
+ priv->cur_in_buf_wr,
+ priv->in_buf_size_bits[priv->cur_in_buf_wr]);
+
+ unsigned int recvd = 0, ct = (priv->pending_in_bits + 7) / 8;
+ if (ct > IN_BUF_SZ)
+ ct = IN_BUF_SZ;
+ if (ct == 0) {
+ /* Note that the adapters IN EP specifically does *not* usually generate 0-byte in
+ * packets if there has been no data since the last flush.
+ * As such, we don't need (and shouldn't) try to read it. */
+ return ERROR_OK;
+ }
+
+ priv->in_buf_size_bits[priv->cur_in_buf_wr] = 0;
+ while (recvd < ct) {
+ unsigned int tr;
+ int ret = jtag_libusb_bulk_read(priv->usb_device,
+ priv->read_ep,
+ (char *)priv->in_buf[priv->cur_in_buf_wr] + recvd,
+ ct,
+ LIBUSB_TIMEOUT_MS, /*ms*/
+ (int *)&tr);
+ if (ret != ERROR_OK || tr == 0) {
+ /* Sometimes the hardware returns 0 bytes instead of NAKking the transaction. Ignore this. */
+ return ERROR_FAIL;
+ }
+
+ if (tr != ct) {
+ /* Huh, short read? */
+ LOG_DEBUG("esp_usb_jtag: usb received only %d out of %d bytes.", tr, ct);
+ }
+ /* Adjust the amount of bits we still expect to read from the USB device after this. */
+ unsigned int bits_in_buf = priv->pending_in_bits; /* initially assume we read
+ * everything that was pending */
+ if (bits_in_buf > tr * 8)
+ bits_in_buf = tr * 8; /* ...but correct that if that was not the case. */
+ priv->pending_in_bits -= bits_in_buf;
+ priv->in_buf_size_bits[priv->cur_in_buf_wr] += bits_in_buf;
+ recvd += tr;
+ }
+ /* next in buffer for the next time. */
+ priv->cur_in_buf_wr++;
+ if (priv->cur_in_buf_wr == IN_BUF_CT)
+ priv->cur_in_buf_wr = 0;
+ LOG_DEBUG_IO("esp_usb_jtag: In ep: received %d bytes; %d bytes (%d bits) left.", recvd,
+ (priv->pending_in_bits + 7) / 8, priv->pending_in_bits);
+ return ERROR_OK;
+}
+
+/* Sends priv->out_buf to the USB device. */
+static int esp_usb_jtag_send_buf(void)
+{
+ unsigned int ct = priv->out_buf_pos_nibbles / 2;
+ unsigned int written = 0;
+
+ while (written < ct) {
+ int tr = 0, ret = jtag_libusb_bulk_write(priv->usb_device,
+ priv->write_ep,
+ (char *)priv->out_buf + written,
+ ct - written,
+ LIBUSB_TIMEOUT_MS, /*ms*/
+ &tr);
+ LOG_DEBUG_IO("esp_usb_jtag: sent %d bytes.", tr);
+ if (written + tr != ct) {
+ LOG_DEBUG("esp_usb_jtag: usb sent only %d out of %d bytes.",
+ written + tr,
+ ct);
+ }
+ if (ret != ERROR_OK)
+ return ret;
+ written += tr;
+ }
+ priv->out_buf_pos_nibbles = 0;
+
+ /* If there's more than a bufferful of data queuing up in the jtag adapters IN endpoint, empty
+ * all but one buffer. */
+ while (priv->pending_in_bits > (IN_BUF_SZ + priv->hw_in_fifo_len - 1) * 8)
+ esp_usb_jtag_recv_buf();
+
+ return ERROR_OK;
+}
+
+/* Simply adds a command to the buffer. Is called by the RLE encoding mechanism.
+ *Also sends the intermediate buffer if there's enough to go into one USB packet. */
+static int esp_usb_jtag_command_add_raw(unsigned int cmd)
+{
+ int ret = ERROR_OK;
+
+ if ((priv->out_buf_pos_nibbles & 1) == 0)
+ priv->out_buf[priv->out_buf_pos_nibbles / 2] = (cmd << 4);
+ else
+ priv->out_buf[priv->out_buf_pos_nibbles / 2] |= cmd;
+ priv->out_buf_pos_nibbles++;
+
+ if (priv->out_buf_pos_nibbles == OUT_BUF_SZ * 2)
+ ret = esp_usb_jtag_send_buf();
+ if (ret == ERROR_OK && priv->out_buf_pos_nibbles % (OUT_EP_SZ * 2) == 0) {
+ if (priv->pending_in_bits > (IN_BUF_SZ + priv->hw_in_fifo_len - 1) * 8)
+ ret = esp_usb_jtag_send_buf();
+ }
+ return ret;
+}
+
+/* Writes a command stream equivalent to writing `cmd` `ct` times. */
+static int esp_usb_jtag_write_rlestream(unsigned int cmd, int ct)
+{
+ /* Special case: stacking flush commands does not make sense (and may not make the hardware very happy) */
+ if (cmd == CMD_FLUSH)
+ ct = 1;
+ /* Output previous command and repeat commands */
+ int ret = esp_usb_jtag_command_add_raw(cmd);
+ if (ret != ERROR_OK)
+ return ret;
+ ct--; /* as the previous line already executes the command one time */
+ while (ct > 0) {
+ ret = esp_usb_jtag_command_add_raw(CMD_REP(ct & 3));
+ if (ret != ERROR_OK)
+ return ret;
+ ct >>= 2;
+ }
+ return ERROR_OK;
+}
+
+/* Adds a command to the buffer of things to be sent. Transparently handles RLE compression using
+ * the CMD_REP_x commands */
+static int esp_usb_jtag_command_add(unsigned int cmd)
+{
+ if (cmd == priv->prev_cmd && priv->prev_cmd_repct < CMD_REP_MAX_REPS) {
+ priv->prev_cmd_repct++;
+ } else {
+ /* We can now write out the previous command plus repeat count. */
+ if (priv->prev_cmd_repct) {
+ int ret = esp_usb_jtag_write_rlestream(priv->prev_cmd, priv->prev_cmd_repct);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ /* Ready for new command. */
+ priv->prev_cmd = cmd;
+ priv->prev_cmd_repct = 1;
+ }
+ return ERROR_OK;
+}
+
+/* Called by bitq interface to output a bit on tdi and perhaps read a bit from tdo */
+static int esp_usb_jtag_out(int tms, int tdi, int tdo_req)
+{
+ int ret = esp_usb_jtag_command_add(CMD_CLK(tdo_req, tdi, tms));
+ if (ret != ERROR_OK)
+ return ret;
+ if (tdo_req)
+ priv->pending_in_bits++;
+ return ERROR_OK;
+}
+
+/* Called by bitq interface to flush all output commands and get returned data ready to read */
+static int esp_usb_jtag_flush(void)
+{
+ int ret;
+ /*Make sure last command is written */
+ if (priv->prev_cmd_repct) {
+ ret = esp_usb_jtag_write_rlestream(priv->prev_cmd, priv->prev_cmd_repct);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ priv->prev_cmd_repct = 0;
+ /* Flush in buffer */
+ ret = esp_usb_jtag_command_add_raw(CMD_FLUSH);
+ if (ret != ERROR_OK)
+ return ret;
+ /* Make sure we have an even amount of commands, as we can't write a nibble by itself. */
+ if (priv->out_buf_pos_nibbles & 1) {
+ /*If not, pad with an extra FLUSH */
+ ret = esp_usb_jtag_command_add_raw(CMD_FLUSH);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ LOG_DEBUG_IO("esp_usb_jtag: Flush!");
+ /* Send off the buffer. */
+ ret = esp_usb_jtag_send_buf();
+ if (ret != ERROR_OK)
+ return ret;
+
+ /* Immediately fetch the response bits. */
+ while (priv->pending_in_bits > 0)
+ esp_usb_jtag_recv_buf();
+
+ return ERROR_OK;
+}
+
+/* Called by bitq interface to sleep for a determined amount of time */
+static int esp_usb_jtag_sleep(unsigned long us)
+{
+ esp_usb_jtag_flush();
+ /* TODO: we can sleep more precisely (for small amounts of sleep at least) by sending dummy
+ * commands to the adapter. */
+ jtag_sleep(us);
+ return 0;
+}
+
+/* Called by the bitq interface to set the various resets */
+static int esp_usb_jtag_reset(int trst, int srst)
+{
+ /* TODO: handle trst using setup commands. Kind-of superfluous, however, as we can also do
+ * a tap reset using tms, and it's also not implemented on other ESP32 chips with external JTAG. */
+ return esp_usb_jtag_command_add(CMD_RST(srst));
+}
+
+/* Called by bitq to see if the IN data already is returned to the host. */
+static int esp_usb_jtag_in_rdy(void)
+{
+ /* We read all bits in the flush() routine, so if we're here, we have bits or are at EOF. */
+ return 1;
+}
+
+/* Read one bit from the IN data */
+static int esp_usb_jtag_in(void)
+{
+ if (!esp_usb_jtag_in_rdy()) {
+ LOG_ERROR("esp_usb_jtag: Eeek! bitq asked us for in data while not ready!");
+ return -1;
+ }
+ if (priv->cur_in_buf_rd == priv->cur_in_buf_wr &&
+ priv->in_buf_size_bits[priv->cur_in_buf_rd] == 0)
+ return -1;
+
+ /* Extract the bit */
+ int r = (priv->in_buf[priv->cur_in_buf_rd][priv->in_buf_pos_bits / 8] &
+ BIT(priv->in_buf_pos_bits & 7)) ? 1 : 0;
+ /* Move to next bit. */
+ priv->in_buf_pos_bits++;
+ if (priv->in_buf_pos_bits == priv->in_buf_size_bits[priv->cur_in_buf_rd]) {
+ /* No more bits in this buffer; mark as re-usable and move to next buffer. */
+ priv->in_buf_pos_bits = 0;
+ priv->in_buf_size_bits[priv->cur_in_buf_rd] = 0;/*indicate it is free again */
+ priv->cur_in_buf_rd++;
+ if (priv->cur_in_buf_rd == IN_BUF_CT)
+ priv->cur_in_buf_rd = 0;
+ }
+ return r;
+}
+
+static int esp_usb_jtag_init(void)
+{
+ memset(priv, 0, sizeof(struct esp_usb_jtag));
+
+ const uint16_t vids[] = { esp_usb_vid, 0 }; /* must be null terminated */
+ const uint16_t pids[] = { esp_usb_pid, 0 }; /* must be null terminated */
+
+ bitq_interface = &priv->bitq_interface;
+ bitq_interface->out = esp_usb_jtag_out;
+ bitq_interface->flush = esp_usb_jtag_flush;
+ bitq_interface->sleep = esp_usb_jtag_sleep;
+ bitq_interface->reset = esp_usb_jtag_reset;
+ bitq_interface->in_rdy = esp_usb_jtag_in_rdy;
+ bitq_interface->in = esp_usb_jtag_in;
+
+ int r = jtag_libusb_open(vids, pids, &priv->usb_device, NULL);
+ if (r != ERROR_OK) {
+ LOG_ERROR("esp_usb_jtag: could not find or open device!");
+ goto out;
+ }
+
+ jtag_libusb_set_configuration(priv->usb_device, USB_CONFIGURATION);
+
+ r = jtag_libusb_choose_interface(priv->usb_device, &priv->read_ep, &priv->write_ep,
+ LIBUSB_CLASS_VENDOR_SPEC, LIBUSB_CLASS_VENDOR_SPEC, ESP_USB_INTERFACE, LIBUSB_TRANSFER_TYPE_BULK);
+ if (r != ERROR_OK) {
+ LOG_ERROR("esp_usb_jtag: error finding/claiming JTAG interface on device!");
+ goto out;
+ }
+
+ /* TODO: This is not proper way to get caps data. Two requests can be done.
+ * 1- With the minimum size required to get to know the total length of that struct,
+ * 2- Then exactly the length of that struct. */
+ uint8_t jtag_caps_desc[JTAG_PROTO_CAPS_DATA_LEN];
+ int jtag_caps_read_len = jtag_libusb_control_transfer(priv->usb_device,
+ LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_STANDARD | LIBUSB_RECIPIENT_DEVICE,
+ LIBUSB_REQUEST_GET_DESCRIPTOR, esp_usb_jtag_caps, 0,
+ (char *)jtag_caps_desc, JTAG_PROTO_CAPS_DATA_LEN, LIBUSB_TIMEOUT_MS);
+ if (jtag_caps_read_len <= 0) {
+ LOG_ERROR("esp_usb_jtag: could not retrieve jtag_caps descriptor!");
+ goto out;
+ }
+
+ /* defaults for values we normally get from the jtag caps descriptor */
+ priv->base_speed_khz = UINT32_MAX;
+ priv->div_min = 1;
+ priv->div_max = 1;
+
+ int p = esp_usb_jtag_caps ==
+ VEND_DESCR_BUILTIN_JTAG_CAPS ? JTAG_BUILTIN_DESCR_START_OFF : JTAG_EUB_DESCR_START_OFF;
+
+ if (p + sizeof(struct jtag_proto_caps_hdr) > (unsigned int)jtag_caps_read_len) {
+ LOG_ERROR("esp_usb_jtag: not enough data to get header");
+ goto out;
+ }
+
+ struct jtag_proto_caps_hdr *hdr = (struct jtag_proto_caps_hdr *)&jtag_caps_desc[p];
+ if (hdr->proto_ver != JTAG_PROTO_CAPS_VER) {
+ LOG_ERROR("esp_usb_jtag: unknown jtag_caps descriptor version 0x%X!",
+ hdr->proto_ver);
+ goto out;
+ }
+ if (hdr->length > jtag_caps_read_len) {
+ LOG_ERROR("esp_usb_jtag: header length (%d) bigger then max read bytes (%d)",
+ hdr->length, jtag_caps_read_len);
+ goto out;
+ }
+
+ p += sizeof(struct jtag_proto_caps_hdr);
+
+ while (p + sizeof(struct jtag_gen_hdr) < hdr->length) {
+ struct jtag_gen_hdr *dhdr = (struct jtag_gen_hdr *)&jtag_caps_desc[p];
+ if (dhdr->type == JTAG_PROTO_CAPS_SPEED_APB_TYPE) {
+ if (p + sizeof(struct jtag_proto_caps_speed_apb) < hdr->length) {
+ LOG_ERROR("esp_usb_jtag: not enough data to get caps speed");
+ goto out;
+ }
+ struct jtag_proto_caps_speed_apb *spcap = (struct jtag_proto_caps_speed_apb *)dhdr;
+ /* base speed always is half APB speed */
+ priv->base_speed_khz = le_to_h_u16(spcap->apb_speed_10khz) * 10 / 2;
+ priv->div_min = le_to_h_u16(spcap->div_min);
+ priv->div_max = le_to_h_u16(spcap->div_max);
+ /* TODO: mark in priv that this is apb-derived and as such may change if apb
+ * ever changes? */
+ } else {
+ LOG_WARNING("esp_usb_jtag: unknown caps type 0x%X", dhdr->type);
+ }
+ p += dhdr->length;
+ }
+ if (priv->base_speed_khz == UINT32_MAX) {
+ LOG_WARNING("esp_usb_jtag: No speed caps found... using sane-ish defaults.");
+ priv->base_speed_khz = 1000;
+ }
+ LOG_INFO("esp_usb_jtag: Device found. Base speed %dKHz, div range %d to %d",
+ priv->base_speed_khz, priv->div_min, priv->div_max);
+
+ /* TODO: grab from (future) descriptor if we ever have a device with larger IN buffers */
+ priv->hw_in_fifo_len = 4;
+
+ /* inform bridge board about the connected target chip for the specific operations
+ * it is also safe to send this info to chips that have builtin usb jtag */
+ jtag_libusb_control_transfer(priv->usb_device,
+ LIBUSB_REQUEST_TYPE_VENDOR,
+ VEND_JTAG_SET_CHIPID,
+ esp_usb_target_chip_id,
+ 0,
+ NULL,
+ 0,
+ LIBUSB_TIMEOUT_MS);
+
+ return ERROR_OK;
+
+out:
+ if (priv->usb_device)
+ jtag_libusb_close(priv->usb_device);
+ bitq_interface = NULL;
+ priv->usb_device = NULL;
+ return ERROR_FAIL;
+}
+
+static int esp_usb_jtag_quit(void)
+{
+ if (!priv->usb_device)
+ return ERROR_OK;
+ jtag_libusb_close(priv->usb_device);
+ bitq_cleanup();
+ bitq_interface = NULL;
+ return ERROR_OK;
+}
+
+static int esp_usb_jtag_speed_div(int divisor, int *khz)
+{
+ *khz = priv->base_speed_khz / divisor;
+ return ERROR_OK;
+}
+
+static int esp_usb_jtag_khz(int khz, int *divisor)
+{
+ if (khz == 0) {
+ LOG_WARNING("esp_usb_jtag: RCLK not supported");
+ return ERROR_FAIL;
+ }
+
+ *divisor = priv->base_speed_khz / khz;
+ LOG_DEBUG("Divisor for %d KHz with base clock of %d khz is %d",
+ khz,
+ priv->base_speed_khz,
+ *divisor);
+ if (*divisor < priv->div_min)
+ *divisor = priv->div_min;
+ if (*divisor > priv->div_max)
+ *divisor = priv->div_max;
+
+ return ERROR_OK;
+}
+
+static int esp_usb_jtag_speed(int divisor)
+{
+ if (divisor == 0) {
+ LOG_ERROR("esp_usb_jtag: Adaptive clocking is not supported.");
+ return ERROR_JTAG_NOT_IMPLEMENTED;
+ }
+
+ LOG_DEBUG("esp_usb_jtag: setting divisor %d", divisor);
+ jtag_libusb_control_transfer(priv->usb_device,
+ LIBUSB_REQUEST_TYPE_VENDOR, VEND_JTAG_SETDIV, divisor, 0, NULL, 0, LIBUSB_TIMEOUT_MS);
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(esp_usb_jtag_tdo_cmd)
+{
+ char tdo;
+ if (!priv->usb_device)
+ return ERROR_FAIL;
+ int r = jtag_libusb_control_transfer(priv->usb_device,
+ LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR, VEND_JTAG_GETTDO, 0, 0, &tdo, 1, LIBUSB_TIMEOUT_MS);
+ if (r < 1)
+ return r;
+
+ command_print(CMD, "%d", tdo);
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(esp_usb_jtag_setio_cmd)
+{
+ uint32_t tdi, tms, tck, trst, srst;
+ uint16_t d = 0;
+
+ if (!priv->usb_device)
+ return ERROR_FAIL;
+
+ if (CMD_ARGC != 5)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], tdi);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], tms);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], tck);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], trst);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], srst);
+ if (tdi)
+ d |= VEND_JTAG_SETIO_TDI;
+ if (tms)
+ d |= VEND_JTAG_SETIO_TMS;
+ if (tck)
+ d |= VEND_JTAG_SETIO_TCK;
+ if (trst)
+ d |= VEND_JTAG_SETIO_TRST;
+ if (srst)
+ d |= VEND_JTAG_SETIO_SRST;
+
+ jtag_libusb_control_transfer(priv->usb_device,
+ 0x40, VEND_JTAG_SETIO, d, 0, NULL, 0, LIBUSB_TIMEOUT_MS);
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(esp_usb_jtag_vid_pid)
+{
+ if (CMD_ARGC != 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], esp_usb_vid);
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], esp_usb_pid);
+ LOG_INFO("esp_usb_jtag: VID set to 0x%x and PID to 0x%x", esp_usb_vid, esp_usb_pid);
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(esp_usb_jtag_caps_descriptor)
+{
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], esp_usb_jtag_caps);
+ LOG_INFO("esp_usb_jtag: capabilities descriptor set to 0x%x", esp_usb_jtag_caps);
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(esp_usb_jtag_chip_id)
+{
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], esp_usb_target_chip_id);
+ LOG_INFO("esp_usb_jtag: target chip id set to %d", esp_usb_target_chip_id);
+
+ return ERROR_OK;
+}
+
+static const struct command_registration esp_usb_jtag_subcommands[] = {
+ {
+ .name = "tdo",
+ .handler = &esp_usb_jtag_tdo_cmd,
+ .mode = COMMAND_EXEC,
+ .help = "Returns the current state of the TDO line",
+ .usage = "",
+ },
+ {
+ .name = "setio",
+ .handler = &esp_usb_jtag_setio_cmd,
+ .mode = COMMAND_EXEC,
+ .help = "Manually set the status of the output lines",
+ .usage = "tdi tms tck trst srst"
+ },
+ {
+ .name = "vid_pid",
+ .handler = &esp_usb_jtag_vid_pid,
+ .mode = COMMAND_CONFIG,
+ .help = "set vendor ID and product ID for ESP usb jtag driver",
+ .usage = "vid pid",
+ },
+ {
+ .name = "caps_descriptor",
+ .handler = &esp_usb_jtag_caps_descriptor,
+ .mode = COMMAND_CONFIG,
+ .help = "set jtag descriptor to read capabilities of ESP usb jtag driver",
+ .usage = "descriptor",
+ },
+ {
+ .name = "chip_id",
+ .handler = &esp_usb_jtag_chip_id,
+ .mode = COMMAND_CONFIG,
+ .help = "set chip_id to transfer to the bridge",
+ .usage = "chip_id",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+static const struct command_registration esp_usb_jtag_commands[] = {
+ {
+ .name = "espusbjtag",
+ .mode = COMMAND_ANY,
+ .help = "ESP-USB-JTAG commands",
+ .chain = esp_usb_jtag_subcommands,
+ .usage = "",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+static struct jtag_interface esp_usb_jtag_interface = {
+ .supported = DEBUG_CAP_TMS_SEQ,
+ .execute_queue = bitq_execute_queue,
+};
+
+struct adapter_driver esp_usb_adapter_driver = {
+ .name = "esp_usb_jtag",
+ .transports = jtag_only,
+ .commands = esp_usb_jtag_commands,
+
+ .init = esp_usb_jtag_init,
+ .quit = esp_usb_jtag_quit,
+ .speed_div = esp_usb_jtag_speed_div,
+ .speed = esp_usb_jtag_speed,
+ .khz = esp_usb_jtag_khz,
+
+ .jtag_ops = &esp_usb_jtag_interface,
+};
diff --git a/src/jtag/drivers/ft232r.c b/src/jtag/drivers/ft232r.c
index c930d8c..816b2d0 100644
--- a/src/jtag/drivers/ft232r.c
+++ b/src/jtag/drivers/ft232r.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 Serge Vakulenko *
* serge@vak.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 16cb027..d2dd893 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/**************************************************************************
* Copyright (C) 2012 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
-* *
-* This program is free software; you can redistribute it and/or modify *
-* it under the terms of the GNU General Public License as published by *
-* the Free Software Foundation; either version 2 of the License, or *
-* (at your option) any later version. *
-* *
-* This program is distributed in the hope that it will be useful, *
-* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-* GNU General Public License for more details. *
-* *
-* You should have received a copy of the GNU General Public License *
-* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
diff --git a/src/jtag/drivers/gw16012.c b/src/jtag/drivers/gw16012.c
index db0a677..592e170 100644
--- a/src/jtag/drivers/gw16012.c
+++ b/src/jtag/drivers/gw16012.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/imx_gpio.c b/src/jtag/drivers/imx_gpio.c
index 39b463d..d44b127 100644
--- a/src/jtag/drivers/imx_gpio.c
+++ b/src/jtag/drivers/imx_gpio.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Grzegorz Kostka, kostka.grzegorz@gmail.com *
* *
* Based on bcm2835gpio.c *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 5c21874..0a96ac2 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Juergen Stuber <juergen@jstuber.net> *
* based on Dominic Rath's and Benedikt Sauter's usbprog.c *
@@ -13,19 +15,6 @@
* *
* Copyright (C) 2015 by Paul Fertser *
* fercerpav@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/jtag_dpi.c b/src/jtag/drivers/jtag_dpi.c
index 016ff55..2a36331 100644
--- a/src/jtag/drivers/jtag_dpi.c
+++ b/src/jtag/drivers/jtag_dpi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* JTAG to DPI driver
*
@@ -7,19 +9,6 @@
*
* See file CREDITS for list of people who contributed to this
* project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index eb53a5b..f19e9ab 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* JTAG to VPI driver
*
@@ -5,19 +7,6 @@
*
* See file CREDITS for list of people who contributed to this
* project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/kitprog.c b/src/jtag/drivers/kitprog.c
index 5e2168e..0af1ff7 100644
--- a/src/jtag/drivers/kitprog.c
+++ b/src/jtag/drivers/kitprog.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Juergen Stuber <juergen@jstuber.net> *
* based on Dominic Rath's and Benedikt Sauter's usbprog.c *
@@ -16,19 +18,6 @@
* *
* Copyright (C) 2015-2017 by Forest Crossman *
* cyrozap@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -90,8 +79,24 @@
#define HID_COMMAND_CONFIGURE 0x8f
#define HID_COMMAND_BOOTLOADER 0xa0
-/* 512 bytes seems to work reliably */
-#define SWD_MAX_BUFFER_LENGTH 512
+/* 512 bytes seemed to work reliably.
+ * It works with both full queue of mostly reads or mostly writes.
+ *
+ * Unfortunately the commit 88f429ead019fd6df96ec15f0d897385f3cef0d0
+ * 5321: target/cortex_m: faster reading of all CPU registers
+ * revealed a serious Kitprog firmware problem:
+ * If the queue contains more than 63 transactions in the repeated pattern
+ * one write, two reads, the firmware fails badly.
+ * Sending 64 transactions makes the adapter to loose the connection with the
+ * device. Sending 65 or more transactions causes the adapter to stop
+ * receiving USB HID commands, next kitprog_hid_command() stops in hid_write().
+ *
+ * The problem was detected with KitProg v2.12 and v2.16.
+ * We can guess the problem is something like a buffer or stack overflow.
+ *
+ * Use shorter buffer as a workaround. 300 bytes (= 60 transactions) works.
+ */
+#define SWD_MAX_BUFFER_LENGTH 300
struct kitprog {
hid_device *hid_handle;
@@ -332,9 +337,13 @@ static int kitprog_hid_command(uint8_t *command, size_t command_length,
return ERROR_FAIL;
}
- ret = hid_read(kitprog_handle->hid_handle, data, data_length);
- if (ret < 0) {
- LOG_DEBUG("HID read returned %i", ret);
+ ret = hid_read_timeout(kitprog_handle->hid_handle,
+ data, data_length, LIBUSB_TIMEOUT_MS);
+ if (ret == 0) {
+ LOG_ERROR("HID read timed out");
+ return ERROR_TIMEOUT_REACHED;
+ } else if (ret < 0) {
+ LOG_ERROR("HID read error %ls", hid_error(kitprog_handle->hid_handle));
return ERROR_FAIL;
}
diff --git a/src/jtag/drivers/libjaylink b/src/jtag/drivers/libjaylink
-Subproject 9aa7a5957c07bb6e862fc1a6d3153d109c7407e
+Subproject 0d23921a05d5d427332a142d154c213d0c306eb
diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c
index fc961cb..53dfd50 100644
--- a/src/jtag/drivers/libusb_helper.c
+++ b/src/jtag/drivers/libusb_helper.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Zachary T Welch <zw@superlucidity.net> *
* *
* Copyright (C) 2011 by Mauro Gamba <maurillo71@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/libusb_helper.h b/src/jtag/drivers/libusb_helper.h
index 9d51464..172c345 100644
--- a/src/jtag/drivers/libusb_helper.h
+++ b/src/jtag/drivers/libusb_helper.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Zachary T Welch <zw@superlucidity.net> *
* *
* Copyright (C) 2011 by Mauro Gamba <maurillo71@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_LIBUSB_HELPER_H
diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 288035f..d1a88c8 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Bitbang driver for Linux GPIO descriptors through libgpiod
* Copyright (C) 2020 Antonio Borneo <borneo.antonio@gmail.com>
@@ -14,67 +14,41 @@
#endif
#include <gpiod.h>
+#include <jtag/adapter.h>
#include <jtag/interface.h>
#include <transport/transport.h>
#include "bitbang.h"
-/* gpio numbers for each gpio. Negative values are invalid */
-static int tck_gpio = -1;
-static int tms_gpio = -1;
-static int tdi_gpio = -1;
-static int tdo_gpio = -1;
-static int trst_gpio = -1;
-static int srst_gpio = -1;
-static int swclk_gpio = -1;
-static int swdio_gpio = -1;
-static int swdio_dir_gpio = -1;
-static int led_gpio = -1;
-static int gpiochip = -1;
-static int tck_gpiochip = -1;
-static int tms_gpiochip = -1;
-static int tdi_gpiochip = -1;
-static int tdo_gpiochip = -1;
-static int trst_gpiochip = -1;
-static int srst_gpiochip = -1;
-static int swclk_gpiochip = -1;
-static int swdio_gpiochip = -1;
-static int swdio_dir_gpiochip = -1;
-static int led_gpiochip = -1;
-
-static struct gpiod_chip *gpiod_chip_tck;
-static struct gpiod_chip *gpiod_chip_tms;
-static struct gpiod_chip *gpiod_chip_tdi;
-static struct gpiod_chip *gpiod_chip_tdo;
-static struct gpiod_chip *gpiod_chip_trst;
-static struct gpiod_chip *gpiod_chip_srst;
-static struct gpiod_chip *gpiod_chip_swclk;
-static struct gpiod_chip *gpiod_chip_swdio;
-static struct gpiod_chip *gpiod_chip_swdio_dir;
-static struct gpiod_chip *gpiod_chip_led;
-
-static struct gpiod_line *gpiod_tck;
-static struct gpiod_line *gpiod_tms;
-static struct gpiod_line *gpiod_tdi;
-static struct gpiod_line *gpiod_tdo;
-static struct gpiod_line *gpiod_trst;
-static struct gpiod_line *gpiod_swclk;
-static struct gpiod_line *gpiod_swdio;
-static struct gpiod_line *gpiod_swdio_dir;
-static struct gpiod_line *gpiod_srst;
-static struct gpiod_line *gpiod_led;
+static struct gpiod_chip *gpiod_chip[ADAPTER_GPIO_IDX_NUM] = {};
+static struct gpiod_line *gpiod_line[ADAPTER_GPIO_IDX_NUM] = {};
static int last_swclk;
static int last_swdio;
static bool last_stored;
static bool swdio_input;
-static bool swdio_dir_is_active_high = true;
+
+static const struct adapter_gpio_config *adapter_gpio_config;
+
+/*
+ * Helper function to determine if gpio config is valid
+ *
+ * Assume here that there will be less than 10000 gpios per gpiochip, and less
+ * than 1000 gpiochips.
+ */
+static bool is_gpio_config_valid(enum adapter_gpio_config_index idx)
+{
+ return adapter_gpio_config[idx].chip_num >= 0
+ && adapter_gpio_config[idx].chip_num < 1000
+ && adapter_gpio_config[idx].gpio_num >= 0
+ && adapter_gpio_config[idx].gpio_num < 10000;
+}
/* Bitbang interface read of TDO */
static bb_value_t linuxgpiod_read(void)
{
int retval;
- retval = gpiod_line_get_value(gpiod_tdo);
+ retval = gpiod_line_get_value(gpiod_line[ADAPTER_GPIO_IDX_TDO]);
if (retval < 0) {
LOG_WARNING("reading tdo failed");
return 0;
@@ -107,20 +81,20 @@ static int linuxgpiod_write(int tck, int tms, int tdi)
}
if (tdi != last_tdi) {
- retval = gpiod_line_set_value(gpiod_tdi, tdi);
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TDI], tdi);
if (retval < 0)
LOG_WARNING("writing tdi failed");
}
if (tms != last_tms) {
- retval = gpiod_line_set_value(gpiod_tms, tms);
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TMS], tms);
if (retval < 0)
LOG_WARNING("writing tms failed");
}
/* write clk last */
if (tck != last_tck) {
- retval = gpiod_line_set_value(gpiod_tck, tck);
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TCK], tck);
if (retval < 0)
LOG_WARNING("writing tck failed");
}
@@ -136,7 +110,7 @@ static int linuxgpiod_swdio_read(void)
{
int retval;
- retval = gpiod_line_get_value(gpiod_swdio);
+ retval = gpiod_line_get_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO]);
if (retval < 0) {
LOG_WARNING("Fail read swdio");
return 0;
@@ -154,23 +128,23 @@ static void linuxgpiod_swdio_drive(bool is_output)
* https://stackoverflow.com/questions/58735140/
* this would change in future libgpiod
*/
- gpiod_line_release(gpiod_swdio);
+ gpiod_line_release(gpiod_line[ADAPTER_GPIO_IDX_SWDIO]);
if (is_output) {
- if (gpiod_swdio_dir) {
- retval = gpiod_line_set_value(gpiod_swdio_dir, swdio_dir_is_active_high ? 1 : 0);
+ if (gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR]) {
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);
if (retval < 0)
LOG_WARNING("Fail set swdio_dir");
}
- retval = gpiod_line_request_output(gpiod_swdio, "OpenOCD", 1);
+ retval = gpiod_line_request_output(gpiod_line[ADAPTER_GPIO_IDX_SWDIO], "OpenOCD", 1);
if (retval < 0)
LOG_WARNING("Fail request_output line swdio");
} else {
- retval = gpiod_line_request_input(gpiod_swdio, "OpenOCD");
+ retval = gpiod_line_request_input(gpiod_line[ADAPTER_GPIO_IDX_SWDIO], "OpenOCD");
if (retval < 0)
LOG_WARNING("Fail request_input line swdio");
- if (gpiod_swdio_dir) {
- retval = gpiod_line_set_value(gpiod_swdio_dir, swdio_dir_is_active_high ? 0 : 1);
+ if (gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR]) {
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR], 0);
if (retval < 0)
LOG_WARNING("Fail set swdio_dir");
}
@@ -186,7 +160,7 @@ static int linuxgpiod_swd_write(int swclk, int swdio)
if (!swdio_input) {
if (!last_stored || (swdio != last_swdio)) {
- retval = gpiod_line_set_value(gpiod_swdio, swdio);
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO], swdio);
if (retval < 0)
LOG_WARNING("Fail set swdio");
}
@@ -194,7 +168,7 @@ static int linuxgpiod_swd_write(int swclk, int swdio)
/* write swclk last */
if (!last_stored || (swclk != last_swclk)) {
- retval = gpiod_line_set_value(gpiod_swclk, swclk);
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWCLK], swclk);
if (retval < 0)
LOG_WARNING("Fail set swclk");
}
@@ -210,10 +184,10 @@ static int linuxgpiod_blink(int on)
{
int retval;
- if (!gpiod_led)
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_LED))
return ERROR_OK;
- retval = gpiod_line_set_value(gpiod_led, on);
+ retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_LED], on);
if (retval < 0)
LOG_WARNING("Fail set led");
return retval;
@@ -239,16 +213,18 @@ static int linuxgpiod_reset(int trst, int srst)
LOG_DEBUG("linuxgpiod_reset");
- /* assume active low */
- if (gpiod_srst) {
- retval1 = gpiod_line_set_value(gpiod_srst, srst ? 0 : 1);
+ /*
+ * active low behaviour handled by "adaptor gpio" command and
+ * GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW flag when requesting the line.
+ */
+ if (gpiod_line[ADAPTER_GPIO_IDX_SRST]) {
+ retval1 = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SRST], srst);
if (retval1 < 0)
LOG_WARNING("set srst value failed");
}
- /* assume active low */
- if (gpiod_trst) {
- retval2 = gpiod_line_set_value(gpiod_trst, trst ? 0 : 1);
+ if (gpiod_line[ADAPTER_GPIO_IDX_TRST]) {
+ retval2 = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TRST], trst);
if (retval2 < 0)
LOG_WARNING("set trst value failed");
}
@@ -256,127 +232,134 @@ static int linuxgpiod_reset(int trst, int srst)
return ((retval1 < 0) || (retval2 < 0)) ? ERROR_FAIL : ERROR_OK;
}
-/*
- * Helper function to determine if gpio number is valid
- *
- * Assume here that there will be less than 10000 gpios per gpiochip
- */
-static bool is_gpio_valid(int gpio)
-{
- return gpio >= 0 && gpio < 10000;
-}
-
static bool linuxgpiod_jtag_mode_possible(void)
{
- if (!is_gpio_valid(tck_gpio))
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TCK))
return false;
- if (!is_gpio_valid(tms_gpio))
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TMS))
return false;
- if (!is_gpio_valid(tdi_gpio))
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TDI))
return false;
- if (!is_gpio_valid(tdo_gpio))
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_TDO))
return false;
return true;
}
static bool linuxgpiod_swd_mode_possible(void)
{
- if (!is_gpio_valid(swclk_gpio))
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_SWCLK))
return false;
- if (!is_gpio_valid(swdio_gpio))
+ if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO))
return false;
return true;
}
-static inline void helper_release(struct gpiod_line *line)
+static inline void helper_release(enum adapter_gpio_config_index idx)
{
- if (line)
- gpiod_line_release(line);
+ if (gpiod_line[idx]) {
+ gpiod_line_release(gpiod_line[idx]);
+ gpiod_line[idx] = NULL;
+ }
+ if (gpiod_chip[idx]) {
+ gpiod_chip_close(gpiod_chip[idx]);
+ gpiod_chip[idx] = NULL;
+ }
}
static int linuxgpiod_quit(void)
{
- helper_release(gpiod_led);
- helper_release(gpiod_srst);
- helper_release(gpiod_swdio);
- helper_release(gpiod_swclk);
- helper_release(gpiod_trst);
- helper_release(gpiod_tms);
- helper_release(gpiod_tck);
- helper_release(gpiod_tdi);
- helper_release(gpiod_tdo);
-
- if (gpiod_chip_led != NULL)
- gpiod_chip_close(gpiod_chip_led);
- if (gpiod_chip_srst != NULL)
- gpiod_chip_close(gpiod_chip_srst);
- if (gpiod_chip_swdio != NULL)
- gpiod_chip_close(gpiod_chip_swdio);
- if (gpiod_chip_swdio_dir != NULL)
- gpiod_chip_close(gpiod_chip_swdio_dir);
- if (gpiod_chip_swclk != NULL)
- gpiod_chip_close(gpiod_chip_swclk);
- if (gpiod_chip_trst != NULL)
- gpiod_chip_close(gpiod_chip_trst);
- if (gpiod_chip_tms != NULL)
- gpiod_chip_close(gpiod_chip_tms);
- if (gpiod_chip_tck != NULL)
- gpiod_chip_close(gpiod_chip_tck);
- if (gpiod_chip_tdi != NULL)
- gpiod_chip_close(gpiod_chip_tdi);
- if (gpiod_chip_tdo != NULL)
- gpiod_chip_close(gpiod_chip_tdo);
+ LOG_DEBUG("linuxgpiod_quit");
+ for (int i = 0; i < ADAPTER_GPIO_IDX_NUM; ++i)
+ helper_release(i);
return ERROR_OK;
}
-static struct gpiod_line *helper_get_line(const char *label,
- struct gpiod_chip *gpiod_chip, unsigned int offset,
- int val, int dir, int flags)
+static int helper_get_line(enum adapter_gpio_config_index idx)
{
- struct gpiod_line *line;
- int retval;
+ if (!is_gpio_config_valid(idx))
+ return ERROR_OK;
+
+ int dir = GPIOD_LINE_REQUEST_DIRECTION_INPUT, flags = 0, val = 0, retval;
+
+ gpiod_chip[idx] = gpiod_chip_open_by_number(adapter_gpio_config[idx].chip_num);
+ if (!gpiod_chip[idx]) {
+ LOG_ERROR("Cannot open LinuxGPIOD chip %d for %s", adapter_gpio_config[idx].chip_num,
+ adapter_gpio_get_name(idx));
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ gpiod_line[idx] = gpiod_chip_get_line(gpiod_chip[idx], adapter_gpio_config[idx].gpio_num);
+ if (!gpiod_line[idx]) {
+ LOG_ERROR("Error get line %s", adapter_gpio_get_name(idx));
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ switch (adapter_gpio_config[idx].init_state) {
+ case ADAPTER_GPIO_INIT_STATE_INPUT:
+ dir = GPIOD_LINE_REQUEST_DIRECTION_INPUT;
+ break;
+ case ADAPTER_GPIO_INIT_STATE_INACTIVE:
+ dir = GPIOD_LINE_REQUEST_DIRECTION_OUTPUT;
+ val = 0;
+ break;
+ case ADAPTER_GPIO_INIT_STATE_ACTIVE:
+ dir = GPIOD_LINE_REQUEST_DIRECTION_OUTPUT;
+ val = 1;
+ break;
+ }
+
+ switch (adapter_gpio_config[idx].drive) {
+ case ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL:
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN:
+ flags |= GPIOD_LINE_REQUEST_FLAG_OPEN_DRAIN;
+ break;
+ case ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE:
+ flags |= GPIOD_LINE_REQUEST_FLAG_OPEN_SOURCE;
+ break;
+ }
- line = gpiod_chip_get_line(gpiod_chip, offset);
- if (!line) {
- LOG_ERROR("Error get line %s", label);
- return NULL;
+ switch (adapter_gpio_config[idx].pull) {
+ case ADAPTER_GPIO_PULL_NONE:
+#ifdef GPIOD_LINE_REQUEST_FLAG_BIAS_DISABLE
+ flags |= GPIOD_LINE_REQUEST_FLAG_BIAS_DISABLE;
+#endif
+ break;
+ case ADAPTER_GPIO_PULL_UP:
+#ifdef GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_UP
+ flags |= GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_UP;
+#else
+ LOG_WARNING("linuxgpiod: ignoring request for pull-up on %s: not supported by gpiod v%s",
+ adapter_gpio_get_name(idx), gpiod_version_string());
+#endif
+ break;
+ case ADAPTER_GPIO_PULL_DOWN:
+#ifdef GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_DOWN
+ flags |= GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_DOWN;
+#else
+ LOG_WARNING("linuxgpiod: ignoring request for pull-down on %s: not supported by gpiod v%s",
+ adapter_gpio_get_name(idx), gpiod_version_string());
+#endif
+ break;
}
+ if (adapter_gpio_config[idx].active_low)
+ flags |= GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
+
struct gpiod_line_request_config config = {
.consumer = "OpenOCD",
.request_type = dir,
.flags = flags,
};
- retval = gpiod_line_request(line, &config, val);
+ retval = gpiod_line_request(gpiod_line[idx], &config, val);
if (retval < 0) {
- LOG_ERROR("Error requesting gpio line %s", label);
- return NULL;
+ LOG_ERROR("Error requesting gpio line %s", adapter_gpio_get_name(idx));
+ return ERROR_JTAG_INIT_FAILED;
}
- return line;
-}
-
-static struct gpiod_line *helper_get_input_line(const char *label,
- struct gpiod_chip *gpiod_chip, unsigned int offset)
-{
- return helper_get_line(label, gpiod_chip, offset, 0,
- GPIOD_LINE_REQUEST_DIRECTION_INPUT, 0);
-}
-
-static struct gpiod_line *helper_get_output_line(const char *label,
- struct gpiod_chip *gpiod_chip, unsigned int offset, int val)
-{
- return helper_get_line(label, gpiod_chip, offset, val,
- GPIOD_LINE_REQUEST_DIRECTION_OUTPUT, 0);
-}
-
-static struct gpiod_line *helper_get_open_drain_output_line(const char *label,
- struct gpiod_chip *gpiod_chip, unsigned int offset, int val)
-{
- return helper_get_line(label, gpiod_chip, offset, val,
- GPIOD_LINE_REQUEST_DIRECTION_OUTPUT, GPIOD_LINE_REQUEST_FLAG_OPEN_DRAIN);
+ return ERROR_OK;
}
static int linuxgpiod_init(void)
@@ -384,11 +367,11 @@ static int linuxgpiod_init(void)
LOG_INFO("Linux GPIOD JTAG/SWD bitbang driver");
bitbang_interface = &linuxgpiod_bitbang;
+ adapter_gpio_config = adapter_gpio_get_config();
/*
- * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
- * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
- * For SWD, SWCLK and SWDIO are configures as output high.
+ * Configure JTAG/SWD signals. Default directions and initial states are handled
+ * by adapter.c and "adapter gpio" command.
*/
if (transport_is_jtag()) {
@@ -397,129 +380,44 @@ static int linuxgpiod_init(void)
goto out_error;
}
- gpiod_chip_tdo = gpiod_chip_open_by_number(tdo_gpiochip);
- if (!gpiod_chip_tdo) {
- LOG_ERROR("Cannot open LinuxGPIOD tdo_gpiochip %d", tdo_gpiochip);
- goto out_error;
- }
- gpiod_chip_tdi = gpiod_chip_open_by_number(tdi_gpiochip);
- if (!gpiod_chip_tdi) {
- LOG_ERROR("Cannot open LinuxGPIOD tdi_gpiochip %d", tdi_gpiochip);
- goto out_error;
- }
- gpiod_chip_tck = gpiod_chip_open_by_number(tck_gpiochip);
- if (!gpiod_chip_tck) {
- LOG_ERROR("Cannot open LinuxGPIOD tck_gpiochip %d", tck_gpiochip);
- goto out_error;
- }
- gpiod_chip_tms = gpiod_chip_open_by_number(tms_gpiochip);
- if (!gpiod_chip_tms) {
- LOG_ERROR("Cannot open LinuxGPIOD tms_gpiochip %d", tms_gpiochip);
- goto out_error;
- }
-
- gpiod_tdo = helper_get_input_line("tdo", gpiod_chip_tdo, tdo_gpio);
- if (!gpiod_tdo)
- goto out_error;
-
- gpiod_tdi = helper_get_output_line("tdi", gpiod_chip_tdi, tdi_gpio, 0);
- if (!gpiod_tdi)
- goto out_error;
-
- gpiod_tck = helper_get_output_line("tck", gpiod_chip_tck, tck_gpio, 0);
- if (!gpiod_tck)
- goto out_error;
-
- gpiod_tms = helper_get_output_line("tms", gpiod_chip_tms, tms_gpio, 1);
- if (!gpiod_tms)
- goto out_error;
-
- if (is_gpio_valid(trst_gpio)) {
- gpiod_chip_trst = gpiod_chip_open_by_number(trst_gpiochip);
- if (!gpiod_chip_trst) {
- LOG_ERROR("Cannot open LinuxGPIOD trst_gpiochip %d", trst_gpiochip);
+ if (helper_get_line(ADAPTER_GPIO_IDX_TDO) != ERROR_OK ||
+ helper_get_line(ADAPTER_GPIO_IDX_TDI) != ERROR_OK ||
+ helper_get_line(ADAPTER_GPIO_IDX_TCK) != ERROR_OK ||
+ helper_get_line(ADAPTER_GPIO_IDX_TMS) != ERROR_OK ||
+ helper_get_line(ADAPTER_GPIO_IDX_TRST) != ERROR_OK)
goto out_error;
- }
-
- if (jtag_get_reset_config() & RESET_TRST_OPEN_DRAIN)
- gpiod_trst = helper_get_open_drain_output_line("trst", gpiod_chip_trst, trst_gpio, 1);
- else
- gpiod_trst = helper_get_output_line("trst", gpiod_chip_trst, trst_gpio, 1);
-
- if (!gpiod_trst)
- goto out_error;
- }
}
if (transport_is_swd()) {
+ int retval1, retval2;
if (!linuxgpiod_swd_mode_possible()) {
LOG_ERROR("Require swclk and swdio gpio for SWD mode");
goto out_error;
}
- gpiod_chip_swclk = gpiod_chip_open_by_number(swclk_gpiochip);
- if (!gpiod_chip_swclk) {
- LOG_ERROR("Cannot open LinuxGPIOD swclk_gpiochip %d", swclk_gpiochip);
- goto out_error;
+ /*
+ * swdio and its buffer should be initialized in the order that prevents
+ * two outputs from being connected together. This will occur if the
+ * swdio GPIO is configured as an output while the external buffer is
+ * configured to send the swdio signal from the target to the GPIO.
+ */
+ if (adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].init_state == ADAPTER_GPIO_INIT_STATE_INPUT) {
+ retval1 = helper_get_line(ADAPTER_GPIO_IDX_SWDIO);
+ retval2 = helper_get_line(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ } else {
+ retval1 = helper_get_line(ADAPTER_GPIO_IDX_SWDIO_DIR);
+ retval2 = helper_get_line(ADAPTER_GPIO_IDX_SWDIO);
}
- gpiod_chip_swdio = gpiod_chip_open_by_number(swdio_gpiochip);
- if (!gpiod_chip_swdio) {
- LOG_ERROR("Cannot open LinuxGPIOD swdio_gpiochip %d", swdio_gpiochip);
+ if (retval1 != ERROR_OK || retval2 != ERROR_OK)
goto out_error;
- }
-
- if (is_gpio_valid(swdio_dir_gpio)) {
- gpiod_chip_swdio_dir = gpiod_chip_open_by_number(swdio_dir_gpiochip);
- if (!gpiod_chip_swdio_dir) {
- LOG_ERROR("Cannot open LinuxGPIOD swdio_dir_gpiochip %d", swdio_dir_gpiochip);
- goto out_error;
- }
- }
- gpiod_swclk = helper_get_output_line("swclk", gpiod_chip_swclk, swclk_gpio, 1);
- if (!gpiod_swclk)
- goto out_error;
-
- /* Set buffer direction before making SWDIO an output */
- if (is_gpio_valid(swdio_dir_gpio)) {
- gpiod_swdio_dir = helper_get_output_line("swdio_dir", gpiod_chip_swdio_dir, swdio_dir_gpio,
- swdio_dir_is_active_high ? 1 : 0);
- if (!gpiod_swdio_dir)
- goto out_error;
- }
-
- gpiod_swdio = helper_get_output_line("swdio", gpiod_chip_swdio, swdio_gpio, 1);
- if (!gpiod_swdio)
+ if (helper_get_line(ADAPTER_GPIO_IDX_SWCLK) != ERROR_OK)
goto out_error;
}
- if (is_gpio_valid(srst_gpio)) {
- gpiod_chip_srst = gpiod_chip_open_by_number(srst_gpiochip);
- if (!gpiod_chip_srst) {
- LOG_ERROR("Cannot open LinuxGPIOD srst_gpiochip %d", srst_gpiochip);
- goto out_error;
- }
-
- if (jtag_get_reset_config() & RESET_SRST_PUSH_PULL)
- gpiod_srst = helper_get_output_line("srst", gpiod_chip_srst, srst_gpio, 1);
- else
- gpiod_srst = helper_get_open_drain_output_line("srst", gpiod_chip_srst, srst_gpio, 1);
-
- if (!gpiod_srst)
- goto out_error;
- }
-
- if (is_gpio_valid(led_gpio)) {
- gpiod_chip_led = gpiod_chip_open_by_number(led_gpiochip);
- if (!gpiod_chip_led) {
- LOG_ERROR("Cannot open LinuxGPIOD led_gpiochip %d", led_gpiochip);
- goto out_error;
- }
-
- gpiod_led = helper_get_output_line("led", gpiod_chip_led, led_gpio, 0);
- if (!gpiod_led)
+ if (helper_get_line(ADAPTER_GPIO_IDX_SRST) != ERROR_OK ||
+ helper_get_line(ADAPTER_GPIO_IDX_LED) != ERROR_OK)
goto out_error;
- }
return ERROR_OK;
@@ -529,241 +427,6 @@ out_error:
return ERROR_JTAG_INIT_FAILED;
}
-COMMAND_HELPER(linuxgpiod_helper_gpionum, const char *name, int *chip, int *line)
-{
- int i = 0;
- if (CMD_ARGC > 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC == 2) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], *chip);
- i = 1;
- }
- if (CMD_ARGC > 0)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[i], *line);
- command_print(CMD, "LinuxGPIOD %s: chip = %d, num = %d", name, *chip, *line);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionums)
-{
- if (CMD_ARGC == 4) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], tms_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], tdi_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], tdo_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD,
- "LinuxGPIOD nums: tck = %d, tms = %d, tdi = %d, tdo = %d",
- tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tck)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "tck", &tck_gpiochip,
- &tck_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tms)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "tms", &tms_gpiochip,
- &tms_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tdo)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "tdo", &tdo_gpiochip,
- &tdo_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_tdi)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "tdi", &tdi_gpiochip,
- &tdi_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_srst)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "srst", &srst_gpiochip,
- &srst_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_jtag_gpionum_trst)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "trst", &trst_gpiochip,
- &trst_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_swd_gpionums)
-{
- if (CMD_ARGC == 2) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD,
- "LinuxGPIOD nums: swclk = %d, swdio = %d",
- swclk_gpio, swdio_gpio);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_swd_gpionum_swclk)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "swclk", &swclk_gpiochip,
- &swclk_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_swd_gpionum_swdio)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "swdio", &swdio_gpiochip,
- &swdio_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_swd_gpionum_swdio_dir)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "swdio_dir", &swdio_dir_gpiochip,
- &swdio_dir_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_gpionum_led)
-{
- return CALL_COMMAND_HANDLER(linuxgpiod_helper_gpionum, "led", &led_gpiochip,
- &led_gpio);
-}
-
-COMMAND_HANDLER(linuxgpiod_handle_gpiochip)
-{
- if (CMD_ARGC == 1) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], gpiochip);
- tck_gpiochip = gpiochip;
- tms_gpiochip = gpiochip;
- tdi_gpiochip = gpiochip;
- tdo_gpiochip = gpiochip;
- trst_gpiochip = gpiochip;
- srst_gpiochip = gpiochip;
- swclk_gpiochip = gpiochip;
- swdio_gpiochip = gpiochip;
- swdio_dir_gpiochip = gpiochip;
- led_gpiochip = gpiochip;
- }
-
- command_print(CMD, "LinuxGPIOD gpiochip = %d", gpiochip);
- return ERROR_OK;
-}
-
-static const struct command_registration linuxgpiod_subcommand_handlers[] = {
- {
- .name = "jtag_nums",
- .handler = linuxgpiod_handle_jtag_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)",
- .usage = "tck tms tdi tdo",
- },
- {
- .name = "tck_num",
- .handler = linuxgpiod_handle_jtag_gpionum_tck,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for tck.",
- .usage = "[chip] tck",
- },
- {
- .name = "tms_num",
- .handler = linuxgpiod_handle_jtag_gpionum_tms,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for tms.",
- .usage = "[chip] tms",
- },
- {
- .name = "tdo_num",
- .handler = linuxgpiod_handle_jtag_gpionum_tdo,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for tdo.",
- .usage = "[chip] tdo",
- },
- {
- .name = "tdi_num",
- .handler = linuxgpiod_handle_jtag_gpionum_tdi,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for tdi.",
- .usage = "[chip] tdi",
- },
- {
- .name = "srst_num",
- .handler = linuxgpiod_handle_jtag_gpionum_srst,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for srst.",
- .usage = "[chip] srst",
- },
- {
- .name = "trst_num",
- .handler = linuxgpiod_handle_jtag_gpionum_trst,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for trst.",
- .usage = "[chip] trst",
- },
- {
- .name = "swd_nums",
- .handler = linuxgpiod_handle_swd_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for swclk, swdio. (in that order)",
- .usage = "swclk swdio",
- },
- {
- .name = "swclk_num",
- .handler = linuxgpiod_handle_swd_gpionum_swclk,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for swclk.",
- .usage = "[chip] swclk",
- },
- {
- .name = "swdio_num",
- .handler = linuxgpiod_handle_swd_gpionum_swdio,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for swdio.",
- .usage = "[chip] swdio",
- },
- {
- .name = "swdio_dir_num",
- .handler = linuxgpiod_handle_swd_gpionum_swdio_dir,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for swdio_dir.",
- .usage = "[chip] swdio_dir",
- },
- {
- .name = "led_num",
- .handler = linuxgpiod_handle_gpionum_led,
- .mode = COMMAND_CONFIG,
- .help = "gpio chip number (optional) and gpio number for LED.",
- .usage = "[chip] led",
- },
- {
- .name = "gpiochip",
- .handler = linuxgpiod_handle_gpiochip,
- .mode = COMMAND_CONFIG,
- .help = "number of the gpiochip.",
- .usage = "gpiochip",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration linuxgpiod_command_handlers[] = {
- {
- .name = "linuxgpiod",
- .mode = COMMAND_ANY,
- .help = "perform linuxgpiod management",
- .chain = linuxgpiod_subcommand_handlers,
- .usage = "",
- },
- COMMAND_REGISTRATION_DONE
-};
-
static const char *const linuxgpiod_transport[] = { "swd", "jtag", NULL };
static struct jtag_interface linuxgpiod_interface = {
@@ -774,7 +437,6 @@ static struct jtag_interface linuxgpiod_interface = {
struct adapter_driver linuxgpiod_adapter_driver = {
.name = "linuxgpiod",
.transports = linuxgpiod_transport,
- .commands = linuxgpiod_command_handlers,
.init = linuxgpiod_init,
.quit = linuxgpiod_quit,
diff --git a/src/jtag/drivers/minidriver_imp.h b/src/jtag/drivers/minidriver_imp.h
index cd59a74..7afb463 100644
--- a/src/jtag/drivers/minidriver_imp.h
+++ b/src/jtag/drivers/minidriver_imp.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007-2009 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_MINIDRIVER_IMP_H
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index 0e3d2be..18aeb38 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/**************************************************************************
* Copyright (C) 2012 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/mpsse.h b/src/jtag/drivers/mpsse.h
index 651eef9..a017aff 100644
--- a/src/jtag/drivers/mpsse.h
+++ b/src/jtag/drivers/mpsse.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/**************************************************************************
* Copyright (C) 2012 by Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_MPSSE_H
diff --git a/src/jtag/drivers/nulink_usb.c b/src/jtag/drivers/nulink_usb.c
index 84a4420..4fdb857 100644
--- a/src/jtag/drivers/nulink_usb.c
+++ b/src/jtag/drivers/nulink_usb.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016-2017 by Nuvoton *
* Zale Yu <cyyu@nuvoton.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/opendous.c b/src/jtag/drivers/opendous.c
index ae21cf2..d0c5277 100644
--- a/src/jtag/drivers/opendous.c
+++ b/src/jtag/drivers/opendous.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* *
* Copyright (C) 2009 by Cahya Wirawan <cahya@gmx.at> *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index 771b6e6..6be9507 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*******************************************************************************
* Driver for OpenJTAG Project (www.openjtag.org) *
* Compatible with libftdi drivers. *
@@ -18,19 +20,6 @@
* And jlink.c *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/***************************************************************************
diff --git a/src/jtag/drivers/osbdm.c b/src/jtag/drivers/osbdm.c
index f7665eb..d8fe713 100644
--- a/src/jtag/drivers/osbdm.c
+++ b/src/jtag/drivers/osbdm.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2012 by Jan Dakinevich *
* jan.dakinevich@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
# include "config.h"
diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c
index 9273e3e..4073d06 100644
--- a/src/jtag/drivers/parport.c
+++ b/src/jtag/drivers/parport.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/presto.c b/src/jtag/drivers/presto.c
index e938a3b..f6e13f7 100644
--- a/src/jtag/drivers/presto.c
+++ b/src/jtag/drivers/presto.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c
index 6ab7cc9..36bcbe1 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Richard Uhler *
* ruhler@mit.edu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c
index 0cf9dbb..c933b3e 100644
--- a/src/jtag/drivers/rlink.c
+++ b/src/jtag/drivers/rlink.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 Rob Brown, Lou Deluxe *
* rob@cobbleware.com, lou.openocd012@fixit.nospammail.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/rlink.h b/src/jtag/drivers/rlink.h
index 0c15a32..38f8429 100644
--- a/src/jtag/drivers/rlink.h
+++ b/src/jtag/drivers/rlink.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 Lou Deluxe *
* lou.openocd012@fixit.nospammail.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_RLINK_H
diff --git a/src/jtag/drivers/rlink_call.m4 b/src/jtag/drivers/rlink_call.m4
index bf07afa..39ac25c 100644
--- a/src/jtag/drivers/rlink_call.m4
+++ b/src/jtag/drivers/rlink_call.m4
@@ -1,21 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Copyright (C) 2008 Lou Deluxe
+# lou.openocd012@fixit.nospammail.net
+#
+
m4_divert(`-1')
-/***************************************************************************
- * Copyright (C) 2008 Lou Deluxe *
- * lou.openocd012@fixit.nospammail.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
m4_dnl Setup and hold times depend on SHIFTER_PRESCALER
m4_define(`SETUP_DELAY_CYCLES', m4_eval(`('SHIFTER_PRESCALER` + 1) / 2'))
diff --git a/src/jtag/drivers/rlink_dtc_cmd.h b/src/jtag/drivers/rlink_dtc_cmd.h
index ff9e8b2..b40ad17 100644
--- a/src/jtag/drivers/rlink_dtc_cmd.h
+++ b/src/jtag/drivers/rlink_dtc_cmd.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 Lou Deluxe *
* lou.openocd012@fixit.nospammail.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_RLINK_DTC_CMD_H
diff --git a/src/jtag/drivers/rlink_ep1_cmd.h b/src/jtag/drivers/rlink_ep1_cmd.h
index 3f9f2b3..812d7e5 100644
--- a/src/jtag/drivers/rlink_ep1_cmd.h
+++ b/src/jtag/drivers/rlink_ep1_cmd.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 Lou Deluxe *
* lou.openocd012@fixit.nospammail.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_RLINK_EP1_CMD_H
diff --git a/src/jtag/drivers/rlink_init.m4 b/src/jtag/drivers/rlink_init.m4
index 8ad2f51..e77e943 100644
--- a/src/jtag/drivers/rlink_init.m4
+++ b/src/jtag/drivers/rlink_init.m4
@@ -1,21 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Copyright (C) 2008 Lou Deluxe
+# lou.openocd012@fixit.nospammail.net
+#
+
m4_divert(`-1')
-/***************************************************************************
- * Copyright (C) 2008 Lou Deluxe *
- * lou.openocd012@fixit.nospammail.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
m4_undefine(`CTRL_MPEG_L')
m4_undefine(`CTRL_CARD_L')
diff --git a/src/jtag/drivers/rlink_st7.h b/src/jtag/drivers/rlink_st7.h
index 3d573e7..b891024 100644
--- a/src/jtag/drivers/rlink_st7.h
+++ b/src/jtag/drivers/rlink_st7.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 Lou Deluxe *
* lou.openocd012@fixit.nospammail.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_RLINK_ST7_H
diff --git a/src/jtag/drivers/rshim.c b/src/jtag/drivers/rshim.c
index 246e931..174fa12 100644
--- a/src/jtag/drivers/rshim.c
+++ b/src/jtag/drivers/rshim.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (c) 2020, Mellanox Technologies Ltd. - All Rights Reserved
* Liming Sun <lsun@mellanox.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
@@ -282,36 +271,44 @@ static int rshim_ap_q_read(struct adiv5_ap *ap, unsigned int reg,
uint32_t addr;
int rc = ERROR_OK, tile;
+ if (is_adiv6(ap->dap)) {
+ static bool error_flagged;
+ if (!error_flagged)
+ LOG_ERROR("ADIv6 dap not supported by rshim dap-direct mode");
+ error_flagged = true;
+ return ERROR_FAIL;
+ }
+
switch (reg) {
- case MEM_AP_REG_CSW:
+ case ADIV5_MEM_AP_REG_CSW:
*data = ap_csw;
break;
- case MEM_AP_REG_CFG:
+ case ADIV5_MEM_AP_REG_CFG:
*data = 0;
break;
- case MEM_AP_REG_BASE:
+ case ADIV5_MEM_AP_REG_BASE:
*data = RSH_CS_ROM_BASE;
break;
- case AP_REG_IDR:
+ case ADIV5_AP_REG_IDR:
if (ap->ap_num == 0)
*data = APB_AP_IDR;
else
*data = 0;
break;
- case MEM_AP_REG_BD0:
- case MEM_AP_REG_BD1:
- case MEM_AP_REG_BD2:
- case MEM_AP_REG_BD3:
+ case ADIV5_MEM_AP_REG_BD0:
+ case ADIV5_MEM_AP_REG_BD1:
+ case ADIV5_MEM_AP_REG_BD2:
+ case ADIV5_MEM_AP_REG_BD3:
addr = (ap_tar & ~0xf) + (reg & 0x0C);
ap_addr_2_tile(&tile, &addr);
rc = coresight_read(tile, addr, data);
break;
- case MEM_AP_REG_DRW:
+ case ADIV5_MEM_AP_REG_DRW:
addr = (ap_tar & ~0x3) + ap_tar_inc;
ap_addr_2_tile(&tile, &addr);
rc = coresight_read(tile, addr, data);
@@ -338,31 +335,39 @@ static int rshim_ap_q_write(struct adiv5_ap *ap, unsigned int reg,
int rc = ERROR_OK, tile;
uint32_t addr;
+ if (is_adiv6(ap->dap)) {
+ static bool error_flagged;
+ if (!error_flagged)
+ LOG_ERROR("ADIv6 dap not supported by rshim dap-direct mode");
+ error_flagged = true;
+ return ERROR_FAIL;
+ }
+
if (ap_bank != 0) {
rshim_dap_retval = ERROR_FAIL;
return ERROR_FAIL;
}
switch (reg) {
- case MEM_AP_REG_CSW:
+ case ADIV5_MEM_AP_REG_CSW:
ap_csw = data;
break;
- case MEM_AP_REG_TAR:
+ case ADIV5_MEM_AP_REG_TAR:
ap_tar = data;
ap_tar_inc = 0;
break;
- case MEM_AP_REG_BD0:
- case MEM_AP_REG_BD1:
- case MEM_AP_REG_BD2:
- case MEM_AP_REG_BD3:
+ case ADIV5_MEM_AP_REG_BD0:
+ case ADIV5_MEM_AP_REG_BD1:
+ case ADIV5_MEM_AP_REG_BD2:
+ case ADIV5_MEM_AP_REG_BD3:
addr = (ap_tar & ~0xf) + (reg & 0x0C);
ap_addr_2_tile(&tile, &addr);
rc = coresight_write(tile, addr, data);
break;
- case MEM_AP_REG_DRW:
+ case ADIV5_MEM_AP_REG_DRW:
ap_drw = data;
addr = (ap_tar & ~0x3) + ap_tar_inc;
ap_addr_2_tile(&tile, &addr);
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index bb2c817..5b051c1 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2020 by Tarek Bochkati *
* Tarek Bochkati <tarek.bouchkati@gmail.com> *
@@ -13,19 +15,6 @@
* spen@spen-soft.co.uk *
* *
* This code is based on https://github.com/texane/stlink *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -4152,7 +4141,7 @@ static int stlink_dap_reinit_interface(void)
stlink_dap_handle->reconnect_pending = false;
/* on new FW, calling mode-leave closes all the opened AP; reopen them! */
if (stlink_dap_handle->version.flags & STLINK_F_HAS_AP_INIT)
- for (int apsel = 0; apsel <= DP_APSEL_MAX; apsel++)
+ for (unsigned int apsel = 0; apsel <= DP_APSEL_MAX; apsel++)
if (test_bit(apsel, opened_ap)) {
clear_bit(apsel, opened_ap);
stlink_dap_open_ap(apsel);
@@ -4286,7 +4275,15 @@ static int stlink_dap_ap_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *d
uint32_t dummy;
int retval;
- if (reg != AP_REG_IDR) {
+ if (is_adiv6(dap)) {
+ static bool error_flagged;
+ if (!error_flagged)
+ LOG_ERROR("ADIv6 dap not supported by stlink dap-direct mode");
+ error_flagged = true;
+ return ERROR_FAIL;
+ }
+
+ if (reg != ADIV5_AP_REG_IDR) {
retval = stlink_dap_open_ap(ap->ap_num);
if (retval != ERROR_OK)
return retval;
@@ -4304,6 +4301,14 @@ static int stlink_dap_ap_write(struct adiv5_ap *ap, unsigned int reg, uint32_t d
struct adiv5_dap *dap = ap->dap;
int retval;
+ if (is_adiv6(dap)) {
+ static bool error_flagged;
+ if (!error_flagged)
+ LOG_ERROR("ADIv6 dap not supported by stlink dap-direct mode");
+ error_flagged = true;
+ return ERROR_FAIL;
+ }
+
retval = stlink_dap_open_ap(ap->ap_num);
if (retval != ERROR_OK)
return retval;
@@ -4332,7 +4337,7 @@ static int stlink_usb_misc_rw_segment(void *handle, const struct dap_queue *q, u
LOG_DEBUG("Queue: %u commands in %u items", len, items);
- int ap_num = DP_APSEL_INVALID;
+ uint32_t ap_num = DP_APSEL_INVALID;
unsigned int cmd_index = 0;
unsigned int val_index = ALIGN_UP(items, 4);
for (unsigned int i = 0; i < len; i++) {
@@ -4481,7 +4486,7 @@ static int stlink_usb_count_misc_rw_queue(void *handle, const struct dap_queue *
{
struct stlink_usb_handle_s *h = handle;
unsigned int i, items = 0;
- int ap_num = DP_APSEL_INVALID;
+ uint32_t ap_num = DP_APSEL_INVALID;
unsigned int misc_max_items = (h->version.stlink == 2) ? STLINK_V2_RW_MISC_SIZE : STLINK_V3_RW_MISC_SIZE;
if (!(h->version.flags & STLINK_F_HAS_RW_MISC))
@@ -4591,7 +4596,7 @@ static void stlink_dap_run_internal(struct adiv5_dap *dap)
break;
case CMD_AP_WRITE:
/* ignore increment packed, not supported */
- if (q->ap_w.reg == MEM_AP_REG_CSW)
+ if (q->ap_w.reg == ADIV5_MEM_AP_REG_CSW)
q->ap_w.data &= ~CSW_ADDRINC_PACKED;
retval = stlink_dap_ap_write(q->ap_w.ap, q->ap_w.reg, q->ap_w.data);
break;
@@ -4736,18 +4741,18 @@ static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned int reg,
/* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_RD_NO_INC
* and STLINK_F_HAS_RW_MISC */
if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) &&
- (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 ||
- reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) {
+ (reg == ADIV5_MEM_AP_REG_DRW || reg == ADIV5_MEM_AP_REG_BD0 || reg == ADIV5_MEM_AP_REG_BD1 ||
+ reg == ADIV5_MEM_AP_REG_BD2 || reg == ADIV5_MEM_AP_REG_BD3)) {
/* de-queue previous write-TAR */
struct dap_queue *prev_q = q - 1;
- if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_TAR) {
+ if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == ADIV5_MEM_AP_REG_TAR) {
stlink_dap_handle->queue_index = i;
i--;
q = prev_q;
prev_q--;
}
/* de-queue previous write-CSW if it didn't changed ap->csw_default */
- if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW &&
+ if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == ADIV5_MEM_AP_REG_CSW &&
!prev_q->ap_w.changes_csw_default) {
stlink_dap_handle->queue_index = i;
q = prev_q;
@@ -4769,7 +4774,7 @@ static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned int reg,
return ERROR_FAIL;
}
- q->mem_ap.addr = (reg == MEM_AP_REG_DRW) ? ap->tar_value : ((ap->tar_value & ~0x0f) | (reg & 0x0c));
+ q->mem_ap.addr = (reg == ADIV5_MEM_AP_REG_DRW) ? ap->tar_value : ((ap->tar_value & ~0x0f) | (reg & 0x0c));
q->mem_ap.ap = ap;
q->mem_ap.p_data = data;
q->mem_ap.csw = ap->csw_default;
@@ -4802,18 +4807,18 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg,
/* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_WR_NO_INC
* and STLINK_F_HAS_RW_MISC */
if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) &&
- (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 ||
- reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) {
+ (reg == ADIV5_MEM_AP_REG_DRW || reg == ADIV5_MEM_AP_REG_BD0 || reg == ADIV5_MEM_AP_REG_BD1 ||
+ reg == ADIV5_MEM_AP_REG_BD2 || reg == ADIV5_MEM_AP_REG_BD3)) {
/* de-queue previous write-TAR */
struct dap_queue *prev_q = q - 1;
- if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_TAR) {
+ if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == ADIV5_MEM_AP_REG_TAR) {
stlink_dap_handle->queue_index = i;
i--;
q = prev_q;
prev_q--;
}
/* de-queue previous write-CSW if it didn't changed ap->csw_default */
- if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW &&
+ if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == ADIV5_MEM_AP_REG_CSW &&
!prev_q->ap_w.changes_csw_default) {
stlink_dap_handle->queue_index = i;
q = prev_q;
@@ -4835,7 +4840,7 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg,
return ERROR_FAIL;
}
- q->mem_ap.addr = (reg == MEM_AP_REG_DRW) ? ap->tar_value : ((ap->tar_value & ~0x0f) | (reg & 0x0c));
+ q->mem_ap.addr = (reg == ADIV5_MEM_AP_REG_DRW) ? ap->tar_value : ((ap->tar_value & ~0x0f) | (reg & 0x0c));
q->mem_ap.ap = ap;
q->mem_ap.data = data;
q->mem_ap.csw = ap->csw_default;
@@ -4848,9 +4853,10 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg,
q->ap_w.reg = reg;
q->ap_w.ap = ap;
q->ap_w.data = data;
- if (reg == MEM_AP_REG_CSW && ap->csw_default != last_csw_default[ap->ap_num]) {
+ uint8_t ap_num = ap->ap_num;
+ if (reg == ADIV5_MEM_AP_REG_CSW && ap->csw_default != last_csw_default[ap_num]) {
q->ap_w.changes_csw_default = true;
- last_csw_default[ap->ap_num] = ap->csw_default;
+ last_csw_default[ap_num] = ap->csw_default;
} else {
q->ap_w.changes_csw_default = false;
}
diff --git a/src/jtag/drivers/sysfsgpio.c b/src/jtag/drivers/sysfsgpio.c
index 103b810..ee254d6 100644
--- a/src/jtag/drivers/sysfsgpio.c
+++ b/src/jtag/drivers/sysfsgpio.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* 2014-12: Addition of the SWD protocol support is based on the initial work
diff --git a/src/jtag/drivers/ti_icdi_usb.c b/src/jtag/drivers/ti_icdi_usb.c
index e48d0e2..ca52559 100644
--- a/src/jtag/drivers/ti_icdi_usb.c
+++ b/src/jtag/drivers/ti_icdi_usb.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index 50609a6..fd29f12 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011-2013 by Martin Schmoelzer *
* <martin.schmoelzer@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/usb_blaster/Makefile.am b/src/jtag/drivers/usb_blaster/Makefile.am
index a6694c5..0fb8a07 100644
--- a/src/jtag/drivers/usb_blaster/Makefile.am
+++ b/src/jtag/drivers/usb_blaster/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libocdusbblaster.la
%C%_libocdusbblaster_la_SOURCES = $(USB_BLASTER_SRC)
%C%_libocdusbblaster_la_CPPFLAGS = -I$(top_srcdir)/src/jtag/drivers $(AM_CPPFLAGS) $(LIBUSB1_CFLAGS) $(LIBFTDI_CFLAGS)
diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
index 21f9ae7..7f97818 100644
--- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
+++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Driver for USB-JTAG, Altera USB-Blaster II and compatibles
*
* Copyright (C) 2013 Franck Jullien franck.jullien@gmail.com
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/usb_blaster/ublast_access.h b/src/jtag/drivers/usb_blaster/ublast_access.h
index ada764c..3e138bd 100644
--- a/src/jtag/drivers/usb_blaster/ublast_access.h
+++ b/src/jtag/drivers/usb_blaster/ublast_access.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Driver for USB-JTAG, Altera USB-Blaster and compatibles
*
@@ -10,19 +12,6 @@
* Copyright (C) 2009 Catalin Patulea cat@vv.carleton.ca
* Copyright (C) 2006 Kolja Waschk usbjtag@ixo.de
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
*/
#ifndef OPENOCD_JTAG_DRIVERS_USB_BLASTER_UBLAST_ACCESS_H
diff --git a/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c b/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c
index cb442f2..eb312ef 100644
--- a/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c
+++ b/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Driver for USB-JTAG, Altera USB-Blaster and compatibles
*
@@ -9,19 +11,6 @@
* Copyright (C) 2009 Catalin Patulea cat@vv.carleton.ca
* Copyright (C) 2006 Kolja Waschk usbjtag@ixo.de
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c
index 049a243..8c37048 100644
--- a/src/jtag/drivers/usb_blaster/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster/usb_blaster.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Driver for USB-JTAG, Altera USB-Blaster and compatibles
*
@@ -10,19 +12,6 @@
* Copyright (C) 2009 Catalin Patulea cat@vv.carleton.ca
* Copyright (C) 2006 Kolja Waschk usbjtag@ixo.de
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
*/
/*
diff --git a/src/jtag/drivers/usbprog.c b/src/jtag/drivers/usbprog.c
index a2ebdbc..0c0f24e 100644
--- a/src/jtag/drivers/usbprog.c
+++ b/src/jtag/drivers/usbprog.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Benedikt Sauter *
* sauter@ixbat.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
@@ -346,8 +335,6 @@ static void usbprog_reset(int trst, int srst)
/*************** jtag lowlevel functions ********************/
-struct usb_bus *busses;
-
struct usbprog_jtag *usbprog_jtag_open(void)
{
const uint16_t vids[] = { VID, 0 };
diff --git a/src/jtag/drivers/vdebug.c b/src/jtag/drivers/vdebug.c
index a81740c..ef7a493 100644
--- a/src/jtag/drivers/vdebug.c
+++ b/src/jtag/drivers/vdebug.c
@@ -1,35 +1,14 @@
-/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
-/*----------------------------------------------------------------------------
- * Copyright 2020-2021 Cadence Design Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *----------------------------------------------------------------------------
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *----------------------------------------------------------------------------
-*/
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+
+/* Copyright 2020-2022 Cadence Design Systems, Inc. */
/*!
* @file
*
* @brief the virtual debug interface provides a connection between a sw debugger
- * and the simulated, emulated core over a soft connection, implemented by DPI
- * The vdebug debug driver currently supports JTAG transport
- * TODO: implement support and test big endian platforms
+ * and the simulated, emulated core. The openOCD client connects via TCP sockets
+ * with vdebug server and over DPI-based transactor with the emulation or simulation
+ * The vdebug debug driver supports JTAG and DAP-level transports
*
*/
@@ -68,16 +47,18 @@
#include "jtag/interface.h"
#include "jtag/commands.h"
#include "transport/transport.h"
+#include "target/arm_adi_v5.h"
#include "helper/time_support.h"
#include "helper/replacements.h"
#include "helper/log.h"
+#include "helper/list.h"
-#define VD_VERSION 43
+#define VD_VERSION 44
#define VD_BUFFER_LEN 4024
#define VD_CHEADER_LEN 24
#define VD_SHEADER_LEN 16
-#define VD_MAX_MEMORIES 4
+#define VD_MAX_MEMORIES 20
#define VD_POLL_INTERVAL 500
#define VD_SCALE_PSTOMS 1000000000
@@ -149,6 +130,8 @@ enum {
VD_CMD_SIGSET = 0x0a,
VD_CMD_SIGGET = 0x0b,
VD_CMD_JTAGCLOCK = 0x0f,
+ VD_CMD_REGWRITE = 0x15,
+ VD_CMD_REGREAD = 0x16,
VD_CMD_JTAGSHTAP = 0x1a,
VD_CMD_MEMOPEN = 0x21,
VD_CMD_MEMCLOSE = 0x22,
@@ -156,6 +139,13 @@ enum {
};
enum {
+ VD_ASPACE_AP = 0x01,
+ VD_ASPACE_DP = 0x02,
+ VD_ASPACE_ID = 0x03,
+ VD_ASPACE_AB = 0x04,
+};
+
+enum {
VD_BATCH_NO = 0,
VD_BATCH_WO = 1,
VD_BATCH_WR = 2,
@@ -165,37 +155,32 @@ struct vd_shm {
struct { /* VD_CHEADER_LEN written by client */
uint8_t cmd; /* 000; command */
uint8_t type; /* 001; interface type */
- uint16_t waddr; /* 002; write pointer */
- uint16_t wbytes; /* 004; data bytes */
- uint16_t rbytes; /* 006; data bytes to read */
- uint16_t wwords; /* 008; data words */
- uint16_t rwords; /* 00a; data words to read */
- uint32_t rwdata; /* 00c; read/write data */
- uint32_t offset; /* 010; address offset */
- uint16_t offseth; /* 014; address offset 47:32 */
- uint16_t wid; /* 016; request id*/
- };
- union { /* 018; */
- uint8_t wd8[VD_BUFFER_LEN];
- uint16_t wd16[VD_BUFFER_LEN / 2];
- uint32_t wd32[VD_BUFFER_LEN / 4];
- uint64_t wd64[VD_BUFFER_LEN / 8];
+ uint8_t waddr[2]; /* 002; write pointer */
+ uint8_t wbytes[2]; /* 004; data bytes */
+ uint8_t rbytes[2]; /* 006; data bytes to read */
+ uint8_t wwords[2]; /* 008; data words */
+ uint8_t rwords[2]; /* 00a; data words to read */
+ uint8_t rwdata[4]; /* 00c; read/write data */
+ uint8_t offset[4]; /* 010; address offset */
+ uint8_t offseth[2]; /* 014; address offset 47:32 */
+ uint8_t wid[2]; /* 016; request id*/
};
+ uint8_t wd8[VD_BUFFER_LEN]; /* 018; */
struct { /* VD_SHEADER_LEN written by server */
- uint16_t rid; /* fd0: request id read */
- uint16_t awords; /* fd2: actual data words read back */
- int32_t status; /* fd4; */
- uint64_t duttime; /* fd8; */
+ uint8_t rid[2]; /* fd0: request id read */
+ uint8_t awords[2]; /* fd2: actual data words read back */
+ uint8_t status[4]; /* fd4; */
+ uint8_t duttime[8]; /* fd8; */
};
- union { /* fe0: */
- uint8_t rd8[VD_BUFFER_LEN];
- uint16_t rd16[VD_BUFFER_LEN / 2];
- uint32_t rd32[VD_BUFFER_LEN / 4];
- uint64_t rd64[VD_BUFFER_LEN / 8];
- };
- uint32_t state; /* 1f98; connection state */
- uint32_t count; /* 1f9c; */
+ uint8_t rd8[VD_BUFFER_LEN]; /* fe0: */
+ uint8_t state[4]; /* 1f98; connection state */
+ uint8_t count[4]; /* 1f9c; */
uint8_t dummy[96]; /* 1fa0; 48+40B+8B; */
+} __attribute__((packed));
+
+struct vd_rdata {
+ struct list_head lh;
+ uint8_t *rdata;
};
struct vd_client {
@@ -222,7 +207,7 @@ struct vd_client {
char server_name[32];
char bfm_path[128];
char mem_path[VD_MAX_MEMORIES][128];
- uint8_t *tdo;
+ struct vd_rdata rdataq;
};
struct vd_jtag_hdr {
@@ -234,6 +219,16 @@ struct vd_jtag_hdr {
uint64_t rlen:16;
};
+struct vd_reg_hdr {
+ uint64_t prot:3;
+ uint64_t nonincr:1;
+ uint64_t haddr:12;
+ uint64_t tlen:11;
+ uint64_t asize:3;
+ uint64_t cmd:2;
+ uint64_t addr:32;
+};
+
static struct vd_shm *pbuf;
static struct vd_client vdc;
@@ -277,7 +272,7 @@ static int vdebug_socket_open(char *server_addr, uint32_t port)
LOG_ERROR("socket_open: cannot resolve address %s, error %d", server_addr, vdebug_socket_error());
rc = VD_ERR_SOC_ADDR;
} else {
- ((struct sockaddr_in *)(ainfo->ai_addr))->sin_port = htons(port);
+ buf_set_u32((uint8_t *)ainfo->ai_addr->sa_data, 0, 16, htons(port));
if (connect(hsock, ainfo->ai_addr, sizeof(struct sockaddr)) < 0) {
LOG_ERROR("socket_open: cannot connect to %s:%d, error %d", server_addr, port, vdebug_socket_error());
rc = VD_ERR_SOC_CONN;
@@ -299,8 +294,8 @@ static int vdebug_socket_receive(int hsock, struct vd_shm *pmem)
{
int rc;
int dreceived = 0;
- int offset = (uint8_t *)&pmem->rid - &pmem->cmd;
- int to_receive = VD_SHEADER_LEN + pmem->rbytes;
+ int offset = &pmem->rid[0] - &pmem->cmd;
+ int to_receive = VD_SHEADER_LEN + le_to_h_u16(pmem->rbytes);
char *pb = (char *)pmem;
do {
@@ -320,7 +315,7 @@ static int vdebug_socket_receive(int hsock, struct vd_shm *pmem)
static int vdebug_socket_send(int hsock, struct vd_shm *pmem)
{
- int rc = send(hsock, (const char *)&pmem->cmd, VD_CHEADER_LEN + pmem->wbytes, 0);
+ int rc = send(hsock, (const char *)&pmem->cmd, VD_CHEADER_LEN + le_to_h_u16(pmem->wbytes), 0);
if (rc <= 0)
LOG_WARNING("socket_send: send failed, error %d", vdebug_socket_error());
else
@@ -333,6 +328,7 @@ static uint32_t vdebug_wait_server(int hsock, struct vd_shm *pmem)
{
if (!hsock)
return VD_ERR_SOC_OPEN;
+
int st = vdebug_socket_send(hsock, pmem);
if (st <= 0)
return VD_ERR_SOC_SEND;
@@ -341,9 +337,9 @@ static uint32_t vdebug_wait_server(int hsock, struct vd_shm *pmem)
if (rd <= 0)
return VD_ERR_SOC_RECV;
- int rc = pmem->status;
+ int rc = le_to_h_u32(pmem->status);
LOG_DEBUG_IO("wait_server: cmd %02" PRIx8 " done, sent %d, rcvd %d, status %d",
- pmem->cmd, st, rd, rc);
+ pmem->cmd, st, rd, rc);
return rc;
}
@@ -356,22 +352,23 @@ int vdebug_run_jtag_queue(int hsock, struct vd_shm *pm, unsigned int count)
int64_t ts, te;
uint8_t *tdo;
int rc;
- struct vd_jtag_hdr *hdr;
+ uint64_t jhdr;
+ struct vd_rdata *rd;
req = 0; /* beginning of request */
waddr = 0;
rwords = 0;
- pm->wbytes = pm->wwords * vdc.buf_width;
- pm->rbytes = pm->rwords * vdc.buf_width;
+ h_u16_to_le(pm->wbytes, le_to_h_u16(pm->wwords) * vdc.buf_width);
+ h_u16_to_le(pm->rbytes, le_to_h_u16(pm->rwords) * vdc.buf_width);
ts = timeval_ms();
rc = vdebug_wait_server(hsock, pm);
while (!rc && (req < count)) { /* loop over requests to read data and print out */
- hdr = (struct vd_jtag_hdr *)&pm->wd8[waddr * 4];
- hwords = hdr->wlen;
- words = hdr->rlen;
- anum = hdr->tlen;
- num_pre = hdr->pre;
- num_post = hdr->post;
+ jhdr = le_to_h_u64(&pm->wd8[waddr * 4]);
+ words = jhdr >> 48;
+ hwords = (jhdr >> 32) & 0xffff;
+ anum = jhdr & 0xffffff;
+ num_pre = (jhdr >> 27) & 0x7;
+ num_post = (jhdr >> 24) & 0x7;
if (num_post)
num = anum - num_pre - num_post + 1;
else
@@ -379,21 +376,29 @@ int vdebug_run_jtag_queue(int hsock, struct vd_shm *pm, unsigned int count)
bytes = (num + 7) / 8;
vdc.trans_last = (req + 1) < count ? 0 : 1;
vdc.trans_first = waddr ? 0 : 1;
- if (hdr->cmd == 3) { /* read */
- tdo = vdc.tdo;
+ if (((jhdr >> 30) & 0x3) == 3) { /* cmd is read */
+ if (!rwords) {
+ rd = &vdc.rdataq;
+ tdo = rd->rdata;
+ } else {
+ rd = list_first_entry(&vdc.rdataq.lh, struct vd_rdata, lh);
+ tdo = rd->rdata;
+ list_del(&rd->lh);
+ free(rd);
+ }
for (unsigned int j = 0; j < bytes; j++) {
tdo[j] = (pm->rd8[rwords * 8 + j] >> num_pre) | (pm->rd8[rwords * 8 + j + 1] << (8 - num_pre));
- LOG_DEBUG_IO("%04x D0[%02x]:%02x", pm->wid - count + req, j, tdo[j]);
+ LOG_DEBUG_IO("%04x D0[%02x]:%02x", le_to_h_u16(pm->wid) - count + req, j, tdo[j]);
}
rwords += words; /* read data offset */
} else {
tdo = NULL;
}
- waddr += sizeof(struct vd_jtag_hdr) / 4; /* waddr past header */
+ waddr += sizeof(uint64_t) / 4; /* waddr past header */
tdi = (pm->wd8[waddr * 4] >> num_pre) | (pm->wd8[waddr * 4 + 1] << (8 - num_pre));
tms = (pm->wd8[waddr * 4 + 4] >> num_pre) | (pm->wd8[waddr * 4 + 4 + 1] << (8 - num_pre));
- LOG_DEBUG("%04x L:%02d O:%05x @%03x DI:%02x MS:%02x DO:%02x",
- pm->wid - count + req, num, (vdc.trans_first << 14) | (vdc.trans_last << 15),
+ LOG_DEBUG_IO("%04x L:%02d O:%05x @%03x DI:%02x MS:%02x DO:%02x",
+ le_to_h_u16(pm->wid) - count + req, num, (vdc.trans_first << 14) | (vdc.trans_last << 15),
waddr - 2, tdi, tms, (tdo ? tdo[0] : 0xdd));
waddr += hwords * 2; /* start of next request */
req += 1;
@@ -406,10 +411,83 @@ int vdebug_run_jtag_queue(int hsock, struct vd_shm *pm, unsigned int count)
te = timeval_ms();
vdc.targ_time += (uint32_t)(te - ts);
- pm->offseth = 0; /* reset buffer write address */
- pm->offset = 0;
- pm->rwords = 0;
- pm->waddr = 0;
+ h_u16_to_le(pm->offseth, 0); /* reset buffer write address */
+ h_u32_to_le(pm->offset, 0);
+ h_u16_to_le(pm->rwords, 0);
+ h_u16_to_le(pm->waddr, 0);
+ assert(list_empty(&vdc.rdataq.lh));/* list should be empty after run queue */
+
+ return rc;
+}
+
+int vdebug_run_reg_queue(int hsock, struct vd_shm *pm, unsigned int count)
+{
+ unsigned int num, awidth, wwidth;
+ unsigned int req, waddr, rwords;
+ uint8_t aspace;
+ uint32_t addr;
+ int64_t ts, te;
+ uint8_t *data;
+ int rc;
+ uint64_t rhdr;
+ struct vd_rdata *rd;
+
+ req = 0; /* beginning of request */
+ waddr = 0;
+ rwords = 0;
+ h_u16_to_le(pm->wbytes, le_to_h_u16(pm->wwords) * vdc.buf_width);
+ h_u16_to_le(pm->rbytes, le_to_h_u16(pm->rwords) * vdc.buf_width);
+ ts = timeval_ms();
+ rc = vdebug_wait_server(hsock, pm);
+ while (!rc && (req < count)) { /* loop over requests to read data and print out */
+ rhdr = le_to_h_u64(&pm->wd8[waddr * 4]);
+ addr = rhdr >> 32; /* reconstruct data for a single request */
+ num = (rhdr >> 16) & 0x7ff;
+ aspace = rhdr & 0x3;
+ awidth = (1 << ((rhdr >> 27) & 0x7));
+ wwidth = (awidth + vdc.buf_width - 1) / vdc.buf_width;
+ vdc.trans_last = (req + 1) < count ? 0 : 1;
+ vdc.trans_first = waddr ? 0 : 1;
+ if (((rhdr >> 30) & 0x3) == 2) { /* cmd is read */
+ if (num) {
+ if (!rwords) {
+ rd = &vdc.rdataq;
+ data = rd->rdata;
+ } else {
+ rd = list_first_entry(&vdc.rdataq.lh, struct vd_rdata, lh);
+ data = rd->rdata;
+ list_del(&rd->lh);
+ free(rd);
+ }
+ for (unsigned int j = 0; j < num; j++)
+ memcpy(&data[j * awidth], &pm->rd8[(rwords + j) * awidth], awidth);
+ }
+ LOG_DEBUG_IO("read %04x AS:%02x RG:%02x O:%05x @%03x D:%08x", le_to_h_u16(pm->wid) - count + req,
+ aspace, addr, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr,
+ (num ? le_to_h_u32(&pm->rd8[rwords * 4]) : 0xdead));
+ rwords += num * wwidth;
+ waddr += sizeof(uint64_t) / 4; /* waddr past header */
+ } else {
+ LOG_DEBUG_IO("write %04x AS:%02x RG:%02x O:%05x @%03x D:%08x", le_to_h_u16(pm->wid) - count + req,
+ aspace, addr, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr,
+ le_to_h_u32(&pm->wd8[(waddr + num + 1) * 4]));
+ waddr += sizeof(uint64_t) / 4 + (num * wwidth * awidth + 3) / 4;
+ }
+ req += 1;
+ }
+
+ if (rc) {
+ LOG_ERROR("0x%x executing transaction", rc);
+ rc = ERROR_FAIL;
+ }
+
+ te = timeval_ms();
+ vdc.targ_time += (uint32_t)(te - ts);
+ h_u16_to_le(pm->offseth, 0); /* reset buffer write address */
+ h_u32_to_le(pm->offset, 0);
+ h_u16_to_le(pm->rwords, 0);
+ h_u16_to_le(pm->waddr, 0);
+ assert(list_empty(&vdc.rdataq.lh));/* list should be empty after run queue */
return rc;
}
@@ -420,35 +498,35 @@ static int vdebug_open(int hsock, struct vd_shm *pm, const char *path,
int rc = VD_ERR_NOT_OPEN;
pm->cmd = VD_CMD_OPEN;
- pm->wid = VD_VERSION; /* client version */
- pm->wbytes = 0;
- pm->rbytes = 0;
- pm->wwords = 0;
- pm->rwords = 0;
+ h_u16_to_le(pm->wid, VD_VERSION); /* client version */
+ h_u16_to_le(pm->wbytes, 0);
+ h_u16_to_le(pm->rbytes, 0);
+ h_u16_to_le(pm->wwords, 0);
+ h_u16_to_le(pm->rwords, 0);
rc = vdebug_wait_server(hsock, pm);
if (rc != 0) { /* communication problem */
LOG_ERROR("0x%x connecting to server", rc);
- } else if (pm->rid < pm->wid) {
- LOG_ERROR("server version %d too old for the client %d", pm->rid, pm->wid);
+ } else if (le_to_h_u16(pm->rid) < le_to_h_u16(pm->wid)) {
+ LOG_ERROR("server version %d too old for the client %d", le_to_h_u16(pm->rid), le_to_h_u16(pm->wid));
pm->cmd = VD_CMD_CLOSE; /* let server close the connection */
vdebug_wait_server(hsock, pm);
rc = VD_ERR_VERSION;
} else {
pm->cmd = VD_CMD_CONNECT;
pm->type = type; /* BFM type to connect to, here JTAG */
- pm->rwdata = sig_mask | VD_SIG_BUF | (VD_SIG_BUF << 16);
- pm->wbytes = strlen(path) + 1;
- pm->rbytes = 12;
- pm->wid = 0; /* reset wid for transaction ID */
- pm->wwords = 0;
- pm->rwords = 0;
- memcpy(pm->wd8, path, pm->wbytes + 1);
+ h_u32_to_le(pm->rwdata, sig_mask | VD_SIG_BUF | (VD_SIG_BUF << 16));
+ h_u16_to_le(pm->wbytes, strlen(path) + 1);
+ h_u16_to_le(pm->rbytes, 12);
+ h_u16_to_le(pm->wid, 0); /* reset wid for transaction ID */
+ h_u16_to_le(pm->wwords, 0);
+ h_u16_to_le(pm->rwords, 0);
+ memcpy(pm->wd8, path, le_to_h_u16(pm->wbytes));
rc = vdebug_wait_server(hsock, pm);
- vdc.sig_read = pm->rwdata >> 16; /* signal read mask */
- vdc.sig_write = pm->rwdata; /* signal write mask */
+ vdc.sig_read = le_to_h_u32(pm->rwdata) >> 16; /* signal read mask */
+ vdc.sig_write = le_to_h_u32(pm->rwdata); /* signal write mask */
vdc.bfm_period = period_ps;
- vdc.buf_width = pm->rd32[0] / 8;/* access width in bytes */
- vdc.addr_bits = pm->rd32[2]; /* supported address bits */
+ vdc.buf_width = le_to_h_u32(&pm->rd8[0]) / 8;/* access width in bytes */
+ vdc.addr_bits = le_to_h_u32(&pm->rd8[2 * 4]); /* supported address bits */
}
if (rc) {
@@ -456,6 +534,7 @@ static int vdebug_open(int hsock, struct vd_shm *pm, const char *path,
return ERROR_FAIL;
}
+ INIT_LIST_HEAD(&vdc.rdataq.lh);
LOG_DEBUG("%s type %0x, period %dps, buffer %dx%dB signals r%04xw%04x",
path, type, vdc.bfm_period, VD_BUFFER_LEN / vdc.buf_width,
vdc.buf_width, vdc.sig_read, vdc.sig_write);
@@ -467,17 +546,17 @@ static int vdebug_close(int hsock, struct vd_shm *pm, uint8_t type)
{
pm->cmd = VD_CMD_DISCONNECT;
pm->type = type; /* BFM type, here JTAG */
- pm->wbytes = 0;
- pm->rbytes = 0;
- pm->wwords = 0;
- pm->rwords = 0;
+ h_u16_to_le(pm->wbytes, 0);
+ h_u16_to_le(pm->rbytes, 0);
+ h_u16_to_le(pm->wwords, 0);
+ h_u16_to_le(pm->rwords, 0);
vdebug_wait_server(hsock, pm);
pm->cmd = VD_CMD_CLOSE;
- pm->wid = VD_VERSION; /* client version */
- pm->wbytes = 0;
- pm->rbytes = 0;
- pm->wwords = 0;
- pm->rwords = 0;
+ h_u16_to_le(pm->wid, VD_VERSION); /* client version */
+ h_u16_to_le(pm->wbytes, 0);
+ h_u16_to_le(pm->rbytes, 0);
+ h_u16_to_le(pm->wwords, 0);
+ h_u16_to_le(pm->rwords, 0);
vdebug_wait_server(hsock, pm);
LOG_DEBUG("type %0x", type);
@@ -488,9 +567,9 @@ static int vdebug_wait(int hsock, struct vd_shm *pm, uint32_t cycles)
{
if (cycles) {
pm->cmd = VD_CMD_WAIT;
- pm->wbytes = 0;
- pm->rbytes = 0;
- pm->rwdata = cycles; /* clock sycles to wait */
+ h_u16_to_le(pm->wbytes, 0);
+ h_u16_to_le(pm->rbytes, 0);
+ h_u32_to_le(pm->rwdata, cycles); /* clock sycles to wait */
int rc = vdebug_wait_server(hsock, pm);
if (rc) {
LOG_ERROR("0x%x waiting %" PRIx32 " cycles", rc, cycles);
@@ -505,9 +584,9 @@ static int vdebug_wait(int hsock, struct vd_shm *pm, uint32_t cycles)
static int vdebug_sig_set(int hsock, struct vd_shm *pm, uint32_t write_mask, uint32_t value)
{
pm->cmd = VD_CMD_SIGSET;
- pm->wbytes = 0;
- pm->rbytes = 0;
- pm->rwdata = (write_mask << 16) | (value & 0xffff); /* mask and value of signals to set */
+ h_u16_to_le(pm->wbytes, 0);
+ h_u16_to_le(pm->rbytes, 0);
+ h_u32_to_le(pm->rwdata, (write_mask << 16) | (value & 0xffff)); /* mask and value of signals to set */
int rc = vdebug_wait_server(hsock, pm);
if (rc) {
LOG_ERROR("0x%x setting signals %04" PRIx32, rc, write_mask);
@@ -522,9 +601,9 @@ static int vdebug_sig_set(int hsock, struct vd_shm *pm, uint32_t write_mask, uin
static int vdebug_jtag_clock(int hsock, struct vd_shm *pm, uint32_t value)
{
pm->cmd = VD_CMD_JTAGCLOCK;
- pm->wbytes = 0;
- pm->rbytes = 0;
- pm->rwdata = value; /* divider value */
+ h_u16_to_le(pm->wbytes, 0);
+ h_u16_to_le(pm->rbytes, 0);
+ h_u32_to_le(pm->rwdata, value); /* divider value */
int rc = vdebug_wait_server(hsock, pm);
if (rc) {
LOG_ERROR("0x%x setting jtag_clock", rc);
@@ -546,11 +625,11 @@ static int vdebug_jtag_shift_tap(int hsock, struct vd_shm *pm, uint8_t num_pre,
int rc = 0;
pm->cmd = VD_CMD_JTAGSHTAP;
- vdc.trans_last = f_last || (vdc.trans_batch == VD_BATCH_NO) || tdo;
+ vdc.trans_last = f_last || (vdc.trans_batch == VD_BATCH_NO);
if (vdc.trans_first)
waddr = 0; /* reset buffer offset */
else
- waddr = pm->offseth; /* continue from the previous transaction */
+ waddr = le_to_h_u32(pm->offseth); /* continue from the previous transaction */
if (num_post) /* actual number of bits to shift */
anum = num + num_pre + num_post - 1;
else
@@ -559,25 +638,22 @@ static int vdebug_jtag_shift_tap(int hsock, struct vd_shm *pm, uint8_t num_pre,
words = (hwords + 1) / 2; /* in 8B TDO words to read */
bytes = (num + 7) / 8; /* data only portion in bytes */
/* buffer overflow check and flush */
- if (4 * waddr + sizeof(struct vd_jtag_hdr) + 8 * hwords + 64 > VD_BUFFER_LEN) {
+ if (4 * waddr + sizeof(uint64_t) + 8 * hwords + 64 > VD_BUFFER_LEN) {
vdc.trans_last = 1; /* force flush within 64B of buffer end */
- } else if (4 * waddr + sizeof(struct vd_jtag_hdr) + 8 * hwords > VD_BUFFER_LEN) {
+ } else if (4 * waddr + sizeof(uint64_t) + 8 * hwords > VD_BUFFER_LEN) {
/* this req does not fit, discard it */
LOG_ERROR("%04x L:%02d O:%05x @%04x too many bits to shift",
- pm->wid, anum, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr);
+ le_to_h_u16(pm->wid), anum, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr);
rc = ERROR_FAIL;
}
if (!rc && anum) {
- uint16_t i, j;
- struct vd_jtag_hdr *hdr = (struct vd_jtag_hdr *)&pm->wd8[4 * waddr]; /* 8 bytes header */
- hdr->cmd = (tdo ? 3 : 1); /* R and W bits */
- hdr->pre = num_pre;
- hdr->post = num_post;
- hdr->tlen = anum;
- hdr->wlen = hwords;
- hdr->rlen = words;
- pm->wid++; /* transaction ID */
+ uint16_t i, j; /* portability requires to use bit operations for 8B JTAG header */
+ uint64_t jhdr = (tdo ? ((uint64_t)(words) << 48) : 0) + ((uint64_t)(hwords) << 32) +
+ ((tdo ? 3UL : 1UL) << 30) + (num_pre << 27) + (num_post << 24) + anum;
+ h_u64_to_le(&pm->wd8[4 * waddr], jhdr);
+
+ h_u16_to_le(pm->wid, le_to_h_u16(pm->wid) + 1); /* transaction ID */
waddr += 2; /* waddr past header */
/* TDI/TMS data follows as 32 bit word pairs {TMS,TDI} */
pm->wd8[4 * waddr] = (tdi ? (tdi[0] << num_pre) : 0);
@@ -615,19 +691,102 @@ static int vdebug_jtag_shift_tap(int hsock, struct vd_shm *pm, uint8_t num_pre,
}
if (tdo) {
- pm->rwords += words; /* keep track of the words to read */
- vdc.tdo = tdo;
+ struct vd_rdata *rd;
+ if (le_to_h_u16(pm->rwords) == 0) {
+ rd = &vdc.rdataq;
+ } else {
+ rd = calloc(1, sizeof(struct vd_rdata));
+ if (!rd) /* check allocation for 24B */
+ return ERROR_FAIL;
+ list_add_tail(&rd->lh, &vdc.rdataq.lh);
+ }
+ rd->rdata = tdo;
+ h_u16_to_le(pm->rwords, le_to_h_u16(pm->rwords) + words);/* keep track of the words to read */
}
- pm->wwords = waddr / 2 + hwords; /* payload size *2 to include both TDI and TMS data */
- pm->waddr++;
+ h_u16_to_le(pm->wwords, waddr / 2 + hwords); /* payload size *2 to include both TDI and TMS data */
+ h_u16_to_le(pm->waddr, le_to_h_u16(pm->waddr) + 1);
}
if (!waddr) /* flush issued, but buffer empty */
;
else if (!vdc.trans_last) /* buffered request */
- pm->offseth = waddr + hwords * 2; /* offset for next transaction, must be even */
+ h_u16_to_le(pm->offseth, waddr + hwords * 2); /* offset for next transaction, must be even */
else /* execute batch of requests */
- rc = vdebug_run_jtag_queue(hsock, pm, pm->waddr);
+ rc = vdebug_run_jtag_queue(hsock, pm, le_to_h_u16(pm->waddr));
+ vdc.trans_first = vdc.trans_last; /* flush forces trans_first flag */
+
+ return rc;
+}
+
+static int vdebug_reg_write(int hsock, struct vd_shm *pm, const uint32_t reg,
+ const uint32_t data, uint8_t aspace, uint8_t f_last)
+{
+ uint32_t waddr;
+ int rc = ERROR_OK;
+
+ pm->cmd = VD_CMD_REGWRITE;
+ vdc.trans_last = f_last || (vdc.trans_batch == VD_BATCH_NO);
+ if (vdc.trans_first)
+ waddr = 0; /* reset buffer offset */
+ else
+ waddr = le_to_h_u16(pm->offseth); /* continue from the previous transaction */
+
+ if (4 * waddr + 2 * sizeof(uint64_t) + 4 > VD_BUFFER_LEN)
+ vdc.trans_last = 1; /* force flush, no room for next request */
+
+ uint64_t rhdr = ((uint64_t)reg << 32) + (1UL << 30) + (2UL << 27) + (1UL << 16) + aspace;
+ h_u64_to_le(&pm->wd8[4 * waddr], rhdr);
+ h_u32_to_le(&pm->wd8[4 * (waddr + 2)], data);
+ h_u16_to_le(pm->wid, le_to_h_u16(pm->wid) + 1);
+ h_u16_to_le(pm->wwords, waddr + 3);
+ h_u16_to_le(pm->waddr, le_to_h_u16(pm->waddr) + 1);
+ if (!vdc.trans_last) /* buffered request */
+ h_u16_to_le(pm->offseth, waddr + 3);
+ else
+ rc = vdebug_run_reg_queue(hsock, pm, le_to_h_u16(pm->waddr));
+ vdc.trans_first = vdc.trans_last; /* flush forces trans_first flag */
+
+ return rc;
+}
+
+static int vdebug_reg_read(int hsock, struct vd_shm *pm, const uint32_t reg,
+ uint32_t *data, uint8_t aspace, uint8_t f_last)
+{
+ uint32_t waddr;
+ int rc = ERROR_OK;
+
+ pm->cmd = VD_CMD_REGREAD;
+ vdc.trans_last = f_last || (vdc.trans_batch == VD_BATCH_NO);
+ if (vdc.trans_first)
+ waddr = 0; /* reset buffer offset */
+ else
+ waddr = le_to_h_u16(pm->offseth); /* continue from the previous transaction */
+
+ if (4 * waddr + 2 * sizeof(uint64_t) + 4 > VD_BUFFER_LEN)
+ vdc.trans_last = 1; /* force flush, no room for next request */
+
+ uint64_t rhdr = ((uint64_t)reg << 32) + (2UL << 30) + (2UL << 27) + ((data ? 1UL : 0UL) << 16) + aspace;
+ h_u64_to_le(&pm->wd8[4 * waddr], rhdr);
+ h_u16_to_le(pm->wid, le_to_h_u16(pm->wid) + 1);
+ if (data) {
+ struct vd_rdata *rd;
+ if (le_to_h_u16(pm->rwords) == 0) {
+ rd = &vdc.rdataq;
+ } else {
+ rd = calloc(1, sizeof(struct vd_rdata));
+ if (!rd) /* check allocation for 24B */
+ return ERROR_FAIL;
+ list_add_tail(&rd->lh, &vdc.rdataq.lh);
+ }
+ rd->rdata = (uint8_t *)data;
+ h_u16_to_le(pm->rwords, le_to_h_u16(pm->rwords) + 1);
+ }
+ h_u16_to_le(pm->wwords, waddr + 2);
+ h_u16_to_le(pm->waddr, le_to_h_u16(pm->waddr) + 1);
+ if (!vdc.trans_last) /* buffered request */
+ h_u16_to_le(pm->offseth, waddr + 2);
+ else
+ rc = vdebug_run_reg_queue(hsock, pm, le_to_h_u16(pm->waddr));
vdc.trans_first = vdc.trans_last; /* flush forces trans_first flag */
return rc;
@@ -641,19 +800,19 @@ static int vdebug_mem_open(int hsock, struct vd_shm *pm, const char *path, uint8
return ERROR_OK;
pm->cmd = VD_CMD_MEMOPEN;
- pm->wbytes = strlen(path) + 1; /* includes terminating 0 */
- pm->rbytes = 8;
- pm->wwords = 0;
- pm->rwords = 0;
- memcpy(pm->wd8, path, pm->wbytes);
+ h_u16_to_le(pm->wbytes, strlen(path) + 1); /* includes terminating 0 */
+ h_u16_to_le(pm->rbytes, 8);
+ h_u16_to_le(pm->wwords, 0);
+ h_u16_to_le(pm->rwords, 0);
+ memcpy(pm->wd8, path, le_to_h_u16(pm->wbytes));
rc = vdebug_wait_server(hsock, pm);
if (rc) {
LOG_ERROR("0x%x opening memory %s", rc, path);
- } else if (ndx != pm->rd16[1]) {
- LOG_WARNING("Invalid memory index %" PRIu16 " returned. Direct memory access disabled", pm->rd16[1]);
+ } else if (ndx != pm->rd8[2]) {
+ LOG_WARNING("Invalid memory index %" PRIu16 " returned. Direct memory access disabled", pm->rd8[2]);
} else {
- vdc.mem_width[ndx] = pm->rd16[0] / 8; /* memory width in bytes */
- vdc.mem_depth[ndx] = pm->rd32[1]; /* memory depth in words */
+ vdc.mem_width[ndx] = le_to_h_u16(&pm->rd8[0]) / 8; /* memory width in bytes */
+ vdc.mem_depth[ndx] = le_to_h_u32(&pm->rd8[4]); /* memory depth in words */
LOG_DEBUG("%" PRIx8 ": %s memory %" PRIu32 "x%" PRIu32 "B, buffer %" PRIu32 "x%" PRIu32 "B", ndx, path,
vdc.mem_depth[ndx], vdc.mem_width[ndx], VD_BUFFER_LEN / vdc.mem_width[ndx], vdc.mem_width[ndx]);
}
@@ -664,15 +823,16 @@ static int vdebug_mem_open(int hsock, struct vd_shm *pm, const char *path, uint8
static void vdebug_mem_close(int hsock, struct vd_shm *pm, uint8_t ndx)
{
pm->cmd = VD_CMD_MEMCLOSE;
- pm->rwdata = ndx; /* which memory */
- pm->wbytes = 0;
- pm->rbytes = 0;
- pm->wwords = 0;
- pm->rwords = 0;
+ h_u32_to_le(pm->rwdata, ndx); /* which memory */
+ h_u16_to_le(pm->wbytes, 0);
+ h_u16_to_le(pm->rbytes, 0);
+ h_u16_to_le(pm->wwords, 0);
+ h_u16_to_le(pm->rwords, 0);
vdebug_wait_server(hsock, pm);
LOG_DEBUG("%" PRIx8 ": %s", ndx, vdc.mem_path[ndx]);
}
+
static int vdebug_init(void)
{
vdc.hsocket = vdebug_socket_open(vdc.server_name, vdc.server_port);
@@ -680,7 +840,7 @@ static int vdebug_init(void)
if (!pbuf) {
close_socket(vdc.hsocket);
vdc.hsocket = 0;
- LOG_ERROR("cannot allocate %lu bytes", sizeof(struct vd_shm));
+ LOG_ERROR("cannot allocate %zu bytes", sizeof(struct vd_shm));
return ERROR_FAIL;
}
if (vdc.hsocket <= 0) {
@@ -692,10 +852,13 @@ static int vdebug_init(void)
}
vdc.trans_first = 1;
vdc.poll_cycles = vdc.poll_max;
- uint32_t sig_mask = VD_SIG_RESET | VD_SIG_TRST | VD_SIG_TCKDIV;
+ uint32_t sig_mask = VD_SIG_RESET;
+ if (transport_is_jtag())
+ sig_mask |= VD_SIG_TRST | VD_SIG_TCKDIV;
+
int rc = vdebug_open(vdc.hsocket, pbuf, vdc.bfm_path, vdc.bfm_type, vdc.bfm_period, sig_mask);
if (rc != 0) {
- LOG_ERROR("cannot connect to %s, rc 0x%x", vdc.bfm_path, rc);
+ LOG_ERROR("0x%x cannot connect to %s", rc, vdc.bfm_path);
close_socket(vdc.hsocket);
vdc.hsocket = 0;
free(pbuf);
@@ -704,7 +867,7 @@ static int vdebug_init(void)
for (uint8_t i = 0; i < vdc.mem_ndx; i++) {
rc = vdebug_mem_open(vdc.hsocket, pbuf, vdc.mem_path[i], i);
if (rc != 0)
- LOG_ERROR("cannot connect to %s, rc 0x%x", vdc.mem_path[i], rc);
+ LOG_ERROR("0x%x cannot connect to %s", rc, vdc.mem_path[i]);
}
LOG_INFO("vdebug %d connected to %s through %s:%" PRIu16,
@@ -754,7 +917,7 @@ static int vdebug_reset(int trst, int srst)
static int vdebug_jtag_tms_seq(const uint8_t *tms, int num, uint8_t f_flush)
{
- LOG_INFO("tms len:%d tms:%x", num, *(const uint32_t *)tms);
+ LOG_INFO("tms len:%d tms:%x", num, *tms);
return vdebug_jtag_shift_tap(vdc.hsocket, pbuf, num, *tms, 0, NULL, 0, 0, NULL, f_flush);
}
@@ -811,8 +974,8 @@ static int vdebug_jtag_scan(struct scan_command *cmd, uint8_t f_flush)
uint8_t cur_tms_post = i == cmd->num_fields - 1 ? tms_post : 0;
uint8_t cur_flush = i == cmd->num_fields - 1 ? f_flush : 0;
rc = vdebug_jtag_shift_tap(vdc.hsocket, pbuf, cur_num_pre, cur_tms_pre,
- cmd->fields[i].num_bits, cmd->fields[i].out_value, cur_num_post, cur_tms_post,
- cmd->fields[i].in_value, cur_flush);
+ cmd->fields[i].num_bits, cmd->fields[i].out_value, cur_num_post, cur_tms_post,
+ cmd->fields[i].in_value, cur_flush);
if (rc)
break;
}
@@ -913,6 +1076,61 @@ static int vdebug_jtag_execute_queue(void)
return rc;
}
+static int vdebug_dap_connect(struct adiv5_dap *dap)
+{
+ return dap_dp_init(dap);
+}
+
+static int vdebug_dap_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq)
+{
+ return ERROR_OK;
+}
+
+static int vdebug_dap_queue_dp_read(struct adiv5_dap *dap, unsigned int reg, uint32_t *data)
+{
+ return vdebug_reg_read(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, data, VD_ASPACE_DP, 0);
+}
+
+static int vdebug_dap_queue_dp_write(struct adiv5_dap *dap, unsigned int reg, uint32_t data)
+{
+ return vdebug_reg_write(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, data, VD_ASPACE_DP, 0);
+}
+
+static int vdebug_dap_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data)
+{
+ if ((reg & DP_SELECT_APBANK) != ap->dap->select) {
+ vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, reg & DP_SELECT_APBANK, VD_ASPACE_DP, 0);
+ ap->dap->select = reg & DP_SELECT_APBANK;
+ }
+
+ vdebug_reg_read(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, NULL, VD_ASPACE_AP, 0);
+
+ return vdebug_reg_read(vdc.hsocket, pbuf, DP_RDBUFF >> 2, data, VD_ASPACE_DP, 0);
+}
+
+static int vdebug_dap_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data)
+{
+ if ((reg & DP_SELECT_APBANK) != ap->dap->select) {
+ vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, reg & DP_SELECT_APBANK, VD_ASPACE_DP, 0);
+ ap->dap->select = reg & DP_SELECT_APBANK;
+ }
+
+ return vdebug_reg_write(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, data, VD_ASPACE_AP, 0);
+}
+
+static int vdebug_dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
+{
+ return vdebug_reg_write(vdc.hsocket, pbuf, 0, 0x1, VD_ASPACE_AB, 0);
+}
+
+static int vdebug_dap_run(struct adiv5_dap *dap)
+{
+ if (pbuf->waddr)
+ return vdebug_run_reg_queue(vdc.hsocket, pbuf, le_to_h_u16(pbuf->waddr));
+
+ return ERROR_OK;
+}
+
COMMAND_HANDLER(vdebug_set_server)
{
if ((CMD_ARGC != 1) || !strchr(CMD_ARGV[0], ':'))
@@ -951,7 +1169,10 @@ COMMAND_HANDLER(vdebug_set_bfm)
default:
break;
}
- vdc.bfm_type = VD_BFM_JTAG;
+ if (transport_is_dapdirect_swd())
+ vdc.bfm_type = VD_BFM_SWDP;
+ else
+ vdc.bfm_type = VD_BFM_JTAG;
LOG_DEBUG("bfm_path: %s clk_period %ups", vdc.bfm_path, vdc.bfm_period);
return ERROR_OK;
@@ -1062,9 +1283,24 @@ static struct jtag_interface vdebug_jtag_ops = {
.execute_queue = vdebug_jtag_execute_queue,
};
+static const struct dap_ops vdebug_dap_ops = {
+ .connect = vdebug_dap_connect,
+ .send_sequence = vdebug_dap_send_sequence,
+ .queue_dp_read = vdebug_dap_queue_dp_read,
+ .queue_dp_write = vdebug_dap_queue_dp_write,
+ .queue_ap_read = vdebug_dap_queue_ap_read,
+ .queue_ap_write = vdebug_dap_queue_ap_write,
+ .queue_ap_abort = vdebug_dap_queue_ap_abort,
+ .run = vdebug_dap_run,
+ .sync = NULL, /* optional */
+ .quit = NULL, /* optional */
+};
+
+static const char *const vdebug_transports[] = { "jtag", "dapdirect_swd", NULL };
+
struct adapter_driver vdebug_adapter_driver = {
.name = "vdebug",
- .transports = jtag_only,
+ .transports = vdebug_transports,
.speed = vdebug_jtag_speed,
.khz = vdebug_jtag_khz,
.speed_div = vdebug_jtag_div,
@@ -1073,4 +1309,5 @@ struct adapter_driver vdebug_adapter_driver = {
.quit = vdebug_quit,
.reset = vdebug_reset,
.jtag_ops = &vdebug_jtag_ops,
+ .dap_swd_ops = &vdebug_dap_ops,
};
diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtogpio.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtogpio.c
index 0d60725..ac5b1a2 100644
--- a/src/jtag/drivers/versaloon/usbtoxxx/usbtogpio.c
+++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtogpio.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c
index bd61049..be2d8c3 100644
--- a/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c
+++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtojtagraw.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c
index e756817..941680a 100644
--- a/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c
+++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtopwr.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c
index 23a5097..42c8023 100644
--- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c
+++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoswd.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c
index f701bb0..070f68c 100644
--- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c
+++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h
index 0ae3c03..caeaa26 100644
--- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h
+++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_VERSALOON_USBTOXXX_USBTOXXX_H
diff --git a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h
index 3698886..8a6e476 100644
--- a/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h
+++ b/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx_internal.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_VERSALOON_USBTOXXX_USBTOXXX_INTERNAL_H
diff --git a/src/jtag/drivers/versaloon/versaloon.c b/src/jtag/drivers/versaloon/versaloon.c
index 7c2efef..48d3174 100644
--- a/src/jtag/drivers/versaloon/versaloon.c
+++ b/src/jtag/drivers/versaloon/versaloon.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/versaloon/versaloon.h b/src/jtag/drivers/versaloon/versaloon.h
index e4aafb2..5d7aa19 100644
--- a/src/jtag/drivers/versaloon/versaloon.h
+++ b/src/jtag/drivers/versaloon/versaloon.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_VERSALOON_VERSALOON_H
diff --git a/src/jtag/drivers/versaloon/versaloon_include.h b/src/jtag/drivers/versaloon/versaloon_include.h
index a954b48..5804ad5 100644
--- a/src/jtag/drivers/versaloon/versaloon_include.h
+++ b/src/jtag/drivers/versaloon/versaloon_include.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_VERSALOON_VERSALOON_INCLUDE_H
diff --git a/src/jtag/drivers/versaloon/versaloon_internal.h b/src/jtag/drivers/versaloon/versaloon_internal.h
index 8372970..edeb335 100644
--- a/src/jtag/drivers/versaloon/versaloon_internal.h
+++ b/src/jtag/drivers/versaloon/versaloon_internal.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 - 2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_DRIVERS_VERSALOON_VERSALOON_INTERNAL_H
diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c
index dbbdef4..255ff88 100644
--- a/src/jtag/drivers/vsllink.c
+++ b/src/jtag/drivers/vsllink.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009-2010 by Simon Qian <SimonQian@SimonQian.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* Versaloon is a programming tool for multiple MCUs.
diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c
index c5249b2..ecba36b 100644
--- a/src/jtag/drivers/xds110.c
+++ b/src/jtag/drivers/xds110.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Texas Instruments, Inc. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/drivers/xlnx-pcie-xvc.c b/src/jtag/drivers/xlnx-pcie-xvc.c
index c05b9cf..6ad0255 100644
--- a/src/jtag/drivers/xlnx-pcie-xvc.c
+++ b/src/jtag/drivers/xlnx-pcie-xvc.c
@@ -1,5 +1,6 @@
-/* SPDX-License-Identifier: GPL-2.0
- *
+// SPDX-License-Identifier: GPL-2.0-only
+
+/*
* Copyright (c) 2019 Google, LLC.
* Author: Moritz Fischer <moritzf@google.com>
*/
diff --git a/src/jtag/hla/Makefile.am b/src/jtag/hla/Makefile.am
index 6bb2960..4111786 100644
--- a/src/jtag/hla/Makefile.am
+++ b/src/jtag/hla/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libocdhla.la
%C%_libocdhla_la_SOURCES = \
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index 074e3c2..6198b3d 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/hla/hla_interface.h b/src/jtag/hla/hla_interface.h
index 31d055a..fa49658 100644
--- a/src/jtag/hla/hla_interface.h
+++ b/src/jtag/hla/hla_interface.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_HLA_HLA_INTERFACE_H
diff --git a/src/jtag/hla/hla_layout.c b/src/jtag/hla/hla_layout.c
index 16b2217..a760f0b 100644
--- a/src/jtag/hla/hla_layout.c
+++ b/src/jtag/hla/hla_layout.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/hla/hla_layout.h b/src/jtag/hla/hla_layout.h
index 732fe1e..e13da65 100644
--- a/src/jtag/hla/hla_layout.h
+++ b/src/jtag/hla/hla_layout.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_HLA_HLA_LAYOUT_H
diff --git a/src/jtag/hla/hla_tcl.c b/src/jtag/hla/hla_tcl.c
index 6b206d2..3283399 100644
--- a/src/jtag/hla/hla_tcl.c
+++ b/src/jtag/hla/hla_tcl.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/hla/hla_tcl.h b/src/jtag/hla/hla_tcl.h
index ac00add..b028e4b 100644
--- a/src/jtag/hla/hla_tcl.h
+++ b/src/jtag/hla/hla_tcl.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_HLA_HLA_TCL_H
diff --git a/src/jtag/hla/hla_transport.c b/src/jtag/hla/hla_transport.c
index 58dfe4b..91228be 100644
--- a/src/jtag/hla/hla_transport.c
+++ b/src/jtag/hla/hla_transport.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/hla/hla_transport.h b/src/jtag/hla/hla_transport.h
index 0e0bea2..965f561 100644
--- a/src/jtag/hla/hla_transport.h
+++ b/src/jtag/hla/hla_transport.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
* *
* Copyright (C) 2012 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_HLA_HLA_TRANSPORT_H
diff --git a/src/jtag/interface.c b/src/jtag/interface.c
index 56bbf6e..bc9ff3e 100644
--- a/src/jtag/interface.c
+++ b/src/jtag/interface.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/interface.h b/src/jtag/interface.h
index 58bfd02..a8d9ee4 100644
--- a/src/jtag/interface.h
+++ b/src/jtag/interface.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_INTERFACE_H
diff --git a/src/jtag/interfaces.c b/src/jtag/interfaces.c
index 9afd69d..67bbb3b 100644
--- a/src/jtag/interfaces.c
+++ b/src/jtag/interfaces.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -13,19 +15,6 @@
* zw@superlucidity.net *
* *
* Copyright (C) 2020, Ampere Computing LLC *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -54,6 +43,9 @@ extern struct adapter_driver ftdi_adapter_driver;
#if BUILD_USB_BLASTER == 1 || BUILD_USB_BLASTER_2 == 1
extern struct adapter_driver usb_blaster_adapter_driver;
#endif
+#if BUILD_ESP_USB_JTAG == 1
+extern struct adapter_driver esp_usb_adapter_driver;
+#endif
#if BUILD_JTAG_VPI == 1
extern struct adapter_driver jtag_vpi_adapter_driver;
#endif
@@ -171,6 +163,9 @@ struct adapter_driver *adapter_drivers[] = {
#if BUILD_USB_BLASTER || BUILD_USB_BLASTER_2 == 1
&usb_blaster_adapter_driver,
#endif
+#if BUILD_ESP_USB_JTAG == 1
+ &esp_usb_adapter_driver,
+#endif
#if BUILD_JTAG_VPI == 1
&jtag_vpi_adapter_driver,
#endif
diff --git a/src/jtag/interfaces.h b/src/jtag/interfaces.h
index ddbd735..6e6c2ce 100644
--- a/src/jtag/interfaces.h
+++ b/src/jtag/interfaces.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_INTERFACES_H
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 4ec2f1e..4f94e99 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007-2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
-* *
-* This program is free software; you can redistribute it and/or modify *
-* it under the terms of the GNU General Public License as published by *
-* the Free Software Foundation; either version 2 of the License, or *
-* (at your option) any later version. *
-* *
-* This program is distributed in the hope that it will be useful, *
-* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-* GNU General Public License for more details. *
-* *
-* You should have received a copy of the GNU General Public License *
-* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_JTAG_H
@@ -598,6 +587,19 @@ bool jtag_poll_get_enabled(void);
*/
void jtag_poll_set_enabled(bool value);
+/**
+ * Mask (disable) polling and return the current mask status that should be
+ * feed to jtag_poll_unmask() to restore it.
+ * Multiple nested calls to jtag_poll_mask() are allowed, each balanced with
+ * its call to jtag_poll_unmask().
+ */
+bool jtag_poll_mask(void);
+
+/**
+ * Restore saved mask for polling.
+ */
+void jtag_poll_unmask(bool saved);
+
#include <jtag/minidriver.h>
int jim_jtag_newtap(Jim_Interp *interp, int argc, Jim_Obj *const *argv);
diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h
index 0624c55..a40cffa 100644
--- a/src/jtag/minidriver.h
+++ b/src/jtag/minidriver.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_MINIDRIVER_H
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index ee11626..aeb42ed 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Defines basic Tcl procs for OpenOCD JTAG module
# Executed during "init". Can be overridden
@@ -120,6 +122,66 @@ proc jtag_ntrst_assert_width args {
#
# FIXME phase these aids out after some releases
#
+lappend _telnet_autocomplete_skip adapter_gpio_helper_with_caller
+# Helper for deprecated driver functions that should call "adapter gpio XXX".
+
+# Call this function as:
+# adapter_gpio_helper_with_caller caller sig_name
+# adapter_gpio_helper_with_caller caller sig_name gpio_num
+# adapter_gpio_helper_with_caller caller sig_name chip_num gpio_num
+proc adapter_gpio_helper_with_caller {caller sig_name args} {
+ echo "DEPRECATED! use 'adapter gpio $sig_name' not '$caller'"
+ switch [llength $args] {
+ 0 {}
+ 1 {eval adapter gpio $sig_name $args}
+ 2 {eval adapter gpio $sig_name [lindex $args 1] -chip [lindex $args 0]}
+ default {return -code 1 -level 1 "$caller: syntax error"}
+ }
+ eval adapter gpio $sig_name
+}
+
+lappend _telnet_autocomplete_skip adapter_gpio_helper
+# Call this function as:
+# adapter_gpio_helper sig_name
+# adapter_gpio_helper sig_name gpio_num
+# adapter_gpio_helper sig_name chip_num gpio_num
+proc adapter_gpio_helper {sig_name args} {
+ set caller [lindex [info level -1] 0]
+ eval adapter_gpio_helper_with_caller {"$caller"} $sig_name $args
+}
+
+lappend _telnet_autocomplete_skip adapter_gpio_jtag_nums_with_caller
+# Helper for deprecated driver functions that implemented jtag_nums
+proc adapter_gpio_jtag_nums_with_caller {caller tck_num tms_num tdi_num tdo_num} {
+ echo "DEPRECATED! use 'adapter gpio tck; adapter gpio tms; adapter gpio tdi; adapter gpio tdo' not '$caller'"
+ eval adapter gpio tck $tck_num
+ eval adapter gpio tms $tms_num
+ eval adapter gpio tdi $tdi_num
+ eval adapter gpio tdo $tdo_num
+}
+
+lappend _telnet_autocomplete_skip adapter_gpio_jtag_nums
+# Helper for deprecated driver functions that implemented jtag_nums
+proc adapter_gpio_jtag_nums {args} {
+ set caller [lindex [info level -1] 0]
+ eval adapter_gpio_jtag_nums_with_caller {"$caller"} $args
+}
+
+lappend _telnet_autocomplete_skip adapter_gpio_swd_nums_with_caller
+# Helper for deprecated driver functions that implemented swd_nums
+proc adapter_gpio_swd_nums_with_caller {caller swclk_num swdio_num} {
+ echo "DEPRECATED! use 'adapter gpio swclk; adapter gpio swdio' not '$caller'"
+ eval adapter gpio swclk $swclk_num
+ eval adapter gpio swdio $swdio_num
+}
+
+lappend _telnet_autocomplete_skip adapter_gpio_swd_nums
+# Helper for deprecated driver functions that implemented jtag_nums
+proc adapter_gpio_swd_nums {args} {
+ set caller [lindex [info level -1] 0]
+ eval adapter_gpio_swd_nums_with_caller {"$caller"} $args
+}
+
lappend _telnet_autocomplete_skip jtag_reset
proc jtag_reset args {
echo "DEPRECATED! use 'adapter \[de\]assert' not 'jtag_reset'"
@@ -393,70 +455,140 @@ proc vsllink_usb_interface args {
eval vsllink usb_interface $args
}
+
+lappend _telnet_autocomplete_skip bcm2835_gpio_helper
+proc bcm2835_gpio_helper {sig_name args} {
+ set caller [lindex [info level -1] 0]
+ echo "DEPRECATED! use 'adapter gpio $sig_name' not '$caller'"
+ switch [llength $args] {
+ 0 {}
+ 1 {eval adapter gpio $sig_name $args -chip 0}
+ 2 {eval adapter gpio $sig_name [lindex $args 1] -chip [lindex $args 0]}
+ default {return -code 1 -level 1 "$caller: syntax error"}
+ }
+ eval adapter gpio $sig_name
+}
+
lappend _telnet_autocomplete_skip bcm2835gpio_jtag_nums
-proc bcm2835gpio_jtag_nums args {
- echo "DEPRECATED! use 'bcm2835gpio jtag_nums' not 'bcm2835gpio_jtag_nums'"
- eval bcm2835gpio jtag_nums $args
+proc bcm2835gpio_jtag_nums {tck_num tms_num tdi_num tdo_num} {
+ echo "DEPRECATED! use 'adapter gpio tck; adapter gpio tms; adapter gpio tdi; adapter gpio tdo' not 'bcm2835gpio_jtag_nums'"
+ eval adapter gpio tck $tck_num -chip 0
+ eval adapter gpio tms $tms_num -chip 0
+ eval adapter gpio tdi $tdi_num -chip 0
+ eval adapter gpio tdo $tdo_num -chip 0
}
lappend _telnet_autocomplete_skip bcm2835gpio_tck_num
proc bcm2835gpio_tck_num args {
- echo "DEPRECATED! use 'bcm2835gpio tck_num' not 'bcm2835gpio_tck_num'"
- eval bcm2835gpio tck_num $args
+ eval bcm2835_gpio_helper tck $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_tms_num
proc bcm2835gpio_tms_num args {
- echo "DEPRECATED! use 'bcm2835gpio tms_num' not 'bcm2835gpio_tms_num'"
- eval bcm2835gpio tms_num $args
+ eval bcm2835_gpio_helper tms $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_tdo_num
proc bcm2835gpio_tdo_num args {
- echo "DEPRECATED! use 'bcm2835gpio tdo_num' not 'bcm2835gpio_tdo_num'"
- eval bcm2835gpio tdo_num $args
+ eval bcm2835_gpio_helper tdo $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_tdi_num
proc bcm2835gpio_tdi_num args {
- echo "DEPRECATED! use 'bcm2835gpio tdi_num' not 'bcm2835gpio_tdi_num'"
- eval bcm2835gpio tdi_num $args
+ eval bcm2835_gpio_helper tdi $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_swd_nums
-proc bcm2835gpio_swd_nums args {
- echo "DEPRECATED! use 'bcm2835gpio swd_nums' not 'bcm2835gpio_swd_nums'"
- eval bcm2835gpio swd_nums $args
+proc bcm2835gpio_swd_nums {swclk_num swdio_num} {
+ echo "DEPRECATED! use 'adapter gpio swclk; adapter gpio swdio' not 'bcm2835gpio_swd_nums'"
+ eval adapter gpio swclk $swclk_num -chip 0
+ eval adapter gpio swdio $swdio_num -chip 0
}
lappend _telnet_autocomplete_skip bcm2835gpio_swclk_num
proc bcm2835gpio_swclk_num args {
- echo "DEPRECATED! use 'bcm2835gpio swclk_num' not 'bcm2835gpio_swclk_num'"
- eval bcm2835gpio swclk_num $args
+ eval bcm2835_gpio_helper swclk $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_swdio_num
proc bcm2835gpio_swdio_num args {
- echo "DEPRECATED! use 'bcm2835gpio swdio_num' not 'bcm2835gpio_swdio_num'"
- eval bcm2835gpio swdio_num $args
+ eval bcm2835_gpio_helper swdio $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_swdio_dir_num
proc bcm2835gpio_swdio_dir_num args {
- echo "DEPRECATED! use 'bcm2835gpio swdio_dir_num' not 'bcm2835gpio_swdio_dir_num'"
- eval bcm2835gpio swdio_dir_num $args
+ eval bcm2835_gpio_helper swdio_dir $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_srst_num
proc bcm2835gpio_srst_num args {
- echo "DEPRECATED! use 'bcm2835gpio srst_num' not 'bcm2835gpio_srst_num'"
- eval bcm2835gpio srst_num $args
+ eval bcm2835_gpio_helper srst $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_trst_num
proc bcm2835gpio_trst_num args {
- echo "DEPRECATED! use 'bcm2835gpio trst_num' not 'bcm2835gpio_trst_num'"
- eval bcm2835gpio trst_num $args
+ eval bcm2835_gpio_helper trst $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio jtag_nums"
+proc "bcm2835gpio jtag_nums" {tck_num tms_num tdi_num tdo_num} {
+ echo "DEPRECATED! use 'adapter gpio tck; adapter gpio tms; adapter gpio tdi; adapter gpio tdo' not 'bcm2835gpio jtag_nums'"
+ eval adapter gpio tck $tck_num -chip 0
+ eval adapter gpio tms $tms_num -chip 0
+ eval adapter gpio tdi $tdi_num -chip 0
+ eval adapter gpio tdo $tdo_num -chip 0
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio tck_num"
+proc "bcm2835gpio tck_num" args {
+ eval bcm2835_gpio_helper tck $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio tms_num"
+proc "bcm2835gpio tms_num" args {
+ eval bcm2835_gpio_helper tms $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio tdo_num"
+proc "bcm2835gpio tdo_num" args {
+ eval bcm2835_gpio_helper tdo $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio tdi_num"
+proc "bcm2835gpio tdi_num" args {
+ eval bcm2835_gpio_helper tdi $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio swd_nums"
+proc "bcm2835gpio swd_nums" {swclk_num swdio_num} {
+ echo "DEPRECATED! use 'adapter gpio swclk; adapter gpio swdio' not 'bcm2835gpio swd_nums'"
+ eval adapter gpio swclk $swclk_num -chip 0
+ eval adapter gpio swdio $swdio_num -chip 0
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio swclk_num"
+proc "bcm2835gpio swclk_num" args {
+ eval bcm2835_gpio_helper swclk $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio swdio_num"
+proc "bcm2835gpio swdio_num" args {
+ eval bcm2835_gpio_helper swdio $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio swdio_dir_num"
+proc "bcm2835gpio swdio_dir_num" args {
+ eval bcm2835_gpio_helper swdio_dir $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio srst_num"
+proc "bcm2835gpio srst_num" args {
+ eval bcm2835_gpio_helper srst $args
+}
+
+lappend _telnet_autocomplete_skip "bcm2835gpio trst_num"
+proc "bcm2835gpio trst_num" args {
+ eval bcm2835_gpio_helper trst $args
}
lappend _telnet_autocomplete_skip bcm2835gpio_speed_coeffs
@@ -473,74 +605,72 @@ proc bcm2835gpio_peripheral_base args {
lappend _telnet_autocomplete_skip linuxgpiod_jtag_nums
proc linuxgpiod_jtag_nums args {
- echo "DEPRECATED! use 'linuxgpiod jtag_nums' not 'linuxgpiod_jtag_nums'"
- eval linuxgpiod jtag_nums $args
+ eval adapter_gpio_jtag_nums $args
}
lappend _telnet_autocomplete_skip linuxgpiod_tck_num
proc linuxgpiod_tck_num args {
- echo "DEPRECATED! use 'linuxgpiod tck_num' not 'linuxgpiod_tck_num'"
- eval linuxgpiod tck_num $args
+ eval adapter_gpio_helper tck $args
}
lappend _telnet_autocomplete_skip linuxgpiod_tms_num
proc linuxgpiod_tms_num args {
- echo "DEPRECATED! use 'linuxgpiod tms_num' not 'linuxgpiod_tms_num'"
- eval linuxgpiod tms_num $args
+ eval adapter_gpio_helper tms $args
}
lappend _telnet_autocomplete_skip linuxgpiod_tdo_num
proc linuxgpiod_tdo_num args {
- echo "DEPRECATED! use 'linuxgpiod tdo_num' not 'linuxgpiod_tdo_num'"
- eval linuxgpiod tdo_num $args
+ eval adapter_gpio_helper tdo $args
}
lappend _telnet_autocomplete_skip linuxgpiod_tdi_num
proc linuxgpiod_tdi_num args {
- echo "DEPRECATED! use 'linuxgpiod tdi_num' not 'linuxgpiod_tdi_num'"
- eval linuxgpiod tdi_num $args
+ eval adapter_gpio_helper tdi $args
}
lappend _telnet_autocomplete_skip linuxgpiod_srst_num
proc linuxgpiod_srst_num args {
- echo "DEPRECATED! use 'linuxgpiod srst_num' not 'linuxgpiod_srst_num'"
- eval linuxgpiod srst_num $args
+ eval adapter_gpio_helper srst $args
}
lappend _telnet_autocomplete_skip linuxgpiod_trst_num
proc linuxgpiod_trst_num args {
- echo "DEPRECATED! use 'linuxgpiod trst_num' not 'linuxgpiod_trst_num'"
- eval linuxgpiod trst_num $args
+ eval adapter_gpio_helper trst $args
}
lappend _telnet_autocomplete_skip linuxgpiod_swd_nums
proc linuxgpiod_swd_nums args {
- echo "DEPRECATED! use 'linuxgpiod swd_nums' not 'linuxgpiod_swd_nums'"
- eval linuxgpiod swd_nums $args
+ eval adapter_gpio_swd_nums $args
}
lappend _telnet_autocomplete_skip linuxgpiod_swclk_num
proc linuxgpiod_swclk_num args {
- echo "DEPRECATED! use 'linuxgpiod swclk_num' not 'linuxgpiod_swclk_num'"
- eval linuxgpiod swclk_num $args
+ eval adapter_gpio_helper swclk $args
}
lappend _telnet_autocomplete_skip linuxgpiod_swdio_num
proc linuxgpiod_swdio_num args {
- echo "DEPRECATED! use 'linuxgpiod swdio_num' not 'linuxgpiod_swdio_num'"
- eval linuxgpiod swdio_num $args
+ eval adapter_gpio_helper swdio $args
}
lappend _telnet_autocomplete_skip linuxgpiod_led_num
proc linuxgpiod_led_num args {
- echo "DEPRECATED! use 'linuxgpiod led_num' not 'linuxgpiod_led_num'"
- eval linuxgpiod led_num $args
+ eval adapter_gpio_helper led $args
}
lappend _telnet_autocomplete_skip linuxgpiod_gpiochip
proc linuxgpiod_gpiochip args {
- echo "DEPRECATED! use 'linuxgpiod gpiochip' not 'linuxgpiod_gpiochip'"
- eval linuxgpiod gpiochip $args
+ echo "DEPRECATED! use 'adapter <signal_name> -chip' not 'linuxgpiod_gpiochip'"
+ switch [llength $args] {
+ 0 { }
+ 1 {
+ foreach sig_name {tck tms tdi tdo trst srst swclk swdio swdio_dir led} {
+ eval adapter gpio $sig_name -chip $args
+ }
+ }
+ default {return -code 1 -level 1 "linuxgpiod_gpiochip: syntax error"}
+ }
+ eval adapter gpio
}
lappend _telnet_autocomplete_skip sysfsgpio_jtag_nums
@@ -801,4 +931,187 @@ proc "xds110 serial" {args} {
eval adapter serial $args
}
+lappend _telnet_autocomplete_skip linuxgpiod
+# linuxgpiod command completely removed, this is required for the sub-commands to work
+proc linuxgpiod {subcommand args} {
+ eval {"linuxgpiod $subcommand"} $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod tck_num"
+proc "linuxgpiod tck_num" {args} {
+ eval adapter_gpio_helper tck $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod tms_num"
+proc "linuxgpiod tms_num" {args} {
+ eval adapter_gpio_helper tms $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod tdi_num"
+proc "linuxgpiod tdi_num" {args} {
+ eval adapter_gpio_helper tdi $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod tdo_num"
+proc "linuxgpiod tdo_num" {args} {
+ eval adapter_gpio_helper tdo $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod trst_num"
+proc "linuxgpiod trst_num" {args} {
+ eval adapter_gpio_helper trst $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod srst_num"
+proc "linuxgpiod srst_num" {args} {
+ eval adapter_gpio_helper srst $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod swclk_num"
+proc "linuxgpiod swclk_num" {args} {
+ eval adapter_gpio_helper swclk $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod swdio_num"
+proc "linuxgpiod swdio_num" {args} {
+ eval adapter_gpio_helper swdio $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod swdio_dir_num"
+proc "linuxgpiod swdio_dir_num" {args} {
+ eval adapter_gpio_helper swdio_dir $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod led_num"
+proc "linuxgpiod led_num" {args} {
+ eval adapter_gpio_helper led $args
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod gpiochip"
+proc "linuxgpiod gpiochip" {num} {
+ echo "DEPRECATED! use 'adapter <signal_name> -chip' not 'linuxgpiod gpiochip'"
+ foreach sig_name {tck tms tdi tdo trst srst swclk swdio swdio_dir led} {
+ eval adapter gpio $sig_name -chip $num
+ }
+ eval adapter gpio
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod jtag_nums"
+proc "linuxgpiod jtag_nums" {tck_num tms_num tdi_num tdo_num} {
+ echo "DEPRECATED! use 'adapter gpio tck; adapter gpio tms; adapter gpio tdi; adapter gpio tdo' not 'linuxgpiod jtag_nums'"
+ eval adapter gpio tck $tck_num
+ eval adapter gpio tms $tms_num
+ eval adapter gpio tdi $tdi_num
+ eval adapter gpio tdo $tdo_num
+}
+
+lappend _telnet_autocomplete_skip "linuxgpiod swd_nums"
+proc "linuxgpiod swd_nums" {swclk swdio} {
+ echo "DEPRECATED! use 'adapter gpio swclk; adapter gpio swdio' not 'linuxgpiod jtag_nums'"
+ eval adapter gpio swclk $swclk
+ eval adapter gpio swdio $swdio
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio jtag_nums"
+proc "am335xgpio jtag_nums" {tck_num tms_num tdi_num tdo_num} {
+ echo "DEPRECATED! use 'adapter gpio tck; adapter gpio tms; adapter gpio tdi; adapter gpio tdo' not 'am335xgpio jtag_nums'"
+ eval adapter gpio tck [expr {$tck_num % 32}] -chip [expr {$tck_num / 32}]
+ eval adapter gpio tms [expr {$tms_num % 32}] -chip [expr {$tms_num / 32}]
+ eval adapter gpio tdi [expr {$tdi_num % 32}] -chip [expr {$tdi_num / 32}]
+ eval adapter gpio tdo [expr {$tdo_num % 32}] -chip [expr {$tdo_num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio tck_num"
+proc "am335xgpio tck_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio tck' not 'am335xgpio tck_num'"
+ eval adapter gpio tck [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio tms_num"
+proc "am335xgpio tms_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio tms' not 'am335xgpio tms_num'"
+ eval adapter gpio tms [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio tdi_num"
+proc "am335xgpio tdi_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio tdi' not 'am335xgpio tdi_num'"
+ eval adapter gpio tdi [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio tdo_num"
+proc "am335xgpio tdo_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio tdo' not 'am335xgpio tdo_num'"
+ eval adapter gpio tdo [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio swd_nums"
+proc "am335xgpio swd_nums" {swclk swdio} {
+ echo "DEPRECATED! use 'adapter gpio swclk; adapter gpio swdio' not 'am335xgpio jtag_nums'"
+ eval adapter gpio swclk [expr {$swclk % 32}] -chip [expr {$swclk / 32}]
+ eval adapter gpio swdio [expr {$swdio % 32}] -chip [expr {$swdio / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio swclk_num"
+proc "am335xgpio swclk_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio swclk' not 'am335xgpio swclk_num'"
+ eval adapter gpio swclk [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio swdio_num"
+proc "am335xgpio swdio_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio swdio' not 'am335xgpio swdio_num'"
+ eval adapter gpio swdio [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio swdio_dir_num"
+proc "am335xgpio swdio_dir_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio swdio_dir' not 'am335xgpio swdio_dir_num'"
+ eval adapter gpio swdio_dir [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio swdio_dir_output_state"
+proc "am335xgpio swdio_dir_output_state" {state} {
+ echo "DEPRECATED! use 'adapter gpio swdio_dir -active-high' or 'adapter gpio swdio_dir -active-low', not 'am335xgpio swdio_dir_output_state'"
+ switch $state {
+ "high"
+ {eval adapter gpio swdio_dir -active-high}
+ "low"
+ {eval adapter gpio swdio_dir -active-low}
+ default
+ {return -code 1 -level 1 "am335xgpio swdio_dir_output_state: syntax error"}
+ }
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio srst_num"
+proc "am335xgpio srst_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio srst' not 'am335xgpio srst_num'"
+ eval adapter gpio srst [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio trst_num"
+proc "am335xgpio trst_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio trst' not 'am335xgpio trst_num'"
+ eval adapter gpio trst [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio led_num"
+proc "am335xgpio led_num" {num} {
+ echo "DEPRECATED! use 'adapter gpio led' not 'am335xgpio led_num'"
+ eval adapter gpio led [expr {$num % 32}] -chip [expr {$num / 32}]
+}
+
+lappend _telnet_autocomplete_skip "am335xgpio led_on_state"
+proc "am335xgpio led_on_state" {state} {
+ echo "DEPRECATED! use 'adapter gpio led -active-high' or 'adapter gpio led -active-low', not 'am335xgpio led_on_state'"
+ switch $state {
+ "high"
+ {eval adapter gpio led -active-high}
+ "low"
+ {eval adapter gpio led -active-low}
+ default
+ {return -code 1 -level 1 "am335xgpio led_on_state: syntax error"}
+ }
+}
+
# END MIGRATION AIDS
diff --git a/src/jtag/swd.h b/src/jtag/swd.h
index 8a436d0..5f626c1 100644
--- a/src/jtag/swd.h
+++ b/src/jtag/swd.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009-2010 by David Brownell *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_SWD_H
diff --git a/src/jtag/swim.c b/src/jtag/swim.c
index 936268b..de3e106 100644
--- a/src/jtag/swim.c
+++ b/src/jtag/swim.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 by Antonio Borneo <borneo.antonio@gmail.com
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index e6e976d..b1815b7 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/jtag/tcl.h b/src/jtag/tcl.h
index 932b47a..d67c085 100644
--- a/src/jtag/tcl.h
+++ b/src/jtag/tcl.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -11,19 +13,6 @@
* *
* Copyright (C) 2009 Zachary T Welch *
* zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_JTAG_TCL_H
diff --git a/src/main.c b/src/main.c
index a437b6b..a36e6b5 100644
--- a/src/main.c
+++ b/src/main.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/openocd.c b/src/openocd.c
index fdc4a87..bef084f 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 Richard Missenden *
* richard.missenden@googlemail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -130,6 +119,8 @@ COMMAND_HANDLER(handle_init_command)
initialized = 1;
+ bool save_poll_mask = jtag_poll_mask();
+
retval = command_run_line(CMD_CTX, "target init");
if (retval != ERROR_OK)
return ERROR_FAIL;
@@ -177,6 +168,8 @@ COMMAND_HANDLER(handle_init_command)
if (command_run_line(CMD_CTX, "tpiu init") != ERROR_OK)
return ERROR_FAIL;
+ jtag_poll_unmask(save_poll_mask);
+
/* initialize telnet subsystem */
gdb_target_add_all(all_targets);
diff --git a/src/openocd.h b/src/openocd.h
index 543ac3c..1c2a633 100644
--- a/src/openocd.h
+++ b/src/openocd.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2009 by Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_OPENOCD_H
diff --git a/src/pld/Makefile.am b/src/pld/Makefile.am
index 7f3a554..14786af 100644
--- a/src/pld/Makefile.am
+++ b/src/pld/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libpld.la
%C%_libpld_la_SOURCES = \
%D%/pld.c \
diff --git a/src/pld/pld.c b/src/pld/pld.c
index fe21f6c..e2e0ef4 100644
--- a/src/pld/pld.c
+++ b/src/pld/pld.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/pld/pld.h b/src/pld/pld.h
index 3178fd4..a7cd20f 100644
--- a/src/pld/pld.h
+++ b/src/pld/pld.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_PLD_PLD_H
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index a2de8cc..771af99 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/pld/virtex2.h b/src/pld/virtex2.h
index d6d922e..05558f7 100644
--- a/src/pld/virtex2.h
+++ b/src/pld/virtex2.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_PLD_VIRTEX2_H
diff --git a/src/pld/xilinx_bit.c b/src/pld/xilinx_bit.c
index fe3faef..25deb80 100644
--- a/src/pld/xilinx_bit.c
+++ b/src/pld/xilinx_bit.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/pld/xilinx_bit.h b/src/pld/xilinx_bit.h
index 625a9d3..e30ed23 100644
--- a/src/pld/xilinx_bit.h
+++ b/src/pld/xilinx_bit.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_PLD_XILINX_BIT_H
diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c
index 2e468c7..5038b09 100644
--- a/src/rtos/FreeRTOS.c
+++ b/src/rtos/FreeRTOS.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -83,7 +72,8 @@ static int cortex_m_stacking(struct rtos *rtos, const struct rtos_register_stack
int cm4_fpu_enabled = 0;
struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
if (is_armv7m(armv7m_target)) {
- if (armv7m_target->fp_feature == FPV4_SP) {
+ if ((armv7m_target->fp_feature == FPV4_SP) || (armv7m_target->fp_feature == FPV5_SP) ||
+ (armv7m_target->fp_feature == FPV5_DP)) {
/* Found ARM v7m target which includes a FPU */
uint32_t cpacr;
@@ -280,6 +270,7 @@ enum freertos_symbol_values {
FREERTOS_VAL_X_SUSPENDED_TASK_LIST = 8,
FREERTOS_VAL_UX_CURRENT_NUMBER_OF_TASKS = 9,
FREERTOS_VAL_UX_TOP_USED_PRIORITY = 10,
+ FREERTOS_VAL_X_SCHEDULER_RUNNING = 11,
};
struct symbols {
@@ -299,6 +290,7 @@ static const struct symbols freertos_symbol_list[] = {
{ "xSuspendedTaskList", true }, /* Only if INCLUDE_vTaskSuspend */
{ "uxCurrentNumberOfTasks", false },
{ "uxTopUsedPriority", true }, /* Unavailable since v7.5.3 */
+ { "xSchedulerRunning", false },
{ NULL, false }
};
@@ -529,7 +521,20 @@ static int freertos_update_threads(struct rtos *rtos)
rtos->symbols[FREERTOS_VAL_PX_CURRENT_TCB].address,
pxCurrentTCB);
- if ((thread_list_size == 0) || (pxCurrentTCB == 0)) {
+ /* read scheduler running */
+ uint32_t scheduler_running;
+ retval = target_read_u32(rtos->target,
+ rtos->symbols[FREERTOS_VAL_X_SCHEDULER_RUNNING].address,
+ &scheduler_running);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error reading FreeRTOS scheduler state");
+ return retval;
+ }
+ LOG_DEBUG("FreeRTOS: Read xSchedulerRunning at 0x%" PRIx64 ", value 0x%" PRIx32,
+ rtos->symbols[FREERTOS_VAL_X_SCHEDULER_RUNNING].address,
+ scheduler_running);
+
+ if ((thread_list_size == 0) || (rtos->current_thread == 0) || (scheduler_running != 1)) {
/* Either : No RTOS threads - there is always at least the current execution though */
/* OR : No current thread - all threads suspended - show the current execution
* of idling */
diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index f09ac21..f00d719 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/librtos.la
%C%_librtos_la_SOURCES = \
%D%/rtos.c \
diff --git a/src/rtos/ThreadX.c b/src/rtos/ThreadX.c
index 4161e63..7b76fb6 100644
--- a/src/rtos/ThreadX.c
+++ b/src/rtos/ThreadX.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c
index ef1f34d..8319cc8 100644
--- a/src/rtos/chibios.c
+++ b/src/rtos/chibios.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2012 by Matthias Blaicher *
* Matthias Blaicher - matthias@blaicher.com *
* *
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/chromium-ec.c b/src/rtos/chromium-ec.c
index 95a228d..a95969e 100644
--- a/src/rtos/chromium-ec.c
+++ b/src/rtos/chromium-ec.c
@@ -1,6 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
/*
- * SPDX-License-Identifier: GPL-2.0
- *
* Copyright (c) 2018 National Instruments Corp
* Author: Moritz Fischer <moritz.fischer@ettus.com>
*
diff --git a/src/rtos/eCos.c b/src/rtos/eCos.c
index a81d7b9..3f813ac 100644
--- a/src/rtos/eCos.c
+++ b/src/rtos/eCos.c
@@ -1,17 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/embKernel.c b/src/rtos/embKernel.c
index d70ae37..c1b5723 100644
--- a/src/rtos/embKernel.c
+++ b/src/rtos/embKernel.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index 28f9727..5e60c61 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -1,18 +1,4 @@
-/***************************************************************************
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
+// SPDX-License-Identifier: GPL-2.0-or-later
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/rtos/linux.c b/src/rtos/linux.c
index d147c1c..f9edabc 100644
--- a/src/rtos/linux.c
+++ b/src/rtos/linux.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by STEricsson *
* Heythem Bouhaja heythem.bouhaja@stericsson.com : creation *
* Michel JAOUEN michel.jaouen@stericsson.com : adaptation to rtos *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/linux_header.h b/src/rtos/linux_header.h
index a2b408e..7919964 100644
--- a/src/rtos/linux_header.h
+++ b/src/rtos/linux_header.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
#ifndef OPENOCD_RTOS_LINUX_HEADER_H
#define OPENOCD_RTOS_LINUX_HEADER_H
diff --git a/src/rtos/mqx.c b/src/rtos/mqx.c
index 754470e..8d483ed 100644
--- a/src/rtos/mqx.c
+++ b/src/rtos/mqx.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2014 by Marian Cingel *
* cingel.marian@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index f0b3048..87b28c6 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright 2016,2017 Sony Video & Sound Products Inc. *
* Masatoshi Tateishi - Masatoshi.Tateishi@jp.sony.com *
* Masayuki Ishikawa - Masayuki.Ishikawa@jp.sony.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -114,7 +103,7 @@ static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
{ ARMV7M_R13, 0, 32 }, /* sp */
{ ARMV7M_R14, 0x3c, 32 }, /* lr */
{ ARMV7M_PC, 0x40, 32 }, /* pc */
- { ARMV7M_xPSR, 0x44, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x44, 32 }, /* xPSR */
};
@@ -142,7 +131,7 @@ static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
{ ARMV7M_R13, 0, 32 }, /* sp */
{ ARMV7M_R14, 0x80, 32 }, /* lr */
{ ARMV7M_PC, 0x84, 32 }, /* pc */
- { ARMV7M_xPSR, 0x88, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x88, 32 }, /* xPSR */
};
static const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
diff --git a/src/rtos/nuttx_header.h b/src/rtos/nuttx_header.h
index 00b0484..3436df1 100644
--- a/src/rtos/nuttx_header.h
+++ b/src/rtos/nuttx_header.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright 2016,2017 Sony Video & Sound Products Inc. *
* Masatoshi Tateishi - Masatoshi.Tateishi@jp.sony.com *
* Masayuki Ishikawa - Masayuki.Ishikawa@jp.sony.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_NUTTX_HEADER_H
diff --git a/src/rtos/riot.c b/src/rtos/riot.c
index 8a38742..be5452e 100644
--- a/src/rtos/riot.c
+++ b/src/rtos/riot.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Daniel Krebs *
* Daniel Krebs - github@daniel-krebs.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index b82ecb3..c9da33b 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -148,6 +137,9 @@ int rtos_create(struct jim_getopt_info *goi, struct target *target)
if (e != JIM_OK)
return e;
+ if (strcmp(cp, "none") == 0)
+ return JIM_OK;
+
if (strcmp(cp, "auto") == 0) {
/* Auto detect tries to look up all symbols for each RTOS,
* and runs the RTOS driver's _detect() function when GDB
@@ -167,7 +159,7 @@ int rtos_create(struct jim_getopt_info *goi, struct target *target)
res = Jim_GetResult(goi->interp);
for (x = 0; rtos_types[x]; x++)
Jim_AppendStrings(goi->interp, res, rtos_types[x]->name, ", ", NULL);
- Jim_AppendStrings(goi->interp, res, " or auto", NULL);
+ Jim_AppendStrings(goi->interp, res, ", auto or none", NULL);
return JIM_ERR;
}
@@ -186,35 +178,32 @@ int gdb_thread_packet(struct connection *connection, char const *packet, int pac
return target->rtos->gdb_thread_packet(connection, packet, packet_size);
}
-static struct symbol_table_elem *next_symbol(struct rtos *os, char *cur_symbol, uint64_t cur_addr)
+static struct symbol_table_elem *find_symbol(const struct rtos *os, const char *symbol)
{
struct symbol_table_elem *s;
- if (!os->symbols)
- os->type->get_symbol_list_to_lookup(&os->symbols);
-
- if (!cur_symbol[0])
- return &os->symbols[0];
-
for (s = os->symbols; s->symbol_name; s++)
- if (!strcmp(s->symbol_name, cur_symbol)) {
- s->address = cur_addr;
- s++;
+ if (!strcmp(s->symbol_name, symbol))
return s;
- }
return NULL;
}
-/* searches for 'symbol' in the lookup table for 'os' and returns TRUE,
- * if 'symbol' is not declared optional */
-static bool is_symbol_mandatory(const struct rtos *os, const char *symbol)
+static struct symbol_table_elem *next_symbol(struct rtos *os, char *cur_symbol, uint64_t cur_addr)
{
- for (struct symbol_table_elem *s = os->symbols; s->symbol_name; ++s) {
- if (!strcmp(s->symbol_name, symbol))
- return !s->optional;
- }
- return false;
+ if (!os->symbols)
+ os->type->get_symbol_list_to_lookup(&os->symbols);
+
+ if (!cur_symbol[0])
+ return &os->symbols[0];
+
+ struct symbol_table_elem *s = find_symbol(os, cur_symbol);
+ if (!s)
+ return NULL;
+
+ s->address = cur_addr;
+ s++;
+ return s;
}
/* rtos_qsymbol() processes and replies to all qSymbol packets from GDB.
@@ -234,6 +223,12 @@ static bool is_symbol_mandatory(const struct rtos *os, const char *symbol)
* specified explicitly, then no further symbol lookup is done. When
* auto-detecting, the RTOS driver _detect() function must return success.
*
+ * The symbol is tried twice to handle the -flto case with gcc. The first
+ * attempt uses the symbol as-is, and the second attempt tries the symbol
+ * with ".lto_priv.0" appended to it. We only consider the first static
+ * symbol here from the -flto case. (Each subsequent static symbol with
+ * the same name is exported as .lto_priv.1, .lto_priv.2, etc.)
+ *
* rtos_qsymbol() returns 1 if an RTOS has been detected, or 0 otherwise.
*/
int rtos_qsymbol(struct connection *connection, char const *packet, int packet_size)
@@ -242,7 +237,7 @@ int rtos_qsymbol(struct connection *connection, char const *packet, int packet_s
uint64_t addr = 0;
size_t reply_len;
char reply[GDB_BUFFER_SIZE + 1], cur_sym[GDB_BUFFER_SIZE / 2 + 1] = ""; /* Extra byte for null-termination */
- struct symbol_table_elem *next_sym;
+ struct symbol_table_elem *next_sym = NULL;
struct target *target = get_target_from_connection(connection);
struct rtos *os = target->rtos;
@@ -255,33 +250,60 @@ int rtos_qsymbol(struct connection *connection, char const *packet, int packet_s
size_t len = unhexify((uint8_t *)cur_sym, strchr(packet + 8, ':') + 1, strlen(strchr(packet + 8, ':') + 1));
cur_sym[len] = 0;
+ const char no_suffix[] = "";
+ const char lto_suffix[] = ".lto_priv.0";
+ const size_t lto_suffix_len = strlen(lto_suffix);
+
+ const char *cur_suffix;
+ const char *next_suffix;
+
+ /* Detect what suffix was used during the previous symbol lookup attempt, and
+ * speculatively determine the next suffix (only used for the unknown address case) */
+ if (len > lto_suffix_len && !strcmp(cur_sym + len - lto_suffix_len, lto_suffix)) {
+ /* Trim the suffix from cur_sym for comparison purposes below */
+ cur_sym[len - lto_suffix_len] = '\0';
+ cur_suffix = lto_suffix;
+ next_suffix = NULL;
+ } else {
+ cur_suffix = no_suffix;
+ next_suffix = lto_suffix;
+ }
+
if ((strcmp(packet, "qSymbol::") != 0) && /* GDB is not offering symbol lookup for the first time */
- (!sscanf(packet, "qSymbol:%" SCNx64 ":", &addr)) && /* GDB did not find an address for a symbol */
- is_symbol_mandatory(os, cur_sym)) { /* the symbol is mandatory for this RTOS */
+ (!sscanf(packet, "qSymbol:%" SCNx64 ":", &addr))) { /* GDB did not find an address for a symbol */
/* GDB could not find an address for the previous symbol */
- if (!target->rtos_auto_detect) {
- LOG_WARNING("RTOS %s not detected. (GDB could not find symbol \'%s\')", os->type->name, cur_sym);
- goto done;
- } else {
- /* Autodetecting RTOS - try next RTOS */
- if (!rtos_try_next(target)) {
- LOG_WARNING("No RTOS could be auto-detected!");
+ struct symbol_table_elem *sym = find_symbol(os, cur_sym);
+
+ if (next_suffix) {
+ next_sym = sym;
+ } else if (sym && !sym->optional) { /* the symbol is mandatory for this RTOS */
+ if (!target->rtos_auto_detect) {
+ LOG_WARNING("RTOS %s not detected. (GDB could not find symbol \'%s\')", os->type->name, cur_sym);
goto done;
- }
+ } else {
+ /* Autodetecting RTOS - try next RTOS */
+ if (!rtos_try_next(target)) {
+ LOG_WARNING("No RTOS could be auto-detected!");
+ goto done;
+ }
- /* Next RTOS selected - invalidate current symbol */
- cur_sym[0] = '\x00';
+ /* Next RTOS selected - invalidate current symbol */
+ cur_sym[0] = '\x00';
+ }
}
}
- LOG_DEBUG("RTOS: Address of symbol '%s' is 0x%" PRIx64, cur_sym, addr);
+ LOG_DEBUG("RTOS: Address of symbol '%s%s' is 0x%" PRIx64, cur_sym, cur_suffix, addr);
- next_sym = next_symbol(os, cur_sym, addr);
+ if (!next_sym) {
+ next_sym = next_symbol(os, cur_sym, addr);
+ next_suffix = no_suffix;
+ }
/* Should never happen unless the debugger misbehaves */
if (!next_sym) {
- LOG_WARNING("RTOS: Debugger sent us qSymbol with '%s' that we did not ask for", cur_sym);
+ LOG_WARNING("RTOS: Debugger sent us qSymbol with '%s%s' that we did not ask for", cur_sym, cur_suffix);
goto done;
}
@@ -303,17 +325,26 @@ int rtos_qsymbol(struct connection *connection, char const *packet, int packet_s
}
}
- if (8 + (strlen(next_sym->symbol_name) * 2) + 1 > sizeof(reply)) {
- LOG_ERROR("ERROR: RTOS symbol '%s' name is too long for GDB!", next_sym->symbol_name);
+ assert(next_suffix);
+
+ reply_len = 8; /* snprintf(..., "qSymbol:") */
+ reply_len += 2 * strlen(next_sym->symbol_name); /* hexify(..., next_sym->symbol_name, ...) */
+ reply_len += 2 * strlen(next_suffix); /* hexify(..., next_suffix, ...) */
+ reply_len += 1; /* Terminating NUL */
+ if (reply_len > sizeof(reply)) {
+ LOG_ERROR("ERROR: RTOS symbol '%s%s' name is too long for GDB!", next_sym->symbol_name, next_suffix);
goto done;
}
- LOG_DEBUG("RTOS: Requesting symbol lookup of '%s' from the debugger", next_sym->symbol_name);
+ LOG_DEBUG("RTOS: Requesting symbol lookup of '%s%s' from the debugger", next_sym->symbol_name, next_suffix);
reply_len = snprintf(reply, sizeof(reply), "qSymbol:");
reply_len += hexify(reply + reply_len,
(const uint8_t *)next_sym->symbol_name, strlen(next_sym->symbol_name),
sizeof(reply) - reply_len);
+ reply_len += hexify(reply + reply_len,
+ (const uint8_t *)next_suffix, strlen(next_suffix),
+ sizeof(reply) - reply_len);
done:
gdb_put_packet(connection, reply, reply_len);
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index 745bea7..6695915 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_RTOS_H
diff --git a/src/rtos/rtos_chibios_stackings.c b/src/rtos/rtos_chibios_stackings.c
index 77bcb86..e2fe0a2 100644
--- a/src/rtos/rtos_chibios_stackings.c
+++ b/src/rtos/rtos_chibios_stackings.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2012 by Matthias Blaicher *
* Matthias Blaicher - matthias@blaicher.com *
* *
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -43,7 +32,7 @@ static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets[ARM
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, -1, 32 }, /* lr */
{ ARMV7M_PC, 0x20, 32 }, /* pc */
- { ARMV7M_xPSR, -1, 32 }, /* xPSR */
+ { ARMV7M_XPSR, -1, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking = {
@@ -70,7 +59,7 @@ static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets_w_f
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, -1, 32 }, /* lr */
{ ARMV7M_PC, 0x60, 32 }, /* pc */
- { ARMV7M_xPSR, -1, 32 }, /* xPSR */
+ { ARMV7M_XPSR, -1, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking_w_fpu = {
diff --git a/src/rtos/rtos_chibios_stackings.h b/src/rtos/rtos_chibios_stackings.h
index 130aaa1..23ad44a 100644
--- a/src/rtos/rtos_chibios_stackings.h
+++ b/src/rtos/rtos_chibios_stackings.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_RTOS_CHIBIOS_STACKINGS_H
diff --git a/src/rtos/rtos_ecos_stackings.c b/src/rtos/rtos_ecos_stackings.c
index 4745470..0f54e86 100644
--- a/src/rtos/rtos_ecos_stackings.c
+++ b/src/rtos/rtos_ecos_stackings.c
@@ -1,18 +1,4 @@
-/***************************************************************************
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
+// SPDX-License-Identifier: GPL-2.0-or-later
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -39,7 +25,7 @@ static const struct stack_register_offset rtos_ecos_cortex_m3_stack_offsets[ARMV
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, -1, 32 }, /* lr */
{ ARMV7M_PC, 0x40, 32 }, /* pc */
- { ARMV7M_xPSR, -1, 32 }, /* xPSR */
+ { ARMV7M_XPSR, -1, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_ecos_cortex_m3_stacking = {
diff --git a/src/rtos/rtos_ecos_stackings.h b/src/rtos/rtos_ecos_stackings.h
index d66d05f..0375e2d 100644
--- a/src/rtos/rtos_ecos_stackings.h
+++ b/src/rtos/rtos_ecos_stackings.h
@@ -1,18 +1,4 @@
-/***************************************************************************
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
+/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef OPENOCD_RTOS_RTOS_ECOS_STACKINGS_H
#define OPENOCD_RTOS_RTOS_ECOS_STACKINGS_H
diff --git a/src/rtos/rtos_embkernel_stackings.c b/src/rtos/rtos_embkernel_stackings.c
index df1fc51..809b622 100644
--- a/src/rtos/rtos_embkernel_stackings.c
+++ b/src/rtos/rtos_embkernel_stackings.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -41,7 +30,7 @@ static const struct stack_register_offset rtos_embkernel_cortex_m_stack_offsets[
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x38, 32 }, /* lr */
{ ARMV7M_PC, 0x3c, 32 }, /* pc */
- { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x40, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_embkernel_cortex_m_stacking = {
diff --git a/src/rtos/rtos_embkernel_stackings.h b/src/rtos/rtos_embkernel_stackings.h
index 7850beb..972bce6 100644
--- a/src/rtos/rtos_embkernel_stackings.h
+++ b/src/rtos/rtos_embkernel_stackings.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_RTOS_EMBKERNEL_STACKINGS_H
diff --git a/src/rtos/rtos_mqx_stackings.c b/src/rtos/rtos_mqx_stackings.c
index f99190e..8c8fd20 100644
--- a/src/rtos/rtos_mqx_stackings.c
+++ b/src/rtos/rtos_mqx_stackings.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2014 by Marian Cingel *
* cingel.marian@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -67,7 +56,7 @@ static const struct stack_register_offset rtos_mqx_arm_v7m_stack_offsets[ARMV7M_
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x28, 32 }, /* lr */
{ ARMV7M_PC, 0x44, 32 }, /* pc */
- { ARMV7M_xPSR, 0x48, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x48, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_mqx_arm_v7m_stacking = {
diff --git a/src/rtos/rtos_mqx_stackings.h b/src/rtos/rtos_mqx_stackings.h
index 6ebd287..f86c05a 100644
--- a/src/rtos/rtos_mqx_stackings.h
+++ b/src/rtos/rtos_mqx_stackings.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2014 by Marian Cingel *
* cingel.marian@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_RTOS_MQX_STACKINGS_H
diff --git a/src/rtos/rtos_riot_stackings.c b/src/rtos/rtos_riot_stackings.c
index 84e1f7f..e717e8c 100644
--- a/src/rtos/rtos_riot_stackings.c
+++ b/src/rtos/rtos_riot_stackings.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Daniel Krebs *
* Daniel Krebs - github@daniel-krebs.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -54,7 +43,7 @@ static const struct stack_register_offset rtos_riot_cortex_m0_stack_offsets[ARMV
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x38, 32 }, /* lr */
{ ARMV7M_PC, 0x3c, 32 }, /* pc */
- { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x40, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_riot_cortex_m0_stacking = {
@@ -83,7 +72,7 @@ static const struct stack_register_offset rtos_riot_cortex_m34_stack_offsets[ARM
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x38, 32 }, /* lr */
{ ARMV7M_PC, 0x3c, 32 }, /* pc */
- { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x40, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_riot_cortex_m34_stacking = {
diff --git a/src/rtos/rtos_riot_stackings.h b/src/rtos/rtos_riot_stackings.h
index c5b8f59..3b6c5f4 100644
--- a/src/rtos/rtos_riot_stackings.h
+++ b/src/rtos/rtos_riot_stackings.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by Daniel Krebs *
* Daniel Krebs - github@daniel-krebs.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H
diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c
index d338a47..f2b4e15 100644
--- a/src/rtos/rtos_standard_stackings.c
+++ b/src/rtos/rtos_standard_stackings.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -41,7 +30,7 @@ static const struct stack_register_offset rtos_standard_cortex_m3_stack_offsets[
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x34, 32 }, /* lr */
{ ARMV7M_PC, 0x38, 32 }, /* pc */
- { ARMV7M_xPSR, 0x3c, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x3c, 32 }, /* xPSR */
};
static const struct stack_register_offset rtos_standard_cortex_m4f_stack_offsets[] = {
@@ -61,7 +50,7 @@ static const struct stack_register_offset rtos_standard_cortex_m4f_stack_offsets
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x38, 32 }, /* lr */
{ ARMV7M_PC, 0x3c, 32 }, /* pc */
- { ARMV7M_xPSR, 0x40, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x40, 32 }, /* xPSR */
};
static const struct stack_register_offset rtos_standard_cortex_m4f_fpu_stack_offsets[] = {
@@ -81,7 +70,7 @@ static const struct stack_register_offset rtos_standard_cortex_m4f_fpu_stack_off
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x78, 32 }, /* lr */
{ ARMV7M_PC, 0x7c, 32 }, /* pc */
- { ARMV7M_xPSR, 0x80, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x80, 32 }, /* xPSR */
};
diff --git a/src/rtos/rtos_standard_stackings.h b/src/rtos/rtos_standard_stackings.h
index 71118fd..455acc4 100644
--- a/src/rtos/rtos_standard_stackings.h
+++ b/src/rtos/rtos_standard_stackings.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_RTOS_STANDARD_STACKINGS_H
diff --git a/src/rtos/rtos_ucos_iii_stackings.c b/src/rtos/rtos_ucos_iii_stackings.c
index 0d533b5..9ba5288 100644
--- a/src/rtos/rtos_ucos_iii_stackings.c
+++ b/src/rtos/rtos_ucos_iii_stackings.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -43,7 +32,7 @@ static const struct stack_register_offset rtos_ucos_iii_cortex_m_stack_offsets[]
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x34, 32 }, /* lr */
{ ARMV7M_PC, 0x38, 32 }, /* pc */
- { ARMV7M_xPSR, 0x3c, 32 }, /* xPSR */
+ { ARMV7M_XPSR, 0x3c, 32 }, /* xPSR */
};
static const struct stack_register_offset rtos_ucos_iii_esi_risc_stack_offsets[] = {
diff --git a/src/rtos/rtos_ucos_iii_stackings.h b/src/rtos/rtos_ucos_iii_stackings.h
index f2f120f..831c68e 100644
--- a/src/rtos/rtos_ucos_iii_stackings.h
+++ b/src/rtos/rtos_ucos_iii_stackings.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2017 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_RTOS_RTOS_UCOS_III_STACKINGS_H
diff --git a/src/rtos/uCOS-III.c b/src/rtos/uCOS-III.c
index 385c8d8..21be8ff 100644
--- a/src/rtos/uCOS-III.c
+++ b/src/rtos/uCOS-III.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
index 7f3325f..b00b4b3 100644
--- a/src/rtos/zephyr.c
+++ b/src/rtos/zephyr.c
@@ -1,11 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2017 by Intel Corporation
* Leandro Pereira <leandro.pereira@intel.com>
* Daniel Glöckner <dg@emlix.com>*
* Copyright (C) 2021 by Synopsys, Inc.
* Evgeniy Didin <didin@synopsys.com>
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -136,7 +136,7 @@ static const struct stack_register_offset arm_cpu_saved[] = {
{ ARMV7M_R13, -2, 32 },
{ ARMV7M_R14, 20, 32 },
{ ARMV7M_PC, 24, 32 },
- { ARMV7M_xPSR, 28, 32 },
+ { ARMV7M_XPSR, 28, 32 },
};
static struct stack_register_offset arc_cpu_saved[] = {
diff --git a/src/rtt/Makefile.am b/src/rtt/Makefile.am
index e3fcefd..9968554 100644
--- a/src/rtt/Makefile.am
+++ b/src/rtt/Makefile.am
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/librtt.la
%C%_librtt_la_SOURCES = %D%/rtt.c %D%/rtt.h %D%/tcl.c
diff --git a/src/rtt/rtt.c b/src/rtt/rtt.c
index 3da3cce..e31e754 100644
--- a/src/rtt/rtt.c
+++ b/src/rtt/rtt.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2016-2020 by Marc Schink <dev@zapb.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/rtt/rtt.h b/src/rtt/rtt.h
index bc21bd0..a5630a9 100644
--- a/src/rtt/rtt.h
+++ b/src/rtt/rtt.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2016-2020 by Marc Schink <dev@zapb.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_RTT_RTT_H
diff --git a/src/rtt/tcl.c b/src/rtt/tcl.c
index 4a34d8b..7cbdccf 100644
--- a/src/rtt/tcl.c
+++ b/src/rtt/tcl.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2019-2020 by Marc Schink <dev@zapb.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/server/Makefile.am b/src/server/Makefile.am
index e3699f1..13a5914 100644
--- a/src/server/Makefile.am
+++ b/src/server/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libserver.la
%C%_libserver_la_SOURCES = \
%D%/server.c \
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index e5bf74f..487be6c 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -19,19 +21,6 @@
* *
* Copyright (C) 2013 Franck Jullien *
* elec4fun@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -1362,6 +1351,8 @@ static int gdb_set_registers_packet(struct connection *connection,
packet_p = packet;
for (i = 0; i < reg_list_size; i++) {
uint8_t *bin_buf;
+ if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden)
+ continue;
int chars = (DIV_ROUND_UP(reg_list[i]->size, 8) * 2);
if (packet_p + chars > packet + packet_size)
@@ -1414,9 +1405,10 @@ static int gdb_get_register_packet(struct connection *connection,
if (retval != ERROR_OK)
return gdb_error(connection, retval);
- if (reg_list_size <= reg_num) {
+ if ((reg_list_size <= reg_num) || !reg_list[reg_num] ||
+ !reg_list[reg_num]->exist || reg_list[reg_num]->hidden) {
LOG_ERROR("gdb requested a non-existing register (reg_num=%d)", reg_num);
- return ERROR_SERVER_REMOTE_CLOSED;
+ return gdb_error(connection, ERROR_FAIL);
}
if (!reg_list[reg_num]->valid) {
@@ -1476,7 +1468,8 @@ static int gdb_set_register_packet(struct connection *connection,
return gdb_error(connection, retval);
}
- if (reg_list_size <= reg_num) {
+ if ((reg_list_size <= reg_num) || !reg_list[reg_num] ||
+ !reg_list[reg_num]->exist || reg_list[reg_num]->hidden) {
LOG_ERROR("gdb requested a non-existing register (reg_num=%d)", reg_num);
free(bin_buf);
free(reg_list);
@@ -1814,8 +1807,11 @@ static int gdb_breakpoint_watchpoint_packet(struct connection *connection,
if (!bp_target)
return ERROR_FAIL;
}
- retval = breakpoint_add(bp_target, address, size, bp_type);
- if (retval != ERROR_OK) {
+ retval = breakpoint_add(target, address, size, bp_type);
+ if (retval == ERROR_NOT_IMPLEMENTED) {
+ /* Send empty reply to report that breakpoints of this type are not supported */
+ gdb_put_packet(connection, "", 0);
+ } else if (retval != ERROR_OK) {
retval = gdb_error(connection, retval);
if (retval != ERROR_OK)
return retval;
@@ -1832,7 +1828,10 @@ static int gdb_breakpoint_watchpoint_packet(struct connection *connection,
{
if (packet[0] == 'Z') {
retval = watchpoint_add(target, address, size, wp_type, 0, 0xffffffffu);
- if (retval != ERROR_OK) {
+ if (retval == ERROR_NOT_IMPLEMENTED) {
+ /* Send empty reply to report that watchpoints of this type are not supported */
+ gdb_put_packet(connection, "", 0);
+ } else if (retval != ERROR_OK) {
retval = gdb_error(connection, retval);
if (retval != ERROR_OK)
return retval;
@@ -3002,6 +3001,11 @@ static int gdb_query_packet(struct connection *connection,
gdb_connection->noack_mode = 1;
gdb_put_packet(connection, "OK", 2);
return ERROR_OK;
+ } else if (target->type->gdb_query_custom) {
+ char *buffer = NULL;
+ int ret = target->type->gdb_query_custom(target, packet, &buffer);
+ gdb_put_packet(connection, buffer, strlen(buffer));
+ return ret;
}
gdb_put_packet(connection, "", 0);
@@ -3062,139 +3066,138 @@ static bool gdb_handle_vcont_packet(struct connection *connection, const char *p
gdb_running_type = 's';
bool fake_step = false;
- if (strncmp(parse, "s:", 2) == 0) {
- struct target *ct = target;
- int current_pc = 1;
- int64_t thread_id;
+ struct target *ct = target;
+ int current_pc = 1;
+ int64_t thread_id;
+ parse++;
+ packet_size--;
+ if (parse[0] == ':') {
char *endp;
-
- parse += 2;
- packet_size -= 2;
-
+ parse++;
+ packet_size--;
thread_id = strtoll(parse, &endp, 16);
if (endp) {
packet_size -= endp - parse;
parse = endp;
}
+ } else {
+ thread_id = 0;
+ }
- if (target->rtos) {
- /* FIXME: why is this necessary? rtos state should be up-to-date here already! */
-
- /* Sometimes this results in picking a different thread than
- * gdb just requested to step. Then we fake it, and now there's
- * a different thread selected than gdb expects, so register
- * accesses go to the wrong one!
- * E.g.:
- * Hg1$
- * P8=72101ce197869329$ # write r8 on thread 1
- * g$
- * vCont?$
- * vCont;s:1;c$ # rtos_update_threads changes to other thread
- * g$
- * qXfer:threads:read::0,fff$
- * P8=cc060607eb89ca7f$ # write r8 on other thread
- * g$
- * */
- /* rtos_update_threads(target); */
-
- target->rtos->gdb_target_for_threadid(connection, thread_id, &ct);
-
- /*
- * check if the thread to be stepped is the current rtos thread
- * if not, we must fake the step
- */
- fake_step = rtos_needs_fake_step(target, thread_id);
- }
+ if (target->rtos) {
+ /* FIXME: why is this necessary? rtos state should be up-to-date here already! */
+
+ /* Sometimes this results in picking a different thread than
+ * gdb just requested to step. Then we fake it, and now there's
+ * a different thread selected than gdb expects, so register
+ * accesses go to the wrong one!
+ * E.g.:
+ * Hg1$
+ * P8=72101ce197869329$ # write r8 on thread 1
+ * g$
+ * vCont?$
+ * vCont;s:1;c$ # rtos_update_threads changes to other thread
+ * g$
+ * qXfer:threads:read::0,fff$
+ * P8=cc060607eb89ca7f$ # write r8 on other thread
+ * g$
+ * */
+ /* rtos_update_threads(target); */
+
+ target->rtos->gdb_target_for_threadid(connection, thread_id, &ct);
+
+ /*
+ * check if the thread to be stepped is the current rtos thread
+ * if not, we must fake the step
+ */
+ fake_step = rtos_needs_fake_step(target, thread_id);
+ }
- if (parse[0] == ';') {
- ++parse;
- --packet_size;
+ if (parse[0] == ';') {
+ ++parse;
+ --packet_size;
- if (parse[0] == 'c') {
+ if (parse[0] == 'c') {
+ parse += 1;
+
+ /* check if thread-id follows */
+ if (parse[0] == ':') {
+ int64_t tid;
parse += 1;
- /* check if thread-id follows */
- if (parse[0] == ':') {
- int64_t tid;
- parse += 1;
-
- tid = strtoll(parse, &endp, 16);
- if (tid == thread_id) {
- /*
- * Special case: only step a single thread (core),
- * keep the other threads halted. Currently, only
- * aarch64 target understands it. Other target types don't
- * care (nobody checks the actual value of 'current')
- * and it doesn't really matter. This deserves
- * a symbolic constant and a formal interface documentation
- * at a later time.
- */
- LOG_DEBUG("request to step current core only");
- /* uncomment after checking that indeed other targets are safe */
- /*current_pc = 2;*/
- }
+ tid = strtoll(parse, NULL, 16);
+ if (tid == thread_id) {
+ /*
+ * Special case: only step a single thread (core),
+ * keep the other threads halted. Currently, only
+ * aarch64 target understands it. Other target types don't
+ * care (nobody checks the actual value of 'current')
+ * and it doesn't really matter. This deserves
+ * a symbolic constant and a formal interface documentation
+ * at a later time.
+ */
+ LOG_DEBUG("request to step current core only");
+ /* uncomment after checking that indeed other targets are safe */
+ /*current_pc = 2;*/
}
}
}
+ }
- LOG_DEBUG("target %s single-step thread %"PRIx64, target_name(ct), thread_id);
- gdb_connection->output_flag = GDB_OUTPUT_ALL;
- target_call_event_callbacks(ct, TARGET_EVENT_GDB_START);
-
- if (fake_step) {
- /* We just fake the step to not trigger an internal error in
- * gdb. See https://sourceware.org/bugzilla/show_bug.cgi?id=22925
- * for details. */
- int sig_reply_len;
- char sig_reply[128];
-
- LOG_DEBUG("fake step thread %"PRIx64, thread_id);
- target->rtos->current_threadid = thread_id;
+ LOG_DEBUG("target %s single-step thread %"PRIx64, target_name(ct), thread_id);
+ gdb_connection->output_flag = GDB_OUTPUT_ALL;
+ target_call_event_callbacks(ct, TARGET_EVENT_GDB_START);
- sig_reply_len = snprintf(sig_reply, sizeof(sig_reply),
- "T05thread:%016"PRIx64";", thread_id);
+ if (fake_step) {
+ /* We just fake the step to not trigger an internal error in
+ * gdb. See https://sourceware.org/bugzilla/show_bug.cgi?id=22925
+ * for details. */
+ int sig_reply_len;
+ char sig_reply[128];
- gdb_put_packet(connection, sig_reply, sig_reply_len);
- gdb_connection->output_flag = GDB_OUTPUT_NO;
+ LOG_DEBUG("fake step thread %"PRIx64, thread_id);
+ target->rtos->current_threadid = thread_id;
- return true;
- }
+ sig_reply_len = snprintf(sig_reply, sizeof(sig_reply),
+ "T05thread:%016"PRIx64";", thread_id);
- /* support for gdb_sync command */
- if (gdb_connection->sync) {
- gdb_connection->sync = false;
- if (ct->state == TARGET_HALTED) {
- LOG_DEBUG("stepi ignored. GDB will now fetch the register state "
- "from the target.");
- gdb_sig_halted(connection);
- gdb_connection->output_flag = GDB_OUTPUT_NO;
- } else
- gdb_connection->frontend_state = TARGET_RUNNING;
- return true;
- }
+ gdb_put_packet(connection, sig_reply, sig_reply_len);
+ gdb_connection->output_flag = GDB_OUTPUT_NO;
- retval = target_step(ct, current_pc, 0, 0);
- if (retval == ERROR_TARGET_NOT_HALTED)
- LOG_INFO("target %s was not halted when step was requested", target_name(ct));
+ return true;
+ }
- /* if step was successful send a reply back to gdb */
- if (retval == ERROR_OK) {
- retval = target_poll(ct);
- if (retval != ERROR_OK)
- LOG_DEBUG("error polling target %s after successful step", target_name(ct));
- /* send back signal information */
- gdb_signal_reply(ct, connection);
- /* stop forwarding log packets! */
+ /* support for gdb_sync command */
+ if (gdb_connection->sync) {
+ gdb_connection->sync = false;
+ if (ct->state == TARGET_HALTED) {
+ LOG_DEBUG("stepi ignored. GDB will now fetch the register state "
+ "from the target.");
+ gdb_sig_halted(connection);
gdb_connection->output_flag = GDB_OUTPUT_NO;
} else
gdb_connection->frontend_state = TARGET_RUNNING;
- } else {
- LOG_ERROR("Unknown vCont packet");
- return false;
+ return true;
}
+
+ retval = target_step(ct, current_pc, 0, 0);
+ if (retval == ERROR_TARGET_NOT_HALTED)
+ LOG_INFO("target %s was not halted when step was requested", target_name(ct));
+
+ /* if step was successful send a reply back to gdb */
+ if (retval == ERROR_OK) {
+ retval = target_poll(ct);
+ if (retval != ERROR_OK)
+ LOG_DEBUG("error polling target %s after successful step", target_name(ct));
+ /* send back signal information */
+ gdb_signal_reply(ct, connection);
+ /* stop forwarding log packets! */
+ gdb_connection->output_flag = GDB_OUTPUT_NO;
+ } else
+ gdb_connection->frontend_state = TARGET_RUNNING;
return true;
}
-
+ LOG_ERROR("Unknown vCont packet");
return false;
}
diff --git a/src/server/gdb_server.h b/src/server/gdb_server.h
index 0c50836..6821e36 100644
--- a/src/server/gdb_server.h
+++ b/src/server/gdb_server.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2011 by Broadcom Corporation *
* Evan Hunter - ehunter@broadcom.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_SERVER_GDB_SERVER_H
diff --git a/src/server/ipdbg.c b/src/server/ipdbg.c
index 3bbcf07..f4a6f6c 100644
--- a/src/server/ipdbg.c
+++ b/src/server/ipdbg.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/* Copyright (C) 2020 by Daniel Anselmi <danselmi@gmx.ch> */
#ifdef HAVE_CONFIG_H
diff --git a/src/server/rtt_server.c b/src/server/rtt_server.c
index 3850c26..df2247b 100644
--- a/src/server/rtt_server.c
+++ b/src/server/rtt_server.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2016-2017 by Marc Schink <dev@zapb.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/server/rtt_server.h b/src/server/rtt_server.h
index aec6f22..5cea25a 100644
--- a/src/server/rtt_server.h
+++ b/src/server/rtt_server.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2016-2017 by Marc Schink <dev@zapb.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_SERVER_RTT_SERVER_H
diff --git a/src/server/server.c b/src/server/server.c
index 082febb..4da31ae 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -484,7 +473,7 @@ int server_loop(struct command_context *command_context)
tv.tv_usec = 0;
retval = socket_select(fd_max + 1, &read_fds, NULL, NULL, &tv);
} else {
- /* Every 100ms, can be changed with "poll_period" command */
+ /* Timeout socket_select() when a target timer expires or every polling_period */
int timeout_ms = next_event - timeval_ms();
if (timeout_ms < 0)
timeout_ms = 0;
@@ -519,9 +508,12 @@ int server_loop(struct command_context *command_context)
}
if (retval == 0) {
- /* We only execute these callbacks when there was nothing to do or we timed
- *out */
- target_call_timer_callbacks_now();
+ /* Execute callbacks of expired timers when
+ * - there was nothing to do if poll_ok was true
+ * - socket_select() timed out if poll_ok was false, now one or more
+ * timers expired or the polling period elapsed
+ */
+ target_call_timer_callbacks();
next_event = target_timer_next_event();
process_jim_events(command_context);
@@ -756,6 +748,11 @@ int connection_read(struct connection *connection, void *data, int len)
return read(connection->fd, data, len);
}
+bool openocd_is_shutdown_pending(void)
+{
+ return shutdown_openocd != CONTINUE_MAIN_LOOP;
+}
+
/* tell the server we want to shut down */
COMMAND_HANDLER(handle_shutdown_command)
{
diff --git a/src/server/server.h b/src/server/server.h
index a6b1963..c9d4698 100644
--- a/src/server/server.h
+++ b/src/server/server.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_SERVER_SERVER_H
@@ -115,6 +104,8 @@ int server_register_commands(struct command_context *context);
int connection_write(struct connection *connection, const void *data, int len);
int connection_read(struct connection *connection, void *data, int len);
+bool openocd_is_shutdown_pending(void);
+
/**
* Defines an extended command handler function declaration to enable
* access to (and manipulation of) the server port number.
diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index 447b57c..1d30b1d 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Defines basic Tcl procs for OpenOCD server modules
# Handle GDB 'R' packet. Can be overridden by configuration script,
diff --git a/src/server/tcl_server.c b/src/server/tcl_server.c
index 458d7ea..16cbedc 100644
--- a/src/server/tcl_server.c
+++ b/src/server/tcl_server.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/server/tcl_server.h b/src/server/tcl_server.h
index 6ce3ab9..bee562c 100644
--- a/src/server/tcl_server.h
+++ b/src/server/tcl_server.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_SERVER_TCL_SERVER_H
diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index 8e79626..938bc5b 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/server/telnet_server.h b/src/server/telnet_server.h
index 27148d7..313b529 100644
--- a/src/server/telnet_server.h
+++ b/src/server/telnet_server.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_SERVER_TELNET_SERVER_H
diff --git a/src/svf/Makefile.am b/src/svf/Makefile.am
index 5603d53..5fcb02c 100644
--- a/src/svf/Makefile.am
+++ b/src/svf/Makefile.am
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libsvf.la
%C%_libsvf_la_SOURCES = %D%/svf.c %D%/svf.h
diff --git a/src/svf/svf.c b/src/svf/svf.c
index 3021dcb..a537431 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Simon Qian *
* SimonQian@SimonQian.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* The specification for SVF is available here:
diff --git a/src/svf/svf.h b/src/svf/svf.h
index 4101a3f..74f7d9c 100644
--- a/src/svf/svf.h
+++ b/src/svf/svf.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Simon Qian *
* SimonQian@SimonQian.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_SVF_SVF_H
diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 799c3dd..4687092 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
%C%_libtarget_la_LIBADD = %D%/openrisc/libopenrisc.la \
%D%/riscv/libriscv.la \
%D%/xtensa/libxtensa.la \
diff --git a/src/target/a64_disassembler.c b/src/target/a64_disassembler.c
index 58ddf60..ca3d3ea 100644
--- a/src/target/a64_disassembler.c
+++ b/src/target/a64_disassembler.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2019 by Mete Balci *
* metebalci@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/a64_disassembler.h b/src/target/a64_disassembler.h
index 5c58bbf..28fcf4b 100644
--- a/src/target/a64_disassembler.h
+++ b/src/target/a64_disassembler.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2019 by Mete Balci *
* metebalci@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_AARCH64_DISASSEMBLER_H
diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index ecd9324..8592daa 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -1,20 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by David Ung *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -1849,7 +1837,7 @@ static int aarch64_remove_watchpoint(struct target *target,
* find out which watchpoint hits
* get exception address and compare the address to watchpoints
*/
-int aarch64_hit_watchpoint(struct target *target,
+static int aarch64_hit_watchpoint(struct target *target,
struct watchpoint **hit_watchpoint)
{
if (target->debug_reason != DBG_REASON_WATCHPOINT)
@@ -1942,7 +1930,7 @@ static int aarch64_assert_reset(struct target *target)
else if (reset_config & RESET_HAS_SRST) {
bool srst_asserted = false;
- if (target->reset_halt) {
+ if (target->reset_halt && !(reset_config & RESET_SRST_PULLS_TRST)) {
if (target_was_examined(target)) {
if (reset_config & RESET_SRST_NO_GATING) {
@@ -1952,12 +1940,12 @@ static int aarch64_assert_reset(struct target *target)
*/
adapter_assert_reset();
srst_asserted = true;
-
- /* make sure to clear all sticky errors */
- mem_ap_write_atomic_u32(armv8->debug_ap,
- armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
}
+ /* make sure to clear all sticky errors */
+ mem_ap_write_atomic_u32(armv8->debug_ap,
+ armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
+
/* set up Reset Catch debug event to halt the CPU after reset */
retval = aarch64_enable_reset_catch(target, true);
if (retval != ERROR_OK)
@@ -2558,15 +2546,24 @@ static int aarch64_examine_first(struct target *target)
if (!pc)
return ERROR_FAIL;
+ if (armv8->debug_ap) {
+ dap_put_ap(armv8->debug_ap);
+ armv8->debug_ap = NULL;
+ }
+
if (pc->adiv5_config.ap_num == DP_APSEL_INVALID) {
/* Search for the APB-AB */
- retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv8->debug_ap);
+ retval = dap_find_get_ap(swjdp, AP_TYPE_APB_AP, &armv8->debug_ap);
if (retval != ERROR_OK) {
LOG_ERROR("Could not find APB-AP for debug access");
return retval;
}
} else {
- armv8->debug_ap = dap_ap(swjdp, pc->adiv5_config.ap_num);
+ armv8->debug_ap = dap_get_ap(swjdp, pc->adiv5_config.ap_num);
+ if (!armv8->debug_ap) {
+ LOG_ERROR("Cannot get AP");
+ return ERROR_FAIL;
+ }
}
retval = mem_ap_init(armv8->debug_ap);
@@ -2755,6 +2752,9 @@ static void aarch64_deinit_target(struct target *target)
struct armv8_common *armv8 = &aarch64->armv8_common;
struct arm_dpm *dpm = &armv8->dpm;
+ if (armv8->debug_ap)
+ dap_put_ap(armv8->debug_ap);
+
armv8_free_reg_cache(target);
free(aarch64->brp_list);
free(dpm->dbp);
@@ -3144,8 +3144,6 @@ static const struct command_registration aarch64_exec_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-extern const struct command_registration semihosting_common_handlers[];
-
static const struct command_registration aarch64_command_handlers[] = {
{
.name = "arm",
diff --git a/src/target/aarch64.h b/src/target/aarch64.h
index b57361f..2721fe7 100644
--- a/src/target/aarch64.h
+++ b/src/target/aarch64.h
@@ -1,19 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by David Ung *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
***************************************************************************/
#ifndef OPENOCD_TARGET_AARCH64_H
@@ -21,7 +9,7 @@
#include "armv8.h"
-#define AARCH64_COMMON_MAGIC 0x411fc082
+#define AARCH64_COMMON_MAGIC 0x41413634U
#define CPUDBG_CPUID 0xD00
#define CPUDBG_CTYPR 0xD04
@@ -50,7 +38,9 @@ struct aarch64_brp {
};
struct aarch64_common {
- int common_magic;
+ unsigned int common_magic;
+
+ struct armv8_common armv8_common;
/* Context information */
uint32_t system_control_reg;
@@ -67,8 +57,6 @@ struct aarch64_common {
int wp_num_available;
struct aarch64_brp *wp_list;
- struct armv8_common armv8_common;
-
enum aarch64_isrmasking_mode isrmasking_mode;
};
diff --git a/src/target/adi_v5_dapdirect.c b/src/target/adi_v5_dapdirect.c
index c0deee1..e1c00b7 100644
--- a/src/target/adi_v5_dapdirect.c
+++ b/src/target/adi_v5_dapdirect.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2019, STMicroelectronics - All Rights Reserved
* Author(s): Antonio Borneo <borneo.antonio@gmail.com> for STMicroelectronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
index 94ee8cf..eeb796b 100644
--- a/src/target/adi_v5_jtag.c
+++ b/src/target/adi_v5_jtag.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin
* lundin@mlu.mine.nu
@@ -10,24 +12,13 @@
*
* Copyright (C) 2009-2010 by David Brownell
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ * Copyright (C) 2020-2021, Ampere Computing LLC *
***************************************************************************/
/**
* @file
* This file implements JTAG transport support for cores implementing
- the ARM Debug Interface version 5 (ADIv5).
+ the ARM Debug Interface version 5 (ADIv5) and version 6 (ADIv6).
*/
#ifdef HAVE_CONFIG_H
@@ -49,13 +40,15 @@
#define JTAG_DP_IDCODE 0xFE
/* three-bit ACK values for DPACC and APACC reads */
-#define JTAG_ACK_OK_FAULT 0x2
-#define JTAG_ACK_WAIT 0x1
+#define JTAG_ACK_WAIT 0x1 /* ADIv5 and ADIv6 */
+#define JTAG_ACK_OK_FAULT 0x2 /* ADIv5 */
+#define JTAG_ACK_FAULT 0x2 /* ADIv6 */
+#define JTAG_ACK_OK 0x4 /* ADIV6 */
static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack);
#ifdef DEBUG_WAIT
-static const char *dap_reg_name(int instr, int reg_addr)
+static const char *dap_reg_name(struct adiv5_dap *dap, uint8_t instr, uint16_t reg_addr)
{
char *reg_name = "UNK";
@@ -83,41 +76,32 @@ static const char *dap_reg_name(int instr, int reg_addr)
}
if (instr == JTAG_DP_APACC) {
- switch (reg_addr) {
- case MEM_AP_REG_CSW:
+ if (reg_addr == MEM_AP_REG_CSW(dap))
reg_name = "CSW";
- break;
- case MEM_AP_REG_TAR:
+ else if (reg_addr == MEM_AP_REG_TAR(dap))
reg_name = "TAR";
- break;
- case MEM_AP_REG_DRW:
+ else if (reg_addr == MEM_AP_REG_TAR64(dap))
+ reg_name = "TAR64";
+ else if (reg_addr == MEM_AP_REG_DRW(dap))
reg_name = "DRW";
- break;
- case MEM_AP_REG_BD0:
+ else if (reg_addr == MEM_AP_REG_BD0(dap))
reg_name = "BD0";
- break;
- case MEM_AP_REG_BD1:
+ else if (reg_addr == MEM_AP_REG_BD1(dap))
reg_name = "BD1";
- break;
- case MEM_AP_REG_BD2:
+ else if (reg_addr == MEM_AP_REG_BD2(dap))
reg_name = "BD2";
- break;
- case MEM_AP_REG_BD3:
+ else if (reg_addr == MEM_AP_REG_BD3(dap))
reg_name = "BD3";
- break;
- case MEM_AP_REG_CFG:
+ else if (reg_addr == MEM_AP_REG_CFG(dap))
reg_name = "CFG";
- break;
- case MEM_AP_REG_BASE:
+ else if (reg_addr == MEM_AP_REG_BASE(dap))
reg_name = "BASE";
- break;
- case AP_REG_IDR:
+ else if (reg_addr == MEM_AP_REG_BASE64(dap))
+ reg_name = "BASE64";
+ else if (reg_addr == AP_REG_IDR(dap))
reg_name = "IDR";
- break;
- default:
+ else
reg_name = "UNK";
- break;
- }
}
return reg_name;
@@ -127,12 +111,12 @@ static const char *dap_reg_name(int instr, int reg_addr)
struct dap_cmd {
struct list_head lh;
uint8_t instr;
- uint8_t reg_addr;
+ uint16_t reg_addr;
uint8_t rnw;
uint8_t *invalue;
uint8_t ack;
uint32_t memaccess_tck;
- uint32_t dp_select;
+ uint64_t dp_select;
struct scan_field fields[2];
uint8_t out_addr_buf;
@@ -147,17 +131,38 @@ struct dap_cmd_pool {
struct dap_cmd cmd;
};
-static void log_dap_cmd(const char *header, struct dap_cmd *el)
+static void log_dap_cmd(struct adiv5_dap *dap, const char *header, struct dap_cmd *el)
{
#ifdef DEBUG_WAIT
+ const char *ack;
+ switch (el->ack) {
+ case JTAG_ACK_WAIT: /* ADIv5 and ADIv6 */
+ ack = "WAIT";
+ break;
+ case JTAG_ACK_OK_FAULT: /* ADIv5, same value as JTAG_ACK_FAULT */
+ /* case JTAG_ACK_FAULT: */ /* ADIv6 */
+ if (is_adiv6(dap))
+ ack = "FAULT";
+ else
+ ack = "OK";
+ break;
+ case JTAG_ACK_OK: /* ADIv6 */
+ if (is_adiv6(dap)) {
+ ack = "OK";
+ break;
+ }
+ /* fall-through */
+ default:
+ ack = "INVAL";
+ break;
+ }
LOG_DEBUG("%s: %2s %6s %5s 0x%08x 0x%08x %2s", header,
el->instr == JTAG_DP_APACC ? "AP" : "DP",
- dap_reg_name(el->instr, el->reg_addr),
+ dap_reg_name(dap, el->instr, el->reg_addr),
el->rnw == DPAP_READ ? "READ" : "WRITE",
buf_get_u32(el->outvalue_buf, 0, 32),
buf_get_u32(el->invalue, 0, 32),
- el->ack == JTAG_ACK_OK_FAULT ? "OK" :
- (el->ack == JTAG_ACK_WAIT ? "WAIT" : "INVAL"));
+ ack);
#endif
}
@@ -170,7 +175,7 @@ static int jtag_limit_queue_size(struct adiv5_dap *dap)
}
static struct dap_cmd *dap_cmd_new(struct adiv5_dap *dap, uint8_t instr,
- uint8_t reg_addr, uint8_t rnw,
+ uint16_t reg_addr, uint8_t rnw,
uint8_t *outvalue, uint8_t *invalue,
uint32_t memaccess_tck)
{
@@ -268,17 +273,14 @@ static int adi_jtag_dp_scan_cmd(struct adiv5_dap *dap, struct dap_cmd *cmd, uint
jtag_add_dr_scan(tap, 2, cmd->fields, TAP_IDLE);
- /* Add specified number of tck clocks after starting memory bus
- * access, giving the hardware time to complete the access.
+ /* Add specified number of tck clocks after starting AP register
+ * access or memory bus access, giving the hardware time to complete
+ * the access.
* They provide more time for the (MEM) AP to complete the read ...
- * See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
+ * See "Minimum Response Time" for JTAG-DP, in the ADIv5/ADIv6 spec.
*/
- if (cmd->instr == JTAG_DP_APACC) {
- if (((cmd->reg_addr == MEM_AP_REG_DRW)
- || ((cmd->reg_addr & 0xF0) == MEM_AP_REG_BD0))
- && (cmd->memaccess_tck != 0))
- jtag_add_runtest(cmd->memaccess_tck, TAP_IDLE);
- }
+ if (cmd->instr == JTAG_DP_APACC && cmd->memaccess_tck != 0)
+ jtag_add_runtest(cmd->memaccess_tck, TAP_IDLE);
return ERROR_OK;
}
@@ -296,7 +298,7 @@ static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd,
/**
* Scan DPACC or APACC using target ordered uint8_t buffers. No endianness
- * conversions are performed. See section 4.4.3 of the ADIv5 spec, which
+ * conversions are performed. See section 4.4.3 of the ADIv5/ADIv6 spec, which
* discusses operations which access these registers.
*
* Note that only one scan is performed. If rnw is set, a separate scan
@@ -315,7 +317,7 @@ static int adi_jtag_dp_scan_cmd_sync(struct adiv5_dap *dap, struct dap_cmd *cmd,
*/
static int adi_jtag_dp_scan(struct adiv5_dap *dap,
- uint8_t instr, uint8_t reg_addr, uint8_t rnw,
+ uint8_t instr, uint16_t reg_addr, uint8_t rnw,
uint8_t *outvalue, uint8_t *invalue,
uint32_t memaccess_tck, uint8_t *ack)
{
@@ -342,13 +344,27 @@ static int adi_jtag_dp_scan(struct adiv5_dap *dap,
* must be different).
*/
static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap,
- uint8_t instr, uint8_t reg_addr, uint8_t rnw,
+ uint8_t instr, uint16_t reg_addr, uint8_t rnw,
uint32_t outvalue, uint32_t *invalue,
uint32_t memaccess_tck, uint8_t *ack)
{
uint8_t out_value_buf[4];
int retval;
-
+ uint64_t sel = (reg_addr >> 4) & 0xf;
+
+ /* No need to change SELECT or RDBUFF as they are not banked */
+ if (instr == JTAG_DP_DPACC && reg_addr != DP_SELECT && reg_addr != DP_RDBUFF &&
+ sel != (dap->select & 0xf)) {
+ if (dap->select != DP_SELECT_INVALID)
+ sel |= dap->select & ~0xfull;
+ dap->select = sel;
+ LOG_DEBUG("DP BANKSEL: %x", (uint32_t)sel);
+ buf_set_u32(out_value_buf, 0, 32, (uint32_t)sel);
+ retval = adi_jtag_dp_scan(dap, JTAG_DP_DPACC,
+ DP_SELECT, DPAP_WRITE, out_value_buf, NULL, 0, NULL);
+ if (retval != ERROR_OK)
+ return retval;
+ }
buf_set_u32(out_value_buf, 0, 32, outvalue);
retval = adi_jtag_dp_scan(dap, instr, reg_addr, rnw,
@@ -377,7 +393,7 @@ static int adi_jtag_finish_read(struct adiv5_dap *dap)
}
static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap,
- uint8_t instr, uint8_t reg_addr, uint8_t rnw,
+ uint8_t instr, uint16_t reg_addr, uint8_t rnw,
uint32_t outvalue, uint32_t *invalue, uint32_t memaccess_tck)
{
int retval;
@@ -416,14 +432,19 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
/* skip all completed transactions up to the first WAIT */
list_for_each_entry(el, &dap->cmd_journal, lh) {
- if (el->ack == JTAG_ACK_OK_FAULT) {
- log_dap_cmd("LOG", el);
+ /*
+ * JTAG_ACK_OK_FAULT (ADIv5) and JTAG_ACK_FAULT (ADIv6) are equal so
+ * the following statement is checking to see if an acknowledgment of
+ * OK or FAULT is generated for ADIv5 or ADIv6
+ */
+ if (el->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && el->ack == JTAG_ACK_OK)) {
+ log_dap_cmd(dap, "LOG", el);
} else if (el->ack == JTAG_ACK_WAIT) {
found_wait = 1;
break;
} else {
LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
- log_dap_cmd("ERR", el);
+ log_dap_cmd(dap, "ERR", el);
retval = ERROR_JTAG_DEVICE_ERROR;
goto done;
}
@@ -436,14 +457,15 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
if (found_wait && el != list_first_entry(&dap->cmd_journal, struct dap_cmd, lh)) {
prev = list_entry(el->lh.prev, struct dap_cmd, lh);
if (prev->rnw == DPAP_READ) {
- log_dap_cmd("PND", prev);
+ log_dap_cmd(dap, "PND", prev);
/* search for the next OK transaction, it contains
* the result of the previous READ */
tmp = el;
list_for_each_entry_from(tmp, &dap->cmd_journal, lh) {
- if (tmp->ack == JTAG_ACK_OK_FAULT) {
+ /* The following check covers OK and FAULT ACKs for both ADIv5 and ADIv6 */
+ if (tmp->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && tmp->ack == JTAG_ACK_OK)) {
/* recover the read value */
- log_dap_cmd("FND", tmp);
+ log_dap_cmd(dap, "FND", tmp);
if (el->invalue != el->invalue_buf) {
uint32_t invalue = le_to_h_u32(tmp->invalue);
memcpy(el->invalue, &invalue, sizeof(uint32_t));
@@ -454,7 +476,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
}
if (prev) {
- log_dap_cmd("LST", el);
+ log_dap_cmd(dap, "LST", el);
/*
* At this point we're sure that no previous
@@ -476,8 +498,9 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
retval = adi_jtag_dp_scan_cmd_sync(dap, tmp, NULL);
if (retval != ERROR_OK)
break;
- if (tmp->ack == JTAG_ACK_OK_FAULT) {
- log_dap_cmd("FND", tmp);
+ /* The following check covers OK and FAULT ACKs for both ADIv5 and ADIv6 */
+ if (tmp->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && tmp->ack == JTAG_ACK_OK)) {
+ log_dap_cmd(dap, "FND", tmp);
if (el->invalue != el->invalue_buf) {
uint32_t invalue = le_to_h_u32(tmp->invalue);
memcpy(el->invalue, &invalue, sizeof(uint32_t));
@@ -486,7 +509,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
}
if (tmp->ack != JTAG_ACK_WAIT) {
LOG_ERROR("Invalid ACK (%1x) in DAP response", tmp->ack);
- log_dap_cmd("ERR", tmp);
+ log_dap_cmd(dap, "ERR", tmp);
retval = ERROR_JTAG_DEVICE_ERROR;
break;
}
@@ -495,7 +518,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
if (retval == ERROR_OK) {
/* timeout happened */
- if (tmp->ack != JTAG_ACK_OK_FAULT) {
+ if (tmp->ack == JTAG_ACK_WAIT) {
LOG_ERROR("Timeout during WAIT recovery");
dap->select = DP_SELECT_INVALID;
jtag_ap_q_abort(dap, NULL);
@@ -523,7 +546,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
/* move all remaining transactions over to the replay list */
list_for_each_entry_safe_from(el, tmp, &dap->cmd_journal, lh) {
- log_dap_cmd("REP", el);
+ log_dap_cmd(dap, "REP", el);
list_move_tail(&el->lh, &replay_list);
}
@@ -560,8 +583,8 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
retval = adi_jtag_dp_scan_cmd_sync(dap, el, NULL);
if (retval != ERROR_OK)
break;
- log_dap_cmd("REC", el);
- if (el->ack == JTAG_ACK_OK_FAULT) {
+ log_dap_cmd(dap, "REC", el);
+ if (el->ack == JTAG_ACK_OK_FAULT || (is_adiv6(dap) && el->ack == JTAG_ACK_OK)) {
if (el->invalue != el->invalue_buf) {
uint32_t invalue = le_to_h_u32(el->invalue);
memcpy(el->invalue, &invalue, sizeof(uint32_t));
@@ -570,7 +593,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
}
if (el->ack != JTAG_ACK_WAIT) {
LOG_ERROR("Invalid ACK (%1x) in DAP response", el->ack);
- log_dap_cmd("ERR", el);
+ log_dap_cmd(dap, "ERR", el);
retval = ERROR_JTAG_DEVICE_ERROR;
break;
}
@@ -584,7 +607,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
} while (timeval_ms() - time_now < 1000);
if (retval == ERROR_OK) {
- if (el->ack != JTAG_ACK_OK_FAULT) {
+ if (el->ack == JTAG_ACK_WAIT) {
LOG_ERROR("Timeout during WAIT recovery");
dap->select = DP_SELECT_INVALID;
jtag_ap_q_abort(dap, NULL);
@@ -640,10 +663,10 @@ static int jtagdp_transaction_endcheck(struct adiv5_dap *dap)
if (ctrlstat & SSTICKYORUN)
LOG_DEBUG("JTAG-DP STICKY OVERRUN");
- /* Clear Sticky Error Bits */
+ /* Clear Sticky Error and Sticky Overrun Bits */
retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
DP_CTRL_STAT, DPAP_WRITE,
- dap->dp_ctrl_stat | SSTICKYERR, NULL, 0);
+ dap->dp_ctrl_stat | SSTICKYERR | SSTICKYORUN, NULL, 0);
if (retval != ERROR_OK)
goto done;
@@ -722,15 +745,38 @@ static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
/** Select the AP register bank matching bits 7:4 of reg. */
static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg)
{
+ int retval;
struct adiv5_dap *dap = ap->dap;
- uint32_t sel = ((uint32_t)ap->ap_num << 24) | (reg & 0x000000F0);
+ uint64_t sel;
+
+ if (is_adiv6(dap)) {
+ sel = ap->ap_num | (reg & 0x00000FF0);
+ if (sel == (dap->select & ~0xfull))
+ return ERROR_OK;
+
+ if (dap->select != DP_SELECT_INVALID)
+ sel |= dap->select & 0xf;
+ dap->select = sel;
+ LOG_DEBUG("AP BANKSEL: %" PRIx64, sel);
+
+ retval = jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (dap->asize > 32)
+ return jtag_dp_q_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
+ return ERROR_OK;
+ }
+
+ /* ADIv5 */
+ sel = (ap->ap_num << 24) | (reg & 0x000000F0);
if (sel == dap->select)
return ERROR_OK;
dap->select = sel;
- return jtag_dp_q_write(dap, DP_SELECT, sel);
+ return jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
}
static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg,
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index 6835042..979c643 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
*
* Copyright (C) 2010 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
***************************************************************************/
/**
@@ -29,6 +18,7 @@
* for details, see "ARM IHI 0031A"
* ARM Debug Interface v5 Architecture Specification
* especially section 5.3 for SWD protocol
+ * and "ARM IHI 0074C" ARM Debug Interface Architecture Specification ADIv6.0
*
* On many chips (most current Cortex-M3 parts) SWD is a run-time alternative
* to JTAG. Boards may support one or both. There are also SWD-only chips,
@@ -112,20 +102,20 @@ static inline int check_sync(struct adiv5_dap *dap)
/** Select the DP register bank matching bits 7:4 of reg. */
static int swd_queue_dp_bankselect(struct adiv5_dap *dap, unsigned int reg)
{
- /* Only register address 4 is banked. */
- if ((reg & 0xf) != 4)
+ /* Only register address 0 and 4 are banked. */
+ if ((reg & 0xf) > 4)
return ERROR_OK;
- uint32_t select_dp_bank = (reg & 0x000000F0) >> 4;
- uint32_t sel = select_dp_bank
- | (dap->select & (DP_SELECT_APSEL | DP_SELECT_APBANK));
+ uint64_t sel = (reg & 0x000000F0) >> 4;
+ if (dap->select != DP_SELECT_INVALID)
+ sel |= dap->select & ~0xfULL;
if (sel == dap->select)
return ERROR_OK;
dap->select = sel;
- int retval = swd_queue_dp_write_inner(dap, DP_SELECT, sel);
+ int retval = swd_queue_dp_write_inner(dap, DP_SELECT, (uint32_t)sel);
if (retval != ERROR_OK)
dap->select = DP_SELECT_INVALID;
@@ -326,6 +316,21 @@ static int swd_connect_single(struct adiv5_dap *dap)
dap->do_reconnect = false;
dap_invalidate_cache(dap);
+ /* The sequences to enter in SWD (JTAG_TO_SWD and DORMANT_TO_SWD) end
+ * with a SWD line reset sequence (50 clk with SWDIO high).
+ * From ARM IHI 0074C ADIv6.0, chapter B4.3.3 "Connection and line reset
+ * sequence":
+ * - line reset sets DP_SELECT_DPBANK to zero;
+ * - read of DP_DPIDR takes the connection out of reset;
+ * - write of DP_TARGETSEL keeps the connection in reset;
+ * - other accesses return protocol error (SWDIO not driven by target).
+ *
+ * Read DP_DPIDR to get out of reset. Initialize dap->select to zero to
+ * skip the write to DP_SELECT, avoiding the protocol error. Set again
+ * dap->select to DP_SELECT_INVALID because the rest of the register is
+ * unknown after line reset.
+ */
+ dap->select = 0;
retval = swd_queue_dp_read_inner(dap, DP_DPIDR, &dpidr);
if (retval == ERROR_OK) {
retval = swd_run_inner(dap);
@@ -337,6 +342,7 @@ static int swd_connect_single(struct adiv5_dap *dap)
dap->switch_through_dormant = !dap->switch_through_dormant;
} while (timeval_ms() < timeout);
+ dap->select = DP_SELECT_INVALID;
if (retval != ERROR_OK) {
LOG_ERROR("Error connecting DP: cannot read IDR");
@@ -473,17 +479,42 @@ static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg,
/** Select the AP register bank matching bits 7:4 of reg. */
static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned reg)
{
+ int retval;
struct adiv5_dap *dap = ap->dap;
- uint32_t sel = ((uint32_t)ap->ap_num << 24)
- | (reg & 0x000000F0)
- | (dap->select & DP_SELECT_DPBANK);
+ uint64_t sel;
+
+ if (is_adiv6(dap)) {
+ sel = ap->ap_num | (reg & 0x00000FF0);
+ if (sel == (dap->select & ~0xfULL))
+ return ERROR_OK;
+
+ if (dap->select != DP_SELECT_INVALID)
+ sel |= dap->select & 0xf;
+ dap->select = sel;
+ LOG_DEBUG("AP BANKSEL: %" PRIx64, sel);
+
+ retval = swd_queue_dp_write(dap, DP_SELECT, (uint32_t)sel);
+
+ if (retval == ERROR_OK && dap->asize > 32)
+ retval = swd_queue_dp_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
+
+ if (retval != ERROR_OK)
+ dap->select = DP_SELECT_INVALID;
+
+ return retval;
+ }
+
+ /* ADIv5 */
+ sel = (ap->ap_num << 24) | (reg & 0x000000F0);
+ if (dap->select != DP_SELECT_INVALID)
+ sel |= dap->select & DP_SELECT_DPBANK;
if (sel == dap->select)
return ERROR_OK;
dap->select = sel;
- int retval = swd_queue_dp_write_inner(dap, DP_SELECT, sel);
+ retval = swd_queue_dp_write_inner(dap, DP_SELECT, sel);
if (retval != ERROR_OK)
dap->select = DP_SELECT_INVALID;
diff --git a/src/target/algorithm.c b/src/target/algorithm.c
index 9fc9386..64abffc 100644
--- a/src/target/algorithm.c
+++ b/src/target/algorithm.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/algorithm.h b/src/target/algorithm.h
index 0fc49d0..25f1a66 100644
--- a/src/target/algorithm.h
+++ b/src/target/algorithm.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ALGORITHM_H
diff --git a/src/target/arc.c b/src/target/arc.c
index 471f16a..9ae3ae6 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -1,11 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013-2015,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Mischa Jonker <mischa.jonker@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
@@ -93,7 +93,7 @@ struct reg *arc_reg_get_by_name(struct reg_cache *first,
*
* @param target Target for which to reset caches states.
*/
-int arc_reset_caches_states(struct target *target)
+static int arc_reset_caches_states(struct target *target)
{
struct arc_common *arc = target_to_arc(target);
@@ -283,7 +283,7 @@ static int arc_set_register(struct reg *reg, uint8_t *buf)
return ERROR_OK;
}
-const struct reg_arch_type arc_reg_type = {
+static const struct reg_arch_type arc_reg_type = {
.get = arc_get_register,
.set = arc_set_register,
};
@@ -1401,7 +1401,7 @@ static int arc_target_create(struct target *target, Jim_Interp *interp)
* little endian, so different type of conversion should be done.
* Middle endian: instruction "aabbccdd", stored as "bbaaddcc"
*/
-int arc_write_instruction_u32(struct target *target, uint32_t address,
+static int arc_write_instruction_u32(struct target *target, uint32_t address,
uint32_t instr)
{
uint8_t value_buf[4];
@@ -1428,7 +1428,7 @@ int arc_write_instruction_u32(struct target *target, uint32_t address,
* case of little endian ARC instructions are in middle endian format, so
* different type of conversion should be done.
*/
-int arc_read_instruction_u32(struct target *target, uint32_t address,
+static int arc_read_instruction_u32(struct target *target, uint32_t address,
uint32_t *value)
{
uint8_t value_buf[4];
@@ -1694,7 +1694,7 @@ static int arc_remove_breakpoint(struct target *target,
return ERROR_OK;
}
-void arc_reset_actionpoints(struct target *target)
+static void arc_reset_actionpoints(struct target *target)
{
struct arc_common *arc = target_to_arc(target);
struct arc_actionpoint *ap_list = arc->actionpoints_list;
@@ -1965,7 +1965,7 @@ static int arc_hit_watchpoint(struct target *target, struct watchpoint **hit_wat
/* Helper function which switches core to single_step mode by
* doing aux r/w operations. */
-int arc_config_step(struct target *target, int enable_step)
+static int arc_config_step(struct target *target, int enable_step)
{
uint32_t value;
@@ -2001,7 +2001,7 @@ int arc_config_step(struct target *target, int enable_step)
return ERROR_OK;
}
-int arc_step(struct target *target, int current, target_addr_t address,
+static int arc_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints)
{
/* get pointers to arch-specific information */
@@ -2165,7 +2165,7 @@ int arc_cache_invalidate(struct target *target)
* values directly from memory, bypassing cache, so if there are unflushed
* lines debugger will read invalid values, which will cause a lot of troubles.
* */
-int arc_dcache_flush(struct target *target)
+static int arc_dcache_flush(struct target *target)
{
uint32_t value, dc_ctrl_value;
bool has_to_set_dc_ctrl_im;
diff --git a/src/target/arc.h b/src/target/arc.h
index f0351bd..bb70a59 100644
--- a/src/target/arc.h
+++ b/src/target/arc.h
@@ -1,11 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013-2015,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Mischa Jonker <mischa.jonker@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARC_H
@@ -27,7 +27,7 @@
#include "arc_cmd.h"
#include "arc_mem.h"
-#define ARC_COMMON_MAGIC 0xB32EB324 /* just a unique number */
+#define ARC_COMMON_MAGIC 0xB32EB324U /* just a unique number */
#define AUX_DEBUG_REG 0x5
#define AUX_PC_REG 0x6
@@ -183,7 +183,7 @@ struct arc_actionpoint {
};
struct arc_common {
- uint32_t common_magic;
+ unsigned int common_magic;
struct arc_jtag jtag_info;
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 26c67c6..7a80046 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -1,11 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013-2015,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Mischa Jonker <mischa.jonker@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -975,7 +975,7 @@ static int jim_handle_actionpoints_num(Jim_Interp *interp, int argc,
/* ----- Exported target commands ------------------------------------------ */
-const struct command_registration arc_l2_cache_group_handlers[] = {
+static const struct command_registration arc_l2_cache_group_handlers[] = {
{
.name = "auto",
.handler = arc_l2_cache_disable_auto_cmd,
@@ -986,7 +986,7 @@ const struct command_registration arc_l2_cache_group_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-const struct command_registration arc_cache_group_handlers[] = {
+static const struct command_registration arc_cache_group_handlers[] = {
{
.name = "auto",
.handler = arc_l1_cache_disable_auto_cmd,
diff --git a/src/target/arc_cmd.h b/src/target/arc_cmd.h
index b2264eb..f728bd5 100644
--- a/src/target/arc_cmd.h
+++ b/src/target/arc_cmd.h
@@ -1,11 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013-2014,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Mischa Jonker <mischa.jonker@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARC_CMD_H
diff --git a/src/target/arc_jtag.c b/src/target/arc_jtag.c
index ca1a096..ddb4f62 100644
--- a/src/target/arc_jtag.c
+++ b/src/target/arc_jtag.c
@@ -1,11 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013-2014,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Mischa Jonker <mischa.jonker@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arc_jtag.h b/src/target/arc_jtag.h
index 99795f5..c2dc7b7 100644
--- a/src/target/arc_jtag.h
+++ b/src/target/arc_jtag.h
@@ -1,11 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013-2014,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Mischa Jonker <mischa.jonker@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARC_JTAG_H
diff --git a/src/target/arc_mem.c b/src/target/arc_mem.c
index 81d1ab2..c4814d2 100644
--- a/src/target/arc_mem.c
+++ b/src/target/arc_mem.c
@@ -1,11 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013-2014,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Mischa Jonker <mischa.jonker@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arc_mem.h b/src/target/arc_mem.h
index 06e1c88..861823d 100644
--- a/src/target/arc_mem.h
+++ b/src/target/arc_mem.h
@@ -1,10 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013-2014,2019-2020 Synopsys, Inc. *
* Frank Dols <frank.dols@synopsys.com> *
* Anton Kolesov <anton.kolesov@synopsys.com> *
* Evgeniy Didin <didin@synopsys.com> *
- * *
- * SPDX-License-Identifier: GPL-2.0-or-later *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARC_MEM_H
diff --git a/src/target/arm.h b/src/target/arm.h
index 1732789..de46ffb 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2005 by Dominic Rath
* Dominic.Rath@gmx.de
@@ -10,19 +12,6 @@
*
* Copyright (C) 2018 by Liviu Ionescu
* <ilg@livius.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_TARGET_ARM_H
@@ -166,7 +155,7 @@ enum arm_vfp_version {
ARM_VFP_V3,
};
-#define ARM_COMMON_MAGIC 0x0A450A45
+#define ARM_COMMON_MAGIC 0x0A450A45U
/**
* Represents a generic ARM core, with standard application registers.
@@ -176,7 +165,8 @@ enum arm_vfp_version {
* registers as traditional ARM cores, and only support Thumb2 instructions.
*/
struct arm {
- int common_magic;
+ unsigned int common_magic;
+
struct reg_cache *core_cache;
/** Handle to the PC; valid in all core modes. */
@@ -263,7 +253,7 @@ static inline bool is_arm(struct arm *arm)
}
struct arm_algorithm {
- int common_magic;
+ unsigned int common_magic;
enum arm_mode core_mode;
enum arm_state core_state;
@@ -283,6 +273,7 @@ void arm_free_reg_cache(struct arm *arm);
struct reg_cache *armv8_build_reg_cache(struct target *target);
extern const struct command_registration arm_command_handlers[];
+extern const struct command_registration arm_all_profiles_command_handlers[];
int arm_arch_state(struct target *target);
const char *arm_get_gdb_arch(struct target *target);
@@ -319,7 +310,4 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr);
struct reg *arm_reg_current(struct arm *arm, unsigned regnum);
struct reg *armv8_reg_current(struct arm *arm, unsigned regnum);
-extern struct reg arm_gdb_dummy_fp_reg;
-extern struct reg arm_gdb_dummy_fps_reg;
-
#endif /* OPENOCD_TARGET_ARM_H */
diff --git a/src/target/arm11.c b/src/target/arm11.c
index e3b0975..e48bcf3 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 digenius technology GmbH. *
* Michael Bruck *
@@ -7,19 +9,6 @@
* Copyright (C) 2008 Georg Acher <acher@in.tum.de> *
* *
* Copyright (C) 2009 David Brownell *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm11.h b/src/target/arm11.h
index 77cc223..1f56f7b 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -1,21 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 digenius technology GmbH. *
* Michael Bruck *
* *
* Copyright (C) 2008 Georg Acher <acher@in.tum.de> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM11_H
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index fc35414..b670bd7 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 digenius technology GmbH. *
* Michael Bruck *
* *
* Copyright (C) 2008,2009 Oyvind Harboe oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm11_dbgtap.h b/src/target/arm11_dbgtap.h
index c6b20a8..eeb174a 100644
--- a/src/target/arm11_dbgtap.h
+++ b/src/target/arm11_dbgtap.h
@@ -1,21 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 digenius technology GmbH. *
* Michael Bruck *
* *
* Copyright (C) 2008,2009 Oyvind Harboe oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM11_DBGTAP_H
diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index db75011..c330dff 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2009 by Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm720t.h b/src/target/arm720t.h
index 31dad9c..65bd78f 100644
--- a/src/target/arm720t.h
+++ b/src/target/arm720t.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM720T_H
@@ -22,11 +11,12 @@
#include "arm7tdmi.h"
#include "armv4_5_mmu.h"
-#define ARM720T_COMMON_MAGIC 0xa720a720
+#define ARM720T_COMMON_MAGIC 0xa720a720U
struct arm720t_common {
+ unsigned int common_magic;
+
struct arm7_9_common arm7_9_common;
- uint32_t common_magic;
struct armv4_5_mmu_common armv4_5_mmu;
uint32_t cp15_control_reg;
uint32_t fsr_reg;
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index da047c3..8f87d9c 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -12,19 +14,6 @@
* hontor@126.com *
* *
* Copyright (C) 2009 by David Brownell *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h
index 4961212..92d0fd5 100644
--- a/src/target/arm7_9_common.h
+++ b/src/target/arm7_9_common.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2008 by Hongtao Zheng *
* hontor@126.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM7_9_COMMON_H
@@ -31,14 +20,15 @@
#include "arm.h"
#include "arm_jtag.h"
-#define ARM7_9_COMMON_MAGIC 0x0a790a79 /**< */
+#define ARM7_9_COMMON_MAGIC 0x0a790a79U /**< */
/**
* Structure for items that are common between both ARM7 and ARM9 targets.
*/
struct arm7_9_common {
+ unsigned int common_magic;
+
struct arm arm;
- uint32_t common_magic;
struct arm_jtag jtag_info; /**< JTAG information for target */
struct reg_cache *eice_cache; /**< Embedded ICE register cache */
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index b034839..393d3b4 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm7tdmi.h b/src/target/arm7tdmi.h
index 3cc3d4a..369a514 100644
--- a/src/target/arm7tdmi.h
+++ b/src/target/arm7tdmi.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM7TDMI_H
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index a6d626e..f4c3f42 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm920t.h b/src/target/arm920t.h
index 2e3b08c..eba768f 100644
--- a/src/target/arm920t.h
+++ b/src/target/arm920t.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM920T_H
@@ -22,11 +11,12 @@
#include "arm9tdmi.h"
#include "armv4_5_mmu.h"
-#define ARM920T_COMMON_MAGIC 0xa920a920
+#define ARM920T_COMMON_MAGIC 0xa920a920U
struct arm920t_common {
+ unsigned int common_magic;
+
struct arm7_9_common arm7_9_common;
- uint32_t common_magic;
struct armv4_5_mmu_common armv4_5_mmu;
uint32_t cp15_control_reg;
uint32_t d_fsr;
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index ea0927b..807d211 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008,2009 by Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm926ejs.h b/src/target/arm926ejs.h
index 0cd523a..479128e 100644
--- a/src/target/arm926ejs.h
+++ b/src/target/arm926ejs.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM926EJS_H
@@ -22,11 +11,12 @@
#include "arm9tdmi.h"
#include "armv4_5_mmu.h"
-#define ARM926EJS_COMMON_MAGIC 0xa926a926
+#define ARM926EJS_COMMON_MAGIC 0xa926a926U
struct arm926ejs_common {
+ unsigned int common_magic;
+
struct arm7_9_common arm7_9_common;
- uint32_t common_magic;
struct armv4_5_mmu_common armv4_5_mmu;
int (*read_cp15)(struct target *target, uint32_t op1, uint32_t op2,
uint32_t crn, uint32_t crm, uint32_t *value);
diff --git a/src/target/arm946e.c b/src/target/arm946e.c
index 036e8ba..06dab4e 100644
--- a/src/target/arm946e.c
+++ b/src/target/arm946e.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2010 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -55,7 +44,7 @@ static int arm946e_post_debug_entry(struct target *target);
static void arm946e_pre_restore_context(struct target *target);
static int arm946e_read_cp15(struct target *target, int reg_addr, uint32_t *value);
-int arm946e_init_arch_info(struct target *target,
+static int arm946e_init_arch_info(struct target *target,
struct arm946e_common *arm946e,
struct jtag_tap *tap)
{
@@ -184,7 +173,7 @@ static int arm946e_read_cp15(struct target *target, int reg_addr, uint32_t *valu
return ERROR_OK;
}
-int arm946e_write_cp15(struct target *target, int reg_addr, uint32_t value)
+static int arm946e_write_cp15(struct target *target, int reg_addr, uint32_t value)
{
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -731,7 +720,7 @@ static const struct command_registration arm946e_exec_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-const struct command_registration arm946e_command_handlers[] = {
+static const struct command_registration arm946e_command_handlers[] = {
{
.chain = arm9tdmi_command_handlers,
},
diff --git a/src/target/arm946e.h b/src/target/arm946e.h
index ee1ef32..0196c2b 100644
--- a/src/target/arm946e.h
+++ b/src/target/arm946e.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2010 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM946E_H
@@ -27,11 +16,12 @@
#include "arm9tdmi.h"
-#define ARM946E_COMMON_MAGIC 0x20f920f9
+#define ARM946E_COMMON_MAGIC 0x20f920f9U
struct arm946e_common {
+ unsigned int common_magic;
+
struct arm7_9_common arm7_9_common;
- int common_magic;
uint32_t cp15_control_reg;
uint32_t cp15_cache_info;
};
@@ -42,10 +32,4 @@ static inline struct arm946e_common *target_to_arm946(struct target *target)
arm7_9_common.arm);
}
-int arm946e_init_arch_info(struct target *target,
- struct arm946e_common *arm946e, struct jtag_tap *tap);
-int arm946e_write_cp15(struct target *target, int reg_addr, uint32_t value);
-
-extern const struct command_registration arm946e_command_handlers[];
-
#endif /* OPENOCD_TARGET_ARM946E_H */
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index b6d3e50..3e60172 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm966e.h b/src/target/arm966e.h
index aa2e9bb..be2b339 100644
--- a/src/target/arm966e.h
+++ b/src/target/arm966e.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM966E_H
@@ -24,11 +13,12 @@
#include "arm9tdmi.h"
-#define ARM966E_COMMON_MAGIC 0x20f920f9
+#define ARM966E_COMMON_MAGIC 0x20f920f9U
struct arm966e_common {
+ unsigned int common_magic;
+
struct arm7_9_common arm7_9_common;
- int common_magic;
uint32_t cp15_control_reg;
};
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 2a32f11..805330f 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Hongtao Zheng *
* hontor@126.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm9tdmi.h b/src/target/arm9tdmi.h
index 56946f7..d2a2784 100644
--- a/src/target/arm9tdmi.h
+++ b/src/target/arm9tdmi.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM9TDMI_H
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 4d5f02b..c446428 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
@@ -14,19 +16,6 @@
* andreas.fritiofson@gmail.com *
* *
* Copyright (C) 2019-2021, Ampere Computing LLC *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
@@ -107,7 +96,7 @@ static int mem_ap_setup_csw(struct adiv5_ap *ap, uint32_t csw)
if (csw != ap->csw_value) {
/* LOG_DEBUG("DAP: Set CSW %x",csw); */
- int retval = dap_queue_ap_write(ap, MEM_AP_REG_CSW, csw);
+ int retval = dap_queue_ap_write(ap, MEM_AP_REG_CSW(ap->dap), csw);
if (retval != ERROR_OK) {
ap->csw_value = 0;
return retval;
@@ -121,11 +110,11 @@ static int mem_ap_setup_tar(struct adiv5_ap *ap, target_addr_t tar)
{
if (!ap->tar_valid || tar != ap->tar_value) {
/* LOG_DEBUG("DAP: Set TAR %x",tar); */
- int retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR, (uint32_t)(tar & 0xffffffffUL));
+ int retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR(ap->dap), (uint32_t)(tar & 0xffffffffUL));
if (retval == ERROR_OK && is_64bit_ap(ap)) {
/* See if bits 63:32 of tar is different from last setting */
if ((ap->tar_value >> 32) != (tar >> 32))
- retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR64, (uint32_t)(tar >> 32));
+ retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR64(ap->dap), (uint32_t)(tar >> 32));
}
if (retval != ERROR_OK) {
ap->tar_valid = false;
@@ -142,9 +131,9 @@ static int mem_ap_read_tar(struct adiv5_ap *ap, target_addr_t *tar)
uint32_t lower;
uint32_t upper = 0;
- int retval = dap_queue_ap_read(ap, MEM_AP_REG_TAR, &lower);
+ int retval = dap_queue_ap_read(ap, MEM_AP_REG_TAR(ap->dap), &lower);
if (retval == ERROR_OK && is_64bit_ap(ap))
- retval = dap_queue_ap_read(ap, MEM_AP_REG_TAR64, &upper);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_TAR64(ap->dap), &upper);
if (retval != ERROR_OK) {
ap->tar_valid = false;
@@ -252,7 +241,7 @@ int mem_ap_read_u32(struct adiv5_ap *ap, target_addr_t address,
if (retval != ERROR_OK)
return retval;
- return dap_queue_ap_read(ap, MEM_AP_REG_BD0 | (address & 0xC), value);
+ return dap_queue_ap_read(ap, MEM_AP_REG_BD0(ap->dap) | (address & 0xC), value);
}
/**
@@ -304,7 +293,7 @@ int mem_ap_write_u32(struct adiv5_ap *ap, target_addr_t address,
if (retval != ERROR_OK)
return retval;
- return dap_queue_ap_write(ap, MEM_AP_REG_BD0 | (address & 0xC),
+ return dap_queue_ap_write(ap, MEM_AP_REG_BD0(ap->dap) | (address & 0xC),
value);
}
@@ -420,6 +409,26 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz
outvalue |= (uint32_t)*buffer++ << 8 * (0 ^ (drw_byte_idx & 3) ^ addr_xor);
break;
}
+ } else if (dap->nu_npcx_quirks) {
+ switch (this_size) {
+ case 4:
+ outvalue |= (uint32_t)*buffer++ << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer++ << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer++ << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer++ << 8 * (drw_byte_idx & 3);
+ break;
+ case 2:
+ outvalue |= (uint32_t)*buffer << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*(buffer+1) << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer++ << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer++ << 8 * (drw_byte_idx & 3);
+ break;
+ case 1:
+ outvalue |= (uint32_t)*buffer << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer << 8 * (drw_byte_idx++ & 3);
+ outvalue |= (uint32_t)*buffer++ << 8 * (drw_byte_idx & 3);
+ }
} else {
switch (this_size) {
case 4:
@@ -436,7 +445,7 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz
nbytes -= this_size;
- retval = dap_queue_ap_write(ap, MEM_AP_REG_DRW, outvalue);
+ retval = dap_queue_ap_write(ap, MEM_AP_REG_DRW(dap), outvalue);
if (retval != ERROR_OK)
break;
@@ -533,7 +542,7 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint
if (retval != ERROR_OK)
break;
- retval = dap_queue_ap_read(ap, MEM_AP_REG_DRW, read_ptr++);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_DRW(dap), read_ptr++);
if (retval != ERROR_OK)
break;
@@ -780,7 +789,7 @@ int mem_ap_init(struct adiv5_ap *ap)
/* Set ap->cfg_reg before calling mem_ap_setup_transfer(). */
/* mem_ap_setup_transfer() needs to know if the MEM_AP supports LPAE. */
- retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &cfg);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG(dap), &cfg);
if (retval != ERROR_OK)
return retval;
@@ -795,7 +804,7 @@ int mem_ap_init(struct adiv5_ap *ap)
if (retval != ERROR_OK)
return retval;
- retval = dap_queue_ap_read(ap, MEM_AP_REG_CSW, &csw);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_CSW(dap), &csw);
if (retval != ERROR_OK)
return retval;
@@ -928,7 +937,9 @@ static const struct {
};
#define DEVARCH_ID_MASK (ARM_CS_C9_DEVARCH_ARCHITECT_MASK | ARM_CS_C9_DEVARCH_ARCHID_MASK)
+#define DEVARCH_MEM_AP ARCH_ID(ARM_ID, 0x0A17)
#define DEVARCH_ROM_C_0X9 ARCH_ID(ARM_ID, 0x0AF7)
+#define DEVARCH_UNKNOWN_V2 ARCH_ID(ARM_ID, 0x0A47)
static const char *class0x9_devarch_description(uint32_t devarch)
{
@@ -966,22 +977,57 @@ static const char *ap_type_to_description(enum ap_type type)
return "Unknown";
}
+bool is_ap_num_valid(struct adiv5_dap *dap, uint64_t ap_num)
+{
+ if (!dap)
+ return false;
+
+ /* no autodetection, by now, so uninitialized is equivalent to ADIv5 for
+ * backward compatibility */
+ if (!is_adiv6(dap)) {
+ if (ap_num > DP_APSEL_MAX)
+ return false;
+ return true;
+ }
+
+ if (is_adiv6(dap)) {
+ if (ap_num & 0x0fffULL)
+ return false;
+ if (dap->asize != 0)
+ if (ap_num & ((~0ULL) << dap->asize))
+ return false;
+ return true;
+ }
+
+ return false;
+}
+
/*
* This function checks the ID for each access port to find the requested Access Port type
+ * It also calls dap_get_ap() to increment the AP refcount
*/
-int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_ap **ap_out)
+int dap_find_get_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_ap **ap_out)
{
- int ap_num;
+ if (is_adiv6(dap)) {
+ /* TODO: scan the ROM table and detect the AP available */
+ LOG_DEBUG("On ADIv6 we cannot scan all the possible AP");
+ return ERROR_FAIL;
+ }
/* Maximum AP number is 255 since the SELECT register is 8 bits */
- for (ap_num = 0; ap_num <= DP_APSEL_MAX; ap_num++) {
+ for (unsigned int ap_num = 0; ap_num <= DP_APSEL_MAX; ap_num++) {
+ struct adiv5_ap *ap = dap_get_ap(dap, ap_num);
+ if (!ap)
+ continue;
/* read the IDR register of the Access Port */
uint32_t id_val = 0;
- int retval = dap_queue_ap_read(dap_ap(dap, ap_num), AP_REG_IDR, &id_val);
- if (retval != ERROR_OK)
+ int retval = dap_queue_ap_read(ap, AP_REG_IDR(dap), &id_val);
+ if (retval != ERROR_OK) {
+ dap_put_ap(ap);
return retval;
+ }
retval = dap_run(dap);
@@ -993,15 +1039,96 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_a
ap_type_to_description(type_to_find),
ap_num, id_val);
- *ap_out = &dap->ap[ap_num];
+ *ap_out = ap;
return ERROR_OK;
}
+ dap_put_ap(ap);
}
LOG_DEBUG("No %s found", ap_type_to_description(type_to_find));
return ERROR_FAIL;
}
+static inline bool is_ap_in_use(struct adiv5_ap *ap)
+{
+ return ap->refcount > 0 || ap->config_ap_never_release;
+}
+
+static struct adiv5_ap *_dap_get_ap(struct adiv5_dap *dap, uint64_t ap_num)
+{
+ if (!is_ap_num_valid(dap, ap_num)) {
+ LOG_ERROR("Invalid AP#0x%" PRIx64, ap_num);
+ return NULL;
+ }
+ if (is_adiv6(dap)) {
+ for (unsigned int i = 0; i <= DP_APSEL_MAX; i++) {
+ struct adiv5_ap *ap = &dap->ap[i];
+ if (is_ap_in_use(ap) && ap->ap_num == ap_num) {
+ ++ap->refcount;
+ return ap;
+ }
+ }
+ for (unsigned int i = 0; i <= DP_APSEL_MAX; i++) {
+ struct adiv5_ap *ap = &dap->ap[i];
+ if (!is_ap_in_use(ap)) {
+ ap->ap_num = ap_num;
+ ++ap->refcount;
+ return ap;
+ }
+ }
+ LOG_ERROR("No more AP available!");
+ return NULL;
+ }
+
+ /* ADIv5 */
+ struct adiv5_ap *ap = &dap->ap[ap_num];
+ ap->ap_num = ap_num;
+ ++ap->refcount;
+ return ap;
+}
+
+/* Return AP with specified ap_num. Increment AP refcount */
+struct adiv5_ap *dap_get_ap(struct adiv5_dap *dap, uint64_t ap_num)
+{
+ struct adiv5_ap *ap = _dap_get_ap(dap, ap_num);
+ if (ap)
+ LOG_DEBUG("refcount AP#0x%" PRIx64 " get %u", ap_num, ap->refcount);
+ return ap;
+}
+
+/* Return AP with specified ap_num. Increment AP refcount and keep it non-zero */
+struct adiv5_ap *dap_get_config_ap(struct adiv5_dap *dap, uint64_t ap_num)
+{
+ struct adiv5_ap *ap = _dap_get_ap(dap, ap_num);
+ if (ap) {
+ ap->config_ap_never_release = true;
+ LOG_DEBUG("refcount AP#0x%" PRIx64 " get_config %u", ap_num, ap->refcount);
+ }
+ return ap;
+}
+
+/* Decrement AP refcount and release the AP when refcount reaches zero */
+int dap_put_ap(struct adiv5_ap *ap)
+{
+ if (ap->refcount == 0) {
+ LOG_ERROR("BUG: refcount AP#0x%" PRIx64 " put underflow", ap->ap_num);
+ return ERROR_FAIL;
+ }
+
+ --ap->refcount;
+
+ LOG_DEBUG("refcount AP#0x%" PRIx64 " put %u", ap->ap_num, ap->refcount);
+ if (!is_ap_in_use(ap)) {
+ /* defaults from dap_instance_init() */
+ ap->ap_num = DP_APSEL_INVALID;
+ ap->memaccess_tck = 255;
+ ap->tar_autoincr_block = (1 << 10);
+ ap->csw_default = CSW_AHB_DEFAULT;
+ ap->cfg_reg = MEM_AP_REG_CFG_INVALID;
+ }
+ return ERROR_OK;
+}
+
static int dap_get_debugbase(struct adiv5_ap *ap,
target_addr_t *dbgbase, uint32_t *apid)
{
@@ -1010,19 +1137,19 @@ static int dap_get_debugbase(struct adiv5_ap *ap,
uint32_t baseptr_upper, baseptr_lower;
if (ap->cfg_reg == MEM_AP_REG_CFG_INVALID) {
- retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &ap->cfg_reg);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG(dap), &ap->cfg_reg);
if (retval != ERROR_OK)
return retval;
}
- retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE, &baseptr_lower);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE(dap), &baseptr_lower);
if (retval != ERROR_OK)
return retval;
- retval = dap_queue_ap_read(ap, AP_REG_IDR, apid);
+ retval = dap_queue_ap_read(ap, AP_REG_IDR(dap), apid);
if (retval != ERROR_OK)
return retval;
/* MEM_AP_REG_BASE64 is defined as 'RES0'; can be read and then ignored on 32 bits AP */
if (ap->cfg_reg == MEM_AP_REG_CFG_INVALID || is_64bit_ap(ap)) {
- retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE64, &baseptr_upper);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE64(dap), &baseptr_upper);
if (retval != ERROR_OK)
return retval;
}
@@ -1038,6 +1165,43 @@ static int dap_get_debugbase(struct adiv5_ap *ap,
return ERROR_OK;
}
+int adiv6_dap_read_baseptr(struct command_invocation *cmd, struct adiv5_dap *dap, uint64_t *baseptr)
+{
+ uint32_t baseptr_lower, baseptr_upper = 0;
+ int retval;
+
+ if (dap->asize > 32) {
+ retval = dap_queue_dp_read(dap, DP_BASEPTR1, &baseptr_upper);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
+ retval = dap_dp_read_atomic(dap, DP_BASEPTR0, &baseptr_lower);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if ((baseptr_lower & DP_BASEPTR0_VALID) != DP_BASEPTR0_VALID) {
+ command_print(cmd, "System root table not present");
+ return ERROR_FAIL;
+ }
+
+ baseptr_lower &= ~0x0fff;
+ *baseptr = (((uint64_t)baseptr_upper) << 32) | baseptr_lower;
+
+ return ERROR_OK;
+}
+
+/**
+ * Method to access the CoreSight component.
+ * On ADIv5, CoreSight components are on the bus behind a MEM-AP.
+ * On ADIv6, CoreSight components can either be on the bus behind a MEM-AP
+ * or directly in the AP.
+ */
+enum coresight_access_mode {
+ CS_ACCESS_AP,
+ CS_ACCESS_MEM_AP,
+};
+
/** Holds registers and coordinates of a CoreSight component */
struct cs_component_vals {
struct adiv5_ap *ap;
@@ -1047,19 +1211,43 @@ struct cs_component_vals {
uint32_t devarch;
uint32_t devid;
uint32_t devtype_memtype;
+ enum coresight_access_mode mode;
};
/**
+ * Helper to read CoreSight component's registers, either on the bus
+ * behind a MEM-AP or directly in the AP.
+ *
+ * @param mode Method to access the component (AP or MEM-AP).
+ * @param ap Pointer to AP containing the component.
+ * @param component_base On MEM-AP access method, base address of the component.
+ * @param reg Offset of the component's register to read.
+ * @param value Pointer to the store the read value.
+ *
+ * @return ERROR_OK on success, else a fault code.
+ */
+static int dap_queue_read_reg(enum coresight_access_mode mode, struct adiv5_ap *ap,
+ uint64_t component_base, unsigned int reg, uint32_t *value)
+{
+ if (mode == CS_ACCESS_AP)
+ return dap_queue_ap_read(ap, reg, value);
+
+ /* mode == CS_ACCESS_MEM_AP */
+ return mem_ap_read_u32(ap, component_base + reg, value);
+}
+
+/**
* Read the CoreSight registers needed during ROM Table Parsing (RTP).
*
+ * @param mode Method to access the component (AP or MEM-AP).
* @param ap Pointer to AP containing the component.
* @param component_base On MEM-AP access method, base address of the component.
* @param v Pointer to the struct holding the value of registers.
*
* @return ERROR_OK on success, else a fault code.
*/
-static int rtp_read_cs_regs(struct adiv5_ap *ap, target_addr_t component_base,
- struct cs_component_vals *v)
+static int rtp_read_cs_regs(enum coresight_access_mode mode, struct adiv5_ap *ap,
+ target_addr_t component_base, struct cs_component_vals *v)
{
assert(IS_ALIGNED(component_base, ARM_CS_ALIGN));
assert(ap && v);
@@ -1070,6 +1258,7 @@ static int rtp_read_cs_regs(struct adiv5_ap *ap, target_addr_t component_base,
v->ap = ap;
v->component_base = component_base;
+ v->mode = mode;
/* sort by offset to gain speed */
@@ -1079,35 +1268,35 @@ static int rtp_read_cs_regs(struct adiv5_ap *ap, target_addr_t component_base,
* without triggering error. Read them for eventual use on Class 0x9.
*/
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_C9_DEVARCH, &v->devarch);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_C9_DEVARCH, &v->devarch);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_C9_DEVID, &v->devid);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_C9_DEVID, &v->devid);
/* Same address as ARM_CS_C1_MEMTYPE */
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_C9_DEVTYPE, &v->devtype_memtype);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_C9_DEVTYPE, &v->devtype_memtype);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_PIDR4, &pid4);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_PIDR4, &pid4);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_PIDR0, &pid0);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_PIDR0, &pid0);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_PIDR1, &pid1);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_PIDR1, &pid1);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_PIDR2, &pid2);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_PIDR2, &pid2);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_PIDR3, &pid3);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_PIDR3, &pid3);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_CIDR0, &cid0);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_CIDR0, &cid0);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_CIDR1, &cid1);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_CIDR1, &cid1);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_CIDR2, &cid2);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_CIDR2, &cid2);
if (retval == ERROR_OK)
- retval = mem_ap_read_u32(ap, component_base + ARM_CS_CIDR3, &cid3);
+ retval = dap_queue_read_reg(mode, ap, component_base, ARM_CS_CIDR3, &cid3);
if (retval == ERROR_OK)
retval = dap_run(ap->dap);
@@ -1431,16 +1620,25 @@ static int dap_devtype_display(struct command_invocation *cmd, uint32_t devtype)
*/
struct rtp_ops {
/**
+ * Executed at the start of a new AP, typically to print the AP header.
+ * @param ap Pointer to AP.
+ * @param depth The current depth level of ROM table.
+ * @param priv Pointer to private data.
+ * @return ERROR_OK on success, else a fault code.
+ */
+ int (*ap_header)(struct adiv5_ap *ap, int depth, void *priv);
+ /**
* Executed at the start of a new MEM-AP, typically to print the MEM-AP header.
* @param retval Error encountered while reading AP.
* @param ap Pointer to AP.
* @param dbgbase Value of MEM-AP Debug Base Address register.
* @param apid Value of MEM-AP IDR Identification Register.
+ * @param depth The current depth level of ROM table.
* @param priv Pointer to private data.
* @return ERROR_OK on success, else a fault code.
*/
int (*mem_ap_header)(int retval, struct adiv5_ap *ap, uint64_t dbgbase,
- uint32_t apid, void *priv);
+ uint32_t apid, int depth, void *priv);
/**
* Executed when a CoreSight component is parsed, typically to print
* information on the component.
@@ -1470,16 +1668,28 @@ struct rtp_ops {
};
/**
+ * Wrapper around struct rtp_ops::ap_header.
+ */
+static int rtp_ops_ap_header(const struct rtp_ops *ops,
+ struct adiv5_ap *ap, int depth)
+{
+ if (ops->ap_header)
+ return ops->ap_header(ap, depth, ops->priv);
+
+ return ERROR_OK;
+}
+
+/**
* Wrapper around struct rtp_ops::mem_ap_header.
* Input parameter @a retval is propagated.
*/
static int rtp_ops_mem_ap_header(const struct rtp_ops *ops,
- int retval, struct adiv5_ap *ap, uint64_t dbgbase, uint32_t apid)
+ int retval, struct adiv5_ap *ap, uint64_t dbgbase, uint32_t apid, int depth)
{
if (!ops->mem_ap_header)
return retval;
- int retval1 = ops->mem_ap_header(retval, ap, dbgbase, apid, ops->priv);
+ int retval1 = ops->mem_ap_header(retval, ap, dbgbase, apid, depth, ops->priv);
if (retval != ERROR_OK)
return retval;
return retval1;
@@ -1528,13 +1738,18 @@ static int rtp_ops_rom_table_entry(const struct rtp_ops *ops,
*/
#define CORESIGHT_COMPONENT_FOUND (1)
-static int rtp_cs_component(const struct rtp_ops *ops,
- struct adiv5_ap *ap, target_addr_t dbgbase, int depth);
+static int rtp_ap(const struct rtp_ops *ops, struct adiv5_ap *ap, int depth);
+static int rtp_cs_component(enum coresight_access_mode mode, const struct rtp_ops *ops,
+ struct adiv5_ap *ap, target_addr_t dbgbase, bool *is_mem_ap, int depth);
-static int rtp_rom_loop(const struct rtp_ops *ops,
+static int rtp_rom_loop(enum coresight_access_mode mode, const struct rtp_ops *ops,
struct adiv5_ap *ap, target_addr_t base_address, int depth,
unsigned int width, unsigned int max_entries)
{
+ /* ADIv6 AP ROM table provide offset from current AP */
+ if (mode == CS_ACCESS_AP)
+ base_address = ap->ap_num;
+
assert(IS_ALIGNED(base_address, ARM_CS_ALIGN));
unsigned int offset = 0;
@@ -1544,10 +1759,10 @@ static int rtp_rom_loop(const struct rtp_ops *ops,
target_addr_t component_base;
unsigned int saved_offset = offset;
- int retval = mem_ap_read_u32(ap, base_address + offset, &romentry_low);
+ int retval = dap_queue_read_reg(mode, ap, base_address, offset, &romentry_low);
offset += 4;
if (retval == ERROR_OK && width == 64) {
- retval = mem_ap_read_u32(ap, base_address + offset, &romentry_high);
+ retval = dap_queue_read_reg(mode, ap, base_address, offset, &romentry_high);
offset += 4;
}
if (retval == ERROR_OK)
@@ -1581,7 +1796,18 @@ static int rtp_rom_loop(const struct rtp_ops *ops,
continue;
/* Recurse */
- retval = rtp_cs_component(ops, ap, component_base, depth + 1);
+ if (mode == CS_ACCESS_AP) {
+ struct adiv5_ap *next_ap = dap_get_ap(ap->dap, component_base);
+ if (!next_ap) {
+ LOG_DEBUG("Wrong AP # 0x%" PRIx64, component_base);
+ continue;
+ }
+ retval = rtp_ap(ops, next_ap, depth + 1);
+ dap_put_ap(next_ap);
+ } else {
+ /* mode == CS_ACCESS_MEM_AP */
+ retval = rtp_cs_component(mode, ops, ap, component_base, NULL, depth + 1);
+ }
if (retval == CORESIGHT_COMPONENT_FOUND)
return CORESIGHT_COMPONENT_FOUND;
if (retval != ERROR_OK) {
@@ -1594,18 +1820,21 @@ static int rtp_rom_loop(const struct rtp_ops *ops,
return ERROR_OK;
}
-static int rtp_cs_component(const struct rtp_ops *ops,
- struct adiv5_ap *ap, target_addr_t base_address, int depth)
+static int rtp_cs_component(enum coresight_access_mode mode, const struct rtp_ops *ops,
+ struct adiv5_ap *ap, target_addr_t base_address, bool *is_mem_ap, int depth)
{
struct cs_component_vals v;
int retval;
assert(IS_ALIGNED(base_address, ARM_CS_ALIGN));
+ if (is_mem_ap)
+ *is_mem_ap = false;
+
if (depth > ROM_TABLE_MAX_DEPTH)
retval = ERROR_FAIL;
else
- retval = rtp_read_cs_regs(ap, base_address, &v);
+ retval = rtp_read_cs_regs(mode, ap, base_address, &v);
retval = rtp_ops_cs_component(ops, retval, &v, depth);
if (retval == CORESIGHT_COMPONENT_FOUND)
@@ -1619,37 +1848,64 @@ static int rtp_cs_component(const struct rtp_ops *ops,
const unsigned int class = ARM_CS_CIDR_CLASS(v.cid);
if (class == ARM_CS_CLASS_0X1_ROM_TABLE)
- return rtp_rom_loop(ops, ap, base_address, depth, 32, 960);
+ return rtp_rom_loop(mode, ops, ap, base_address, depth, 32, 960);
if (class == ARM_CS_CLASS_0X9_CS_COMPONENT) {
if ((v.devarch & ARM_CS_C9_DEVARCH_PRESENT) == 0)
return ERROR_OK;
+ if (is_mem_ap) {
+ if ((v.devarch & DEVARCH_ID_MASK) == DEVARCH_MEM_AP)
+ *is_mem_ap = true;
+
+ /* SoC-600 APv1 Adapter */
+ if ((v.devarch & DEVARCH_ID_MASK) == DEVARCH_UNKNOWN_V2 &&
+ ARM_CS_PIDR_DESIGNER(v.pid) == ARM_ID &&
+ ARM_CS_PIDR_PART(v.pid) == 0x9e5)
+ *is_mem_ap = true;
+ }
+
/* quit if not ROM table */
if ((v.devarch & DEVARCH_ID_MASK) != DEVARCH_ROM_C_0X9)
return ERROR_OK;
if ((v.devid & ARM_CS_C9_DEVID_FORMAT_MASK) == ARM_CS_C9_DEVID_FORMAT_64BIT)
- return rtp_rom_loop(ops, ap, base_address, depth, 64, 256);
+ return rtp_rom_loop(mode, ops, ap, base_address, depth, 64, 256);
else
- return rtp_rom_loop(ops, ap, base_address, depth, 32, 512);
+ return rtp_rom_loop(mode, ops, ap, base_address, depth, 32, 512);
}
/* Class other than 0x1 and 0x9 */
return ERROR_OK;
}
-static int rtp_ap(const struct rtp_ops *ops, struct adiv5_ap *ap)
+static int rtp_ap(const struct rtp_ops *ops, struct adiv5_ap *ap, int depth)
{
- int retval;
uint32_t apid;
target_addr_t dbgbase, invalid_entry;
+ int retval = rtp_ops_ap_header(ops, ap, depth);
+ if (retval != ERROR_OK || depth > ROM_TABLE_MAX_DEPTH)
+ return ERROR_OK; /* Don't abort recursion */
+
+ if (is_adiv6(ap->dap)) {
+ bool is_mem_ap;
+ retval = rtp_cs_component(CS_ACCESS_AP, ops, ap, 0, &is_mem_ap, depth);
+ if (retval == CORESIGHT_COMPONENT_FOUND)
+ return CORESIGHT_COMPONENT_FOUND;
+ if (retval != ERROR_OK)
+ return ERROR_OK; /* Don't abort recursion */
+
+ if (!is_mem_ap)
+ return ERROR_OK;
+ /* Continue for an ADIv6 MEM-AP or SoC-600 APv1 Adapter */
+ }
+
/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
retval = dap_get_debugbase(ap, &dbgbase, &apid);
if (retval != ERROR_OK)
return retval;
- retval = rtp_ops_mem_ap_header(ops, retval, ap, dbgbase, apid);
+ retval = rtp_ops_mem_ap_header(ops, retval, ap, dbgbase, apid, depth);
if (retval != ERROR_OK)
return retval;
@@ -1668,7 +1924,8 @@ static int rtp_ap(const struct rtp_ops *ops, struct adiv5_ap *ap)
invalid_entry = 0xFFFFFFFFul;
if (dbgbase != invalid_entry && (dbgbase & 0x3) != 0x2) {
- retval = rtp_cs_component(ops, ap, dbgbase & 0xFFFFFFFFFFFFF000ull, 0);
+ retval = rtp_cs_component(CS_ACCESS_MEM_AP, ops, ap,
+ dbgbase & 0xFFFFFFFFFFFFF000ull, NULL, depth);
if (retval == CORESIGHT_COMPONENT_FOUND)
return CORESIGHT_COMPONENT_FOUND;
}
@@ -1679,24 +1936,46 @@ static int rtp_ap(const struct rtp_ops *ops, struct adiv5_ap *ap)
/* Actions for command "dap info" */
+static int dap_info_ap_header(struct adiv5_ap *ap, int depth, void *priv)
+{
+ struct command_invocation *cmd = priv;
+
+ if (depth > ROM_TABLE_MAX_DEPTH) {
+ command_print(cmd, "\tTables too deep");
+ return ERROR_FAIL;
+ }
+
+ command_print(cmd, "%sAP # 0x%" PRIx64, (depth) ? "\t\t" : "", ap->ap_num);
+ return ERROR_OK;
+}
+
static int dap_info_mem_ap_header(int retval, struct adiv5_ap *ap,
- target_addr_t dbgbase, uint32_t apid, void *priv)
+ target_addr_t dbgbase, uint32_t apid, int depth, void *priv)
{
struct command_invocation *cmd = priv;
target_addr_t invalid_entry;
+ char tabs[17] = "";
if (retval != ERROR_OK) {
command_print(cmd, "\t\tCan't read MEM-AP, the corresponding core might be turned off");
return retval;
}
- command_print(cmd, "AP ID register 0x%8.8" PRIx32, apid);
+ if (depth > ROM_TABLE_MAX_DEPTH) {
+ command_print(cmd, "\tTables too deep");
+ return ERROR_FAIL;
+ }
+
+ if (depth)
+ snprintf(tabs, sizeof(tabs), "\t[L%02d] ", depth);
+
+ command_print(cmd, "\t\tAP ID register 0x%8.8" PRIx32, apid);
if (apid == 0) {
- command_print(cmd, "No AP found at this ap 0x%x", ap->ap_num);
+ command_print(cmd, "\t\tNo AP found at this AP#0x%" PRIx64, ap->ap_num);
return ERROR_FAIL;
}
- command_print(cmd, "\tType is %s", ap_type_to_description(apid & AP_TYPE_MASK));
+ command_print(cmd, "\t\tType is %s", ap_type_to_description(apid & AP_TYPE_MASK));
/* NOTE: a MEM-AP may have a single CoreSight component that's
* not a ROM table ... or have no such components at all.
@@ -1709,15 +1988,15 @@ static int dap_info_mem_ap_header(int retval, struct adiv5_ap *ap,
else
invalid_entry = 0xFFFFFFFFul;
- command_print(cmd, "MEM-AP BASE " TARGET_ADDR_FMT, dbgbase);
+ command_print(cmd, "%sMEM-AP BASE " TARGET_ADDR_FMT, tabs, dbgbase);
if (dbgbase == invalid_entry || (dbgbase & 0x3) == 0x2) {
- command_print(cmd, "\tNo ROM table present");
+ command_print(cmd, "\t\tNo ROM table present");
} else {
if (dbgbase & 0x01)
- command_print(cmd, "\tValid ROM table present");
+ command_print(cmd, "\t\tValid ROM table present");
else
- command_print(cmd, "\tROM table in legacy format");
+ command_print(cmd, "\t\tROM table in legacy format");
}
}
@@ -1733,7 +2012,8 @@ static int dap_info_cs_component(int retval, struct cs_component_vals *v, int de
return ERROR_FAIL;
}
- command_print(cmd, "\t\tComponent base address " TARGET_ADDR_FMT, v->component_base);
+ if (v->mode == CS_ACCESS_MEM_AP)
+ command_print(cmd, "\t\tComponent base address " TARGET_ADDR_FMT, v->component_base);
if (retval != ERROR_OK) {
command_print(cmd, "\t\tCan't read component, the corresponding core might be turned off");
@@ -1844,13 +2124,14 @@ static int dap_info_rom_table_entry(int retval, int depth,
int dap_info_command(struct command_invocation *cmd, struct adiv5_ap *ap)
{
struct rtp_ops dap_info_ops = {
+ .ap_header = dap_info_ap_header,
.mem_ap_header = dap_info_mem_ap_header,
.cs_component = dap_info_cs_component,
.rom_table_entry = dap_info_rom_table_entry,
.priv = cmd,
};
- return rtp_ap(&dap_info_ops, ap);
+ return rtp_ap(&dap_info_ops, ap, 0);
}
/* Actions for dap_lookup_cs_component() */
@@ -1861,6 +2142,7 @@ struct dap_lookup_data {
unsigned int type;
/* output */
uint64_t component_base;
+ uint64_t ap_num;
};
static int dap_lookup_cs_component_cs_component(int retval,
@@ -1889,6 +2171,7 @@ static int dap_lookup_cs_component_cs_component(int retval,
/* Found! */
lookup->component_base = v->component_base;
+ lookup->ap_num = v->ap->ap_num;
return CORESIGHT_COMPONENT_FOUND;
}
@@ -1900,14 +2183,20 @@ int dap_lookup_cs_component(struct adiv5_ap *ap, uint8_t type,
.idx = core_id,
};
struct rtp_ops dap_lookup_cs_component_ops = {
+ .ap_header = NULL,
.mem_ap_header = NULL,
.cs_component = dap_lookup_cs_component_cs_component,
.rom_table_entry = NULL,
.priv = &lookup,
};
- int retval = rtp_ap(&dap_lookup_cs_component_ops, ap);
+ int retval = rtp_ap(&dap_lookup_cs_component_ops, ap, 0);
if (retval == CORESIGHT_COMPONENT_FOUND) {
+ if (lookup.ap_num != ap->ap_num) {
+ /* TODO: handle search from root ROM table */
+ LOG_DEBUG("CS lookup ended in AP # 0x%" PRIx64 ". Ignore it", lookup.ap_num);
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
LOG_DEBUG("CS lookup found at 0x%" PRIx64, lookup.component_base);
*addr = lookup.component_base;
return ERROR_OK;
@@ -1936,7 +2225,7 @@ static const struct jim_nvp nvp_config_opts[] = {
};
static int adiv5_jim_spot_configure(struct jim_getopt_info *goi,
- struct adiv5_dap **dap_p, int *ap_num_p, uint32_t *base_p)
+ struct adiv5_dap **dap_p, uint64_t *ap_num_p, uint32_t *base_p)
{
assert(dap_p && ap_num_p);
@@ -1991,11 +2280,13 @@ static int adiv5_jim_spot_configure(struct jim_getopt_info *goi,
case CFG_AP_NUM:
if (goi->isconfigure) {
+ /* jim_wide is a signed 64 bits int, ap_num is unsigned with max 52 bits */
jim_wide ap_num;
e = jim_getopt_wide(goi, &ap_num);
if (e != JIM_OK)
return e;
- if (ap_num < 0 || ap_num > DP_APSEL_MAX) {
+ /* we still don't know dap->adi_version */
+ if (ap_num < 0 || (ap_num > DP_APSEL_MAX && (ap_num & 0xfff))) {
Jim_SetResultString(goi->interp, "Invalid AP number!", -1);
return JIM_ERR;
}
@@ -2100,15 +2391,27 @@ int adiv5_mem_ap_spot_init(struct adiv5_mem_ap_spot *p)
COMMAND_HANDLER(handle_dap_info_command)
{
struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
- uint32_t apsel;
+ uint64_t apsel;
switch (CMD_ARGC) {
case 0:
apsel = dap->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
- if (apsel > DP_APSEL_MAX) {
+ if (!strcmp(CMD_ARGV[0], "root")) {
+ if (!is_adiv6(dap)) {
+ command_print(CMD, "Option \"root\" not allowed with ADIv5 DAP");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ int retval = adiv6_dap_read_baseptr(CMD, dap, &apsel);
+ if (retval != ERROR_OK) {
+ command_print(CMD, "Failed reading DAP baseptr");
+ return retval;
+ }
+ break;
+ }
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
+ if (!is_ap_num_valid(dap, apsel)) {
command_print(CMD, "Invalid AP number");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -2117,13 +2420,22 @@ COMMAND_HANDLER(handle_dap_info_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
- return dap_info_command(CMD, &dap->ap[apsel]);
+ struct adiv5_ap *ap = dap_get_ap(dap, apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+
+ int retval = dap_info_command(CMD, ap);
+ dap_put_ap(ap);
+ return retval;
}
COMMAND_HANDLER(dap_baseaddr_command)
{
struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
- uint32_t apsel, baseaddr_lower, baseaddr_upper;
+ uint64_t apsel;
+ uint32_t baseaddr_lower, baseaddr_upper;
struct adiv5_ap *ap;
target_addr_t baseaddr;
int retval;
@@ -2135,9 +2447,8 @@ COMMAND_HANDLER(dap_baseaddr_command)
apsel = dap->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
- /* AP address is in bits 31:24 of DP_SELECT */
- if (apsel > DP_APSEL_MAX) {
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
+ if (!is_ap_num_valid(dap, apsel)) {
command_print(CMD, "Invalid AP number");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -2152,19 +2463,25 @@ COMMAND_HANDLER(dap_baseaddr_command)
* use the ID register to verify it's a MEM-AP.
*/
- ap = dap_ap(dap, apsel);
- retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE, &baseaddr_lower);
+ ap = dap_get_ap(dap, apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE(dap), &baseaddr_lower);
if (retval == ERROR_OK && ap->cfg_reg == MEM_AP_REG_CFG_INVALID)
- retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &ap->cfg_reg);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG(dap), &ap->cfg_reg);
if (retval == ERROR_OK && (ap->cfg_reg == MEM_AP_REG_CFG_INVALID || is_64bit_ap(ap))) {
/* MEM_AP_REG_BASE64 is defined as 'RES0'; can be read and then ignored on 32 bits AP */
- retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE64, &baseaddr_upper);
+ retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE64(dap), &baseaddr_upper);
}
if (retval == ERROR_OK)
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK)
return retval;
@@ -2180,22 +2497,35 @@ COMMAND_HANDLER(dap_baseaddr_command)
COMMAND_HANDLER(dap_memaccess_command)
{
struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
+ struct adiv5_ap *ap;
uint32_t memaccess_tck;
switch (CMD_ARGC) {
case 0:
- memaccess_tck = dap->ap[dap->apsel].memaccess_tck;
+ ap = dap_get_ap(dap, dap->apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+ memaccess_tck = ap->memaccess_tck;
break;
case 1:
+ ap = dap_get_config_ap(dap, dap->apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], memaccess_tck);
+ ap->memaccess_tck = memaccess_tck;
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
}
- dap->ap[dap->apsel].memaccess_tck = memaccess_tck;
+
+ dap_put_ap(ap);
command_print(CMD, "memory bus access delay set to %" PRIu32 " tck",
- dap->ap[dap->apsel].memaccess_tck);
+ memaccess_tck);
return ERROR_OK;
}
@@ -2203,16 +2533,15 @@ COMMAND_HANDLER(dap_memaccess_command)
COMMAND_HANDLER(dap_apsel_command)
{
struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
- uint32_t apsel;
+ uint64_t apsel;
switch (CMD_ARGC) {
case 0:
- command_print(CMD, "%" PRIu32, dap->apsel);
+ command_print(CMD, "0x%" PRIx64, dap->apsel);
return ERROR_OK;
case 1:
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
- /* AP address is in bits 31:24 of DP_SELECT */
- if (apsel > DP_APSEL_MAX) {
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
+ if (!is_ap_num_valid(dap, apsel)) {
command_print(CMD, "Invalid AP number");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -2228,14 +2557,19 @@ COMMAND_HANDLER(dap_apsel_command)
COMMAND_HANDLER(dap_apcsw_command)
{
struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
- uint32_t apcsw = dap->ap[dap->apsel].csw_default;
+ struct adiv5_ap *ap;
uint32_t csw_val, csw_mask;
switch (CMD_ARGC) {
case 0:
- command_print(CMD, "ap %" PRIu32 " selected, csw 0x%8.8" PRIx32,
- dap->apsel, apcsw);
- return ERROR_OK;
+ ap = dap_get_ap(dap, dap->apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+ command_print(CMD, "AP#0x%" PRIx64 " selected, csw 0x%8.8" PRIx32,
+ dap->apsel, ap->csw_default);
+ break;
case 1:
if (strcmp(CMD_ARGV[0], "default") == 0)
csw_val = CSW_AHB_DEFAULT;
@@ -2246,7 +2580,12 @@ COMMAND_HANDLER(dap_apcsw_command)
LOG_ERROR("CSW value cannot include 'Size' and 'AddrInc' bit-fields");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
- apcsw = csw_val;
+ ap = dap_get_config_ap(dap, dap->apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+ ap->csw_default = csw_val;
break;
case 2:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], csw_val);
@@ -2255,14 +2594,19 @@ COMMAND_HANDLER(dap_apcsw_command)
LOG_ERROR("CSW mask cannot include 'Size' and 'AddrInc' bit-fields");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
- apcsw = (apcsw & ~csw_mask) | (csw_val & csw_mask);
+ ap = dap_get_config_ap(dap, dap->apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+ ap->csw_default = (ap->csw_default & ~csw_mask) | (csw_val & csw_mask);
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
}
- dap->ap[dap->apsel].csw_default = apcsw;
+ dap_put_ap(ap);
- return 0;
+ return ERROR_OK;
}
@@ -2270,7 +2614,8 @@ COMMAND_HANDLER(dap_apcsw_command)
COMMAND_HANDLER(dap_apid_command)
{
struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
- uint32_t apsel, apid;
+ uint64_t apsel;
+ uint32_t apid;
int retval;
switch (CMD_ARGC) {
@@ -2278,9 +2623,8 @@ COMMAND_HANDLER(dap_apid_command)
apsel = dap->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
- /* AP address is in bits 31:24 of DP_SELECT */
- if (apsel > DP_APSEL_MAX) {
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
+ if (!is_ap_num_valid(dap, apsel)) {
command_print(CMD, "Invalid AP number");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -2289,10 +2633,18 @@ COMMAND_HANDLER(dap_apid_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
- retval = dap_queue_ap_read(dap_ap(dap, apsel), AP_REG_IDR, &apid);
- if (retval != ERROR_OK)
+ struct adiv5_ap *ap = dap_get_ap(dap, apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+ retval = dap_queue_ap_read(ap, AP_REG_IDR(dap), &apid);
+ if (retval != ERROR_OK) {
+ dap_put_ap(ap);
return retval;
+ }
retval = dap_run(dap);
+ dap_put_ap(ap);
if (retval != ERROR_OK)
return retval;
@@ -2304,38 +2656,47 @@ COMMAND_HANDLER(dap_apid_command)
COMMAND_HANDLER(dap_apreg_command)
{
struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
- uint32_t apsel, reg, value;
- struct adiv5_ap *ap;
+ uint64_t apsel;
+ uint32_t reg, value;
int retval;
if (CMD_ARGC < 2 || CMD_ARGC > 3)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
- /* AP address is in bits 31:24 of DP_SELECT */
- if (apsel > DP_APSEL_MAX) {
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
+ if (!is_ap_num_valid(dap, apsel)) {
command_print(CMD, "Invalid AP number");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
- ap = dap_ap(dap, apsel);
-
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], reg);
- if (reg >= 256 || (reg & 3)) {
- command_print(CMD, "Invalid reg value (should be less than 256 and 4 bytes aligned)");
- return ERROR_COMMAND_ARGUMENT_INVALID;
+ if (is_adiv6(dap)) {
+ if (reg >= 4096 || (reg & 3)) {
+ command_print(CMD, "Invalid reg value (should be less than 4096 and 4 bytes aligned)");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ } else { /* ADI version 5 */
+ if (reg >= 256 || (reg & 3)) {
+ command_print(CMD, "Invalid reg value (should be less than 256 and 4 bytes aligned)");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ }
+
+ struct adiv5_ap *ap = dap_get_ap(dap, apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
}
if (CMD_ARGC == 3) {
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value);
- switch (reg) {
- case MEM_AP_REG_CSW:
+ /* see if user supplied register address is a match for the CSW or TAR register */
+ if (reg == MEM_AP_REG_CSW(dap)) {
ap->csw_value = 0; /* invalid, in case write fails */
retval = dap_queue_ap_write(ap, reg, value);
if (retval == ERROR_OK)
ap->csw_value = value;
- break;
- case MEM_AP_REG_TAR:
+ } else if (reg == MEM_AP_REG_TAR(dap)) {
retval = dap_queue_ap_write(ap, reg, value);
if (retval == ERROR_OK)
ap->tar_value = (ap->tar_value & ~0xFFFFFFFFull) | value;
@@ -2346,8 +2707,7 @@ COMMAND_HANDLER(dap_apreg_command)
/* if tar_valid is false. */
ap->tar_valid = false;
}
- break;
- case MEM_AP_REG_TAR64:
+ } else if (reg == MEM_AP_REG_TAR64(dap)) {
retval = dap_queue_ap_write(ap, reg, value);
if (retval == ERROR_OK)
ap->tar_value = (ap->tar_value & 0xFFFFFFFFull) | (((target_addr_t)value) << 32);
@@ -2355,10 +2715,8 @@ COMMAND_HANDLER(dap_apreg_command)
/* See above comment for the MEM_AP_REG_TAR failed write case */
ap->tar_valid = false;
}
- break;
- default:
+ } else {
retval = dap_queue_ap_write(ap, reg, value);
- break;
}
} else {
retval = dap_queue_ap_read(ap, reg, &value);
@@ -2366,6 +2724,8 @@ COMMAND_HANDLER(dap_apreg_command)
if (retval == ERROR_OK)
retval = dap_run(dap);
+ dap_put_ap(ap);
+
if (retval != ERROR_OK)
return retval;
@@ -2415,14 +2775,21 @@ COMMAND_HANDLER(dap_ti_be_32_quirks_command)
"TI BE-32 quirks mode");
}
+COMMAND_HANDLER(dap_nu_npcx_quirks_command)
+{
+ struct adiv5_dap *dap = adiv5_get_dap(CMD_DATA);
+ return CALL_COMMAND_HANDLER(handle_command_parse_bool, &dap->nu_npcx_quirks,
+ "Nuvoton NPCX quirks mode");
+}
+
const struct command_registration dap_instance_commands[] = {
{
.name = "info",
.handler = handle_dap_info_command,
.mode = COMMAND_EXEC,
- .help = "display ROM table for MEM-AP "
- "(default currently selected AP)",
- .usage = "[ap_num]",
+ .help = "display ROM table for specified MEM-AP (default currently selected AP) "
+ "or the ADIv6 root ROM table",
+ .usage = "[ap_num | 'root']",
},
{
.name = "apsel",
@@ -2487,5 +2854,12 @@ const struct command_registration dap_instance_commands[] = {
.help = "set/get quirks mode for TI TMS450/TMS570 processors",
.usage = "[enable]",
},
+ {
+ .name = "nu_npcx_quirks",
+ .handler = dap_nu_npcx_quirks_command,
+ .mode = COMMAND_CONFIG,
+ .help = "set/get quirks mode for Nuvoton NPCX controllers",
+ .usage = "[enable]",
+ },
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 8c9a60f..3eddbc0 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
@@ -5,18 +7,7 @@
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
+ * Copyright (C) 2019-2021, Ampere Computing LLC *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM_ADI_V5_H
@@ -53,11 +44,15 @@
*/
#define DP_DPIDR BANK_REG(0x0, 0x0) /* DPv1+: ro */
#define DP_ABORT BANK_REG(0x0, 0x0) /* DPv1+: SWD: wo */
+#define DP_DPIDR1 BANK_REG(0x1, 0x0) /* DPv3: ro */
+#define DP_BASEPTR0 BANK_REG(0x2, 0x0) /* DPv3: ro */
+#define DP_BASEPTR1 BANK_REG(0x3, 0x0) /* DPv3: ro */
#define DP_CTRL_STAT BANK_REG(0x0, 0x4) /* DPv0+: rw */
#define DP_DLCR BANK_REG(0x1, 0x4) /* DPv1+: SWD: rw */
#define DP_TARGETID BANK_REG(0x2, 0x4) /* DPv2: ro */
#define DP_DLPIDR BANK_REG(0x3, 0x4) /* DPv2: ro */
#define DP_EVENTSTAT BANK_REG(0x4, 0x4) /* DPv2: ro */
+#define DP_SELECT1 BANK_REG(0x5, 0x4) /* DPv3: ro */
#define DP_RESEND BANK_REG(0x0, 0x8) /* DPv1+: SWD: ro */
#define DP_SELECT BANK_REG(0x0, 0x8) /* DPv0+: JTAG: rw; SWD: wo */
#define DP_RDBUFF BANK_REG(0x0, 0xC) /* DPv0+: ro */
@@ -76,6 +71,13 @@
#define WDERRCLR (1UL << 3) /* SWD-only */
#define ORUNERRCLR (1UL << 4) /* SWD-only */
+/* Fields of register DP_DPIDR1 */
+#define DP_DPIDR1_ASIZE_MASK (0x7F)
+#define DP_DPIDR1_ERRMODE BIT(7)
+
+/* Fields of register DP_BASEPTR0 */
+#define DP_BASEPTR0_VALID BIT(0)
+
/* Fields of the DP's CTRL/STAT register */
#define CORUNDETECT (1UL << 0)
#define SSTICKYORUN (1UL << 1)
@@ -100,8 +102,8 @@
#define DP_SELECT_DPBANK 0x0000000F
#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */
-#define DP_APSEL_MAX (255)
-#define DP_APSEL_INVALID (-1)
+#define DP_APSEL_MAX (255) /* for ADIv5 only */
+#define DP_APSEL_INVALID 0xF00 /* more than DP_APSEL_MAX and not ADIv6 aligned 4k */
#define DP_TARGETSEL_INVALID 0xFFFFFFFFU
#define DP_TARGETSEL_DPID_MASK 0x0FFFFFFFU
@@ -110,20 +112,49 @@
/* MEM-AP register addresses */
-#define MEM_AP_REG_CSW 0x00
-#define MEM_AP_REG_TAR 0x04
-#define MEM_AP_REG_TAR64 0x08 /* RW: Large Physical Address Extension */
-#define MEM_AP_REG_DRW 0x0C /* RW: Data Read/Write register */
-#define MEM_AP_REG_BD0 0x10 /* RW: Banked Data register 0-3 */
-#define MEM_AP_REG_BD1 0x14
-#define MEM_AP_REG_BD2 0x18
-#define MEM_AP_REG_BD3 0x1C
-#define MEM_AP_REG_MBT 0x20 /* --: Memory Barrier Transfer register */
-#define MEM_AP_REG_BASE64 0xF0 /* RO: Debug Base Address (LA) register */
-#define MEM_AP_REG_CFG 0xF4 /* RO: Configuration register */
-#define MEM_AP_REG_BASE 0xF8 /* RO: Debug Base Address register */
+#define ADIV5_MEM_AP_REG_CSW (0x00)
+#define ADIV5_MEM_AP_REG_TAR (0x04)
+#define ADIV5_MEM_AP_REG_TAR64 (0x08) /* RW: Large Physical Address Extension */
+#define ADIV5_MEM_AP_REG_DRW (0x0C) /* RW: Data Read/Write register */
+#define ADIV5_MEM_AP_REG_BD0 (0x10) /* RW: Banked Data register 0-3 */
+#define ADIV5_MEM_AP_REG_BD1 (0x14)
+#define ADIV5_MEM_AP_REG_BD2 (0x18)
+#define ADIV5_MEM_AP_REG_BD3 (0x1C)
+#define ADIV5_MEM_AP_REG_MBT (0x20) /* --: Memory Barrier Transfer register */
+#define ADIV5_MEM_AP_REG_BASE64 (0xF0) /* RO: Debug Base Address (LA) register */
+#define ADIV5_MEM_AP_REG_CFG (0xF4) /* RO: Configuration register */
+#define ADIV5_MEM_AP_REG_BASE (0xF8) /* RO: Debug Base Address register */
+
+#define ADIV6_MEM_AP_REG_CSW (0xD00 + ADIV5_MEM_AP_REG_CSW)
+#define ADIV6_MEM_AP_REG_TAR (0xD00 + ADIV5_MEM_AP_REG_TAR)
+#define ADIV6_MEM_AP_REG_TAR64 (0xD00 + ADIV5_MEM_AP_REG_TAR64)
+#define ADIV6_MEM_AP_REG_DRW (0xD00 + ADIV5_MEM_AP_REG_DRW)
+#define ADIV6_MEM_AP_REG_BD0 (0xD00 + ADIV5_MEM_AP_REG_BD0)
+#define ADIV6_MEM_AP_REG_BD1 (0xD00 + ADIV5_MEM_AP_REG_BD1)
+#define ADIV6_MEM_AP_REG_BD2 (0xD00 + ADIV5_MEM_AP_REG_BD2)
+#define ADIV6_MEM_AP_REG_BD3 (0xD00 + ADIV5_MEM_AP_REG_BD3)
+#define ADIV6_MEM_AP_REG_MBT (0xD00 + ADIV5_MEM_AP_REG_MBT)
+#define ADIV6_MEM_AP_REG_BASE64 (0xD00 + ADIV5_MEM_AP_REG_BASE64)
+#define ADIV6_MEM_AP_REG_CFG (0xD00 + ADIV5_MEM_AP_REG_CFG)
+#define ADIV6_MEM_AP_REG_BASE (0xD00 + ADIV5_MEM_AP_REG_BASE)
+
+#define MEM_AP_REG_CSW(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_CSW : ADIV5_MEM_AP_REG_CSW)
+#define MEM_AP_REG_TAR(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_TAR : ADIV5_MEM_AP_REG_TAR)
+#define MEM_AP_REG_TAR64(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_TAR64 : ADIV5_MEM_AP_REG_TAR64)
+#define MEM_AP_REG_DRW(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_DRW : ADIV5_MEM_AP_REG_DRW)
+#define MEM_AP_REG_BD0(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_BD0 : ADIV5_MEM_AP_REG_BD0)
+#define MEM_AP_REG_BD1(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_BD1 : ADIV5_MEM_AP_REG_BD1)
+#define MEM_AP_REG_BD2(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_BD2 : ADIV5_MEM_AP_REG_BD2)
+#define MEM_AP_REG_BD3(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_BD3 : ADIV5_MEM_AP_REG_BD3)
+#define MEM_AP_REG_MBT(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_MBT : ADIV5_MEM_AP_REG_MBT)
+#define MEM_AP_REG_BASE64(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_BASE64 : ADIV5_MEM_AP_REG_BASE64)
+#define MEM_AP_REG_CFG(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_CFG : ADIV5_MEM_AP_REG_CFG)
+#define MEM_AP_REG_BASE(dap) (is_adiv6(dap) ? ADIV6_MEM_AP_REG_BASE : ADIV5_MEM_AP_REG_BASE)
+
/* Generic AP register address */
-#define AP_REG_IDR 0xFC /* RO: Identification Register */
+#define ADIV5_AP_REG_IDR (0xFC) /* RO: Identification Register */
+#define ADIV6_AP_REG_IDR (0xD00 + ADIV5_AP_REG_IDR)
+#define AP_REG_IDR(dap) (is_adiv6(dap) ? ADIV6_AP_REG_IDR : ADIV5_AP_REG_IDR)
/* Fields of the MEM-AP's CSW register */
#define CSW_SIZE_MASK 7
@@ -216,9 +247,11 @@ struct adiv5_ap {
struct adiv5_dap *dap;
/**
- * Number of this AP.
+ * ADIv5: Number of this AP (0~255)
+ * ADIv6: Base address of this AP (4k aligned)
+ * TODO: to be more coherent, it should be renamed apsel
*/
- uint8_t ap_num;
+ uint64_t ap_num;
/**
* Default value for (MEM-AP) AP_REG_CSW register.
@@ -259,6 +292,12 @@ struct adiv5_ap {
/* MEM AP configuration register indicating LPAE support */
uint32_t cfg_reg;
+
+ /* references counter */
+ unsigned int refcount;
+
+ /* AP referenced during config. Never put it, even when refcount reaches zero */
+ bool config_ap_never_release;
};
@@ -297,13 +336,13 @@ struct adiv5_dap {
struct adiv5_ap ap[DP_APSEL_MAX + 1];
/* The current manually selected AP by the "dap apsel" command */
- uint32_t apsel;
+ uint64_t apsel;
/**
* Cache for DP_SELECT register. A value of DP_SELECT_INVALID
* indicates no cached value and forces rewrite of the register.
*/
- uint32_t select;
+ uint64_t select;
/* information about current pending SWjDP-AHBAP transaction */
uint8_t ack;
@@ -320,6 +359,10 @@ struct adiv5_dap {
* swizzle appropriately. */
bool ti_be_32_quirks;
+ /* The Nuvoton NPCX M4 has an issue with writing to non-4-byte-aligned mmios.
+ * The work around is to repeat the data in all 4 bytes of DRW */
+ bool nu_npcx_quirks;
+
/**
* STLINK adapter need to know if last AP operation was read or write, and
* in case of write has to flush it with a dummy read from DP_RDBUFF
@@ -347,6 +390,12 @@ struct adiv5_dap {
* Record if enter in SWD required passing through DORMANT
*/
bool switch_through_dormant;
+
+ /** Indicates ADI version (5, 6 or 0 for unknown) being used */
+ unsigned int adi_version;
+
+ /* ADIv6 only field indicating ROM Table address size */
+ unsigned int asize;
};
/**
@@ -421,6 +470,18 @@ static inline bool is_64bit_ap(struct adiv5_ap *ap)
}
/**
+ * Check if DAP is ADIv6
+ *
+ * @param dap The DAP to test
+ *
+ * @return true for ADIv6, false for either ADIv5 or unknown version
+ */
+static inline bool is_adiv6(const struct adiv5_dap *dap)
+{
+ return dap->adi_version == 6;
+}
+
+/**
* Send an adi-v5 sequence to the DAP.
*
* @param dap The DAP used for reading.
@@ -486,6 +547,10 @@ static inline int dap_queue_ap_read(struct adiv5_ap *ap,
unsigned reg, uint32_t *data)
{
assert(ap->dap->ops);
+ if (ap->refcount == 0) {
+ ap->refcount = 1;
+ LOG_ERROR("BUG: refcount AP#0x%" PRIx64 " used without get", ap->ap_num);
+ }
return ap->dap->ops->queue_ap_read(ap, reg, data);
}
@@ -502,6 +567,10 @@ static inline int dap_queue_ap_write(struct adiv5_ap *ap,
unsigned reg, uint32_t data)
{
assert(ap->dap->ops);
+ if (ap->refcount == 0) {
+ ap->refcount = 1;
+ LOG_ERROR("BUG: refcount AP#0x%" PRIx64 " used without get", ap->ap_num);
+ }
return ap->dap->ops->queue_ap_write(ap, reg, data);
}
@@ -619,15 +688,25 @@ int mem_ap_init(struct adiv5_ap *ap);
/* Invalidate cached DP select and cached TAR and CSW of all APs */
void dap_invalidate_cache(struct adiv5_dap *dap);
-/* Probe Access Ports to find a particular type */
-int dap_find_ap(struct adiv5_dap *dap,
+/* read ADIv6 baseptr register */
+int adiv6_dap_read_baseptr(struct command_invocation *cmd, struct adiv5_dap *dap, target_addr_t *baseptr);
+
+/* test if ap_num is valid, based on current knowledge of dap */
+bool is_ap_num_valid(struct adiv5_dap *dap, uint64_t ap_num);
+
+/* Probe Access Ports to find a particular type. Increment AP refcount */
+int dap_find_get_ap(struct adiv5_dap *dap,
enum ap_type type_to_find,
struct adiv5_ap **ap_out);
-static inline struct adiv5_ap *dap_ap(struct adiv5_dap *dap, uint8_t ap_num)
-{
- return &dap->ap[ap_num];
-}
+/* Return AP with specified ap_num. Increment AP refcount */
+struct adiv5_ap *dap_get_ap(struct adiv5_dap *dap, uint64_t ap_num);
+
+/* Return AP with specified ap_num. Increment AP refcount and keep it non-zero */
+struct adiv5_ap *dap_get_config_ap(struct adiv5_dap *dap, uint64_t ap_num);
+
+/* Decrement AP refcount and release the AP when refcount reaches zero */
+int dap_put_ap(struct adiv5_ap *ap);
/** Check if SWD multidrop configuration is valid */
static inline bool dap_is_multidrop(struct adiv5_dap *dap)
@@ -660,7 +739,7 @@ extern const struct swd_driver *adiv5_dap_swd_driver(struct adiv5_dap *self);
extern int dap_cleanup_all(void);
struct adiv5_private_config {
- int ap_num;
+ uint64_t ap_num;
struct adiv5_dap *dap;
};
@@ -669,7 +748,7 @@ extern int adiv5_jim_configure(struct target *target, struct jim_getopt_info *go
struct adiv5_mem_ap_spot {
struct adiv5_dap *dap;
- int ap_num;
+ uint64_t ap_num;
uint32_t base;
};
diff --git a/src/target/arm_cti.c b/src/target/arm_cti.c
index 96927bf..3612874 100644
--- a/src/target/arm_cti.c
+++ b/src/target/arm_cti.c
@@ -1,20 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016 by Matthias Welwarsky *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -34,6 +22,7 @@ struct arm_cti {
struct list_head lh;
char *name;
struct adiv5_mem_ap_spot spot;
+ struct adiv5_ap *ap;
};
static LIST_HEAD(all_cti);
@@ -65,7 +54,7 @@ struct arm_cti *cti_instance_by_jim_obj(Jim_Interp *interp, Jim_Obj *o)
static int arm_cti_mod_reg_bits(struct arm_cti *self, unsigned int reg, uint32_t mask, uint32_t value)
{
- struct adiv5_ap *ap = dap_ap(self->spot.dap, self->spot.ap_num);
+ struct adiv5_ap *ap = self->ap;
uint32_t tmp;
/* Read register */
@@ -84,15 +73,14 @@ static int arm_cti_mod_reg_bits(struct arm_cti *self, unsigned int reg, uint32_t
int arm_cti_enable(struct arm_cti *self, bool enable)
{
- struct adiv5_ap *ap = dap_ap(self->spot.dap, self->spot.ap_num);
uint32_t val = enable ? 1 : 0;
- return mem_ap_write_atomic_u32(ap, self->spot.base + CTI_CTR, val);
+ return mem_ap_write_atomic_u32(self->ap, self->spot.base + CTI_CTR, val);
}
int arm_cti_ack_events(struct arm_cti *self, uint32_t event)
{
- struct adiv5_ap *ap = dap_ap(self->spot.dap, self->spot.ap_num);
+ struct adiv5_ap *ap = self->ap;
int retval;
uint32_t tmp;
@@ -134,19 +122,15 @@ int arm_cti_ungate_channel(struct arm_cti *self, uint32_t channel)
int arm_cti_write_reg(struct arm_cti *self, unsigned int reg, uint32_t value)
{
- struct adiv5_ap *ap = dap_ap(self->spot.dap, self->spot.ap_num);
-
- return mem_ap_write_atomic_u32(ap, self->spot.base + reg, value);
+ return mem_ap_write_atomic_u32(self->ap, self->spot.base + reg, value);
}
int arm_cti_read_reg(struct arm_cti *self, unsigned int reg, uint32_t *p_value)
{
- struct adiv5_ap *ap = dap_ap(self->spot.dap, self->spot.ap_num);
-
if (!p_value)
return ERROR_COMMAND_ARGUMENT_INVALID;
- return mem_ap_read_atomic_u32(ap, self->spot.base + reg, p_value);
+ return mem_ap_read_atomic_u32(self->ap, self->spot.base + reg, p_value);
}
int arm_cti_pulse_channel(struct arm_cti *self, uint32_t channel)
@@ -228,6 +212,8 @@ int arm_cti_cleanup_all(void)
struct arm_cti *obj, *tmp;
list_for_each_entry_safe(obj, tmp, &all_cti, lh) {
+ if (obj->ap)
+ dap_put_ap(obj->ap);
free(obj->name);
free(obj);
}
@@ -238,7 +224,7 @@ int arm_cti_cleanup_all(void)
COMMAND_HANDLER(handle_cti_dump)
{
struct arm_cti *cti = CMD_DATA;
- struct adiv5_ap *ap = dap_ap(cti->spot.dap, cti->spot.ap_num);
+ struct adiv5_ap *ap = cti->ap;
int retval = ERROR_OK;
for (int i = 0; (retval == ERROR_OK) && (i < (int)ARRAY_SIZE(cti_names)); i++)
@@ -518,6 +504,12 @@ static int cti_create(struct jim_getopt_info *goi)
list_add_tail(&cti->lh, &all_cti);
+ cti->ap = dap_get_ap(cti->spot.dap, cti->spot.ap_num);
+ if (!cti->ap) {
+ Jim_SetResultString(goi->interp, "Cannot get AP", -1);
+ return JIM_ERR;
+ }
+
return JIM_OK;
}
diff --git a/src/target/arm_cti.h b/src/target/arm_cti.h
index 7c4f7eb..cfcde65 100644
--- a/src/target/arm_cti.h
+++ b/src/target/arm_cti.h
@@ -1,20 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2016 by Matthias Welwarsky *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM_CTI_H
diff --git a/src/target/arm_dap.c b/src/target/arm_dap.c
index 2dba45d..e21136d 100644
--- a/src/target/arm_dap.c
+++ b/src/target/arm_dap.c
@@ -1,20 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016 by Matthias Welwarsky *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -50,7 +38,7 @@ static void dap_instance_init(struct adiv5_dap *dap)
/* Set up with safe defaults */
for (i = 0; i <= DP_APSEL_MAX; i++) {
dap->ap[i].dap = dap;
- dap->ap[i].ap_num = i;
+ dap->ap[i].ap_num = DP_APSEL_INVALID;
/* memaccess_tck max is 255 */
dap->ap[i].memaccess_tck = 255;
/* Number of bits for tar autoincrement, impl. dep. at least 10 */
@@ -58,6 +46,8 @@ static void dap_instance_init(struct adiv5_dap *dap)
/* default CSW value */
dap->ap[i].csw_default = CSW_AHB_DEFAULT;
dap->ap[i].cfg_reg = MEM_AP_REG_CFG_INVALID; /* mem_ap configuration reg (large physical addr, etc.) */
+ dap->ap[i].refcount = 0;
+ dap->ap[i].config_ap_never_release = false;
}
INIT_LIST_HEAD(&dap->cmd_journal);
INIT_LIST_HEAD(&dap->cmd_pool);
@@ -127,9 +117,34 @@ static int dap_init_all(void)
} else
dap->ops = &jtag_dp_ops;
+ if (dap->adi_version == 0) {
+ LOG_DEBUG("DAP %s configured by default to use ADIv5 protocol", jtag_tap_name(dap->tap));
+ dap->adi_version = 5;
+ } else {
+ LOG_DEBUG("DAP %s configured to use %s protocol by user cfg file", jtag_tap_name(dap->tap),
+ is_adiv6(dap) ? "ADIv6" : "ADIv5");
+ }
+
retval = dap->ops->connect(dap);
if (retval != ERROR_OK)
return retval;
+
+ /* see if address size of ROM Table is greater than 32-bits */
+ if (is_adiv6(dap)) {
+ uint32_t dpidr1;
+
+ retval = dap->ops->queue_dp_read(dap, DP_DPIDR1, &dpidr1);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("DAP read of DPIDR1 failed...");
+ return retval;
+ }
+ retval = dap_run(dap);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("DAP read of DPIDR1 failed...");
+ return retval;
+ }
+ dap->asize = dpidr1 & DP_DPIDR1_ASIZE_MASK;
+ }
}
return ERROR_OK;
@@ -142,6 +157,10 @@ int dap_cleanup_all(void)
list_for_each_entry_safe(obj, tmp, &all_dap, lh) {
dap = &obj->dap;
+ for (unsigned int i = 0; i <= DP_APSEL_MAX; i++) {
+ if (dap->ap[i].refcount != 0)
+ LOG_ERROR("BUG: refcount AP#%u still %u at exit", i, dap->ap[i].refcount);
+ }
if (dap->ops && dap->ops->quit)
dap->ops->quit(dap);
@@ -157,6 +176,8 @@ enum dap_cfg_param {
CFG_IGNORE_SYSPWRUPACK,
CFG_DP_ID,
CFG_INSTANCE_ID,
+ CFG_ADIV6,
+ CFG_ADIV5,
};
static const struct jim_nvp nvp_config_opts[] = {
@@ -164,6 +185,8 @@ static const struct jim_nvp nvp_config_opts[] = {
{ .name = "-ignore-syspwrupack", .value = CFG_IGNORE_SYSPWRUPACK },
{ .name = "-dp-id", .value = CFG_DP_ID },
{ .name = "-instance-id", .value = CFG_INSTANCE_ID },
+ { .name = "-adiv6", .value = CFG_ADIV6 },
+ { .name = "-adiv5", .value = CFG_ADIV5 },
{ .name = NULL, .value = -1 }
};
@@ -243,6 +266,12 @@ static int dap_configure(struct jim_getopt_info *goi, struct arm_dap_object *dap
dap->dap.multidrop_instance_id_valid = true;
break;
}
+ case CFG_ADIV6:
+ dap->dap.adi_version = 6;
+ break;
+ case CFG_ADIV5:
+ dap->dap.adi_version = 5;
+ break;
default:
break;
}
@@ -418,7 +447,7 @@ COMMAND_HANDLER(handle_dap_info_command)
struct target *target = get_current_target(CMD_CTX);
struct arm *arm = target_to_arm(target);
struct adiv5_dap *dap = arm->dap;
- uint32_t apsel;
+ uint64_t apsel;
if (!dap) {
LOG_ERROR("DAP instance not available. Probably a HLA target...");
@@ -430,15 +459,34 @@ COMMAND_HANDLER(handle_dap_info_command)
apsel = dap->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
- if (apsel > DP_APSEL_MAX)
+ if (!strcmp(CMD_ARGV[0], "root")) {
+ if (!is_adiv6(dap)) {
+ command_print(CMD, "Option \"root\" not allowed with ADIv5 DAP");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ int retval = adiv6_dap_read_baseptr(CMD, dap, &apsel);
+ if (retval != ERROR_OK) {
+ command_print(CMD, "Failed reading DAP baseptr");
+ return retval;
+ }
+ break;
+ }
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
+ if (!is_ap_num_valid(dap, apsel))
return ERROR_COMMAND_SYNTAX_ERROR;
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
}
- return dap_info_command(CMD, &dap->ap[apsel]);
+ struct adiv5_ap *ap = dap_get_ap(dap, apsel);
+ if (!ap) {
+ command_print(CMD, "Cannot get AP");
+ return ERROR_FAIL;
+ }
+ int retval = dap_info_command(CMD, ap);
+ dap_put_ap(ap);
+ return retval;
}
static const struct command_registration dap_subcommand_handlers[] = {
@@ -467,9 +515,9 @@ static const struct command_registration dap_subcommand_handlers[] = {
.name = "info",
.handler = handle_dap_info_command,
.mode = COMMAND_EXEC,
- .help = "display ROM table for MEM-AP of current target "
- "(default currently selected AP)",
- .usage = "[ap_num]",
+ .help = "display ROM table for specified MEM-AP (default MEM-AP of current target) "
+ "or the ADIv6 root ROM table of current target's DAP",
+ .usage = "[ap_num | 'root']",
},
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index d3d27a9..749274f 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2009 by David Brownell *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index 6f15f4b..1be5674 100644
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM_DISASSEMBLER_H
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index e60ef22..5f7e929 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h
index 0172d9a..d35e9f6 100644
--- a/src/target/arm_dpm.h
+++ b/src/target/arm_dpm.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_TARGET_ARM_DPM_H
diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c
index 6a27e32..c1ec473 100644
--- a/src/target/arm_jtag.c
+++ b/src/target/arm_jtag.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm_jtag.h b/src/target/arm_jtag.h
index f3e0bc2..11b7c3e 100644
--- a/src/target/arm_jtag.h
+++ b/src/target/arm_jtag.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007-2010 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM_JTAG_H
diff --git a/src/target/arm_opcodes.h b/src/target/arm_opcodes.h
index 00035f5..c182f41 100644
--- a/src/target/arm_opcodes.h
+++ b/src/target/arm_opcodes.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2005 by Dominic Rath
* Dominic.Rath@gmx.de
@@ -10,19 +12,6 @@
*
* Copyright (C) 2009 by Øyvind Harboe
* oyvind.harboe@zylin.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_TARGET_ARM_OPCODES_H
diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c
index 507d1cd..b557589 100644
--- a/src/target/arm_semihosting.c
+++ b/src/target/arm_semihosting.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Marvell Technology Group Ltd. *
* Written by Nicolas Pitre <nico@marvell.com> *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2018 by Liviu Ionescu *
* <ilg@livius.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
diff --git a/src/target/arm_semihosting.h b/src/target/arm_semihosting.h
index cf1f8de..0a912a7 100644
--- a/src/target/arm_semihosting.h
+++ b/src/target/arm_semihosting.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Marvell Technology Group Ltd. *
* Written by Nicolas Pitre <nico@marvell.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM_SEMIHOSTING_H
diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index 480d9bc..058e3d3 100644
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Hongtao Zheng *
* hontor@126.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/arm_simulator.h b/src/target/arm_simulator.h
index 5bdbf56..e4a25d8 100644
--- a/src/target/arm_simulator.h
+++ b/src/target/arm_simulator.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM_SIMULATOR_H
diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
index fba3fec..7096db3 100644
--- a/src/target/arm_tpiu_swo.c
+++ b/src/target/arm_tpiu_swo.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/**
* @file
@@ -90,6 +90,7 @@ struct arm_tpiu_swo_event_action {
struct arm_tpiu_swo_object {
struct list_head lh;
struct adiv5_mem_ap_spot spot;
+ struct adiv5_ap *ap;
char *name;
struct arm_tpiu_swo_event_action *event_action;
/* record enable before init */
@@ -233,6 +234,9 @@ int arm_tpiu_swo_cleanup_all(void)
ea = next;
}
+ if (obj->ap)
+ dap_put_ap(obj->ap);
+
free(obj->name);
free(obj->out_filename);
free(obj);
@@ -596,7 +600,6 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
struct command *c = jim_to_command(interp);
struct arm_tpiu_swo_object *obj = c->jim_handler_data;
struct command_context *cmd_ctx = current_command_context(interp);
- struct adiv5_ap *tpiu_ap = dap_ap(obj->spot.dap, obj->spot.ap_num);
uint32_t value;
int retval;
@@ -614,8 +617,8 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
if (obj->enabled)
return JIM_OK;
- if (transport_is_hla() && obj->spot.ap_num > 0) {
- LOG_ERROR("Invalid access port %d. Only AP#0 allowed with hla transport", obj->spot.ap_num);
+ if (transport_is_hla() && obj->spot.ap_num != 0) {
+ LOG_ERROR("Invalid access port 0x%" PRIx64 ". Only AP#0 allowed with hla transport", obj->spot.ap_num);
return JIM_ERR;
}
@@ -644,21 +647,28 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
struct cortex_m_common *cm = target_to_cm(target);
obj->recheck_ap_cur_target = false;
obj->spot.ap_num = cm->armv7m.debug_ap->ap_num;
- tpiu_ap = dap_ap(obj->spot.dap, obj->spot.ap_num);
if (obj->spot.ap_num == 0)
LOG_INFO(MSG "Confirmed TPIU %s is on AP 0", obj->name);
else
- LOG_INFO(MSG "Target %s is on AP %d. Revised command is "
- "\'tpiu create %s -dap %s -ap-num %d\'",
+ LOG_INFO(MSG "Target %s is on AP#0x%" PRIx64 ". Revised command is "
+ "\'tpiu create %s -dap %s -ap-num 0x%" PRIx64 "\'",
target_name(target), obj->spot.ap_num,
obj->name, adiv5_dap_name(obj->spot.dap), obj->spot.ap_num);
}
/* END_DEPRECATED_TPIU */
+ if (!obj->ap) {
+ obj->ap = dap_get_ap(obj->spot.dap, obj->spot.ap_num);
+ if (!obj->ap) {
+ LOG_ERROR("Cannot get AP");
+ return JIM_ERR;
+ }
+ }
+
/* trigger the event before any attempt to R/W in the TPIU/SWO */
arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_PRE_ENABLE);
- retval = wrap_read_u32(target, tpiu_ap, obj->spot.base + TPIU_DEVID_OFFSET, &value);
+ retval = wrap_read_u32(target, obj->ap, obj->spot.base + TPIU_DEVID_OFFSET, &value);
if (retval != ERROR_OK) {
LOG_ERROR("Unable to read %s", obj->name);
return JIM_ERR;
@@ -684,7 +694,7 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
}
if (obj->pin_protocol == TPIU_SPPR_PROTOCOL_SYNC) {
- retval = wrap_read_u32(target, tpiu_ap, obj->spot.base + TPIU_SSPSR_OFFSET, &value);
+ retval = wrap_read_u32(target, obj->ap, obj->spot.base + TPIU_SSPSR_OFFSET, &value);
if (retval != ERROR_OK) {
LOG_ERROR("Cannot read TPIU register SSPSR");
return JIM_ERR;
@@ -759,26 +769,26 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
obj->swo_pin_freq = swo_pin_freq;
}
- retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_CSPSR_OFFSET, BIT(obj->port_width - 1));
+ retval = wrap_write_u32(target, obj->ap, obj->spot.base + TPIU_CSPSR_OFFSET, BIT(obj->port_width - 1));
if (retval != ERROR_OK)
goto error_exit;
- retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_ACPR_OFFSET, prescaler - 1);
+ retval = wrap_write_u32(target, obj->ap, obj->spot.base + TPIU_ACPR_OFFSET, prescaler - 1);
if (retval != ERROR_OK)
goto error_exit;
- retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_SPPR_OFFSET, obj->pin_protocol);
+ retval = wrap_write_u32(target, obj->ap, obj->spot.base + TPIU_SPPR_OFFSET, obj->pin_protocol);
if (retval != ERROR_OK)
goto error_exit;
- retval = wrap_read_u32(target, tpiu_ap, obj->spot.base + TPIU_FFCR_OFFSET, &value);
+ retval = wrap_read_u32(target, obj->ap, obj->spot.base + TPIU_FFCR_OFFSET, &value);
if (retval != ERROR_OK)
goto error_exit;
if (obj->en_formatter)
value |= BIT(1);
else
value &= ~BIT(1);
- retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_FFCR_OFFSET, value);
+ retval = wrap_write_u32(target, obj->ap, obj->spot.base + TPIU_FFCR_OFFSET, value);
if (retval != ERROR_OK)
goto error_exit;
@@ -1037,7 +1047,7 @@ COMMAND_HANDLER(handle_tpiu_deprecated_config_command)
struct cortex_m_common *cm = target_to_cm(target);
struct adiv5_private_config *pc = target->private_config;
struct adiv5_dap *dap = pc->dap;
- int ap_num = pc->ap_num;
+ uint64_t ap_num = pc->ap_num;
bool set_recheck_ap_cur_target = false;
LOG_INFO(MSG "Adding a TPIU \'%s.tpiu\' in the configuration", target_name(target));
@@ -1055,10 +1065,10 @@ COMMAND_HANDLER(handle_tpiu_deprecated_config_command)
set_recheck_ap_cur_target = true;
}
- LOG_INFO(MSG "Running: \'tpiu create %s.tpiu -dap %s -ap-num %d\'",
+ LOG_INFO(MSG "Running: \'tpiu create %s.tpiu -dap %s -ap-num 0x%" PRIx64 "\'",
target_name(target), adiv5_dap_name(dap), ap_num);
- retval = command_run_linef(CMD_CTX, "tpiu create %s.tpiu -dap %s -ap-num %d",
+ retval = command_run_linef(CMD_CTX, "tpiu create %s.tpiu -dap %s -ap-num 0x%" PRIx64,
target_name(target), adiv5_dap_name(dap), ap_num);
if (retval != ERROR_OK)
return retval;
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index b861cf5..48af503 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2018 by Liviu Ionescu *
* <ilg@livius.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -546,7 +535,7 @@ static struct reg_feature arm_gdb_dummy_fp_features = {
* Modern ARM cores use Vector Floating Point (VFP), if they
* have any floating point support. VFP is not FPA-compatible.
*/
-struct reg arm_gdb_dummy_fp_reg = {
+static struct reg arm_gdb_dummy_fp_reg = {
.name = "GDB dummy FPA register",
.value = (uint8_t *) arm_gdb_dummy_fp_value,
.valid = true,
@@ -563,7 +552,7 @@ static const uint8_t arm_gdb_dummy_fps_value[4];
* Dummy FPA status registers are required to support GDB on ARM.
* Register packets require an obsolete FPA status register.
*/
-struct reg arm_gdb_dummy_fps_reg = {
+static struct reg arm_gdb_dummy_fps_reg = {
.name = "GDB dummy FPA status register",
.value = (uint8_t *) arm_gdb_dummy_fps_value,
.valid = true,
@@ -916,32 +905,33 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
return ERROR_OK;
}
-COMMAND_HANDLER(handle_armv4_5_core_state_command)
+COMMAND_HANDLER(handle_arm_core_state_command)
{
struct target *target = get_current_target(CMD_CTX);
struct arm *arm = target_to_arm(target);
+ int ret = ERROR_OK;
if (!is_arm(arm)) {
command_print(CMD, "current target isn't an ARM");
return ERROR_FAIL;
}
- if (arm->core_type == ARM_CORE_TYPE_M_PROFILE) {
- /* armv7m not supported */
- command_print(CMD, "Unsupported Command");
- return ERROR_OK;
- }
-
if (CMD_ARGC > 0) {
- if (strcmp(CMD_ARGV[0], "arm") == 0)
- arm->core_state = ARM_STATE_ARM;
+ if (strcmp(CMD_ARGV[0], "arm") == 0) {
+ if (arm->core_type == ARM_CORE_TYPE_M_PROFILE) {
+ command_print(CMD, "arm mode not supported on Cortex-M");
+ ret = ERROR_FAIL;
+ } else {
+ arm->core_state = ARM_STATE_ARM;
+ }
+ }
if (strcmp(CMD_ARGV[0], "thumb") == 0)
arm->core_state = ARM_STATE_THUMB;
}
command_print(CMD, "core state: %s", arm_state_strings[arm->core_state]);
- return ERROR_OK;
+ return ret;
}
COMMAND_HANDLER(handle_arm_disassemble_command)
@@ -1127,8 +1117,6 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
return JIM_OK;
}
-extern const struct command_registration semihosting_common_handlers[];
-
static const struct command_registration arm_exec_command_handlers[] = {
{
.name = "reg",
@@ -1138,20 +1126,6 @@ static const struct command_registration arm_exec_command_handlers[] = {
.usage = "",
},
{
- .name = "core_state",
- .handler = handle_armv4_5_core_state_command,
- .mode = COMMAND_EXEC,
- .usage = "['arm'|'thumb']",
- .help = "display/change ARM core state",
- },
- {
- .name = "disassemble",
- .handler = handle_arm_disassemble_command,
- .mode = COMMAND_EXEC,
- .usage = "address [count ['thumb']]",
- .help = "disassemble instructions",
- },
- {
.name = "mcr",
.mode = COMMAND_EXEC,
.jim_handler = &jim_mcrmrc,
@@ -1166,10 +1140,32 @@ static const struct command_registration arm_exec_command_handlers[] = {
.usage = "cpnum op1 CRn CRm op2",
},
{
+ .chain = arm_all_profiles_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration arm_all_profiles_command_handlers[] = {
+ {
+ .name = "core_state",
+ .handler = handle_arm_core_state_command,
+ .mode = COMMAND_EXEC,
+ .usage = "['arm'|'thumb']",
+ .help = "display/change ARM core state",
+ },
+ {
+ .name = "disassemble",
+ .handler = handle_arm_disassemble_command,
+ .mode = COMMAND_EXEC,
+ .usage = "address [count ['thumb']]",
+ .help = "disassemble instructions",
+ },
+ {
.chain = semihosting_common_handlers,
},
COMMAND_REGISTRATION_DONE
};
+
const struct command_registration arm_command_handlers[] = {
{
.name = "arm",
diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index bef1cfe..250fa82 100644
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2009 by Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV4_5_H
diff --git a/src/target/armv4_5_cache.c b/src/target/armv4_5_cache.c
index eda8cb7..e12c43d 100644
--- a/src/target/armv4_5_cache.c
+++ b/src/target/armv4_5_cache.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv4_5_cache.h b/src/target/armv4_5_cache.h
index 985a3a7..3659941 100644
--- a/src/target/armv4_5_cache.h
+++ b/src/target/armv4_5_cache.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV4_5_CACHE_H
diff --git a/src/target/armv4_5_mmu.c b/src/target/armv4_5_mmu.c
index 115a489..9942f49 100644
--- a/src/target/armv4_5_mmu.c
+++ b/src/target/armv4_5_mmu.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv4_5_mmu.h b/src/target/armv4_5_mmu.h
index 7beaf4e..774f105 100644
--- a/src/target/armv4_5_mmu.h
+++ b/src/target/armv4_5_mmu.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV4_5_MMU_H
diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 1e425aa..82f4be5 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by David Brownell *
* *
* Copyright (C) ST-Ericsson SA 2011 michel.jaouen@stericsson.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index c282554..6b9c2a6 100644
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by David Brownell *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV7A_H
@@ -30,7 +19,7 @@ enum {
ARM_CPSR = 16
};
-#define ARMV7_COMMON_MAGIC 0x0A450999
+#define ARMV7_COMMON_MAGIC 0x0A450999U
/* VA to PA translation operations opc2 values*/
#define V2PCWPR 0
@@ -98,8 +87,9 @@ struct armv7a_mmu_common {
};
struct armv7a_common {
+ unsigned int common_magic;
+
struct arm arm;
- int common_magic;
struct reg_cache *core_cache;
/* Core Debug Unit */
diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c
index ba6f076..995a856 100644
--- a/src/target/armv7a_cache.c
+++ b/src/target/armv7a_cache.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Oleksij Rempel *
* linux@rempel-privat.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv7a_cache.h b/src/target/armv7a_cache.h
index 8d8ca2d..17ec5e6 100644
--- a/src/target/armv7a_cache.h
+++ b/src/target/armv7a_cache.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 Oleksij Rempel *
* linux@rempel-privat.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM7A_CACHE_H
diff --git a/src/target/armv7a_cache_l2x.c b/src/target/armv7a_cache_l2x.c
index c26d051..39c503f 100644
--- a/src/target/armv7a_cache_l2x.c
+++ b/src/target/armv7a_cache_l2x.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by Oleksij Rempel *
* linux@rempel-privat.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv7a_cache_l2x.h b/src/target/armv7a_cache_l2x.h
index f98b554..d5f1a6f 100644
--- a/src/target/armv7a_cache_l2x.h
+++ b/src/target/armv7a_cache_l2x.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 Oleksij Rempel *
* linux@rempel-privat.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARM7A_CACHE_L2X_H
diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c
index 98a0065..c4d294e 100644
--- a/src/target/armv7a_mmu.c
+++ b/src/target/armv7a_mmu.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016 by Matthias Welwarsky *
* matthias.welwarsky@sysgo.com *
* *
* Copyright (C) ST-Ericsson SA 2011 michel.jaouen@stericsson.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv7a_mmu.h b/src/target/armv7a_mmu.h
index 36cd9d1..d93d3c6 100644
--- a/src/target/armv7a_mmu.h
+++ b/src/target/armv7a_mmu.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2016 by Matthias Welwarsky *
* matthias.welwarsky@sysgo.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV7A_MMU_H
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 0a51ad4..2db2ce2 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -17,19 +19,6 @@
* Copyright (C) 2019 by Tomas Vanek *
* vanekt@fbl.cz *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- * *
* ARMv7-M Architecture, Application Level Reference Manual *
* ARM DDI 0405C (September 2008) *
* *
@@ -64,7 +53,7 @@ const int armv7m_psp_reg_map[ARMV7M_NUM_CORE_REGS] = {
ARMV7M_R4, ARMV7M_R5, ARMV7M_R6, ARMV7M_R7,
ARMV7M_R8, ARMV7M_R9, ARMV7M_R10, ARMV7M_R11,
ARMV7M_R12, ARMV7M_PSP, ARMV7M_R14, ARMV7M_PC,
- ARMV7M_xPSR,
+ ARMV7M_XPSR,
};
/* MSP is used in handler and some thread modes */
@@ -73,7 +62,7 @@ const int armv7m_msp_reg_map[ARMV7M_NUM_CORE_REGS] = {
ARMV7M_R4, ARMV7M_R5, ARMV7M_R6, ARMV7M_R7,
ARMV7M_R8, ARMV7M_R9, ARMV7M_R10, ARMV7M_R11,
ARMV7M_R12, ARMV7M_MSP, ARMV7M_R14, ARMV7M_PC,
- ARMV7M_xPSR,
+ ARMV7M_XPSR,
};
/*
@@ -108,7 +97,7 @@ static const struct {
{ ARMV7M_R13, "sp", 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.arm.m-profile" },
{ ARMV7M_R14, "lr", 32, REG_TYPE_INT, "general", "org.gnu.gdb.arm.m-profile" },
{ ARMV7M_PC, "pc", 32, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.arm.m-profile" },
- { ARMV7M_xPSR, "xPSR", 32, REG_TYPE_INT, "general", "org.gnu.gdb.arm.m-profile" },
+ { ARMV7M_XPSR, "xPSR", 32, REG_TYPE_INT, "general", "org.gnu.gdb.arm.m-profile" },
{ ARMV7M_MSP, "msp", 32, REG_TYPE_DATA_PTR, "system", "org.gnu.gdb.arm.m-system" },
{ ARMV7M_PSP, "psp", 32, REG_TYPE_DATA_PTR, "system", "org.gnu.gdb.arm.m-system" },
@@ -256,7 +245,7 @@ uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id)
switch (arm_reg_id) {
case ARMV7M_R0 ... ARMV7M_R14:
case ARMV7M_PC:
- case ARMV7M_xPSR:
+ case ARMV7M_XPSR:
case ARMV7M_MSP:
case ARMV7M_PSP:
/* NOTE: we "know" here that the register identifiers
@@ -590,7 +579,7 @@ int armv7m_start_algorithm(struct target *target,
* Because xPSR.T is populated on reset from the vector table,
* it might be 0 if the vector table has "bad" data in it.
*/
- struct reg *reg = &armv7m->arm.core_cache->reg_list[ARMV7M_xPSR];
+ struct reg *reg = &armv7m->arm.core_cache->reg_list[ARMV7M_XPSR];
buf_set_u32(reg->value, 0, 32, 0x01000000);
reg->valid = true;
reg->dirty = true;
@@ -814,7 +803,7 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target)
LOG_ERROR("unable to allocate reg type list");
}
- arm->cpsr = reg_list + ARMV7M_xPSR;
+ arm->cpsr = reg_list + ARMV7M_XPSR;
arm->pc = reg_list + ARMV7M_PC;
arm->core_cache = cache;
@@ -865,6 +854,7 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
/* Enable stimulus port #0 by default */
armv7m->trace_config.itm_ter[0] = 1;
+ arm->core_state = ARM_STATE_THUMB;
arm->core_type = ARM_CORE_TYPE_M_PROFILE;
arm->arch_info = armv7m;
arm->setup_semihosting = armv7m_setup_semihosting;
@@ -1095,7 +1085,11 @@ int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found)
const struct command_registration armv7m_command_handlers[] = {
{
- .chain = arm_command_handlers,
+ .name = "arm",
+ .mode = COMMAND_ANY,
+ .help = "ARM command group",
+ .usage = "",
+ .chain = arm_all_profiles_command_handlers,
},
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 9ac121a..188bd56 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV7M_H
@@ -57,7 +46,7 @@ enum {
ARMV7M_REGSEL_R14,
ARMV7M_REGSEL_PC = 15,
- ARMV7M_REGSEL_xPSR = 16,
+ ARMV7M_REGSEL_XPSR = 16,
ARMV7M_REGSEL_MSP,
ARMV7M_REGSEL_PSP,
@@ -135,7 +124,7 @@ enum {
ARMV7M_R14 = ARMV7M_REGSEL_R14,
ARMV7M_PC = ARMV7M_REGSEL_PC,
- ARMV7M_xPSR = ARMV7M_REGSEL_xPSR,
+ ARMV7M_XPSR = ARMV7M_REGSEL_XPSR,
ARMV7M_MSP = ARMV7M_REGSEL_MSP,
ARMV7M_PSP = ARMV7M_REGSEL_PSP,
@@ -210,7 +199,7 @@ enum {
/* for convenience add registers' block delimiters */
ARMV7M_LAST_REG,
ARMV7M_CORE_FIRST_REG = ARMV7M_R0,
- ARMV7M_CORE_LAST_REG = ARMV7M_xPSR,
+ ARMV7M_CORE_LAST_REG = ARMV7M_XPSR,
ARMV7M_FPU_FIRST_REG = ARMV7M_D0,
ARMV7M_FPU_LAST_REG = ARMV7M_FPSCR,
ARMV8M_FIRST_REG = ARMV8M_MSP_NS,
@@ -226,12 +215,13 @@ enum {
#define ARMV7M_NUM_CORE_REGS (ARMV7M_CORE_LAST_REG - ARMV7M_CORE_FIRST_REG + 1)
-#define ARMV7M_COMMON_MAGIC 0x2A452A45
+#define ARMV7M_COMMON_MAGIC 0x2A452A45U
struct armv7m_common {
+ unsigned int common_magic;
+
struct arm arm;
- int common_magic;
int exception_number;
/* AP this processor is connected to in the DAP */
@@ -300,7 +290,7 @@ target_to_armv7m_safe(struct target *target)
}
struct armv7m_algorithm {
- int common_magic;
+ unsigned int common_magic;
enum arm_mode core_mode;
diff --git a/src/target/armv7m_trace.c b/src/target/armv7m_trace.c
index 74ffaf5..45117d2 100644
--- a/src/target/armv7m_trace.c
+++ b/src/target/armv7m_trace.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 Paul Fertser <fercerpav@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv7m_trace.h b/src/target/armv7m_trace.h
index 7e4977a..5abb0b9 100644
--- a/src/target/armv7m_trace.h
+++ b/src/target/armv7m_trace.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 Paul Fertser <fercerpav@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV7M_TRACE_H
diff --git a/src/target/armv8.c b/src/target/armv8.c
index 2de1157..de0bddb 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -1,22 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2015 by David Ung *
* *
* Copyright (C) 2018 by Liviu Ionescu *
* <ilg@livius.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -146,7 +134,7 @@ static int armv8_read_reg(struct armv8_common *armv8, int regnum, uint64_t *regv
retval = dpm->instr_read_data_r0_64(dpm,
ARMV8_MRS_DLR(0), &value_64);
break;
- case ARMV8_xPSR:
+ case ARMV8_XPSR:
retval = dpm->instr_read_data_r0(dpm,
ARMV8_MRS_DSPSR(0), &value);
value_64 = value;
@@ -261,7 +249,7 @@ static int armv8_write_reg(struct armv8_common *armv8, int regnum, uint64_t valu
ARMV8_MSR_DLR(0),
value_64);
break;
- case ARMV8_xPSR:
+ case ARMV8_XPSR:
value = value_64;
retval = dpm->instr_write_data_r0(dpm,
ARMV8_MSR_DSPSR(0),
@@ -376,7 +364,7 @@ static int armv8_read_reg32(struct armv8_common *armv8, int regnum, uint64_t *re
ARMV8_MRC_DLR(0),
&value);
break;
- case ARMV8_xPSR:
+ case ARMV8_XPSR:
retval = dpm->instr_read_data_r0(dpm,
ARMV8_MRC_DSPSR(0),
&value);
@@ -411,17 +399,17 @@ static int armv8_read_reg32(struct armv8_common *armv8, int regnum, uint64_t *re
break;
case ARMV8_SPSR_EL1: /* mapped to SPSR_svc */
retval = dpm->instr_read_data_r0(dpm,
- ARMV8_MRS_xPSR_T1(1, 0),
+ ARMV8_MRS_XPSR_T1(1, 0),
&value);
break;
case ARMV8_SPSR_EL2: /* mapped to SPSR_hyp */
retval = dpm->instr_read_data_r0(dpm,
- ARMV8_MRS_xPSR_T1(1, 0),
+ ARMV8_MRS_XPSR_T1(1, 0),
&value);
break;
case ARMV8_SPSR_EL3: /* mapped to SPSR_mon */
retval = dpm->instr_read_data_r0(dpm,
- ARMV8_MRS_xPSR_T1(1, 0),
+ ARMV8_MRS_XPSR_T1(1, 0),
&value);
break;
case ARMV8_FPSR:
@@ -512,7 +500,7 @@ static int armv8_write_reg32(struct armv8_common *armv8, int regnum, uint64_t va
retval = dpm->instr_write_data_r0(dpm,
ARMV8_MCR_DLR(0), value);
break;
- case ARMV8_xPSR: /* CPSR */
+ case ARMV8_XPSR: /* CPSR */
/* read r0 from DCC, then "MCR r0, DSPSR" */
retval = dpm->instr_write_data_r0(dpm,
ARMV8_MCR_DSPSR(0), value);
@@ -547,17 +535,17 @@ static int armv8_write_reg32(struct armv8_common *armv8, int regnum, uint64_t va
break;
case ARMV8_SPSR_EL1: /* mapped to SPSR_svc */
retval = dpm->instr_write_data_r0(dpm,
- ARMV8_MSR_GP_xPSR_T1(1, 0, 15),
+ ARMV8_MSR_GP_XPSR_T1(1, 0, 15),
value);
break;
case ARMV8_SPSR_EL2: /* mapped to SPSR_hyp */
retval = dpm->instr_write_data_r0(dpm,
- ARMV8_MSR_GP_xPSR_T1(1, 0, 15),
+ ARMV8_MSR_GP_XPSR_T1(1, 0, 15),
value);
break;
case ARMV8_SPSR_EL3: /* mapped to SPSR_mon */
retval = dpm->instr_write_data_r0(dpm,
- ARMV8_MSR_GP_xPSR_T1(1, 0, 15),
+ ARMV8_MSR_GP_XPSR_T1(1, 0, 15),
value);
break;
case ARMV8_FPSR:
@@ -1376,7 +1364,7 @@ static const struct {
{ ARMV8_SP, "sp", 64, ARM_MODE_ANY, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.aarch64.core", NULL},
{ ARMV8_PC, "pc", 64, ARM_MODE_ANY, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.aarch64.core", NULL},
- { ARMV8_xPSR, "cpsr", 32, ARM_MODE_ANY, REG_TYPE_ARCH_DEFINED,
+ { ARMV8_XPSR, "cpsr", 32, ARM_MODE_ANY, REG_TYPE_ARCH_DEFINED,
"general", "org.gnu.gdb.aarch64.core", aarch64_flags_cpsr},
{ ARMV8_V0, "v0", 128, ARM_MODE_ANY, REG_TYPE_ARCH_DEFINED, "simdfp", "org.gnu.gdb.aarch64.fpu", aarch64v},
{ ARMV8_V1, "v1", 128, ARM_MODE_ANY, REG_TYPE_ARCH_DEFINED, "simdfp", "org.gnu.gdb.aarch64.fpu", aarch64v},
@@ -1461,7 +1449,7 @@ static const struct {
{ ARMV8_R13, 0, "sp", 32, ARM_MODE_ANY, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.arm.core" },
{ ARMV8_R14, 0, "lr", 32, ARM_MODE_ANY, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.arm.core" },
{ ARMV8_PC, 0, "pc", 32, ARM_MODE_ANY, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.arm.core" },
- { ARMV8_xPSR, 0, "cpsr", 32, ARM_MODE_ANY, REG_TYPE_UINT32, "general", "org.gnu.gdb.arm.core" },
+ { ARMV8_XPSR, 0, "cpsr", 32, ARM_MODE_ANY, REG_TYPE_UINT32, "general", "org.gnu.gdb.arm.core" },
{ ARMV8_V0, 0, "d0", 64, ARM_MODE_ANY, REG_TYPE_IEEE_DOUBLE, NULL, "org.gnu.gdb.arm.vfp"},
{ ARMV8_V0, 8, "d1", 64, ARM_MODE_ANY, REG_TYPE_IEEE_DOUBLE, NULL, "org.gnu.gdb.arm.vfp"},
{ ARMV8_V1, 0, "d2", 64, ARM_MODE_ANY, REG_TYPE_IEEE_DOUBLE, NULL, "org.gnu.gdb.arm.vfp"},
@@ -1664,7 +1652,7 @@ struct reg_cache *armv8_build_reg_cache(struct target *target)
LOG_ERROR("unable to allocate reg type list");
}
- arm->cpsr = reg_list + ARMV8_xPSR;
+ arm->cpsr = reg_list + ARMV8_XPSR;
arm->pc = reg_list + ARMV8_PC;
arm->core_cache = cache;
diff --git a/src/target/armv8.h b/src/target/armv8.h
index c30739c..2ed3a65 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -1,19 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by David Ung *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV8_H
@@ -61,7 +49,7 @@ enum {
ARMV8_SP = 31,
ARMV8_PC = 32,
- ARMV8_xPSR = 33,
+ ARMV8_XPSR = 33,
ARMV8_V0 = 34,
ARMV8_V1,
@@ -120,7 +108,7 @@ enum run_control_op {
ARMV8_RUNCONTROL_STEP = 3,
};
-#define ARMV8_COMMON_MAGIC 0x0A450AAA
+#define ARMV8_COMMON_MAGIC 0x0A450AAAU
/* VA to PA translation operations opc2 values*/
#define V2PCWPR 0
@@ -190,8 +178,9 @@ struct armv8_mmu_common {
};
struct armv8_common {
+ unsigned int common_magic;
+
struct arm arm;
- int common_magic;
struct reg_cache *core_cache;
/* Core Debug Unit */
diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c
index 5b58d3f..cf71119 100644
--- a/src/target/armv8_cache.c
+++ b/src/target/armv8_cache.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2016 by Matthias Welwarsky *
* matthias.welwarsky@sysgo.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv8_cache.h b/src/target/armv8_cache.h
index fa46e16..7a12aa1 100644
--- a/src/target/armv8_cache.h
+++ b/src/target/armv8_cache.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2016 by Matthias Welwarsky *
* matthias.welwarsky@sysgo.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV8_CACHE_H_
#define OPENOCD_TARGET_ARMV8_CACHE_H_
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 765f1b7..f40beb8 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -1,16 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
*/
#ifdef HAVE_CONFIG_H
@@ -610,7 +601,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode)
/* load SPSR with the desired mode and execute DRPS */
LOG_DEBUG("SPSR = 0x%08"PRIx32, cpsr);
retval = dpm->instr_write_data_r0(dpm,
- ARMV8_MSR_GP_xPSR_T1(1, 0, 15), cpsr);
+ ARMV8_MSR_GP_XPSR_T1(1, 0, 15), cpsr);
if (retval == ERROR_OK)
retval = dpm->instr_execute(dpm, armv8_opcode(armv8, ARMV8_OPC_DRPS));
}
@@ -926,7 +917,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
if (!cache->reg_list[i].exist)
continue;
/* skip PC and CPSR */
- if (i == ARMV8_PC || i == ARMV8_xPSR)
+ if (i == ARMV8_PC || i == ARMV8_XPSR)
continue;
/* skip invalid */
if (!cache->reg_list[i].valid)
@@ -948,7 +939,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
/* flush CPSR and PC */
if (retval == ERROR_OK)
- retval = dpmv8_write_reg(dpm, &cache->reg_list[ARMV8_xPSR], ARMV8_xPSR);
+ retval = dpmv8_write_reg(dpm, &cache->reg_list[ARMV8_XPSR], ARMV8_XPSR);
if (retval == ERROR_OK)
retval = dpmv8_write_reg(dpm, &cache->reg_list[ARMV8_PC], ARMV8_PC);
/* flush R0 -- it's *very* dirty by now */
@@ -1302,9 +1293,9 @@ void armv8_dpm_handle_exception(struct arm_dpm *dpm, bool do_restore)
unsigned int el;
static const int clobbered_regs_by_el[3][5] = {
- { ARMV8_PC, ARMV8_xPSR, ARMV8_ELR_EL1, ARMV8_ESR_EL1, ARMV8_SPSR_EL1 },
- { ARMV8_PC, ARMV8_xPSR, ARMV8_ELR_EL2, ARMV8_ESR_EL2, ARMV8_SPSR_EL2 },
- { ARMV8_PC, ARMV8_xPSR, ARMV8_ELR_EL3, ARMV8_ESR_EL3, ARMV8_SPSR_EL3 },
+ { ARMV8_PC, ARMV8_XPSR, ARMV8_ELR_EL1, ARMV8_ESR_EL1, ARMV8_SPSR_EL1 },
+ { ARMV8_PC, ARMV8_XPSR, ARMV8_ELR_EL2, ARMV8_ESR_EL2, ARMV8_SPSR_EL2 },
+ { ARMV8_PC, ARMV8_XPSR, ARMV8_ELR_EL3, ARMV8_ESR_EL3, ARMV8_SPSR_EL3 },
};
el = (dpm->dscr >> 8) & 3;
@@ -1319,7 +1310,7 @@ void armv8_dpm_handle_exception(struct arm_dpm *dpm, bool do_restore)
mem_ap_write_u32(armv8->debug_ap,
armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
- armv8->read_reg_u64(armv8, ARMV8_xPSR, &dlr);
+ armv8->read_reg_u64(armv8, ARMV8_XPSR, &dlr);
dspsr = dlr;
armv8->read_reg_u64(armv8, ARMV8_PC, &dlr);
diff --git a/src/target/armv8_dpm.h b/src/target/armv8_dpm.h
index c30b04f..19b33da 100644
--- a/src/target/armv8_dpm.h
+++ b/src/target/armv8_dpm.h
@@ -1,15 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#ifndef OPENOCD_TARGET_ARMV8_DPM_H
diff --git a/src/target/armv8_opcodes.c b/src/target/armv8_opcodes.c
index 96db728..7afcc52 100644
--- a/src/target/armv8_opcodes.c
+++ b/src/target/armv8_opcodes.c
@@ -1,16 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2015 by Matthias Welwarsky <matthias.welwarsky@sysgo.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/armv8_opcodes.h b/src/target/armv8_opcodes.h
index 8c213ef..8c9652b 100644
--- a/src/target/armv8_opcodes.h
+++ b/src/target/armv8_opcodes.h
@@ -1,17 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
- * Copyright (C) 2015 by pierrr kuo
- * vichy.kuo@gmail.com
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
+ * Copyright (C) 2015 by pierrr kuo <vichy.kuo@gmail.com>
*/
+
#ifndef OPENOCD_TARGET_ARMV8_OPCODES_H
#define OPENOCD_TARGET_ARMV8_OPCODES_H
@@ -146,9 +138,9 @@
(0xd500401f | ((op1) << 16) | ((crm) << 8) | ((op2) << 5))
#define ARMV8_MRS_T1(r, m1, rd, m) (0xF3E08020 | (r << 20) | (m1 << 16) | (rd << 8) | (m << 4))
-#define ARMV8_MRS_xPSR_T1(r, rd) (0xF3EF8000 | (r << 20) | (rd << 8))
+#define ARMV8_MRS_XPSR_T1(r, rd) (0xF3EF8000 | (r << 20) | (rd << 8))
#define ARMV8_MSR_GP_T1(r, m1, rd, m) (0xF3808020 | (r << 20) | (m1 << 8) | (rd << 16) | (m << 4))
-#define ARMV8_MSR_GP_xPSR_T1(r, rn, mask) (0xF3808000 | (r << 20) | (rn << 16) | (mask << 8))
+#define ARMV8_MSR_GP_XPSR_T1(r, rn, mask) (0xF3808000 | (r << 20) | (rn << 16) | (mask << 8))
#define ARMV8_BKPT(im) (0xD4200000 | ((im & 0xffff) << 5))
#define ARMV8_HLT(im) (0x0D4400000 | ((im & 0xffff) << 5))
diff --git a/src/target/avr32_ap7k.c b/src/target/avr32_ap7k.c
index 4cf0276..bf1445b 100644
--- a/src/target/avr32_ap7k.c
+++ b/src/target/avr32_ap7k.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
* Based on mips_m4k code: *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2008 by David T.L. Wong *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/avr32_ap7k.h b/src/target/avr32_ap7k.h
index 65b856e..ac35754 100644
--- a/src/target/avr32_ap7k.h
+++ b/src/target/avr32_ap7k.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_AVR32_AP7K_H
@@ -20,9 +9,11 @@
struct target;
-#define AP7K_COMMON_MAGIC 0x4150374b
+#define AP7K_COMMON_MAGIC 0x4150374bU
+
struct avr32_ap7k_common {
- int common_magic;
+ unsigned int common_magic;
+
struct avr32_jtag jtag;
struct reg_cache *core_cache;
uint32_t core_regs[AVR32NUMCOREREGS];
diff --git a/src/target/avr32_jtag.c b/src/target/avr32_jtag.c
index a23ddf7..a9c4f8d 100644
--- a/src/target/avr32_jtag.c
+++ b/src/target/avr32_jtag.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/avr32_jtag.h b/src/target/avr32_jtag.h
index b431ef4..382b245 100644
--- a/src/target/avr32_jtag.h
+++ b/src/target/avr32_jtag.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_AVR32_JTAG_H
diff --git a/src/target/avr32_mem.c b/src/target/avr32_mem.c
index 8f38a18..835a501 100644
--- a/src/target/avr32_mem.c
+++ b/src/target/avr32_mem.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/avr32_mem.h b/src/target/avr32_mem.h
index f60a121..4a8019a 100644
--- a/src/target/avr32_mem.h
+++ b/src/target/avr32_mem.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_AVR32_MEM_H
diff --git a/src/target/avr32_regs.c b/src/target/avr32_regs.c
index 7273822..d6fd0e0 100644
--- a/src/target/avr32_regs.c
+++ b/src/target/avr32_regs.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/avr32_regs.h b/src/target/avr32_regs.h
index cb492a9..9004657 100644
--- a/src/target/avr32_regs.h
+++ b/src/target/avr32_regs.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_AVR32_REGS_H
diff --git a/src/target/avrt.c b/src/target/avrt.c
index feceec6..61bef32 100644
--- a/src/target/avrt.c
+++ b/src/target/avrt.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Simon Qian *
* SimonQian@SimonQian.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/avrt.h b/src/target/avrt.h
index 3610eb5..615cb8a 100644
--- a/src/target/avrt.h
+++ b/src/target/avrt.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Simon Qian *
* SimonQian@SimonQian.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_AVRT_H
diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index 1055ed9..7bdb2a6 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) ST-Ericsson SA 2011 *
* michel.jaouen@stericsson.com : smp minimum support *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -404,7 +393,7 @@ struct breakpoint *breakpoint_find(struct target *target, target_addr_t address)
return NULL;
}
-int watchpoint_add_internal(struct target *target, target_addr_t address,
+static int watchpoint_add_internal(struct target *target, target_addr_t address,
uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask)
{
struct watchpoint *watchpoint = target->watchpoints;
@@ -514,7 +503,7 @@ static void watchpoint_free(struct target *target, struct watchpoint *watchpoint
free(watchpoint);
}
-int watchpoint_remove_internal(struct target *target, target_addr_t address)
+static int watchpoint_remove_internal(struct target *target, target_addr_t address)
{
struct watchpoint *watchpoint = target->watchpoints;
diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h
index fc5b50b..8a3fbb2 100644
--- a/src/target/breakpoints.h
+++ b/src/target/breakpoints.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_BREAKPOINTS_H
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 20b2e51..7286a30 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -26,19 +28,6 @@
* Copyright (C) 2016 Chengyu Zheng *
* chengyu.zheng@polimi.it : watchpoint support *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- * *
* Cortex-A8(tm) TRM, ARM DDI 0344H *
* Cortex-A9(tm) TRM, ARM DDI 0407F *
* Cortex-A4(tm) TRM, ARM DDI 0363E *
@@ -818,11 +807,11 @@ static int cortex_a_internal_restore(struct target *target, int current,
armv7m->core_cache->reg_list[ARMV7M_PRIMASK].valid = true;
/* Make sure we are in Thumb mode */
- buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32,
- buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0,
+ buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_XPSR].value, 0, 32,
+ buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_XPSR].value, 0,
32) | (1 << 24));
- armv7m->core_cache->reg_list[ARMV7M_xPSR].dirty = true;
- armv7m->core_cache->reg_list[ARMV7M_xPSR].valid = true;
+ armv7m->core_cache->reg_list[ARMV7M_XPSR].dirty = true;
+ armv7m->core_cache->reg_list[ARMV7M_XPSR].valid = true;
}
#endif
@@ -2885,15 +2874,24 @@ static int cortex_a_examine_first(struct target *target)
int retval = ERROR_OK;
uint32_t didr, cpuid, dbg_osreg, dbg_idpfr1;
+ if (armv7a->debug_ap) {
+ dap_put_ap(armv7a->debug_ap);
+ armv7a->debug_ap = NULL;
+ }
+
if (pc->ap_num == DP_APSEL_INVALID) {
/* Search for the APB-AP - it is needed for access to debug registers */
- retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv7a->debug_ap);
+ retval = dap_find_get_ap(swjdp, AP_TYPE_APB_AP, &armv7a->debug_ap);
if (retval != ERROR_OK) {
LOG_ERROR("Could not find APB-AP for debug access");
return retval;
}
} else {
- armv7a->debug_ap = dap_ap(swjdp, pc->ap_num);
+ armv7a->debug_ap = dap_get_ap(swjdp, pc->ap_num);
+ if (!armv7a->debug_ap) {
+ LOG_ERROR("Cannot get AP");
+ return ERROR_FAIL;
+ }
}
retval = mem_ap_init(armv7a->debug_ap);
@@ -3172,6 +3170,9 @@ static void cortex_a_deinit_target(struct target *target)
dscr & ~DSCR_HALT_DBG_MODE);
}
+ if (armv7a->debug_ap)
+ dap_put_ap(armv7a->debug_ap);
+
free(cortex_a->wrp_list);
free(cortex_a->brp_list);
arm_free_reg_cache(dpm->arm);
diff --git a/src/target/cortex_a.h b/src/target/cortex_a.h
index 685621c..37fba1a 100644
--- a/src/target/cortex_a.h
+++ b/src/target/cortex_a.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2009 by Dirk Behme *
* dirk.behme@gmail.com - copy from cortex_m3 *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_CORTEX_A_H
@@ -30,8 +19,7 @@
#include "armv7a.h"
-#define CORTEX_A_COMMON_MAGIC 0x411fc082
-#define CORTEX_A15_COMMON_MAGIC 0x413fc0f1
+#define CORTEX_A_COMMON_MAGIC 0x411fc082U
#define CORTEX_A5_PARTNUM 0xc05
#define CORTEX_A7_PARTNUM 0xc07
@@ -79,7 +67,9 @@ struct cortex_a_wrp {
};
struct cortex_a_common {
- int common_magic;
+ unsigned int common_magic;
+
+ struct armv7a_common armv7a_common;
/* Context information */
uint32_t cpudbg_dscr;
@@ -108,9 +98,6 @@ struct cortex_a_common {
enum cortex_a_isrmasking_mode isrmasking_mode;
enum cortex_a_dacrfixup_mode dacrfixup_mode;
-
- struct armv7a_common armv7a_common;
-
};
static inline struct cortex_a_common *
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 344cfcf..23d9065 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -8,19 +10,6 @@
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- * *
* *
* Cortex-M3(tm) TRM, ARM DDI 0337E (r1p1) and 0337G (r2p0) *
* *
@@ -114,6 +103,12 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
+ {
+ .partno = STAR_MC1_PARTNO,
+ .name = "STAR-MC1",
+ .arch = ARM_ARCH_V8M,
+ .flags = CORTEX_M_F_HAS_FPV5,
+ },
};
/* forward declarations */
@@ -663,6 +658,11 @@ static int cortex_m_endreset_event(struct target *target)
register_cache_invalidate(armv7m->arm.core_cache);
+ /* TODO: invalidate also working areas (needed in the case of detected reset).
+ * Doing so will require flash drivers to test if working area
+ * is still valid in all target algo calling loops.
+ */
+
/* make sure we have latest dhcsr flags */
retval = cortex_m_read_dhcsr_atomic_sticky(target);
if (retval != ERROR_OK)
@@ -775,7 +775,7 @@ static int cortex_m_examine_exception_reason(struct target *target)
static int cortex_m_debug_entry(struct target *target)
{
- uint32_t xPSR;
+ uint32_t xpsr;
int retval;
struct cortex_m_common *cortex_m = target_to_cm(target);
struct armv7m_common *armv7m = &cortex_m->armv7m;
@@ -826,11 +826,11 @@ static int cortex_m_debug_entry(struct target *target)
return retval;
r = arm->cpsr;
- xPSR = buf_get_u32(r->value, 0, 32);
+ xpsr = buf_get_u32(r->value, 0, 32);
/* Are we in an exception handler */
- if (xPSR & 0x1FF) {
- armv7m->exception_number = (xPSR & 0x1FF);
+ if (xpsr & 0x1FF) {
+ armv7m->exception_number = (xpsr & 0x1FF);
arm->core_mode = ARM_MODE_HANDLER;
arm->map = armv7m_msp_reg_map;
@@ -879,6 +879,16 @@ static int cortex_m_poll(struct target *target)
struct cortex_m_common *cortex_m = target_to_cm(target);
struct armv7m_common *armv7m = &cortex_m->armv7m;
+ /* Check if debug_ap is available to prevent segmentation fault.
+ * If the re-examination after an error does not find a MEM-AP
+ * (e.g. the target stopped communicating), debug_ap pointer
+ * can suddenly become NULL.
+ */
+ if (!armv7m->debug_ap) {
+ target->state = TARGET_UNKNOWN;
+ return ERROR_TARGET_NOT_EXAMINED;
+ }
+
/* Read from Debug Halting Control and Status Register */
retval = cortex_m_read_dhcsr_atomic_sticky(target);
if (retval != ERROR_OK) {
@@ -1904,7 +1914,7 @@ int cortex_m_remove_watchpoint(struct target *target, struct watchpoint *watchpo
return ERROR_OK;
}
-int cortex_m_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
+static int cortex_m_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
{
if (target->debug_reason != DBG_REASON_WATCHPOINT)
return ERROR_FAIL;
@@ -1984,6 +1994,10 @@ static int cortex_m_init_target(struct command_context *cmd_ctx,
void cortex_m_deinit_target(struct target *target)
{
struct cortex_m_common *cortex_m = target_to_cm(target);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+
+ if (!armv7m->is_hla_target && armv7m->debug_ap)
+ dap_put_ap(armv7m->debug_ap);
free(cortex_m->fp_comparator_list);
@@ -2262,10 +2276,10 @@ static void cortex_m_dwt_free(struct target *target)
static int cortex_m_find_mem_ap(struct adiv5_dap *swjdp,
struct adiv5_ap **debug_ap)
{
- if (dap_find_ap(swjdp, AP_TYPE_AHB3_AP, debug_ap) == ERROR_OK)
+ if (dap_find_get_ap(swjdp, AP_TYPE_AHB3_AP, debug_ap) == ERROR_OK)
return ERROR_OK;
- return dap_find_ap(swjdp, AP_TYPE_AHB5_AP, debug_ap);
+ return dap_find_get_ap(swjdp, AP_TYPE_AHB5_AP, debug_ap);
}
int cortex_m_examine(struct target *target)
@@ -2279,6 +2293,11 @@ int cortex_m_examine(struct target *target)
/* hla_target shares the examine handler but does not support
* all its calls */
if (!armv7m->is_hla_target) {
+ if (armv7m->debug_ap) {
+ dap_put_ap(armv7m->debug_ap);
+ armv7m->debug_ap = NULL;
+ }
+
if (cortex_m->apsel == DP_APSEL_INVALID) {
/* Search for the MEM-AP */
retval = cortex_m_find_mem_ap(swjdp, &armv7m->debug_ap);
@@ -2287,7 +2306,11 @@ int cortex_m_examine(struct target *target)
return retval;
}
} else {
- armv7m->debug_ap = dap_ap(swjdp, cortex_m->apsel);
+ armv7m->debug_ap = dap_get_ap(swjdp, cortex_m->apsel);
+ if (!armv7m->debug_ap) {
+ LOG_ERROR("Cannot get AP");
+ return ERROR_FAIL;
+ }
}
armv7m->debug_ap->memaccess_tck = 8;
@@ -2384,6 +2407,20 @@ int cortex_m_examine(struct target *target)
retval = target_read_u32(target, DCB_DHCSR, &cortex_m->dcb_dhcsr);
if (retval != ERROR_OK)
return retval;
+
+ /* Don't cumulate sticky S_RESET_ST at the very first read of DHCSR
+ * as S_RESET_ST may indicate a reset that happened long time ago
+ * (most probably the power-on reset before OpenOCD was started).
+ * As we are just initializing the debug system we do not need
+ * to call cortex_m_endreset_event() in the following poll.
+ */
+ if (!cortex_m->dcb_dhcsr_sticky_is_recent) {
+ cortex_m->dcb_dhcsr_sticky_is_recent = true;
+ if (cortex_m->dcb_dhcsr & S_RESET_ST) {
+ LOG_TARGET_DEBUG(target, "reset happened some time ago, ignore");
+ cortex_m->dcb_dhcsr &= ~S_RESET_ST;
+ }
+ }
cortex_m_cumulate_dhcsr_sticky(cortex_m, cortex_m->dcb_dhcsr);
if (!(cortex_m->dcb_dhcsr & C_DEBUGEN)) {
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 5554014..b1de26e 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_CORTEX_M_H
@@ -28,7 +17,7 @@
#include "armv7m.h"
#include "helper/bits.h"
-#define CORTEX_M_COMMON_MAGIC 0x1A451A45
+#define CORTEX_M_COMMON_MAGIC 0x1A451A45U
#define SYSTEM_CONTROL_BASE 0x400FE000
@@ -47,6 +36,7 @@
enum cortex_m_partno {
CORTEX_M_PARTNO_INVALID,
+ STAR_MC1_PARTNO = 0x132,
CORTEX_M0_PARTNO = 0xC20,
CORTEX_M1_PARTNO = 0xC21,
CORTEX_M3_PARTNO = 0xC23,
@@ -210,11 +200,15 @@ enum cortex_m_isrmasking_mode {
};
struct cortex_m_common {
- int common_magic;
+ unsigned int common_magic;
+
+ struct armv7m_common armv7m;
/* Context information */
uint32_t dcb_dhcsr;
uint32_t dcb_dhcsr_cumulated_sticky;
+ /* DCB DHCSR has been at least once read, so the sticky bits have been reset */
+ bool dcb_dhcsr_sticky_is_recent;
uint32_t nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */
uint32_t nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
@@ -237,11 +231,10 @@ struct cortex_m_common {
enum cortex_m_isrmasking_mode isrmasking_mode;
const struct cortex_m_part_info *core_info;
- struct armv7m_common armv7m;
bool slow_register_read; /* A register has not been ready, poll S_REGRDY */
- int apsel;
+ uint64_t apsel;
/* Whether this target has the erratum that makes C_MASKINTS not apply to
* already pending interrupts */
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index fdec95f..9db54fb 100644
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009-2011 by Mathias Kuester *
* mkdorg@users.sourceforge.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -2151,7 +2140,7 @@ COMMAND_HANDLER(dsp563xx_mem_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], count);
}
- buffer = calloc(count, sizeof(uint32_t));
+ buffer = calloc(count, 4);
if (read_mem == 1) {
err = dsp563xx_read_memory(target, mem_type, address, sizeof(uint32_t),
diff --git a/src/target/dsp563xx.h b/src/target/dsp563xx.h
index 5c3e1d3..9468bf3 100644
--- a/src/target/dsp563xx.h
+++ b/src/target/dsp563xx.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009-2011 by Mathias Kuester *
* mkdorg@users.sourceforge.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_DSP563XX_H
diff --git a/src/target/dsp563xx_once.c b/src/target/dsp563xx_once.c
index 624474d..2244506 100644
--- a/src/target/dsp563xx_once.c
+++ b/src/target/dsp563xx_once.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Mathias Kuester *
* mkdorg@users.sourceforge.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/dsp563xx_once.h b/src/target/dsp563xx_once.h
index 811c086..8715488 100644
--- a/src/target/dsp563xx_once.h
+++ b/src/target/dsp563xx_once.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2009 by Mathias Kuester *
* mkdorg@users.sourceforge.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_DSP563XX_ONCE_H
diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c
index 939b09d..37cf059 100644
--- a/src/target/dsp5680xx.c
+++ b/src/target/dsp5680xx.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Rodrigo L. Rosa *
* rodrigorosa.LG@gmail.com *
* *
* Based on dsp563xx_once.h written by Mathias Kuester *
* mkdorg@users.sourceforge.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -27,7 +16,7 @@
#include "target_type.h"
#include "dsp5680xx.h"
-struct dsp5680xx_common dsp5680xx_context;
+static struct dsp5680xx_common dsp5680xx_context;
#define _E "DSP5680XX_ERROR:%d\nAt:%s:%d:%s"
#define err_check(r, c, m) if (r != ERROR_OK) {LOG_ERROR(_E, c, __func__, __LINE__, m); return r; }
diff --git a/src/target/dsp5680xx.h b/src/target/dsp5680xx.h
index b969417..152f446 100644
--- a/src/target/dsp5680xx.h
+++ b/src/target/dsp5680xx.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Rodrigo L. Rosa *
* rodrigorosa.LG@gmail.com *
* *
* Based on dsp563xx_once.h written by Mathias Kuester *
* mkdorg@users.sourceforge.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_DSP5680XX_H
@@ -289,8 +278,6 @@ struct dsp5680xx_common {
bool debug_mode_enabled;
};
-extern struct dsp5680xx_common dsp5680xx_context;
-
static inline struct dsp5680xx_common *target_to_dsp5680xx(struct target
*target)
{
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index a29508b..7aef153 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index f57f141..32acd70 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_EMBEDDEDICE_H
diff --git a/src/target/esirisc.c b/src/target/esirisc.c
index aadd111..f86d28d 100644
--- a/src/target/esirisc.c
+++ b/src/target/esirisc.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
* James Zhao <hjz@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/esirisc.h b/src/target/esirisc.h
index ad14223..7496b1e 100644
--- a/src/target/esirisc.h
+++ b/src/target/esirisc.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
* James Zhao <hjz@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ESIRISC_H
diff --git a/src/target/esirisc_jtag.c b/src/target/esirisc_jtag.c
index dd5cd5a..54abc40 100644
--- a/src/target/esirisc_jtag.c
+++ b/src/target/esirisc_jtag.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
* James Zhao <hjz@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/esirisc_jtag.h b/src/target/esirisc_jtag.h
index 5f8fe66..98ec8af 100644
--- a/src/target/esirisc_jtag.h
+++ b/src/target/esirisc_jtag.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
* James Zhao <hjz@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ESIRISC_JTAG_H
diff --git a/src/target/esirisc_regs.h b/src/target/esirisc_regs.h
index 6ccda50..51e7e61 100644
--- a/src/target/esirisc_regs.h
+++ b/src/target/esirisc_regs.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
* James Zhao <hjz@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ESIRISC_REGS_H
diff --git a/src/target/esirisc_trace.c b/src/target/esirisc_trace.c
index d17a65d..376ea1d 100644
--- a/src/target/esirisc_trace.c
+++ b/src/target/esirisc_trace.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/esirisc_trace.h b/src/target/esirisc_trace.h
index c3cc6e9..9c08d96 100644
--- a/src/target/esirisc_trace.h
+++ b/src/target/esirisc_trace.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ESIRISC_TRACE_H
diff --git a/src/target/espressif/Makefile.am b/src/target/espressif/Makefile.am
index c681e09..8367a38 100644
--- a/src/target/espressif/Makefile.am
+++ b/src/target/espressif/Makefile.am
@@ -1,6 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libespressif.la
%C%_libespressif_la_SOURCES = \
%D%/esp_xtensa.c \
%D%/esp_xtensa.h \
+ %D%/esp_xtensa_smp.c \
+ %D%/esp_xtensa_smp.h \
+ %D%/esp_xtensa_semihosting.c \
+ %D%/esp_xtensa_semihosting.h \
+ %D%/esp32.c \
%D%/esp32s2.c \
- %D%/esp32s2.h
+ %D%/esp32s3.c \
+ %D%/esp_semihosting.c \
+ %D%/esp_semihosting.h
diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c
new file mode 100644
index 0000000..63055cf
--- /dev/null
+++ b/src/target/espressif/esp32.c
@@ -0,0 +1,503 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * ESP32 target API for OpenOCD *
+ * Copyright (C) 2016-2019 Espressif Systems Ltd. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/time_support.h>
+#include <target/target.h>
+#include <target/target_type.h>
+#include <target/smp.h>
+#include <target/semihosting_common.h>
+#include "assert.h"
+#include "esp_xtensa_smp.h"
+
+/*
+This is a JTAG driver for the ESP32, the are two Tensilica cores inside
+the ESP32 chip. For more information please have a look into ESP32 target
+implementation.
+*/
+
+/* ESP32 memory map */
+#define ESP32_DRAM_LOW 0x3ffae000
+#define ESP32_DRAM_HIGH 0x40000000
+#define ESP32_IROM_MASK_LOW 0x40000000
+#define ESP32_IROM_MASK_HIGH 0x40064f00
+#define ESP32_IRAM_LOW 0x40070000
+#define ESP32_IRAM_HIGH 0x400a0000
+#define ESP32_RTC_IRAM_LOW 0x400c0000
+#define ESP32_RTC_IRAM_HIGH 0x400c2000
+#define ESP32_RTC_DRAM_LOW 0x3ff80000
+#define ESP32_RTC_DRAM_HIGH 0x3ff82000
+#define ESP32_RTC_DATA_LOW 0x50000000
+#define ESP32_RTC_DATA_HIGH 0x50002000
+#define ESP32_EXTRAM_DATA_LOW 0x3f800000
+#define ESP32_EXTRAM_DATA_HIGH 0x3fc00000
+#define ESP32_DR_REG_LOW 0x3ff00000
+#define ESP32_DR_REG_HIGH 0x3ff71000
+#define ESP32_SYS_RAM_LOW 0x60000000UL
+#define ESP32_SYS_RAM_HIGH (ESP32_SYS_RAM_LOW + 0x20000000UL)
+#define ESP32_RTC_SLOW_MEM_BASE ESP32_RTC_DATA_LOW
+
+/* ESP32 WDT */
+#define ESP32_WDT_WKEY_VALUE 0x50d83aa1
+#define ESP32_TIMG0_BASE 0x3ff5f000
+#define ESP32_TIMG1_BASE 0x3ff60000
+#define ESP32_TIMGWDT_CFG0_OFF 0x48
+#define ESP32_TIMGWDT_PROTECT_OFF 0x64
+#define ESP32_TIMG0WDT_CFG0 (ESP32_TIMG0_BASE + ESP32_TIMGWDT_CFG0_OFF)
+#define ESP32_TIMG1WDT_CFG0 (ESP32_TIMG1_BASE + ESP32_TIMGWDT_CFG0_OFF)
+#define ESP32_TIMG0WDT_PROTECT (ESP32_TIMG0_BASE + ESP32_TIMGWDT_PROTECT_OFF)
+#define ESP32_TIMG1WDT_PROTECT (ESP32_TIMG1_BASE + ESP32_TIMGWDT_PROTECT_OFF)
+#define ESP32_RTCCNTL_BASE 0x3ff48000
+#define ESP32_RTCWDT_CFG_OFF 0x8C
+#define ESP32_RTCWDT_PROTECT_OFF 0xA4
+#define ESP32_RTCWDT_CFG (ESP32_RTCCNTL_BASE + ESP32_RTCWDT_CFG_OFF)
+#define ESP32_RTCWDT_PROTECT (ESP32_RTCCNTL_BASE + ESP32_RTCWDT_PROTECT_OFF)
+
+#define ESP32_TRACEMEM_BLOCK_SZ 0x4000
+
+/* ESP32 dport regs */
+#define ESP32_DR_REG_DPORT_BASE ESP32_DR_REG_LOW
+#define ESP32_DPORT_APPCPU_CTRL_B_REG (ESP32_DR_REG_DPORT_BASE + 0x030)
+#define ESP32_DPORT_APPCPU_CLKGATE_EN BIT(0)
+/* ESP32 RTC regs */
+#define ESP32_RTC_CNTL_SW_CPU_STALL_REG (ESP32_RTCCNTL_BASE + 0xac)
+#define ESP32_RTC_CNTL_SW_CPU_STALL_DEF 0x0
+
+/* 0 - don't care, 1 - TMS low, 2 - TMS high */
+enum esp32_flash_bootstrap {
+ FBS_DONTCARE = 0,
+ FBS_TMSLOW,
+ FBS_TMSHIGH,
+};
+
+struct esp32_common {
+ struct esp_xtensa_smp_common esp_xtensa_smp;
+ enum esp32_flash_bootstrap flash_bootstrap;
+};
+
+static inline struct esp32_common *target_to_esp32(struct target *target)
+{
+ return container_of(target->arch_info, struct esp32_common, esp_xtensa_smp);
+}
+
+/* Reset ESP32 peripherals.
+ * Postconditions: all peripherals except RTC_CNTL are reset, CPU's PC is undefined, PRO CPU is halted,
+ * APP CPU is in reset
+ * How this works:
+ * 0. make sure target is halted; if not, try to halt it; if that fails, try to reset it (via OCD) and then halt
+ * 1. set CPU initial PC to 0x50000000 (ESP32_SMP_RTC_DATA_LOW) by clearing RTC_CNTL_{PRO,APP}CPU_STAT_VECTOR_SEL
+ * 2. load stub code into ESP32_SMP_RTC_DATA_LOW; once executed, stub code will disable watchdogs and
+ * make CPU spin in an idle loop.
+ * 3. trigger SoC reset using RTC_CNTL_SW_SYS_RST bit
+ * 4. wait for the OCD to be reset
+ * 5. halt the target and wait for it to be halted (at this point CPU is in the idle loop)
+ * 6. restore initial PC and the contents of ESP32_SMP_RTC_DATA_LOW
+ * TODO: some state of RTC_CNTL is not reset during SW_SYS_RST. Need to reset that manually. */
+
+static const uint8_t esp32_reset_stub_code[] = {
+#include "../../../contrib/loaders/reset/espressif/esp32/cpu_reset_handler_code.inc"
+};
+
+static int esp32_soc_reset(struct target *target)
+{
+ int res;
+ struct target_list *head;
+ struct xtensa *xtensa;
+
+ LOG_DEBUG("start");
+ /* In order to write to peripheral registers, target must be halted first */
+ if (target->state != TARGET_HALTED) {
+ LOG_DEBUG("Target not halted before SoC reset, trying to halt it first");
+ xtensa_halt(target);
+ res = target_wait_state(target, TARGET_HALTED, 1000);
+ if (res != ERROR_OK) {
+ LOG_DEBUG("Couldn't halt target before SoC reset, trying to do reset-halt");
+ res = xtensa_assert_reset(target);
+ if (res != ERROR_OK) {
+ LOG_ERROR(
+ "Couldn't halt target before SoC reset! (xtensa_assert_reset returned %d)",
+ res);
+ return res;
+ }
+ alive_sleep(10);
+ xtensa_poll(target);
+ bool reset_halt_save = target->reset_halt;
+ target->reset_halt = true;
+ res = xtensa_deassert_reset(target);
+ target->reset_halt = reset_halt_save;
+ if (res != ERROR_OK) {
+ LOG_ERROR(
+ "Couldn't halt target before SoC reset! (xtensa_deassert_reset returned %d)",
+ res);
+ return res;
+ }
+ alive_sleep(10);
+ xtensa_poll(target);
+ xtensa_halt(target);
+ res = target_wait_state(target, TARGET_HALTED, 1000);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Couldn't halt target before SoC reset");
+ return res;
+ }
+ }
+ }
+
+ if (target->smp) {
+ foreach_smp_target(head, target->smp_targets) {
+ xtensa = target_to_xtensa(head->target);
+ /* if any of the cores is stalled unstall them */
+ if (xtensa_dm_core_is_stalled(&xtensa->dbg_mod)) {
+ LOG_TARGET_DEBUG(head->target, "Unstall CPUs before SW reset!");
+ res = target_write_u32(target,
+ ESP32_RTC_CNTL_SW_CPU_STALL_REG,
+ ESP32_RTC_CNTL_SW_CPU_STALL_DEF);
+ if (res != ERROR_OK) {
+ LOG_TARGET_ERROR(head->target, "Failed to unstall CPUs before SW reset!");
+ return res;
+ }
+ break; /* both cores are unstalled now, so exit the loop */
+ }
+ }
+ }
+
+ LOG_DEBUG("Loading stub code into RTC RAM");
+ uint8_t slow_mem_save[sizeof(esp32_reset_stub_code)];
+
+ /* Save contents of RTC_SLOW_MEM which we are about to overwrite */
+ res = target_read_buffer(target, ESP32_RTC_SLOW_MEM_BASE, sizeof(slow_mem_save), slow_mem_save);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to save contents of RTC_SLOW_MEM (%d)!", res);
+ return res;
+ }
+
+ /* Write stub code into RTC_SLOW_MEM */
+ res = target_write_buffer(target, ESP32_RTC_SLOW_MEM_BASE, sizeof(esp32_reset_stub_code), esp32_reset_stub_code);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write stub (%d)!", res);
+ return res;
+ }
+
+ LOG_DEBUG("Resuming the target");
+ xtensa = target_to_xtensa(target);
+ xtensa->suppress_dsr_errors = true;
+ res = xtensa_resume(target, 0, ESP32_RTC_SLOW_MEM_BASE + 4, 0, 0);
+ xtensa->suppress_dsr_errors = false;
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to run stub (%d)!", res);
+ return res;
+ }
+ LOG_DEBUG("resume done, waiting for the target to come alive");
+
+ /* Wait for SoC to reset */
+ alive_sleep(100);
+ int64_t timeout = timeval_ms() + 100;
+ bool get_timeout = false;
+ while (target->state != TARGET_RESET && target->state != TARGET_RUNNING) {
+ alive_sleep(10);
+ xtensa_poll(target);
+ if (timeval_ms() >= timeout) {
+ LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be reset, target state=%d",
+ target->state);
+ get_timeout = true;
+ break;
+ }
+ }
+
+ /* Halt the CPU again */
+ LOG_DEBUG("halting the target");
+ xtensa_halt(target);
+ res = target_wait_state(target, TARGET_HALTED, 1000);
+ if (res == ERROR_OK) {
+ LOG_DEBUG("restoring RTC_SLOW_MEM");
+ res = target_write_buffer(target, ESP32_RTC_SLOW_MEM_BASE, sizeof(slow_mem_save), slow_mem_save);
+ if (res != ERROR_OK)
+ LOG_TARGET_ERROR(target, "Failed to restore contents of RTC_SLOW_MEM (%d)!", res);
+ } else {
+ LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be halted after SoC reset");
+ }
+
+ return get_timeout ? ERROR_TARGET_TIMEOUT : res;
+}
+
+static int esp32_disable_wdts(struct target *target)
+{
+ /* TIMG1 WDT */
+ int res = target_write_u32(target, ESP32_TIMG0WDT_PROTECT, ESP32_WDT_WKEY_VALUE);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_TIMG0WDT_PROTECT (%d)!", res);
+ return res;
+ }
+ res = target_write_u32(target, ESP32_TIMG0WDT_CFG0, 0);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_TIMG0WDT_CFG0 (%d)!", res);
+ return res;
+ }
+ /* TIMG2 WDT */
+ res = target_write_u32(target, ESP32_TIMG1WDT_PROTECT, ESP32_WDT_WKEY_VALUE);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_TIMG1WDT_PROTECT (%d)!", res);
+ return res;
+ }
+ res = target_write_u32(target, ESP32_TIMG1WDT_CFG0, 0);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_TIMG1WDT_CFG0 (%d)!", res);
+ return res;
+ }
+ /* RTC WDT */
+ res = target_write_u32(target, ESP32_RTCWDT_PROTECT, ESP32_WDT_WKEY_VALUE);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_RTCWDT_PROTECT (%d)!", res);
+ return res;
+ }
+ res = target_write_u32(target, ESP32_RTCWDT_CFG, 0);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_RTCWDT_CFG (%d)!", res);
+ return res;
+ }
+ return ERROR_OK;
+}
+
+static int esp32_on_halt(struct target *target)
+{
+ return esp32_disable_wdts(target);
+}
+
+static int esp32_arch_state(struct target *target)
+{
+ return ERROR_OK;
+}
+
+static int esp32_virt2phys(struct target *target,
+ target_addr_t virtual, target_addr_t *physical)
+{
+ if (physical) {
+ *physical = virtual;
+ return ERROR_OK;
+ }
+ return ERROR_FAIL;
+}
+
+/* The TDI pin is also used as a flash Vcc bootstrap pin. If we reset the CPU externally, the last state of the TDI pin
+ * can allow the power to an 1.8V flash chip to be raised to 3.3V, or the other way around. Users can use the
+ * esp32 flashbootstrap command to set a level, and this routine will make sure the tdi line will return to
+ * that when the jtag port is idle. */
+
+static void esp32_queue_tdi_idle(struct target *target)
+{
+ struct esp32_common *esp32 = target_to_esp32(target);
+ static uint32_t value;
+ uint8_t t[4] = { 0, 0, 0, 0 };
+
+ if (esp32->flash_bootstrap == FBS_TMSLOW)
+ /* Make sure tdi is 0 at the exit of queue execution */
+ value = 0;
+ else if (esp32->flash_bootstrap == FBS_TMSHIGH)
+ /* Make sure tdi is 1 at the exit of queue execution */
+ value = 1;
+ else
+ return;
+
+ /* Scan out 1 bit, do not move from IRPAUSE after we're done. */
+ buf_set_u32(t, 0, 1, value);
+ jtag_add_plain_ir_scan(1, t, NULL, TAP_IRPAUSE);
+}
+
+static int esp32_target_init(struct command_context *cmd_ctx, struct target *target)
+{
+ return esp_xtensa_smp_target_init(cmd_ctx, target);
+}
+
+static const struct xtensa_debug_ops esp32_dbg_ops = {
+ .queue_enable = xtensa_dm_queue_enable,
+ .queue_reg_read = xtensa_dm_queue_reg_read,
+ .queue_reg_write = xtensa_dm_queue_reg_write
+};
+
+static const struct xtensa_power_ops esp32_pwr_ops = {
+ .queue_reg_read = xtensa_dm_queue_pwr_reg_read,
+ .queue_reg_write = xtensa_dm_queue_pwr_reg_write
+};
+
+static const struct esp_xtensa_smp_chip_ops esp32_chip_ops = {
+ .reset = esp32_soc_reset,
+ .on_halt = esp32_on_halt
+};
+
+static const struct esp_semihost_ops esp32_semihost_ops = {
+ .prepare = esp32_disable_wdts
+};
+
+static int esp32_target_create(struct target *target, Jim_Interp *interp)
+{
+ struct xtensa_debug_module_config esp32_dm_cfg = {
+ .dbg_ops = &esp32_dbg_ops,
+ .pwr_ops = &esp32_pwr_ops,
+ .tap = target->tap,
+ .queue_tdi_idle = esp32_queue_tdi_idle,
+ .queue_tdi_idle_arg = target
+ };
+
+ struct esp32_common *esp32 = calloc(1, sizeof(struct esp32_common));
+ if (!esp32) {
+ LOG_ERROR("Failed to alloc memory for arch info!");
+ return ERROR_FAIL;
+ }
+
+ int ret = esp_xtensa_smp_init_arch_info(target, &esp32->esp_xtensa_smp,
+ &esp32_dm_cfg, &esp32_chip_ops, &esp32_semihost_ops);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Failed to init arch info!");
+ free(esp32);
+ return ret;
+ }
+ esp32->flash_bootstrap = FBS_DONTCARE;
+
+ /* Assume running target. If different, the first poll will fix this. */
+ target->state = TARGET_RUNNING;
+ target->debug_reason = DBG_REASON_NOTHALTED;
+ return ERROR_OK;
+}
+
+static COMMAND_HELPER(esp32_cmd_flashbootstrap_do, struct esp32_common *esp32)
+{
+ int state = -1;
+
+ if (CMD_ARGC < 1) {
+ const char *st;
+ state = esp32->flash_bootstrap;
+ if (state == FBS_DONTCARE)
+ st = "Don't care";
+ else if (state == FBS_TMSLOW)
+ st = "Low (3.3V)";
+ else if (state == FBS_TMSHIGH)
+ st = "High (1.8V)";
+ else
+ st = "None";
+ command_print(CMD, "Current idle tms state: %s", st);
+ return ERROR_OK;
+ }
+
+ if (!strcasecmp(CMD_ARGV[0], "none"))
+ state = FBS_DONTCARE;
+ else if (!strcasecmp(CMD_ARGV[0], "1.8"))
+ state = FBS_TMSHIGH;
+ else if (!strcasecmp(CMD_ARGV[0], "3.3"))
+ state = FBS_TMSLOW;
+ else if (!strcasecmp(CMD_ARGV[0], "high"))
+ state = FBS_TMSHIGH;
+ else if (!strcasecmp(CMD_ARGV[0], "low"))
+ state = FBS_TMSLOW;
+
+ if (state == -1) {
+ command_print(CMD,
+ "Argument unknown. Please pick one of none, high, low, 1.8 or 3.3");
+ return ERROR_FAIL;
+ }
+ esp32->flash_bootstrap = state;
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(esp32_cmd_flashbootstrap)
+{
+ struct target *target = get_current_target(CMD_CTX);
+
+ if (target->smp) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(esp32_cmd_flashbootstrap_do,
+ target_to_esp32(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(esp32_cmd_flashbootstrap_do,
+ target_to_esp32(target));
+}
+
+static const struct command_registration esp32_any_command_handlers[] = {
+ {
+ .name = "flashbootstrap",
+ .handler = esp32_cmd_flashbootstrap,
+ .mode = COMMAND_ANY,
+ .help =
+ "Set the idle state of the TMS pin, which at reset also is the voltage selector for the flash chip.",
+ .usage = "none|1.8|3.3|high|low",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+static const struct command_registration esp32_command_handlers[] = {
+ {
+ .chain = esp_xtensa_smp_command_handlers,
+ },
+ {
+ .name = "esp32",
+ .usage = "",
+ .chain = smp_command_handlers,
+ },
+ {
+ .name = "esp32",
+ .usage = "",
+ .chain = esp32_any_command_handlers,
+ },
+ {
+ .name = "arm",
+ .mode = COMMAND_ANY,
+ .help = "ARM Command Group",
+ .usage = "",
+ .chain = semihosting_common_handlers
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+/** Holds methods for Xtensa targets. */
+struct target_type esp32_target = {
+ .name = "esp32",
+
+ .poll = esp_xtensa_smp_poll,
+ .arch_state = esp32_arch_state,
+
+ .halt = xtensa_halt,
+ .resume = esp_xtensa_smp_resume,
+ .step = esp_xtensa_smp_step,
+
+ .assert_reset = esp_xtensa_smp_assert_reset,
+ .deassert_reset = esp_xtensa_smp_deassert_reset,
+ .soft_reset_halt = esp_xtensa_smp_soft_reset_halt,
+
+ .virt2phys = esp32_virt2phys,
+ .mmu = xtensa_mmu_is_enabled,
+ .read_memory = xtensa_read_memory,
+ .write_memory = xtensa_write_memory,
+
+ .read_buffer = xtensa_read_buffer,
+ .write_buffer = xtensa_write_buffer,
+
+ .checksum_memory = xtensa_checksum_memory,
+
+ .get_gdb_arch = xtensa_get_gdb_arch,
+ .get_gdb_reg_list = xtensa_get_gdb_reg_list,
+
+ .add_breakpoint = esp_xtensa_breakpoint_add,
+ .remove_breakpoint = esp_xtensa_breakpoint_remove,
+
+ .add_watchpoint = esp_xtensa_smp_watchpoint_add,
+ .remove_watchpoint = esp_xtensa_smp_watchpoint_remove,
+
+ .target_create = esp32_target_create,
+ .init_target = esp32_target_init,
+ .examine = xtensa_examine,
+ .deinit_target = esp_xtensa_target_deinit,
+
+ .commands = esp32_command_handlers,
+};
diff --git a/src/target/espressif/esp32s2.c b/src/target/espressif/esp32s2.c
index 212533f..62d1ddb 100644
--- a/src/target/espressif/esp32s2.c
+++ b/src/target/espressif/esp32s2.c
@@ -1,31 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* ESP32-S2 target for OpenOCD *
* Copyright (C) 2019 Espressif Systems Ltd. *
- * Author: Alexey Gerenkov <alexey@espressif.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
+#include <helper/time_support.h>
#include "assert.h"
#include <target/target.h>
#include <target/target_type.h>
+#include <target/semihosting_common.h>
#include "esp_xtensa.h"
-#include "esp32s2.h"
+#include "esp_xtensa_semihosting.h"
/* Overall memory map
* TODO: read memory configuration from target registers */
@@ -100,190 +90,6 @@
#define ESP32_S2_DR_REG_UART_BASE 0x3f400000
#define ESP32_S2_REG_UART_BASE(i) (ESP32_S2_DR_REG_UART_BASE + (i) * 0x10000)
#define ESP32_S2_UART_DATE_REG(i) (ESP32_S2_REG_UART_BASE(i) + 0x74)
-
-/* this should map local reg IDs to GDB reg mapping as defined in xtensa-config.c 'rmap' in
- * xtensa-overlay */
-static const unsigned int esp32s2_gdb_regs_mapping[ESP32_S2_NUM_REGS] = {
- XT_REG_IDX_PC,
- XT_REG_IDX_AR0, XT_REG_IDX_AR1, XT_REG_IDX_AR2, XT_REG_IDX_AR3,
- XT_REG_IDX_AR4, XT_REG_IDX_AR5, XT_REG_IDX_AR6, XT_REG_IDX_AR7,
- XT_REG_IDX_AR8, XT_REG_IDX_AR9, XT_REG_IDX_AR10, XT_REG_IDX_AR11,
- XT_REG_IDX_AR12, XT_REG_IDX_AR13, XT_REG_IDX_AR14, XT_REG_IDX_AR15,
- XT_REG_IDX_AR16, XT_REG_IDX_AR17, XT_REG_IDX_AR18, XT_REG_IDX_AR19,
- XT_REG_IDX_AR20, XT_REG_IDX_AR21, XT_REG_IDX_AR22, XT_REG_IDX_AR23,
- XT_REG_IDX_AR24, XT_REG_IDX_AR25, XT_REG_IDX_AR26, XT_REG_IDX_AR27,
- XT_REG_IDX_AR28, XT_REG_IDX_AR29, XT_REG_IDX_AR30, XT_REG_IDX_AR31,
- XT_REG_IDX_AR32, XT_REG_IDX_AR33, XT_REG_IDX_AR34, XT_REG_IDX_AR35,
- XT_REG_IDX_AR36, XT_REG_IDX_AR37, XT_REG_IDX_AR38, XT_REG_IDX_AR39,
- XT_REG_IDX_AR40, XT_REG_IDX_AR41, XT_REG_IDX_AR42, XT_REG_IDX_AR43,
- XT_REG_IDX_AR44, XT_REG_IDX_AR45, XT_REG_IDX_AR46, XT_REG_IDX_AR47,
- XT_REG_IDX_AR48, XT_REG_IDX_AR49, XT_REG_IDX_AR50, XT_REG_IDX_AR51,
- XT_REG_IDX_AR52, XT_REG_IDX_AR53, XT_REG_IDX_AR54, XT_REG_IDX_AR55,
- XT_REG_IDX_AR56, XT_REG_IDX_AR57, XT_REG_IDX_AR58, XT_REG_IDX_AR59,
- XT_REG_IDX_AR60, XT_REG_IDX_AR61, XT_REG_IDX_AR62, XT_REG_IDX_AR63,
- XT_REG_IDX_SAR,
- XT_REG_IDX_WINDOWBASE, XT_REG_IDX_WINDOWSTART, XT_REG_IDX_CONFIGID0, XT_REG_IDX_CONFIGID1,
- XT_REG_IDX_PS, XT_REG_IDX_THREADPTR,
- ESP32_S2_REG_IDX_GPIOOUT,
- XT_REG_IDX_MMID, XT_REG_IDX_IBREAKENABLE, XT_REG_IDX_OCD_DDR,
- XT_REG_IDX_IBREAKA0, XT_REG_IDX_IBREAKA1, XT_REG_IDX_DBREAKA0, XT_REG_IDX_DBREAKA1,
- XT_REG_IDX_DBREAKC0, XT_REG_IDX_DBREAKC1,
- XT_REG_IDX_EPC1, XT_REG_IDX_EPC2, XT_REG_IDX_EPC3, XT_REG_IDX_EPC4,
- XT_REG_IDX_EPC5, XT_REG_IDX_EPC6, XT_REG_IDX_EPC7, XT_REG_IDX_DEPC,
- XT_REG_IDX_EPS2, XT_REG_IDX_EPS3, XT_REG_IDX_EPS4, XT_REG_IDX_EPS5,
- XT_REG_IDX_EPS6, XT_REG_IDX_EPS7,
- XT_REG_IDX_EXCSAVE1, XT_REG_IDX_EXCSAVE2, XT_REG_IDX_EXCSAVE3, XT_REG_IDX_EXCSAVE4,
- XT_REG_IDX_EXCSAVE5, XT_REG_IDX_EXCSAVE6, XT_REG_IDX_EXCSAVE7, XT_REG_IDX_CPENABLE,
- XT_REG_IDX_INTERRUPT, XT_REG_IDX_INTSET, XT_REG_IDX_INTCLEAR, XT_REG_IDX_INTENABLE,
- XT_REG_IDX_VECBASE, XT_REG_IDX_EXCCAUSE, XT_REG_IDX_DEBUGCAUSE, XT_REG_IDX_CCOUNT,
- XT_REG_IDX_PRID, XT_REG_IDX_ICOUNT, XT_REG_IDX_ICOUNTLEVEL, XT_REG_IDX_EXCVADDR,
- XT_REG_IDX_CCOMPARE0, XT_REG_IDX_CCOMPARE1, XT_REG_IDX_CCOMPARE2,
- XT_REG_IDX_MISC0, XT_REG_IDX_MISC1, XT_REG_IDX_MISC2, XT_REG_IDX_MISC3,
- XT_REG_IDX_A0, XT_REG_IDX_A1, XT_REG_IDX_A2, XT_REG_IDX_A3,
- XT_REG_IDX_A4, XT_REG_IDX_A5, XT_REG_IDX_A6, XT_REG_IDX_A7,
- XT_REG_IDX_A8, XT_REG_IDX_A9, XT_REG_IDX_A10, XT_REG_IDX_A11,
- XT_REG_IDX_A12, XT_REG_IDX_A13, XT_REG_IDX_A14, XT_REG_IDX_A15,
- XT_REG_IDX_PWRCTL, XT_REG_IDX_PWRSTAT, XT_REG_IDX_ERISTAT,
- XT_REG_IDX_CS_ITCTRL, XT_REG_IDX_CS_CLAIMSET, XT_REG_IDX_CS_CLAIMCLR,
- XT_REG_IDX_CS_LOCKACCESS, XT_REG_IDX_CS_LOCKSTATUS, XT_REG_IDX_CS_AUTHSTATUS,
- XT_REG_IDX_FAULT_INFO,
- XT_REG_IDX_TRAX_ID, XT_REG_IDX_TRAX_CTRL, XT_REG_IDX_TRAX_STAT,
- XT_REG_IDX_TRAX_DATA, XT_REG_IDX_TRAX_ADDR, XT_REG_IDX_TRAX_PCTRIGGER,
- XT_REG_IDX_TRAX_PCMATCH, XT_REG_IDX_TRAX_DELAY, XT_REG_IDX_TRAX_MEMSTART,
- XT_REG_IDX_TRAX_MEMEND,
- XT_REG_IDX_PMG, XT_REG_IDX_PMPC, XT_REG_IDX_PM0, XT_REG_IDX_PM1,
- XT_REG_IDX_PMCTRL0, XT_REG_IDX_PMCTRL1, XT_REG_IDX_PMSTAT0, XT_REG_IDX_PMSTAT1,
- XT_REG_IDX_OCD_ID, XT_REG_IDX_OCD_DCRCLR, XT_REG_IDX_OCD_DCRSET, XT_REG_IDX_OCD_DSR,
-};
-
-static const struct xtensa_user_reg_desc esp32s2_user_regs[ESP32_S2_NUM_REGS - XT_NUM_REGS] = {
- { "gpio_out", 0x00, 0, 32, &xtensa_user_reg_u32_type },
-};
-
-static const struct xtensa_config esp32s2_xtensa_cfg = {
- .density = true,
- .aregs_num = XT_AREGS_NUM_MAX,
- .windowed = true,
- .coproc = true,
- .miscregs_num = 4,
- .reloc_vec = true,
- .proc_id = true,
- .threadptr = true,
- .user_regs_num = ARRAY_SIZE(esp32s2_user_regs),
- .user_regs = esp32s2_user_regs,
- .fetch_user_regs = xtensa_fetch_user_regs_u32,
- .queue_write_dirty_user_regs = xtensa_queue_write_dirty_user_regs_u32,
- .gdb_general_regs_num = ESP32_S2_NUM_REGS_G_COMMAND,
- .gdb_regs_mapping = esp32s2_gdb_regs_mapping,
- .irom = {
- .count = 2,
- .regions = {
- {
- .base = ESP32_S2_IROM_LOW,
- .size = ESP32_S2_IROM_HIGH - ESP32_S2_IROM_LOW,
- .access = XT_MEM_ACCESS_READ,
- },
- {
- .base = ESP32_S2_IROM_MASK_LOW,
- .size = ESP32_S2_IROM_MASK_HIGH - ESP32_S2_IROM_MASK_LOW,
- .access = XT_MEM_ACCESS_READ,
- },
- }
- },
- .iram = {
- .count = 2,
- .regions = {
- {
- .base = ESP32_S2_IRAM_LOW,
- .size = ESP32_S2_IRAM_HIGH - ESP32_S2_IRAM_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- {
- .base = ESP32_S2_RTC_IRAM_LOW,
- .size = ESP32_S2_RTC_IRAM_HIGH - ESP32_S2_RTC_IRAM_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- }
- },
- .drom = {
- .count = 2,
- .regions = {
- {
- .base = ESP32_S2_DROM0_LOW,
- .size = ESP32_S2_DROM0_HIGH - ESP32_S2_DROM0_LOW,
- .access = XT_MEM_ACCESS_READ,
- },
- {
- .base = ESP32_S2_DROM1_LOW,
- .size = ESP32_S2_DROM1_HIGH - ESP32_S2_DROM1_LOW,
- .access = XT_MEM_ACCESS_READ,
- },
- }
- },
- .dram = {
- .count = 6,
- .regions = {
- {
- .base = ESP32_S2_DRAM_LOW,
- .size = ESP32_S2_DRAM_HIGH - ESP32_S2_DRAM_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- {
- .base = ESP32_S2_RTC_DRAM_LOW,
- .size = ESP32_S2_RTC_DRAM_HIGH - ESP32_S2_RTC_DRAM_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- {
- .base = ESP32_S2_RTC_DATA_LOW,
- .size = ESP32_S2_RTC_DATA_HIGH - ESP32_S2_RTC_DATA_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- {
- .base = ESP32_S2_EXTRAM_DATA_LOW,
- .size = ESP32_S2_EXTRAM_DATA_HIGH - ESP32_S2_EXTRAM_DATA_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- {
- .base = ESP32_S2_DR_REG_LOW,
- .size = ESP32_S2_DR_REG_HIGH - ESP32_S2_DR_REG_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- {
- .base = ESP32_S2_SYS_RAM_LOW,
- .size = ESP32_S2_SYS_RAM_HIGH - ESP32_S2_SYS_RAM_LOW,
- .access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE,
- },
- }
- },
- .exc = {
- .enabled = true,
- },
- .irq = {
- .enabled = true,
- .irq_num = 32,
- },
- .high_irq = {
- .enabled = true,
- .excm_level = 3,
- .nmi_num = 1,
- },
- .tim_irq = {
- .enabled = true,
- .comp_num = 3,
- },
- .debug = {
- .enabled = true,
- .irq_level = 6,
- .ibreaks_num = 2,
- .dbreaks_num = 2,
- .icount_sz = 32,
- },
- .trace = {
- .enabled = true,
- .mem_sz = ESP32_S2_TRACEMEM_BLOCK_SZ,
- },
-};
-
struct esp32s2_common {
struct esp_xtensa_common esp_xtensa;
};
@@ -316,7 +122,7 @@ static int esp32s2_deassert_reset(struct target *target)
return ERROR_OK;
}
-int esp32s2_soft_reset_halt(struct target *target)
+static int esp32s2_soft_reset_halt(struct target *target)
{
LOG_TARGET_DEBUG(target, "begin");
@@ -324,7 +130,7 @@ int esp32s2_soft_reset_halt(struct target *target)
int res = esp32s2_soc_reset(target);
if (res != ERROR_OK)
return res;
- return xtensa_assert_reset(target);
+ return xtensa_soft_reset_halt(target);
}
static int esp32s2_set_peri_reg_mask(struct target *target,
@@ -474,7 +280,7 @@ static int esp32s2_soc_reset(struct target *target)
res = esp32s2_set_peri_reg_mask(target,
ESP32_S2_OPTIONS0,
ESP32_S2_SW_SYS_RST_M,
- 1U << ESP32_S2_SW_SYS_RST_S);
+ BIT(ESP32_S2_SW_SYS_RST_S));
xtensa->suppress_dsr_errors = false;
if (res != ERROR_OK) {
LOG_ERROR("Failed to write ESP32_S2_OPTIONS0 (%d)!", res);
@@ -482,15 +288,17 @@ static int esp32s2_soc_reset(struct target *target)
}
/* Wait for SoC to reset */
alive_sleep(100);
- int timeout = 100;
- while (target->state != TARGET_RESET && target->state != TARGET_RUNNING && --timeout > 0) {
+ int64_t timeout = timeval_ms() + 100;
+ while (target->state != TARGET_RESET && target->state != TARGET_RUNNING) {
alive_sleep(10);
xtensa_poll(target);
+ if (timeval_ms() >= timeout) {
+ LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be reset, target state=%d",
+ target->state);
+ return ERROR_TARGET_TIMEOUT;
+ }
}
- if (timeout == 0) {
- LOG_ERROR("Timed out waiting for CPU to be reset, target->state=%d", target->state);
- return ERROR_TARGET_TIMEOUT;
- }
+
xtensa_halt(target);
res = target_wait_state(target, TARGET_HALTED, 1000);
if (res != ERROR_OK) {
@@ -600,6 +408,19 @@ static int esp32s2_poll(struct target *target)
if (old_state == TARGET_DEBUG_RUNNING) {
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
} else {
+ if (esp_xtensa_semihosting(target, &ret) == SEMIHOSTING_HANDLED) {
+ struct esp_xtensa_common *esp_xtensa = target_to_esp_xtensa(target);
+ if (ret == ERROR_OK && esp_xtensa->semihost.need_resume) {
+ esp_xtensa->semihost.need_resume = false;
+ /* Resume xtensa_resume will handle BREAK instruction. */
+ ret = target_resume(target, 1, 0, 1, 0);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Failed to resume target");
+ return ret;
+ }
+ }
+ return ret;
+ }
esp32s2_on_halt(target);
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
}
@@ -617,7 +438,11 @@ static int esp32s2_virt2phys(struct target *target,
static int esp32s2_target_init(struct command_context *cmd_ctx, struct target *target)
{
- return esp_xtensa_target_init(cmd_ctx, target);
+ int ret = esp_xtensa_target_init(cmd_ctx, target);
+ if (ret != ERROR_OK)
+ return ret;
+
+ return esp_xtensa_semihosting_init(target);
}
static const struct xtensa_debug_ops esp32s2_dbg_ops = {
@@ -631,6 +456,10 @@ static const struct xtensa_power_ops esp32s2_pwr_ops = {
.queue_reg_write = xtensa_dm_queue_pwr_reg_write
};
+static const struct esp_semihost_ops esp32s2_semihost_ops = {
+ .prepare = esp32s2_disable_wdts
+};
+
static int esp32s2_target_create(struct target *target, Jim_Interp *interp)
{
struct xtensa_debug_module_config esp32s2_dm_cfg = {
@@ -648,7 +477,7 @@ static int esp32s2_target_create(struct target *target, Jim_Interp *interp)
return ERROR_FAIL;
}
- int ret = esp_xtensa_init_arch_info(target, &esp32->esp_xtensa, &esp32s2_xtensa_cfg, &esp32s2_dm_cfg);
+ int ret = esp_xtensa_init_arch_info(target, &esp32->esp_xtensa, &esp32s2_dm_cfg, &esp32s2_semihost_ops);
if (ret != ERROR_OK) {
LOG_ERROR("Failed to init arch info!");
free(esp32);
@@ -663,11 +492,14 @@ static int esp32s2_target_create(struct target *target, Jim_Interp *interp)
static const struct command_registration esp32s2_command_handlers[] = {
{
- .name = "xtensa",
+ .chain = xtensa_command_handlers,
+ },
+ {
+ .name = "arm",
.mode = COMMAND_ANY,
- .help = "Xtensa commands group",
+ .help = "ARM Command Group",
.usage = "",
- .chain = xtensa_command_handlers,
+ .chain = semihosting_common_handlers
},
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/espressif/esp32s2.h b/src/target/espressif/esp32s2.h
deleted file mode 100644
index 2c43e3e..0000000
--- a/src/target/espressif/esp32s2.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/***************************************************************************
- * ESP32-S2 target for OpenOCD *
- * Copyright (C) 2019 Espressif Systems Ltd. *
- * Author: Alexey Gerenkov <alexey@espressif.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
-
-#ifndef OPENOCD_TARGET_ESP32S2_H
-#define OPENOCD_TARGET_ESP32S2_H
-
-#include <target/xtensa/xtensa_regs.h>
-
-#define ESP32_S2_DROM_LOW 0x3f000000
-#define ESP32_S2_DROM_HIGH 0x3ff80000
-#define ESP32_S2_IROM_LOW 0x40080000
-#define ESP32_S2_IROM_HIGH 0x40800000
-
-/* Number of registers returned directly by the G command
- * Corresponds to the amount of regs listed in regformats/reg-xtensa.dat in the gdb source */
-#define ESP32_S2_NUM_REGS_G_COMMAND 72
-
-enum esp32s2_reg_id {
- /* chip specific registers that extend ISA go after ISA-defined ones */
- ESP32_S2_REG_IDX_GPIOOUT = XT_USR_REG_START,
- ESP32_S2_NUM_REGS,
-};
-
-#endif /* OPENOCD_TARGET_ESP32S2_H */
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c
new file mode 100644
index 0000000..62b22b1
--- /dev/null
+++ b/src/target/espressif/esp32s3.c
@@ -0,0 +1,422 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * ESP32-S3 target API for OpenOCD *
+ * Copyright (C) 2020 Espressif Systems Ltd. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/time_support.h>
+#include <target/target.h>
+#include <target/target_type.h>
+#include <target/smp.h>
+#include <target/semihosting_common.h>
+#include "assert.h"
+#include "esp_xtensa_smp.h"
+
+/*
+This is a JTAG driver for the ESP32_S3, the are two Tensilica cores inside
+the ESP32_S3 chip. For more information please have a look into ESP32_S3 target
+implementation.
+*/
+
+/* ESP32_S3 memory map */
+#define ESP32_S3_IRAM_LOW 0x40370000
+#define ESP32_S3_IRAM_HIGH 0x403E0000
+#define ESP32_S3_IROM_MASK_LOW 0x40000000
+#define ESP32_S3_IROM_MASK_HIGH 0x40060000
+#define ESP32_S3_DRAM_LOW 0x3FC88000
+#define ESP32_S3_DRAM_HIGH 0x3FD00000
+#define ESP32_S3_RTC_IRAM_LOW 0x600FE000
+#define ESP32_S3_RTC_IRAM_HIGH 0x60100000
+#define ESP32_S3_RTC_DRAM_LOW 0x600FE000
+#define ESP32_S3_RTC_DRAM_HIGH 0x60100000
+#define ESP32_S3_RTC_DATA_LOW 0x50000000
+#define ESP32_S3_RTC_DATA_HIGH 0x50002000
+#define ESP32_S3_EXTRAM_DATA_LOW 0x3D000000
+#define ESP32_S3_EXTRAM_DATA_HIGH 0x3E000000
+#define ESP32_S3_SYS_RAM_LOW 0x60000000UL
+#define ESP32_S3_SYS_RAM_HIGH (ESP32_S3_SYS_RAM_LOW + 0x10000000UL)
+#define ESP32_S3_RTC_SLOW_MEM_BASE ESP32_S3_RTC_DATA_LOW
+
+/* ESP32_S3 WDT */
+#define ESP32_S3_WDT_WKEY_VALUE 0x50D83AA1
+#define ESP32_S3_TIMG0_BASE 0x6001F000
+#define ESP32_S3_TIMG1_BASE 0x60020000
+#define ESP32_S3_TIMGWDT_CFG0_OFF 0x48
+#define ESP32_S3_TIMGWDT_PROTECT_OFF 0x64
+#define ESP32_S3_TIMG0WDT_CFG0 (ESP32_S3_TIMG0_BASE + ESP32_S3_TIMGWDT_CFG0_OFF)
+#define ESP32_S3_TIMG1WDT_CFG0 (ESP32_S3_TIMG1_BASE + ESP32_S3_TIMGWDT_CFG0_OFF)
+#define ESP32_S3_TIMG0WDT_PROTECT (ESP32_S3_TIMG0_BASE + ESP32_S3_TIMGWDT_PROTECT_OFF)
+#define ESP32_S3_TIMG1WDT_PROTECT (ESP32_S3_TIMG1_BASE + ESP32_S3_TIMGWDT_PROTECT_OFF)
+#define ESP32_S3_RTCCNTL_BASE 0x60008000
+#define ESP32_S3_RTCWDT_CFG_OFF 0x98
+#define ESP32_S3_RTCWDT_PROTECT_OFF 0xB0
+#define ESP32_S3_SWD_CONF_OFF 0xB0
+#define ESP32_S3_SWD_WPROTECT_OFF 0xB4
+#define ESP32_S3_RTCWDT_CFG (ESP32_S3_RTCCNTL_BASE + ESP32_S3_RTCWDT_CFG_OFF)
+#define ESP32_S3_RTCWDT_PROTECT (ESP32_S3_RTCCNTL_BASE + ESP32_S3_RTCWDT_PROTECT_OFF)
+#define ESP32_S3_SWD_CONF_REG (ESP32_S3_RTCCNTL_BASE + ESP32_S3_SWD_CONF_OFF)
+#define ESP32_S3_SWD_WPROTECT_REG (ESP32_S3_RTCCNTL_BASE + ESP32_S3_SWD_WPROTECT_OFF)
+#define ESP32_S3_SWD_AUTO_FEED_EN_M BIT(31)
+#define ESP32_S3_SWD_WKEY_VALUE 0x8F1D312AU
+
+#define ESP32_S3_TRACEMEM_BLOCK_SZ 0x4000
+
+/* ESP32_S3 dport regs */
+#define ESP32_S3_DR_REG_SYSTEM_BASE 0x600c0000
+#define ESP32_S3_SYSTEM_CORE_1_CONTROL_0_REG (ESP32_S3_DR_REG_SYSTEM_BASE + 0x014)
+#define ESP32_S3_SYSTEM_CONTROL_CORE_1_CLKGATE_EN BIT(1)
+
+/* ESP32_S3 RTC regs */
+#define ESP32_S3_RTC_CNTL_SW_CPU_STALL_REG (ESP32_S3_RTCCNTL_BASE + 0xBC)
+#define ESP32_S3_RTC_CNTL_SW_CPU_STALL_DEF 0x0
+
+struct esp32s3_common {
+ struct esp_xtensa_smp_common esp_xtensa_smp;
+};
+
+/* Reset ESP32-S3's peripherals.
+ * 1. OpenOCD makes sure the target is halted; if not, tries to halt it.
+ * If that fails, tries to reset it (via OCD) and then halt.
+ * 2. OpenOCD loads the stub code into RTC_SLOW_MEM.
+ * 3. Executes the stub code from address 0x50000004.
+ * 4. The stub code changes the reset vector to 0x50000000, and triggers
+ * a system reset using RTC_CNTL_SW_SYS_RST bit.
+ * 5. Once the PRO CPU is out of reset, it executes the stub code from address 0x50000000.
+ * The stub code disables the watchdog, re-enables JTAG and the APP CPU,
+ * restores the reset vector, and enters an infinite loop.
+ * 6. OpenOCD waits until it can talk to the OCD module again, then halts the target.
+ * 7. OpenOCD restores the contents of RTC_SLOW_MEM.
+ *
+ * End result: all the peripherals except RTC_CNTL are reset, CPU's PC is undefined,
+ * PRO CPU is halted, APP CPU is in reset.
+ */
+
+static const uint8_t esp32s3_reset_stub_code[] = {
+#include "../../../contrib/loaders/reset/espressif/esp32s3/cpu_reset_handler_code.inc"
+};
+
+static int esp32s3_soc_reset(struct target *target)
+{
+ int res;
+ struct target_list *head;
+ struct xtensa *xtensa;
+
+ LOG_DEBUG("start");
+ /* In order to write to peripheral registers, target must be halted first */
+ if (target->state != TARGET_HALTED) {
+ LOG_DEBUG("Target not halted before SoC reset, trying to halt it first");
+ xtensa_halt(target);
+ res = target_wait_state(target, TARGET_HALTED, 1000);
+ if (res != ERROR_OK) {
+ LOG_DEBUG("Couldn't halt target before SoC reset, trying to do reset-halt");
+ res = xtensa_assert_reset(target);
+ if (res != ERROR_OK) {
+ LOG_ERROR(
+ "Couldn't halt target before SoC reset! (xtensa_assert_reset returned %d)",
+ res);
+ return res;
+ }
+ alive_sleep(10);
+ xtensa_poll(target);
+ bool reset_halt_save = target->reset_halt;
+ target->reset_halt = true;
+ res = xtensa_deassert_reset(target);
+ target->reset_halt = reset_halt_save;
+ if (res != ERROR_OK) {
+ LOG_ERROR(
+ "Couldn't halt target before SoC reset! (xtensa_deassert_reset returned %d)",
+ res);
+ return res;
+ }
+ alive_sleep(10);
+ xtensa_poll(target);
+ xtensa_halt(target);
+ res = target_wait_state(target, TARGET_HALTED, 1000);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Couldn't halt target before SoC reset");
+ return res;
+ }
+ }
+ }
+
+ if (target->smp) {
+ foreach_smp_target(head, target->smp_targets) {
+ xtensa = target_to_xtensa(head->target);
+ /* if any of the cores is stalled unstall them */
+ if (xtensa_dm_core_is_stalled(&xtensa->dbg_mod)) {
+ LOG_TARGET_DEBUG(head->target, "Unstall CPUs before SW reset!");
+ res = target_write_u32(target,
+ ESP32_S3_RTC_CNTL_SW_CPU_STALL_REG,
+ ESP32_S3_RTC_CNTL_SW_CPU_STALL_DEF);
+ if (res != ERROR_OK) {
+ LOG_TARGET_ERROR(head->target, "Failed to unstall CPUs before SW reset!");
+ return res;
+ }
+ break; /* both cores are unstalled now, so exit the loop */
+ }
+ }
+ }
+
+ LOG_DEBUG("Loading stub code into RTC RAM");
+ uint8_t slow_mem_save[sizeof(esp32s3_reset_stub_code)];
+
+ /* Save contents of RTC_SLOW_MEM which we are about to overwrite */
+ res = target_read_buffer(target, ESP32_S3_RTC_SLOW_MEM_BASE, sizeof(slow_mem_save), slow_mem_save);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to save contents of RTC_SLOW_MEM (%d)!", res);
+ return res;
+ }
+
+ /* Write stub code into RTC_SLOW_MEM */
+ res = target_write_buffer(target,
+ ESP32_S3_RTC_SLOW_MEM_BASE,
+ sizeof(esp32s3_reset_stub_code),
+ esp32s3_reset_stub_code);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write stub (%d)!", res);
+ return res;
+ }
+
+ LOG_DEBUG("Resuming the target");
+ xtensa = target_to_xtensa(target);
+ xtensa->suppress_dsr_errors = true;
+ res = xtensa_resume(target, 0, ESP32_S3_RTC_SLOW_MEM_BASE + 4, 0, 0);
+ xtensa->suppress_dsr_errors = false;
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to run stub (%d)!", res);
+ return res;
+ }
+ LOG_DEBUG("resume done, waiting for the target to come alive");
+
+ /* Wait for SoC to reset */
+ alive_sleep(100);
+ int64_t timeout = timeval_ms() + 100;
+ bool get_timeout = false;
+ while (target->state != TARGET_RESET && target->state != TARGET_RUNNING) {
+ alive_sleep(10);
+ xtensa_poll(target);
+ if (timeval_ms() >= timeout) {
+ LOG_TARGET_ERROR(target,
+ "Timed out waiting for CPU to be reset, target state=%d",
+ target->state);
+ get_timeout = true;
+ break;
+ }
+ }
+
+ /* Halt the CPU again */
+ LOG_DEBUG("halting the target");
+ xtensa_halt(target);
+ res = target_wait_state(target, TARGET_HALTED, 1000);
+ if (res == ERROR_OK) {
+ LOG_DEBUG("restoring RTC_SLOW_MEM");
+ res = target_write_buffer(target, ESP32_S3_RTC_SLOW_MEM_BASE, sizeof(slow_mem_save), slow_mem_save);
+ if (res != ERROR_OK)
+ LOG_TARGET_ERROR(target, "Failed to restore contents of RTC_SLOW_MEM (%d)!", res);
+ } else {
+ LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be halted after SoC reset");
+ }
+
+ return get_timeout ? ERROR_TARGET_TIMEOUT : res;
+}
+
+static int esp32s3_disable_wdts(struct target *target)
+{
+ /* TIMG1 WDT */
+ int res = target_write_u32(target, ESP32_S3_TIMG0WDT_PROTECT, ESP32_S3_WDT_WKEY_VALUE);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_TIMG0WDT_PROTECT (%d)!", res);
+ return res;
+ }
+ res = target_write_u32(target, ESP32_S3_TIMG0WDT_CFG0, 0);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_TIMG0WDT_CFG0 (%d)!", res);
+ return res;
+ }
+ /* TIMG2 WDT */
+ res = target_write_u32(target, ESP32_S3_TIMG1WDT_PROTECT, ESP32_S3_WDT_WKEY_VALUE);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_TIMG1WDT_PROTECT (%d)!", res);
+ return res;
+ }
+ res = target_write_u32(target, ESP32_S3_TIMG1WDT_CFG0, 0);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_TIMG1WDT_CFG0 (%d)!", res);
+ return res;
+ }
+ /* RTC WDT */
+ res = target_write_u32(target, ESP32_S3_RTCWDT_PROTECT, ESP32_S3_WDT_WKEY_VALUE);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_RTCWDT_PROTECT (%d)!", res);
+ return res;
+ }
+ res = target_write_u32(target, ESP32_S3_RTCWDT_CFG, 0);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_RTCWDT_CFG (%d)!", res);
+ return res;
+ }
+ /* Enable SWD auto-feed */
+ res = target_write_u32(target, ESP32_S3_SWD_WPROTECT_REG, ESP32_S3_SWD_WKEY_VALUE);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_SWD_WPROTECT_REG (%d)!", res);
+ return res;
+ }
+ uint32_t swd_conf_reg = 0;
+ res = target_read_u32(target, ESP32_S3_SWD_CONF_REG, &swd_conf_reg);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to read ESP32_S3_SWD_CONF_REG (%d)!", res);
+ return res;
+ }
+ swd_conf_reg |= ESP32_S3_SWD_AUTO_FEED_EN_M;
+ res = target_write_u32(target, ESP32_S3_SWD_CONF_REG, swd_conf_reg);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write ESP32_S3_SWD_CONF_REG (%d)!", res);
+ return res;
+ }
+ return ERROR_OK;
+}
+
+static int esp32s3_on_halt(struct target *target)
+{
+ return esp32s3_disable_wdts(target);
+}
+
+static int esp32s3_arch_state(struct target *target)
+{
+ return ERROR_OK;
+}
+
+static int esp32s3_virt2phys(struct target *target,
+ target_addr_t virtual, target_addr_t *physical)
+{
+ if (physical) {
+ *physical = virtual;
+ return ERROR_OK;
+ }
+ return ERROR_FAIL;
+}
+
+static int esp32s3_target_init(struct command_context *cmd_ctx, struct target *target)
+{
+ return esp_xtensa_smp_target_init(cmd_ctx, target);
+}
+
+static const struct xtensa_debug_ops esp32s3_dbg_ops = {
+ .queue_enable = xtensa_dm_queue_enable,
+ .queue_reg_read = xtensa_dm_queue_reg_read,
+ .queue_reg_write = xtensa_dm_queue_reg_write
+};
+
+static const struct xtensa_power_ops esp32s3_pwr_ops = {
+ .queue_reg_read = xtensa_dm_queue_pwr_reg_read,
+ .queue_reg_write = xtensa_dm_queue_pwr_reg_write
+};
+
+static const struct esp_xtensa_smp_chip_ops esp32s3_chip_ops = {
+ .reset = esp32s3_soc_reset,
+ .on_halt = esp32s3_on_halt
+};
+
+static const struct esp_semihost_ops esp32s3_semihost_ops = {
+ .prepare = esp32s3_disable_wdts
+};
+
+static int esp32s3_target_create(struct target *target, Jim_Interp *interp)
+{
+ struct xtensa_debug_module_config esp32s3_dm_cfg = {
+ .dbg_ops = &esp32s3_dbg_ops,
+ .pwr_ops = &esp32s3_pwr_ops,
+ .tap = target->tap,
+ .queue_tdi_idle = NULL,
+ .queue_tdi_idle_arg = NULL
+ };
+
+ struct esp32s3_common *esp32s3 = calloc(1, sizeof(struct esp32s3_common));
+ if (!esp32s3) {
+ LOG_ERROR("Failed to alloc memory for arch info!");
+ return ERROR_FAIL;
+ }
+
+ int ret = esp_xtensa_smp_init_arch_info(target,
+ &esp32s3->esp_xtensa_smp,
+ &esp32s3_dm_cfg,
+ &esp32s3_chip_ops,
+ &esp32s3_semihost_ops);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Failed to init arch info!");
+ free(esp32s3);
+ return ret;
+ }
+
+ /* Assume running target. If different, the first poll will fix this. */
+ target->state = TARGET_RUNNING;
+ target->debug_reason = DBG_REASON_NOTHALTED;
+ return ERROR_OK;
+}
+
+static const struct command_registration esp32s3_command_handlers[] = {
+ {
+ .usage = "",
+ .chain = esp_xtensa_smp_command_handlers,
+ },
+ {
+ .name = "esp32",
+ .usage = "",
+ .chain = smp_command_handlers,
+ },
+ {
+ .name = "arm",
+ .mode = COMMAND_ANY,
+ .help = "ARM Command Group",
+ .usage = "",
+ .chain = semihosting_common_handlers
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+/** Holds methods for Xtensa targets. */
+struct target_type esp32s3_target = {
+ .name = "esp32s3",
+
+ .poll = esp_xtensa_smp_poll,
+ .arch_state = esp32s3_arch_state,
+
+ .halt = xtensa_halt,
+ .resume = esp_xtensa_smp_resume,
+ .step = esp_xtensa_smp_step,
+
+ .assert_reset = esp_xtensa_smp_assert_reset,
+ .deassert_reset = esp_xtensa_smp_deassert_reset,
+ .soft_reset_halt = esp_xtensa_smp_soft_reset_halt,
+
+ .virt2phys = esp32s3_virt2phys,
+ .mmu = xtensa_mmu_is_enabled,
+ .read_memory = xtensa_read_memory,
+ .write_memory = xtensa_write_memory,
+
+ .read_buffer = xtensa_read_buffer,
+ .write_buffer = xtensa_write_buffer,
+
+ .checksum_memory = xtensa_checksum_memory,
+
+ .get_gdb_arch = xtensa_get_gdb_arch,
+ .get_gdb_reg_list = xtensa_get_gdb_reg_list,
+
+ .add_breakpoint = esp_xtensa_breakpoint_add,
+ .remove_breakpoint = esp_xtensa_breakpoint_remove,
+
+ .add_watchpoint = esp_xtensa_smp_watchpoint_add,
+ .remove_watchpoint = esp_xtensa_smp_watchpoint_remove,
+
+ .target_create = esp32s3_target_create,
+ .init_target = esp32s3_target_init,
+ .examine = xtensa_examine,
+ .deinit_target = esp_xtensa_target_deinit,
+
+ .commands = esp32s3_command_handlers,
+};
diff --git a/src/target/espressif/esp_semihosting.c b/src/target/espressif/esp_semihosting.c
new file mode 100644
index 0000000..5e9cb94
--- /dev/null
+++ b/src/target/espressif/esp_semihosting.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * Semihosting API for Espressif chips *
+ * Copyright (C) 2022 Espressif Systems Ltd. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/log.h>
+#include <target/target.h>
+#include <target/semihosting_common.h>
+#include "esp_semihosting.h"
+#include "esp_xtensa.h"
+
+static struct esp_semihost_data __attribute__((unused)) *target_to_esp_semihost_data(struct target *target)
+{
+ const char *arch = target_get_gdb_arch(target);
+ if (arch) {
+ if (strncmp(arch, "xtensa", 6) == 0)
+ return &target_to_esp_xtensa(target)->semihost;
+ /* TODO: add riscv */
+ }
+ LOG_ERROR("Unknown target arch!");
+ return NULL;
+}
+
+static int esp_semihosting_sys_seek(struct target *target, uint64_t fd, uint32_t pos, size_t whence)
+{
+ struct semihosting *semihosting = target->semihosting;
+
+ semihosting->result = lseek(fd, pos, whence);
+ semihosting->sys_errno = errno;
+ LOG_TARGET_DEBUG(target, "lseek(%" PRIx64 ", %" PRIu32 " %" PRId64 ")=%d", fd, pos, semihosting->result, errno);
+ return ERROR_OK;
+}
+
+int esp_semihosting_common(struct target *target)
+{
+ struct semihosting *semihosting = target->semihosting;
+ if (!semihosting)
+ /* Silently ignore if the semihosting field was not set. */
+ return ERROR_OK;
+
+ int retval = ERROR_NOT_IMPLEMENTED;
+
+ /* Enough space to hold 4 long words. */
+ uint8_t fields[4 * 8];
+
+ /*
+ * By default return an error.
+ * The actual result must be set by each function
+ */
+ semihosting->result = -1;
+ semihosting->sys_errno = EIO;
+
+ LOG_TARGET_DEBUG(target, "op=0x%x, param=0x%" PRIx64, semihosting->op, semihosting->param);
+
+ switch (semihosting->op) {
+ case ESP_SEMIHOSTING_SYS_DRV_INFO:
+ /* Return success to make esp-idf application happy */
+ retval = ERROR_OK;
+ semihosting->result = 0;
+ semihosting->sys_errno = 0;
+ break;
+
+ case ESP_SEMIHOSTING_SYS_SEEK:
+ retval = semihosting_read_fields(target, 3, fields);
+ if (retval == ERROR_OK) {
+ uint64_t fd = semihosting_get_field(target, 0, fields);
+ uint32_t pos = semihosting_get_field(target, 1, fields);
+ size_t whence = semihosting_get_field(target, 2, fields);
+ retval = esp_semihosting_sys_seek(target, fd, pos, whence);
+ }
+ break;
+
+ case ESP_SEMIHOSTING_SYS_APPTRACE_INIT:
+ case ESP_SEMIHOSTING_SYS_DEBUG_STUBS_INIT:
+ case ESP_SEMIHOSTING_SYS_BREAKPOINT_SET:
+ case ESP_SEMIHOSTING_SYS_WATCHPOINT_SET:
+ /* For the time being only riscv chips support these commands
+ * TODO: invoke riscv custom command handler */
+ break;
+ }
+
+ return retval;
+}
+
+int esp_semihosting_basedir_command(struct command_invocation *cmd)
+{
+ struct target *target = get_current_target(CMD_CTX);
+
+ if (!target) {
+ LOG_ERROR("No target selected");
+ return ERROR_FAIL;
+ }
+
+ struct semihosting *semihosting = target->semihosting;
+ if (!semihosting) {
+ command_print(CMD, "semihosting not supported for current target");
+ return ERROR_FAIL;
+ }
+
+ if (!semihosting->is_active) {
+ if (semihosting->setup(target, true) != ERROR_OK) {
+ LOG_ERROR("Failed to Configure semihosting");
+ return ERROR_FAIL;
+ }
+ semihosting->is_active = true;
+ }
+
+ if (CMD_ARGC > 0) {
+ free(semihosting->basedir);
+ semihosting->basedir = strdup(CMD_ARGV[0]);
+ if (!semihosting->basedir) {
+ command_print(CMD, "semihosting failed to allocate memory for basedir!");
+ return ERROR_FAIL;
+ }
+ }
+
+ command_print(CMD, "DEPRECATED! semihosting base dir: %s",
+ semihosting->basedir ? semihosting->basedir : "");
+
+ return ERROR_OK;
+}
diff --git a/src/target/espressif/esp_semihosting.h b/src/target/espressif/esp_semihosting.h
new file mode 100644
index 0000000..bd2c079
--- /dev/null
+++ b/src/target/espressif/esp_semihosting.h
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Semihosting API for Espressif chips *
+ * Copyright (C) 2022 Espressif Systems Ltd. *
+ ***************************************************************************/
+
+#ifndef OPENOCD_TARGET_ESP_SEMIHOSTING_H
+#define OPENOCD_TARGET_ESP_SEMIHOSTING_H
+
+/* Legacy syscalls */
+#define ESP_SYS_DRV_INFO_LEGACY 0xE0
+
+/* syscalls compatible to ARM standard */
+#define ESP_SEMIHOSTING_SYS_DRV_INFO 0x100
+#define ESP_SEMIHOSTING_SYS_APPTRACE_INIT 0x101
+#define ESP_SEMIHOSTING_SYS_DEBUG_STUBS_INIT 0x102
+#define ESP_SEMIHOSTING_SYS_BREAKPOINT_SET 0x103
+#define ESP_SEMIHOSTING_SYS_WATCHPOINT_SET 0x104
+#define ESP_SEMIHOSTING_SYS_SEEK 0x105 /* custom lseek with whence */
+/* not implemented yet */
+#define ESP_SEMIHOSTING_SYS_MKDIR 0x106
+#define ESP_SEMIHOSTING_SYS_OPENDIR 0x107
+#define ESP_SEMIHOSTING_SYS_READDIR 0x108
+#define ESP_SEMIHOSTING_SYS_READDIR_R 0x109
+#define ESP_SEMIHOSTING_SYS_SEEKDIR 0x10A
+#define ESP_SEMIHOSTING_SYS_TELLDIR 0x10B
+#define ESP_SEMIHOSTING_SYS_CLOSEDIR 0x10C
+#define ESP_SEMIHOSTING_SYS_RMDIR 0x10D
+#define ESP_SEMIHOSTING_SYS_ACCESS 0x10E
+#define ESP_SEMIHOSTING_SYS_TRUNCATE 0x10F
+#define ESP_SEMIHOSTING_SYS_UTIME 0x110
+#define ESP_SEMIHOSTING_SYS_FSTAT 0x111
+#define ESP_SEMIHOSTING_SYS_STAT 0x112
+#define ESP_SEMIHOSTING_SYS_FSYNC 0x113
+#define ESP_SEMIHOSTING_SYS_LINK 0x114
+#define ESP_SEMIHOSTING_SYS_UNLINK 0x115
+
+/**
+ * Semihost calls handling operations.
+ */
+struct esp_semihost_ops {
+ /** Callback called before handling semihost call */
+ int (*prepare)(struct target *target);
+};
+
+struct esp_semihost_data {
+ bool need_resume;
+ struct esp_semihost_ops *ops;
+};
+
+int esp_semihosting_common(struct target *target);
+int esp_semihosting_basedir_command(struct command_invocation *cmd);
+
+#endif /* OPENOCD_TARGET_ESP_SEMIHOSTING_H */
diff --git a/src/target/espressif/esp_xtensa.c b/src/target/espressif/esp_xtensa.c
index 89393f4..fcc340c 100644
--- a/src/target/espressif/esp_xtensa.c
+++ b/src/target/espressif/esp_xtensa.c
@@ -1,20 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Espressif Xtensa target API for OpenOCD *
* Copyright (C) 2019 Espressif Systems Ltd. *
- * Author: Alexey Gerenkov <alexey@espressif.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -24,15 +12,20 @@
#include <stdbool.h>
#include <stdint.h>
#include <target/smp.h>
-#include "esp_xtensa.h"
#include <target/register.h>
+#include "esp_xtensa.h"
+#include "esp_semihosting.h"
int esp_xtensa_init_arch_info(struct target *target,
struct esp_xtensa_common *esp_xtensa,
- const struct xtensa_config *xtensa_cfg,
- struct xtensa_debug_module_config *dm_cfg)
+ struct xtensa_debug_module_config *dm_cfg,
+ const struct esp_semihost_ops *semihost_ops)
{
- return xtensa_init_arch_info(target, &esp_xtensa->xtensa, xtensa_cfg, dm_cfg);
+ int ret = xtensa_init_arch_info(target, &esp_xtensa->xtensa, dm_cfg);
+ if (ret != ERROR_OK)
+ return ret;
+ esp_xtensa->semihost.ops = (struct esp_semihost_ops *)semihost_ops;
+ return ERROR_OK;
}
int esp_xtensa_target_init(struct command_context *cmd_ctx, struct target *target)
diff --git a/src/target/espressif/esp_xtensa.h b/src/target/espressif/esp_xtensa.h
index 6badb1b..1ad6c37 100644
--- a/src/target/espressif/esp_xtensa.h
+++ b/src/target/espressif/esp_xtensa.h
@@ -1,31 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Generic ESP xtensa target implementation for OpenOCD *
* Copyright (C) 2019 Espressif Systems Ltd. *
- * Author: Alexey Gerenkov <alexey@espressif.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ESP_XTENSA_H
#define OPENOCD_TARGET_ESP_XTENSA_H
-#include <helper/command.h>
#include <target/target.h>
#include <target/xtensa/xtensa.h>
+#include "esp_xtensa.h"
+#include "esp_semihosting.h"
struct esp_xtensa_common {
struct xtensa xtensa; /* must be the first element */
+ struct esp_semihost_data semihost;
};
static inline struct esp_xtensa_common *target_to_esp_xtensa(struct target *target)
@@ -35,8 +25,8 @@ static inline struct esp_xtensa_common *target_to_esp_xtensa(struct target *targ
int esp_xtensa_init_arch_info(struct target *target,
struct esp_xtensa_common *esp_xtensa,
- const struct xtensa_config *xtensa_cfg,
- struct xtensa_debug_module_config *dm_cfg);
+ struct xtensa_debug_module_config *dm_cfg,
+ const struct esp_semihost_ops *semihost_ops);
int esp_xtensa_target_init(struct command_context *cmd_ctx, struct target *target);
void esp_xtensa_target_deinit(struct target *target);
int esp_xtensa_arch_state(struct target *target);
diff --git a/src/target/espressif/esp_xtensa_semihosting.c b/src/target/espressif/esp_xtensa_semihosting.c
new file mode 100644
index 0000000..54e9c4b
--- /dev/null
+++ b/src/target/espressif/esp_xtensa_semihosting.c
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * Copyright (c) 2020 Espressif Systems (Shanghai) Co. Ltd. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <target/semihosting_common.h>
+#include <target/xtensa/xtensa_regs.h>
+#include <target/xtensa/xtensa.h>
+#include "esp_xtensa.h"
+#include "esp_xtensa_semihosting.h"
+
+#define ESP_XTENSA_SYSCALL 0x41E0 /* XT_INS_BREAK(1, 14) */
+#define ESP_XTENSA_SYSCALL_SZ 3
+
+#define XTENSA_SYSCALL_OP_REG XT_REG_IDX_A2
+#define XTENSA_SYSCALL_RETVAL_REG XT_REG_IDX_A2
+#define XTENSA_SYSCALL_ERRNO_REG XT_REG_IDX_A3
+
+static int esp_xtensa_semihosting_setup(struct target *target, int enable)
+{
+ LOG_TARGET_DEBUG(target, "semihosting enable=%d", enable);
+
+ return ERROR_OK;
+}
+
+static int esp_xtensa_semihosting_post_result(struct target *target)
+{
+ /* Even with the v2 and later, errno will not retrieved from A3 reg, it is safe to set */
+ xtensa_reg_set(target, XTENSA_SYSCALL_RETVAL_REG, target->semihosting->result);
+ xtensa_reg_set(target, XTENSA_SYSCALL_ERRNO_REG, target->semihosting->sys_errno);
+ return ERROR_OK;
+}
+
+/**
+ * Checks and processes an ESP Xtensa semihosting request. This is meant
+ * to be called when the target is stopped due to a debug mode entry.
+ * If the value 0 is returned then there was nothing to process. A non-zero
+ * return value signifies that a request was processed and the target resumed,
+ * or an error was encountered, in which case the caller must return immediately.
+ *
+ * @param target Pointer to the ESP Xtensa target to process.
+ * @param retval Pointer to a location where the return code will be stored
+ * @return SEMIHOSTING_HANDLED if a request was processed or SEMIHOSTING_NONE with the proper retval
+ */
+int esp_xtensa_semihosting(struct target *target, int *retval)
+{
+ struct esp_xtensa_common *esp_xtensa = target_to_esp_xtensa(target);
+
+ xtensa_reg_val_t dbg_cause = xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE);
+ if ((dbg_cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN)) == 0)
+ return SEMIHOSTING_NONE;
+
+ uint8_t brk_insn_buf[sizeof(uint32_t)] = { 0 };
+ xtensa_reg_val_t pc = xtensa_reg_get(target, XT_REG_IDX_PC);
+ *retval = target_read_memory(target, pc, ESP_XTENSA_SYSCALL_SZ, 1, brk_insn_buf);
+ if (*retval != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "Failed to read break instruction!");
+ return SEMIHOSTING_NONE;
+ }
+
+ uint32_t syscall_ins = buf_get_u32(brk_insn_buf, 0, 32);
+ if (syscall_ins != ESP_XTENSA_SYSCALL) {
+ *retval = ERROR_OK;
+ return SEMIHOSTING_NONE;
+ }
+
+ if (esp_xtensa->semihost.ops && esp_xtensa->semihost.ops->prepare)
+ esp_xtensa->semihost.ops->prepare(target);
+
+ xtensa_reg_val_t a2 = xtensa_reg_get(target, XT_REG_IDX_A2);
+ xtensa_reg_val_t a3 = xtensa_reg_get(target, XT_REG_IDX_A3);
+ LOG_TARGET_DEBUG(target, "Semihosting call 0x%" PRIx32 " 0x%" PRIx32 " Base dir '%s'",
+ a2,
+ a3,
+ target->semihosting->basedir ? target->semihosting->basedir : "");
+
+ target->semihosting->op = a2;
+ target->semihosting->param = a3;
+
+ *retval = semihosting_common(target);
+
+ /* Most operations are resumable, except the two exit calls. */
+ if (*retval != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "Semihosting operation (op: 0x%x) error! Code: %d",
+ target->semihosting->op,
+ *retval);
+ }
+
+ /* Resume if target it is resumable and we are not waiting on a fileio operation to complete. */
+ if (target->semihosting->is_resumable && !target->semihosting->hit_fileio)
+ target_to_esp_xtensa(target)->semihost.need_resume = true;
+
+ return SEMIHOSTING_HANDLED;
+}
+
+static int xtensa_semihosting_init(struct target *target)
+{
+ return semihosting_common_init(target, esp_xtensa_semihosting_setup, esp_xtensa_semihosting_post_result);
+}
+
+int esp_xtensa_semihosting_init(struct target *target)
+{
+ int retval = xtensa_semihosting_init(target);
+ if (retval != ERROR_OK)
+ return retval;
+ target->semihosting->word_size_bytes = 4; /* 32 bits */
+ target->semihosting->user_command_extension = esp_semihosting_common;
+ return ERROR_OK;
+}
diff --git a/src/target/espressif/esp_xtensa_semihosting.h b/src/target/espressif/esp_xtensa_semihosting.h
new file mode 100644
index 0000000..1da3115
--- /dev/null
+++ b/src/target/espressif/esp_xtensa_semihosting.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Copyright (c) 2020 Espressif Systems (Shanghai) Co. Ltd. *
+ ***************************************************************************/
+
+#ifndef OPENOCD_TARGET_ESP_XTENSA_SEMIHOSTING_H
+#define OPENOCD_TARGET_ESP_XTENSA_SEMIHOSTING_H
+
+#include <target/target.h>
+
+int esp_xtensa_semihosting_init(struct target *target);
+int esp_xtensa_semihosting(struct target *target, int *retval);
+
+#endif /* OPENOCD_TARGET_ESP_XTENSA_SEMIHOSTING_H */
diff --git a/src/target/espressif/esp_xtensa_smp.c b/src/target/espressif/esp_xtensa_smp.c
new file mode 100644
index 0000000..1d03774
--- /dev/null
+++ b/src/target/espressif/esp_xtensa_smp.c
@@ -0,0 +1,931 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * ESP Xtensa SMP target API for OpenOCD *
+ * Copyright (C) 2020 Espressif Systems Ltd. Co *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "assert.h"
+#include <target/target.h>
+#include <target/target_type.h>
+#include <target/smp.h>
+#include <target/semihosting_common.h>
+#include "esp_xtensa_smp.h"
+#include "esp_xtensa_semihosting.h"
+
+/*
+Multiprocessor stuff common:
+
+The ESP Xtensa chip can have several cores in it, which can run in SMP-mode if an
+SMP-capable OS is running. The hardware has a few features which makes
+SMP debugging much easier.
+
+First of all, there's something called a 'break network', consisting of a
+BreakIn input and a BreakOut output on each CPU. The idea is that as soon
+as a CPU goes into debug mode for whatever reason, it'll signal that using
+its DebugOut pin. This signal is connected to the other CPU's DebugIn
+input, causing this CPU also to go into debugging mode. To resume execution
+when using only this break network, we will need to manually resume both
+CPUs.
+
+An alternative to this is the XOCDMode output and the RunStall (or DebugStall)
+input. When these are cross-connected, a CPU that goes into debug mode will
+halt execution entirely on the other CPU. Execution on the other CPU can be
+resumed by either the first CPU going out of debug mode, or the second CPU
+going into debug mode: the stall is temporarily lifted as long as the stalled
+CPU is in debug mode.
+
+A third, separate, signal is CrossTrigger. This is connected in the same way
+as the breakIn/breakOut network, but is for the TRAX (trace memory) feature;
+it does not affect OCD in any way.
+*/
+
+/*
+Multiprocessor stuff:
+
+The ESP Xtensa chip has several Xtensa cores inside, but represent themself to the OCD
+as one chip that works in multithreading mode under FreeRTOS OS.
+The core that initiate the stop condition will be defined as an active cpu.
+When one core stops, then other core will be stopped automatically by smpbreak.
+The core that initiates stop condition will be defined as an active core, and
+registers of this core will be transferred.
+*/
+
+#define ESP_XTENSA_SMP_EXAMINE_OTHER_CORES 5
+
+static int esp_xtensa_smp_update_halt_gdb(struct target *target, bool *need_resume);
+
+static inline struct esp_xtensa_smp_common *target_to_esp_xtensa_smp(struct target *target)
+{
+ return container_of(target->arch_info, struct esp_xtensa_smp_common, esp_xtensa);
+}
+
+int esp_xtensa_smp_assert_reset(struct target *target)
+{
+ return ERROR_OK;
+}
+
+int esp_xtensa_smp_deassert_reset(struct target *target)
+{
+ LOG_TARGET_DEBUG(target, "begin");
+
+ int ret = xtensa_deassert_reset(target);
+ if (ret != ERROR_OK)
+ return ret;
+ /* in SMP mode when chip was running single-core app the other core can be left un-examined,
+ because examination is done before SOC reset. But after SOC reset it is functional and should be handled.
+ So try to examine un-examined core just after SOC reset */
+ if (target->smp && !target_was_examined(target))
+ ret = xtensa_examine(target);
+ return ret;
+}
+
+int esp_xtensa_smp_soft_reset_halt(struct target *target)
+{
+ int res;
+ struct target_list *head;
+ struct esp_xtensa_smp_common *esp_xtensa_smp = target_to_esp_xtensa_smp(target);
+
+ LOG_TARGET_DEBUG(target, "begin");
+ /* in SMP mode we need to ensure that at first we reset SOC on PRO-CPU
+ and then call xtensa_assert_reset() for all cores */
+ if (target->smp && target->coreid != 0)
+ return ERROR_OK;
+ /* Reset the SoC first */
+ if (esp_xtensa_smp->chip_ops->reset) {
+ res = esp_xtensa_smp->chip_ops->reset(target);
+ if (res != ERROR_OK)
+ return res;
+ }
+ if (!target->smp)
+ return xtensa_assert_reset(target);
+
+ foreach_smp_target(head, target->smp_targets) {
+ res = xtensa_assert_reset(head->target);
+ if (res != ERROR_OK)
+ return res;
+ }
+ return ERROR_OK;
+}
+
+static struct target *get_halted_esp_xtensa_smp(struct target *target, int32_t coreid)
+{
+ struct target_list *head;
+ struct target *curr;
+
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ if ((curr->coreid == coreid) && (curr->state == TARGET_HALTED))
+ return curr;
+ }
+
+ return target;
+}
+
+int esp_xtensa_smp_poll(struct target *target)
+{
+ enum target_state old_state = target->state;
+ struct esp_xtensa_smp_common *esp_xtensa_smp = target_to_esp_xtensa_smp(target);
+ struct esp_xtensa_common *esp_xtensa = target_to_esp_xtensa(target);
+ struct target_list *head;
+ struct target *curr;
+ bool other_core_resume_req = false;
+
+ if (target->state == TARGET_HALTED && target->smp && target->gdb_service && !target->gdb_service->target) {
+ target->gdb_service->target = get_halted_esp_xtensa_smp(target, target->gdb_service->core[1]);
+ LOG_INFO("Switch GDB target to '%s'", target_name(target->gdb_service->target));
+ if (esp_xtensa_smp->chip_ops->on_halt)
+ esp_xtensa_smp->chip_ops->on_halt(target);
+ target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ return ERROR_OK;
+ }
+
+ int ret = esp_xtensa_poll(target);
+ if (ret != ERROR_OK)
+ return ret;
+
+ if (target->smp) {
+ if (target->state == TARGET_RESET) {
+ esp_xtensa_smp->examine_other_cores = ESP_XTENSA_SMP_EXAMINE_OTHER_CORES;
+ } else if (esp_xtensa_smp->examine_other_cores > 0 &&
+ (target->state == TARGET_RUNNING || target->state == TARGET_HALTED)) {
+ LOG_TARGET_DEBUG(target, "Check for unexamined cores after reset");
+ bool all_examined = true;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ if (curr == target)
+ continue;
+ if (!target_was_examined(curr)) {
+ if (target_examine_one(curr) != ERROR_OK) {
+ LOG_DEBUG("Failed to examine!");
+ all_examined = false;
+ }
+ }
+ }
+ if (all_examined)
+ esp_xtensa_smp->examine_other_cores = 0;
+ else
+ esp_xtensa_smp->examine_other_cores--;
+ }
+ }
+
+ if (old_state != TARGET_HALTED && target->state == TARGET_HALTED) {
+ if (target->smp) {
+ ret = esp_xtensa_smp_update_halt_gdb(target, &other_core_resume_req);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ /* Call any event callbacks that are applicable */
+ if (old_state == TARGET_DEBUG_RUNNING) {
+ target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
+ } else {
+ if (esp_xtensa_semihosting(target, &ret) == SEMIHOSTING_HANDLED) {
+ if (ret == ERROR_OK && esp_xtensa->semihost.need_resume &&
+ !esp_xtensa_smp->other_core_does_resume) {
+ esp_xtensa->semihost.need_resume = false;
+ /* Resume xtensa_resume will handle BREAK instruction. */
+ ret = target_resume(target, 1, 0, 1, 0);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Failed to resume target");
+ return ret;
+ }
+ }
+ return ret;
+ }
+ /* check whether any core polled by esp_xtensa_smp_update_halt_gdb() requested resume */
+ if (target->smp && other_core_resume_req) {
+ /* Resume xtensa_resume will handle BREAK instruction. */
+ ret = target_resume(target, 1, 0, 1, 0);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Failed to resume target");
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ if (esp_xtensa_smp->chip_ops->on_halt)
+ esp_xtensa_smp->chip_ops->on_halt(target);
+ target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ }
+ }
+
+ return ERROR_OK;
+}
+
+static int esp_xtensa_smp_update_halt_gdb(struct target *target, bool *need_resume)
+{
+ struct esp_xtensa_smp_common *esp_xtensa_smp;
+ struct target *gdb_target = NULL;
+ struct target_list *head;
+ struct target *curr;
+ int ret = ERROR_OK;
+
+ *need_resume = false;
+
+ if (target->gdb_service && target->gdb_service->target)
+ LOG_DEBUG("GDB target '%s'", target_name(target->gdb_service->target));
+
+ if (target->gdb_service && target->gdb_service->core[0] == -1) {
+ target->gdb_service->target = target;
+ target->gdb_service->core[0] = target->coreid;
+ LOG_INFO("Set GDB target to '%s'", target_name(target));
+ }
+
+ if (target->gdb_service)
+ gdb_target = target->gdb_service->target;
+
+ /* due to smpbreak config other cores can also go to HALTED state */
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ LOG_DEBUG("Check target '%s'", target_name(curr));
+ /* skip calling context */
+ if (curr == target)
+ continue;
+ if (!target_was_examined(curr)) {
+ curr->state = TARGET_HALTED;
+ continue;
+ }
+ /* skip targets that were already halted */
+ if (curr->state == TARGET_HALTED)
+ continue;
+ /* Skip gdb_target; it alerts GDB so has to be polled as last one */
+ if (curr == gdb_target)
+ continue;
+ LOG_DEBUG("Poll target '%s'", target_name(curr));
+
+ esp_xtensa_smp = target_to_esp_xtensa_smp(curr);
+ /* avoid auto-resume after syscall, it will be done later */
+ esp_xtensa_smp->other_core_does_resume = true;
+ /* avoid recursion in esp_xtensa_smp_poll() */
+ curr->smp = 0;
+ if (esp_xtensa_smp->chip_ops->poll)
+ ret = esp_xtensa_smp->chip_ops->poll(curr);
+ else
+ ret = esp_xtensa_smp_poll(curr);
+ curr->smp = 1;
+ if (ret != ERROR_OK)
+ return ret;
+ esp_xtensa_smp->other_core_does_resume = false;
+ struct esp_xtensa_common *curr_esp_xtensa = target_to_esp_xtensa(curr);
+ if (curr_esp_xtensa->semihost.need_resume) {
+ curr_esp_xtensa->semihost.need_resume = false;
+ *need_resume = true;
+ }
+ }
+
+ /* after all targets were updated, poll the gdb serving target */
+ if (gdb_target && gdb_target != target) {
+ esp_xtensa_smp = target_to_esp_xtensa_smp(gdb_target);
+ if (esp_xtensa_smp->chip_ops->poll)
+ ret = esp_xtensa_smp->chip_ops->poll(gdb_target);
+ else
+ ret = esp_xtensa_smp_poll(gdb_target);
+ }
+
+ LOG_DEBUG("exit");
+
+ return ret;
+}
+
+static inline int esp_xtensa_smp_smpbreak_disable(struct target *target, uint32_t *smp_break)
+{
+ int res = xtensa_smpbreak_get(target, smp_break);
+ if (res != ERROR_OK)
+ return res;
+ return xtensa_smpbreak_set(target, 0);
+}
+
+static inline int esp_xtensa_smp_smpbreak_restore(struct target *target, uint32_t smp_break)
+{
+ return xtensa_smpbreak_set(target, smp_break);
+}
+
+static int esp_xtensa_smp_resume_cores(struct target *target,
+ int handle_breakpoints,
+ int debug_execution)
+{
+ struct target_list *head;
+ struct target *curr;
+
+ LOG_TARGET_DEBUG(target, "begin");
+
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ /* in single-core mode disabled core cannot be examined, but need to be resumed too*/
+ if ((curr != target) && (curr->state != TARGET_RUNNING) && target_was_examined(curr)) {
+ /* resume current address, not in SMP mode */
+ curr->smp = 0;
+ int res = esp_xtensa_smp_resume(curr, 1, 0, handle_breakpoints, debug_execution);
+ curr->smp = 1;
+ if (res != ERROR_OK)
+ return res;
+ }
+ }
+ return ERROR_OK;
+}
+
+int esp_xtensa_smp_resume(struct target *target,
+ int current,
+ target_addr_t address,
+ int handle_breakpoints,
+ int debug_execution)
+{
+ int res;
+ uint32_t smp_break;
+
+ xtensa_smpbreak_get(target, &smp_break);
+ LOG_TARGET_DEBUG(target, "smp_break=0x%" PRIx32, smp_break);
+
+ /* dummy resume for smp toggle in order to reduce gdb impact */
+ if ((target->smp) && (target->gdb_service) && (target->gdb_service->core[1] != -1)) {
+ /* simulate a start and halt of target */
+ target->gdb_service->target = NULL;
+ target->gdb_service->core[0] = target->gdb_service->core[1];
+ /* fake resume at next poll we play the target core[1], see poll*/
+ LOG_TARGET_DEBUG(target, "Fake resume");
+ target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
+ return ERROR_OK;
+ }
+
+ /* xtensa_prepare_resume() can step over breakpoint/watchpoint and generate signals on BreakInOut circuit for
+ * other cores. So disconnect this core from BreakInOut circuit and do xtensa_prepare_resume(). */
+ res = esp_xtensa_smp_smpbreak_disable(target, &smp_break);
+ if (res != ERROR_OK)
+ return res;
+ res = xtensa_prepare_resume(target, current, address, handle_breakpoints, debug_execution);
+ /* restore configured BreakInOut signals config */
+ int ret = esp_xtensa_smp_smpbreak_restore(target, smp_break);
+ if (ret != ERROR_OK)
+ return ret;
+ if (res != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "Failed to prepare for resume!");
+ return res;
+ }
+
+ if (target->smp) {
+ if (target->gdb_service)
+ target->gdb_service->core[0] = -1;
+ res = esp_xtensa_smp_resume_cores(target, handle_breakpoints, debug_execution);
+ if (res != ERROR_OK)
+ return res;
+ }
+
+ res = xtensa_do_resume(target);
+ if (res != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "Failed to resume!");
+ return res;
+ }
+
+ target->debug_reason = DBG_REASON_NOTHALTED;
+ if (!debug_execution)
+ target->state = TARGET_RUNNING;
+ else
+ target->state = TARGET_DEBUG_RUNNING;
+
+ target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
+ return ERROR_OK;
+}
+
+int esp_xtensa_smp_step(struct target *target,
+ int current,
+ target_addr_t address,
+ int handle_breakpoints)
+{
+ int res;
+ uint32_t smp_break = 0;
+ struct esp_xtensa_smp_common *esp_xtensa_smp = target_to_esp_xtensa_smp(target);
+
+ if (target->smp) {
+ res = esp_xtensa_smp_smpbreak_disable(target, &smp_break);
+ if (res != ERROR_OK)
+ return res;
+ }
+ res = xtensa_step(target, current, address, handle_breakpoints);
+
+ if (res == ERROR_OK) {
+ if (esp_xtensa_smp->chip_ops->on_halt)
+ esp_xtensa_smp->chip_ops->on_halt(target);
+ target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ }
+
+ if (target->smp) {
+ int ret = esp_xtensa_smp_smpbreak_restore(target, smp_break);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+
+ return res;
+}
+
+int esp_xtensa_smp_watchpoint_add(struct target *target, struct watchpoint *watchpoint)
+{
+ int res = xtensa_watchpoint_add(target, watchpoint);
+ if (res != ERROR_OK)
+ return res;
+
+ if (!target->smp)
+ return ERROR_OK;
+
+ struct target_list *head;
+ foreach_smp_target(head, target->smp_targets) {
+ struct target *curr = head->target;
+ if (curr == target || !target_was_examined(curr))
+ continue;
+ /* Need to use high level API here because every target for core contains list of watchpoints.
+ * GDB works with active core only, so we need to duplicate every watchpoint on other cores,
+ * otherwise watchpoint_free() on active core can fail if WP has been initially added on another core. */
+ curr->smp = 0;
+ res = watchpoint_add(curr, watchpoint->address, watchpoint->length,
+ watchpoint->rw, watchpoint->value, watchpoint->mask);
+ curr->smp = 1;
+ if (res != ERROR_OK)
+ return res;
+ }
+ return ERROR_OK;
+}
+
+int esp_xtensa_smp_watchpoint_remove(struct target *target, struct watchpoint *watchpoint)
+{
+ int res = xtensa_watchpoint_remove(target, watchpoint);
+ if (res != ERROR_OK)
+ return res;
+
+ if (!target->smp)
+ return ERROR_OK;
+
+ struct target_list *head;
+ foreach_smp_target(head, target->smp_targets) {
+ struct target *curr = head->target;
+ if (curr == target)
+ continue;
+ /* see big comment in esp_xtensa_smp_watchpoint_add() */
+ curr->smp = 0;
+ watchpoint_remove(curr, watchpoint->address);
+ curr->smp = 1;
+ }
+ return ERROR_OK;
+}
+
+int esp_xtensa_smp_init_arch_info(struct target *target,
+ struct esp_xtensa_smp_common *esp_xtensa_smp,
+ struct xtensa_debug_module_config *dm_cfg,
+ const struct esp_xtensa_smp_chip_ops *chip_ops,
+ const struct esp_semihost_ops *semihost_ops)
+{
+ int ret = esp_xtensa_init_arch_info(target, &esp_xtensa_smp->esp_xtensa, dm_cfg, semihost_ops);
+ if (ret != ERROR_OK)
+ return ret;
+ esp_xtensa_smp->chip_ops = chip_ops;
+ esp_xtensa_smp->examine_other_cores = ESP_XTENSA_SMP_EXAMINE_OTHER_CORES;
+ return ERROR_OK;
+}
+
+int esp_xtensa_smp_target_init(struct command_context *cmd_ctx, struct target *target)
+{
+ int ret = esp_xtensa_target_init(cmd_ctx, target);
+ if (ret != ERROR_OK)
+ return ret;
+
+ if (target->smp) {
+ struct target_list *head;
+ foreach_smp_target(head, target->smp_targets) {
+ struct target *curr = head->target;
+ ret = esp_xtensa_semihosting_init(curr);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ } else {
+ ret = esp_xtensa_semihosting_init(target);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_xtdef)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_xtdef_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtdef_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_xtopt)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_xtopt_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtopt_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_xtmem)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_xtmem_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtmem_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_xtmpu)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_xtmpu_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtmpu_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_xtmmu)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_xtmmu_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtmmu_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_xtreg)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_xtreg_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtreg_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_xtregfmt)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_xtregfmt_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtregfmt_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_permissive_mode)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_permissive_mode_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_permissive_mode_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_smpbreak)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_smpbreak_do, curr);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_smpbreak_do, target);
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_mask_interrupts)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_mask_interrupts_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_mask_interrupts_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_perfmon_enable)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp && CMD_ARGC > 0) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_perfmon_enable_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_perfmon_enable_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_perfmon_dump)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ LOG_INFO("CPU%d:", curr->coreid);
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_perfmon_dump_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_perfmon_dump_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_tracestart)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_tracestart_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_tracestart_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_tracestop)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp) {
+ struct target_list *head;
+ struct target *curr;
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_tracestop_do,
+ target_to_xtensa(curr));
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_tracestop_do,
+ target_to_xtensa(target));
+}
+
+COMMAND_HANDLER(esp_xtensa_smp_cmd_tracedump)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ if (target->smp) {
+ struct target_list *head;
+ struct target *curr;
+ int32_t cores_max_id = 0;
+ /* assume that core IDs are assigned to SMP targets sequentially: 0,1,2... */
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ if (cores_max_id < curr->coreid)
+ cores_max_id = curr->coreid;
+ }
+ if (CMD_ARGC < ((uint32_t)cores_max_id + 1)) {
+ command_print(CMD,
+ "Need %d filenames to dump to as output!",
+ cores_max_id + 1);
+ return ERROR_FAIL;
+ }
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ int ret = CALL_COMMAND_HANDLER(xtensa_cmd_tracedump_do,
+ target_to_xtensa(curr), CMD_ARGV[curr->coreid]);
+ if (ret != ERROR_OK)
+ return ret;
+ }
+ return ERROR_OK;
+ }
+ return CALL_COMMAND_HANDLER(xtensa_cmd_tracedump_do,
+ target_to_xtensa(target), CMD_ARGV[0]);
+}
+
+const struct command_registration esp_xtensa_smp_xtensa_command_handlers[] = {
+ {
+ .name = "xtdef",
+ .handler = esp_xtensa_smp_cmd_xtdef,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa core type",
+ .usage = "<type>",
+ },
+ {
+ .name = "xtopt",
+ .handler = esp_xtensa_smp_cmd_xtopt,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa core option",
+ .usage = "<name> <value>",
+ },
+ {
+ .name = "xtmem",
+ .handler = esp_xtensa_smp_cmd_xtmem,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa memory/cache option",
+ .usage = "<type> [parameters]",
+ },
+ {
+ .name = "xtmmu",
+ .handler = esp_xtensa_smp_cmd_xtmmu,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa MMU option",
+ .usage = "<NIREFILLENTRIES> <NDREFILLENTRIES> <IVARWAY56> <DVARWAY56>",
+ },
+ {
+ .name = "xtmpu",
+ .handler = esp_xtensa_smp_cmd_xtmpu,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa MPU option",
+ .usage = "<num FG seg> <min seg size> <lockable> <executeonly>",
+ },
+ {
+ .name = "xtreg",
+ .handler = esp_xtensa_smp_cmd_xtreg,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa register",
+ .usage = "<regname> <regnum>",
+ },
+ {
+ .name = "xtregs",
+ .handler = esp_xtensa_smp_cmd_xtreg,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure number of Xtensa registers",
+ .usage = "<numregs>",
+ },
+ {
+ .name = "xtregfmt",
+ .handler = esp_xtensa_smp_cmd_xtregfmt,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure format of Xtensa register map",
+ .usage = "<numgregs>",
+ },
+ {
+ .name = "set_permissive",
+ .handler = esp_xtensa_smp_cmd_permissive_mode,
+ .mode = COMMAND_ANY,
+ .help = "When set to 1, enable Xtensa permissive mode (less client-side checks)",
+ .usage = "[0|1]",
+ },
+ {
+ .name = "maskisr",
+ .handler = esp_xtensa_smp_cmd_mask_interrupts,
+ .mode = COMMAND_ANY,
+ .help = "mask Xtensa interrupts at step",
+ .usage = "['on'|'off']",
+ },
+ {
+ .name = "smpbreak",
+ .handler = esp_xtensa_smp_cmd_smpbreak,
+ .mode = COMMAND_ANY,
+ .help = "Set the way the CPU chains OCD breaks",
+ .usage =
+ "[none|breakinout|runstall] | [BreakIn] [BreakOut] [RunStallIn] [DebugModeOut]",
+ },
+ {
+ .name = "perfmon_enable",
+ .handler = esp_xtensa_smp_cmd_perfmon_enable,
+ .mode = COMMAND_EXEC,
+ .help = "Enable and start performance counter",
+ .usage = "<counter_id> <select> [mask] [kernelcnt] [tracelevel]",
+ },
+ {
+ .name = "perfmon_dump",
+ .handler = esp_xtensa_smp_cmd_perfmon_dump,
+ .mode = COMMAND_EXEC,
+ .help =
+ "Dump performance counter value. If no argument specified, dumps all counters.",
+ .usage = "[counter_id]",
+ },
+ {
+ .name = "tracestart",
+ .handler = esp_xtensa_smp_cmd_tracestart,
+ .mode = COMMAND_EXEC,
+ .help =
+ "Tracing: Set up and start a trace. Optionally set stop trigger address and amount of data captured after.",
+ .usage = "[pc <pcval>/[maskbitcount]] [after <n> [ins|words]]",
+ },
+ {
+ .name = "tracestop",
+ .handler = esp_xtensa_smp_cmd_tracestop,
+ .mode = COMMAND_EXEC,
+ .help = "Tracing: Stop current trace as started by the tracestart command",
+ .usage = "",
+ },
+ {
+ .name = "tracedump",
+ .handler = esp_xtensa_smp_cmd_tracedump,
+ .mode = COMMAND_EXEC,
+ .help = "Tracing: Dump trace memory to a files. One file per core.",
+ .usage = "<outfile1> <outfile2>",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration esp_xtensa_smp_command_handlers[] = {
+ {
+ .name = "xtensa",
+ .usage = "",
+ .chain = esp_xtensa_smp_xtensa_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
diff --git a/src/target/espressif/esp_xtensa_smp.h b/src/target/espressif/esp_xtensa_smp.h
new file mode 100644
index 0000000..aeb1d61
--- /dev/null
+++ b/src/target/espressif/esp_xtensa_smp.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * ESP Xtensa SMP target for OpenOCD *
+ * Copyright (C) 2020 Espressif Systems Ltd. Co *
+ ***************************************************************************/
+
+#ifndef OPENOCD_TARGET_XTENSA_ESP_SMP_H
+#define OPENOCD_TARGET_XTENSA_ESP_SMP_H
+
+#include "esp_xtensa.h"
+
+struct esp_xtensa_smp_chip_ops {
+ int (*poll)(struct target *target);
+ int (*reset)(struct target *target);
+ int (*on_halt)(struct target *target);
+};
+
+struct esp_xtensa_smp_common {
+ struct esp_xtensa_common esp_xtensa;
+ const struct esp_xtensa_smp_chip_ops *chip_ops;
+ bool other_core_does_resume;
+ /* number of attempts to examine other SMP cores, attempts are made after reset on target poll */
+ int examine_other_cores;
+};
+
+int esp_xtensa_smp_poll(struct target *target);
+int esp_xtensa_smp_resume(struct target *target,
+ int current,
+ target_addr_t address,
+ int handle_breakpoints,
+ int debug_execution);
+int esp_xtensa_smp_step(struct target *target,
+ int current,
+ target_addr_t address,
+ int handle_breakpoints);
+int esp_xtensa_smp_assert_reset(struct target *target);
+int esp_xtensa_smp_deassert_reset(struct target *target);
+int esp_xtensa_smp_soft_reset_halt(struct target *target);
+int esp_xtensa_smp_watchpoint_add(struct target *target, struct watchpoint *watchpoint);
+int esp_xtensa_smp_watchpoint_remove(struct target *target, struct watchpoint *watchpoint);
+int esp_xtensa_smp_handle_target_event(struct target *target, enum target_event event, void *priv);
+int esp_xtensa_smp_target_init(struct command_context *cmd_ctx, struct target *target);
+int esp_xtensa_smp_init_arch_info(struct target *target,
+ struct esp_xtensa_smp_common *esp_xtensa_smp,
+ struct xtensa_debug_module_config *dm_cfg,
+ const struct esp_xtensa_smp_chip_ops *chip_ops,
+ const struct esp_semihost_ops *semihost_ops);
+
+extern const struct command_registration esp_xtensa_smp_command_handlers[];
+extern const struct command_registration esp_xtensa_smp_xtensa_command_handlers[];
+extern const struct command_registration esp_xtensa_smp_esp_command_handlers[];
+
+#endif /* OPENOCD_TARGET_XTENSA_ESP_SMP_H */
diff --git a/src/target/etb.c b/src/target/etb.c
index ce1bef9..3b9004b 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/etb.h b/src/target/etb.h
index 680c8a1..fa75600 100644
--- a/src/target/etb.h
+++ b/src/target/etb.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ETB_H
diff --git a/src/target/etm.c b/src/target/etm.c
index 119c0df..57417c3 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/target/etm.h b/src/target/etm.h
index debe197..be5f2c7 100644
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007 by Vincent Palatin *
* vincent.palatin_openocd@m4x.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ETM_H
diff --git a/src/target/etm_dummy.c b/src/target/etm_dummy.c
index ba53c7a..8deccf5 100644
--- a/src/target/etm_dummy.c
+++ b/src/target/etm_dummy.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/etm_dummy.h b/src/target/etm_dummy.h
index 5a1955f..8df2000 100644
--- a/src/target/etm_dummy.h
+++ b/src/target/etm_dummy.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_ETM_DUMMY_H
diff --git a/src/target/fa526.c b/src/target/fa526.c
index aa9e450..38b7ab2 100644
--- a/src/target/fa526.c
+++ b/src/target/fa526.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 by Paulius Zaleckas *
* paulius.zaleckas@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index bbb793a..1e7eb09 100644
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008-2009 by Marvell Semiconductors, Inc. *
* Written by Nicolas Pitre <nico@marvell.com> *
* *
* Copyright (C) 2008 by Hongtao Zheng *
* hontor@126.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index 3e359b9..33126d6 100644
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Mathias Kuester *
* Mathias Kuester <kesmtp@freenet.de> *
@@ -6,19 +8,6 @@
* spen@spen-soft.co.uk *
* *
* revised: 4/25/13 by brent@mbari.org [DCC target request support] *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -203,7 +192,7 @@ static int adapter_target_create(struct target *target,
{
LOG_DEBUG("%s", __func__);
struct adiv5_private_config *pc = target->private_config;
- if (pc && pc->ap_num > 0) {
+ if (pc && pc->ap_num != DP_APSEL_INVALID && pc->ap_num != 0) {
LOG_ERROR("hla_target: invalid parameter -ap-num (> 0)");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -242,7 +231,7 @@ static int adapter_debug_entry(struct target *target)
struct armv7m_common *armv7m = target_to_armv7m(target);
struct arm *arm = &armv7m->arm;
struct reg *r;
- uint32_t xPSR;
+ uint32_t xpsr;
int retval;
/* preserve the DCRDR across halts */
@@ -260,11 +249,11 @@ static int adapter_debug_entry(struct target *target)
adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA);
r = arm->cpsr;
- xPSR = buf_get_u32(r->value, 0, 32);
+ xpsr = buf_get_u32(r->value, 0, 32);
/* Are we in an exception handler */
- if (xPSR & 0x1FF) {
- armv7m->exception_number = (xPSR & 0x1FF);
+ if (xpsr & 0x1FF) {
+ armv7m->exception_number = (xpsr & 0x1FF);
arm->core_mode = ARM_MODE_HANDLER;
arm->map = armv7m_msp_reg_map;
diff --git a/src/target/image.c b/src/target/image.c
index 130ea6c..f8de7a2 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -13,19 +15,6 @@
* *
* Copyright (C) 2018 by Advantest *
* florian.meister@advantest.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/image.h b/src/target/image.h
index bf06064..03bc068 100644
--- a/src/target/image.h
+++ b/src/target/image.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2018 by Advantest *
* florian.meister@advantest.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_IMAGE_H
diff --git a/src/target/lakemont.c b/src/target/lakemont.c
index 230f53f..5035cdb 100644
--- a/src/target/lakemont.c
+++ b/src/target/lakemont.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright(c) 2013-2016 Intel Corporation.
*
@@ -8,19 +10,6 @@
* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
* Jessica Gomez (jessica.gomez.hernandez@intel.com)
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
* Contact Information:
* Intel Corporation
*/
diff --git a/src/target/lakemont.h b/src/target/lakemont.h
index 98efd44..ca6557f 100644
--- a/src/target/lakemont.h
+++ b/src/target/lakemont.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright(c) 2013-2016 Intel Corporation.
*
@@ -7,19 +9,6 @@
* Julien Carreno (julien.carreno@intel.com)
* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
* Contact Information:
* Intel Corporation
*/
diff --git a/src/target/ls1_sap.c b/src/target/ls1_sap.c
index c167224..9bd00c0 100644
--- a/src/target/ls1_sap.c
+++ b/src/target/ls1_sap.c
@@ -1,17 +1,8 @@
-/***************************************************************************
- * Copyright (C) 2015 by Esben Haabendal *
- * eha@deif.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (C) 2015 by Esben Haabendal <eha@deif.com>
+ */
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c
index eef05b4..a662506 100644
--- a/src/target/mem_ap.c
+++ b/src/target/mem_ap.c
@@ -1,16 +1,8 @@
-/*****************************************************************************
- * Copyright (C) 2016 by Matthias Welwarsky <matthias.welwarsky@sysgo.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ****************************************************************************/
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (C) 2016 by Matthias Welwarsky <matthias.welwarsky@sysgo.com>
+ */
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -29,7 +21,7 @@ struct mem_ap {
int common_magic;
struct adiv5_dap *dap;
struct adiv5_ap *ap;
- int ap_num;
+ uint64_t ap_num;
};
static int mem_ap_target_create(struct target *target, Jim_Interp *interp)
@@ -74,8 +66,13 @@ static int mem_ap_init_target(struct command_context *cmd_ctx, struct target *ta
static void mem_ap_deinit_target(struct target *target)
{
+ struct mem_ap *mem_ap = target->arch_info;
+
LOG_DEBUG("%s", __func__);
+ if (mem_ap->ap)
+ dap_put_ap(mem_ap->ap);
+
free(target->private_config);
free(target->arch_info);
return;
@@ -139,7 +136,16 @@ static int mem_ap_examine(struct target *target)
struct mem_ap *mem_ap = target->arch_info;
if (!target_was_examined(target)) {
- mem_ap->ap = dap_ap(mem_ap->dap, mem_ap->ap_num);
+ if (mem_ap->ap) {
+ dap_put_ap(mem_ap->ap);
+ mem_ap->ap = NULL;
+ }
+
+ mem_ap->ap = dap_get_ap(mem_ap->dap, mem_ap->ap_num);
+ if (!mem_ap->ap) {
+ LOG_ERROR("Cannot get AP");
+ return ERROR_FAIL;
+ }
target_set_examined(target);
target->state = TARGET_UNKNOWN;
target->debug_reason = DBG_REASON_UNDEFINED;
@@ -179,7 +185,7 @@ static struct reg_arch_type mem_ap_reg_arch_type = {
.set = mem_ap_reg_set,
};
-const char *mem_ap_get_gdb_arch(struct target *target)
+static const char *mem_ap_get_gdb_arch(struct target *target)
{
return "arm";
}
diff --git a/src/target/mips32.c b/src/target/mips32.c
index c825369..f593b5f 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -9,19 +11,6 @@
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/mips32.h b/src/target/mips32.h
index 5ca3b7e..8837da1 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -6,19 +8,6 @@
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_MIPS32_H
@@ -27,7 +16,7 @@
#include "target.h"
#include "mips32_pracc.h"
-#define MIPS32_COMMON_MAGIC 0xB320B320
+#define MIPS32_COMMON_MAGIC 0xB320B320U
/**
* Memory segments (32bit kernel mode addresses)
@@ -93,7 +82,8 @@ struct mips32_comparator {
};
struct mips32_common {
- uint32_t common_magic;
+ unsigned int common_magic;
+
void *arch_info;
struct reg_cache *core_cache;
struct mips_ejtag ejtag_info;
@@ -130,7 +120,7 @@ struct mips32_core_reg {
};
struct mips32_algorithm {
- int common_magic;
+ unsigned int common_magic;
enum mips32_isa_mode isa_mode;
};
diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index 220ea94..beffbf5 100644
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by John McCarthy *
* jgmcc@magma.ca *
@@ -6,19 +8,6 @@
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2008 by David T.L. Wong *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/mips32_dmaacc.h b/src/target/mips32_dmaacc.h
index 70fe2a7..1725941 100644
--- a/src/target/mips32_dmaacc.h
+++ b/src/target/mips32_dmaacc.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 by John McCarthy *
* jgmcc@magma.ca *
@@ -6,19 +8,6 @@
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2008 by David T.L. Wong *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_MIPS32_DMAACC_H
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 9f8762e..c4704b5 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -8,19 +10,6 @@
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/*
@@ -161,7 +150,7 @@ static int mips32_pracc_clean_text_jump(struct mips_ejtag *ejtag_info)
return ERROR_OK;
}
-int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx,
+static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx,
uint32_t *param_out, bool check_last)
{
int code_count = 0;
@@ -334,7 +323,7 @@ void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr)
ctx->store_count++;
}
-void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize)
+static void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize)
{
if (LOWER16(data) == 0 && optimize)
pracc_add(ctx, 0, MIPS32_LUI(ctx->isa, reg_num, UPPER16(data))); /* load only upper value */
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index 30edaec..1b00768 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -6,19 +8,6 @@
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_MIPS32_PRACC_H
@@ -64,7 +53,6 @@ struct pracc_queue_info {
void pracc_queue_init(struct pracc_queue_info *ctx);
void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
-void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize);
void pracc_queue_free(struct pracc_queue_info *ctx);
int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info,
struct pracc_queue_info *ctx, uint32_t *buf, bool check_last);
@@ -79,9 +67,6 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
-int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx,
- uint32_t *param_out, bool check_last);
-
/**
* \b mips32_cp0_read
*
diff --git a/src/target/mips64.c b/src/target/mips64.c
index 347cdfc..773b92d 100644
--- a/src/target/mips64.c
+++ b/src/target/mips64.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Support for processors implementing MIPS64 instruction set
*
@@ -10,8 +12,6 @@
* Copyright (C) 2008 by Spencer Oliver
* Copyright (C) 2008 by David T.L. Wong
* Copyright (C) 2010 by Konstantin Kostyukhin, Nikolay Shmyrev
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/mips64.h b/src/target/mips64.h
index 3453e4e..9079c80 100644
--- a/src/target/mips64.h
+++ b/src/target/mips64.h
@@ -19,7 +19,7 @@
#include "register.h"
#include "mips64_pracc.h"
-#define MIPS64_COMMON_MAGIC 0xB640B640
+#define MIPS64_COMMON_MAGIC 0xB640B640U
/* MIPS64 CP0 registers */
#define MIPS64_C0_INDEX 0
@@ -81,7 +81,8 @@ struct mips64_comparator {
};
struct mips64_common {
- uint32_t common_magic;
+ unsigned int common_magic;
+
void *arch_info;
struct reg_cache *core_cache;
struct mips_ejtag ejtag_info;
diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c
index 81a4cfb..b083f5c 100644
--- a/src/target/mips64_pracc.c
+++ b/src/target/mips64_pracc.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Support for processors implementing MIPS64 instruction set
*
@@ -9,8 +11,6 @@
* Copyright (C) 2008 by Spencer Oliver
* Copyright (C) 2008 by David T.L. Wong
* Copyright (C) 2010 by Konstantin Kostyukhin, Nikolay Shmyrev
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index b21a1bd..a1a1792 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -5,19 +7,6 @@
* Copyright (C) 2008 by David T.L. Wong *
* *
* Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index e50101b..eb80742 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -1,21 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2008 by David T.L. Wong *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_MIPS_EJTAG_H
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 8601193..e85018c 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -8,19 +10,6 @@
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -1368,7 +1357,7 @@ static const struct command_registration mips_m4k_exec_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-const struct command_registration mips_m4k_command_handlers[] = {
+static const struct command_registration mips_m4k_command_handlers[] = {
{
.chain = mips32_command_handlers,
},
diff --git a/src/target/mips_m4k.h b/src/target/mips_m4k.h
index ea09ae5..f63d72f 100644
--- a/src/target/mips_m4k.h
+++ b/src/target/mips_m4k.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
@@ -6,19 +8,6 @@
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_MIPS_M4K_H
@@ -26,12 +15,14 @@
struct target;
-#define MIPSM4K_COMMON_MAGIC 0xB321B321
+#define MIPSM4K_COMMON_MAGIC 0xB321B321U
struct mips_m4k_common {
- uint32_t common_magic;
- bool is_pic32mx;
+ unsigned int common_magic;
+
struct mips32_common mips32;
+
+ bool is_pic32mx;
};
static inline struct mips_m4k_common *
@@ -52,6 +43,5 @@ static inline void mips_m4k_isa_filter(enum mips32_isa_imp isa_imp, target_addr_
}
}
}
-extern const struct command_registration mips_m4k_command_handlers[];
#endif /* OPENOCD_TARGET_MIPS_M4K_H */
diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c
index 5d821d7..640b4c8 100644
--- a/src/target/mips_mips64.c
+++ b/src/target/mips_mips64.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* MIPS64 generic target support
*
@@ -8,8 +10,6 @@
* Based on the work of:
* Copyright (C) 2008 by Spencer Oliver
* Copyright (C) 2008 by David T.L. Wong
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifdef HAVE_CONFIG_H
@@ -205,12 +205,6 @@ static int mips_mips64_deassert_reset(struct target *target)
return ERROR_OK;
}
-static int mips_mips64_soft_reset_halt(struct target *target)
-{
- /* TODO */
- return ERROR_OK;
-}
-
static int mips_mips64_single_step_core(struct target *target)
{
struct mips64_common *mips64 = target->arch_info;
@@ -1168,7 +1162,7 @@ struct target_type mips_mips64_target = {
.assert_reset = mips_mips64_assert_reset,
.deassert_reset = mips_mips64_deassert_reset,
- .soft_reset_halt = mips_mips64_soft_reset_halt,
+ /* TODO: add .soft_reset_halt */
.get_gdb_reg_list = mips64_get_gdb_reg_list,
diff --git a/src/target/mips_mips64.h b/src/target/mips_mips64.h
index 69fb2a6..9841deb 100644
--- a/src/target/mips_mips64.h
+++ b/src/target/mips_mips64.h
@@ -17,7 +17,8 @@
#include "helper/types.h"
struct mips_mips64_common {
- int common_magic;
+ unsigned int common_magic;
+
struct mips64_common mips64_common;
};
diff --git a/src/target/nds32.c b/src/target/nds32.c
index f0fb74d..bd30976 100644
--- a/src/target/nds32.c
+++ b/src/target/nds32.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/nds32.h b/src/target/nds32.h
index c447673..d0b680a 100644
--- a/src/target/nds32.h
+++ b/src/target/nds32.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_H
@@ -235,7 +224,8 @@ struct nds32_misc_config {
* Represents a generic Andes core.
*/
struct nds32 {
- uint32_t common_magic;
+ unsigned int common_magic;
+
struct reg_cache *core_cache;
/** Handle for the debug module. */
diff --git a/src/target/nds32_aice.c b/src/target/nds32_aice.c
index b01f8c0..8dc4d77 100644
--- a/src/target/nds32_aice.c
+++ b/src/target/nds32_aice.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes technology. *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/target/nds32_aice.h b/src/target/nds32_aice.h
index 5ea3b16..2a6c879 100644
--- a/src/target/nds32_aice.h
+++ b/src/target/nds32_aice.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes technology. *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_AICE_H
diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c
index 69c28ac..37f7648 100644
--- a/src/target/nds32_cmd.c
+++ b/src/target/nds32_cmd.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/nds32_cmd.h b/src/target/nds32_cmd.h
index 543ba54..1593243 100644
--- a/src/target/nds32_cmd.h
+++ b/src/target/nds32_cmd.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_CMD_H
diff --git a/src/target/nds32_disassembler.c b/src/target/nds32_disassembler.c
index 0bf74e1..eebbfe1 100644
--- a/src/target/nds32_disassembler.c
+++ b/src/target/nds32_disassembler.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/nds32_disassembler.h b/src/target/nds32_disassembler.h
index 9117cbb..f2c8e85 100644
--- a/src/target/nds32_disassembler.h
+++ b/src/target/nds32_disassembler.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_DISASSEMBLER_H
diff --git a/src/target/nds32_edm.h b/src/target/nds32_edm.h
index 2b5067a..3213604 100644
--- a/src/target/nds32_edm.h
+++ b/src/target/nds32_edm.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_EDM_H
diff --git a/src/target/nds32_insn.h b/src/target/nds32_insn.h
index 4e0b2d5..25eb9ab 100644
--- a/src/target/nds32_insn.h
+++ b/src/target/nds32_insn.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_INSN_H
diff --git a/src/target/nds32_reg.c b/src/target/nds32_reg.c
index 034a075..1687e69 100644
--- a/src/target/nds32_reg.c
+++ b/src/target/nds32_reg.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/target/nds32_reg.h b/src/target/nds32_reg.h
index 8808cd2..30cd241 100644
--- a/src/target/nds32_reg.h
+++ b/src/target/nds32_reg.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_REG_H
diff --git a/src/target/nds32_tlb.c b/src/target/nds32_tlb.c
index 81734e0..a533e59 100644
--- a/src/target/nds32_tlb.c
+++ b/src/target/nds32_tlb.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/target/nds32_tlb.h b/src/target/nds32_tlb.h
index c22ed73..1edff29 100644
--- a/src/target/nds32_tlb.h
+++ b/src/target/nds32_tlb.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_TLB_H
diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c
index 49a5758..2149291 100644
--- a/src/target/nds32_v2.c
+++ b/src/target/nds32_v2.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/nds32_v2.h b/src/target/nds32_v2.h
index dcc08c2..3c30108 100644
--- a/src/target/nds32_v2.h
+++ b/src/target/nds32_v2.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_V2_H
diff --git a/src/target/nds32_v3.c b/src/target/nds32_v3.c
index fde86d6..9d02e5a 100644
--- a/src/target/nds32_v3.c
+++ b/src/target/nds32_v3.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/nds32_v3.h b/src/target/nds32_v3.h
index a5df8fe..389838d 100644
--- a/src/target/nds32_v3.h
+++ b/src/target/nds32_v3.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_V3_H
diff --git a/src/target/nds32_v3_common.c b/src/target/nds32_v3_common.c
index 8ff8e30..f2efab4 100644
--- a/src/target/nds32_v3_common.c
+++ b/src/target/nds32_v3_common.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/nds32_v3_common.h b/src/target/nds32_v3_common.h
index 23393e5..a98988e 100644
--- a/src/target/nds32_v3_common.h
+++ b/src/target/nds32_v3_common.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_V3_COMMON_H
diff --git a/src/target/nds32_v3m.c b/src/target/nds32_v3m.c
index ffd646f..6bc549f 100644
--- a/src/target/nds32_v3m.c
+++ b/src/target/nds32_v3m.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/nds32_v3m.h b/src/target/nds32_v3m.h
index 1e7427c..f21dd62 100644
--- a/src/target/nds32_v3m.h
+++ b/src/target/nds32_v3m.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_NDS32_V3M_H
diff --git a/src/target/openrisc/Makefile.am b/src/target/openrisc/Makefile.am
index 5a2549a..b9c0f83 100644
--- a/src/target/openrisc/Makefile.am
+++ b/src/target/openrisc/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libopenrisc.la
%C%_libopenrisc_la_SOURCES = \
%D%/or1k.c \
diff --git a/src/target/openrisc/jsp_server.c b/src/target/openrisc/jsp_server.c
index 54c9694..185a506 100644
--- a/src/target/openrisc/jsp_server.c
+++ b/src/target/openrisc/jsp_server.c
@@ -1,21 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2014 by Franck Jullien *
* franck.jullien@gmail.com *
* *
* Based on ./src/server/telnet_server.c *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/openrisc/jsp_server.h b/src/target/openrisc/jsp_server.h
index e5cfaa8..a522fa8 100644
--- a/src/target/openrisc/jsp_server.h
+++ b/src/target/openrisc/jsp_server.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
#ifndef OPENOCD_TARGET_OPENRISC_JSP_SERVER_H
#define OPENOCD_TARGET_OPENRISC_JSP_SERVER_H
diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c
index 77fa15d..d73bca2 100644
--- a/src/target/openrisc/or1k.c
+++ b/src/target/openrisc/or1k.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2011 by Julius Baxter *
* julius@opencores.org *
@@ -8,19 +10,6 @@
* Copyright (C) 2013 by Franck Jullien *
* elec4fun@gmail.com *
* *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/openrisc/or1k.h b/src/target/openrisc/or1k.h
index c456ccb..8f76a06 100644
--- a/src/target/openrisc/or1k.h
+++ b/src/target/openrisc/or1k.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2011 by Julius Baxter *
* julius@opencores.org *
@@ -8,19 +10,6 @@
* Copyright (C) 2013 by Franck Jullien *
* elec4fun@gmail.com *
* *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_OPENRISC_OR1K_H
diff --git a/src/target/openrisc/or1k_du.h b/src/target/openrisc/or1k_du.h
index 9828b0d..ae95376 100644
--- a/src/target/openrisc/or1k_du.h
+++ b/src/target/openrisc/or1k_du.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Franck Jullien *
* elec4fun@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_OPENRISC_OR1K_DU_H
diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c
index 885fcb9..cfb7d0e 100644
--- a/src/target/openrisc/or1k_du_adv.c
+++ b/src/target/openrisc/or1k_du_adv.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013-2014 by Franck Jullien *
* elec4fun@gmail.com *
@@ -9,19 +11,6 @@
* And the Mohor interface version of this file which is: *
* Copyright (C) 2011 by Julius Baxter *
* julius@opencores.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/openrisc/or1k_tap.h b/src/target/openrisc/or1k_tap.h
index 2cf7da8..e06a5e0 100644
--- a/src/target/openrisc/or1k_tap.h
+++ b/src/target/openrisc/or1k_tap.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2012 by Franck Jullien *
* elec4fun@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_OPENRISC_OR1K_TAP_H
diff --git a/src/target/openrisc/or1k_tap_mohor.c b/src/target/openrisc/or1k_tap_mohor.c
index 1415e32..0dedb3e 100644
--- a/src/target/openrisc/or1k_tap_mohor.c
+++ b/src/target/openrisc/or1k_tap_mohor.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Franck Jullien *
* elec4fun@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/openrisc/or1k_tap_vjtag.c b/src/target/openrisc/or1k_tap_vjtag.c
index 28366cf..783b4db 100644
--- a/src/target/openrisc/or1k_tap_vjtag.c
+++ b/src/target/openrisc/or1k_tap_vjtag.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Franck Jullien *
* elec4fun@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/openrisc/or1k_tap_xilinx_bscan.c b/src/target/openrisc/or1k_tap_xilinx_bscan.c
index a77c65e..6b3df0e 100644
--- a/src/target/openrisc/or1k_tap_xilinx_bscan.c
+++ b/src/target/openrisc/or1k_tap_xilinx_bscan.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2013 by Sergio Chico *
* sergio.chico@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/quark_d20xx.c b/src/target/quark_d20xx.c
index 211245d..d63a42a 100644
--- a/src/target/quark_d20xx.c
+++ b/src/target/quark_d20xx.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright(c) 2015-2016 Intel Corporation.
*
* Jessica Gomez (jessica.gomez.hernandez@intel.com)
* Ivan De Cesaris (ivan.de.cesaris@intel.com)
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
* Contact Information:
* Intel Corporation
*/
diff --git a/src/target/quark_x10xx.c b/src/target/quark_x10xx.c
index 525d39a..0daa642 100644
--- a/src/target/quark_x10xx.c
+++ b/src/target/quark_x10xx.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright(c) 2013-2016 Intel Corporation.
*
@@ -7,19 +9,6 @@
* Julien Carreno (julien.carreno@intel.com)
* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
* Contact Information:
* Intel Corporation
*/
diff --git a/src/target/register.c b/src/target/register.c
index 6387475..2287125 100644
--- a/src/target/register.c
+++ b/src/target/register.c
@@ -1,22 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/register.h b/src/target/register.h
index a7705f7..1e4f2e0 100644
--- a/src/target/register.h
+++ b/src/target/register.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_REGISTER_H
diff --git a/src/target/riscv/Makefile.am b/src/target/riscv/Makefile.am
index 83f1a8c..4b6a74f 100644
--- a/src/target/riscv/Makefile.am
+++ b/src/target/riscv/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libriscv.la
%C%_libriscv_la_SOURCES = \
%D%/asm.h \
diff --git a/src/target/riscv/batch.c b/src/target/riscv/batch.c
index 4c1667d..217c36d 100644
--- a/src/target/riscv/batch.c
+++ b/src/target/riscv/batch.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/target/riscv/program.c b/src/target/riscv/program.c
index 16baa4b..ce28026 100644
--- a/src/target/riscv/program.c
+++ b/src/target/riscv/program.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c
index e38d854..e23a89d 100644
--- a/src/target/riscv/riscv-011.c
+++ b/src/target/riscv/riscv-011.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Support for RISC-V, debug version 0.11. This was never an officially adopted
@@ -163,15 +163,6 @@ typedef enum slot {
#define DRAM_CACHE_SIZE 16
-struct trigger {
- uint64_t address;
- uint32_t length;
- uint64_t mask;
- uint64_t value;
- bool read, write, execute;
- int unique_id;
-};
-
struct memory_cache_line {
uint32_t data;
bool valid;
@@ -229,10 +220,10 @@ static int get_register(struct target *target, riscv_reg_t *value, int regid);
static riscv011_info_t *get_info(const struct target *target)
{
- riscv_info_t *info = (riscv_info_t *) target->arch_info;
+ struct riscv_info *info = target->arch_info;
assert(info);
assert(info->version_specific);
- return (riscv011_info_t *) info->version_specific;
+ return info->version_specific;
}
static unsigned int slot_offset(const struct target *target, slot_t slot)
@@ -1403,7 +1394,10 @@ static int halt(struct target *target)
static void deinit_target(struct target *target)
{
LOG_DEBUG("riscv_deinit_target()");
- riscv_info_t *info = (riscv_info_t *) target->arch_info;
+ struct riscv_info *info = target->arch_info;
+ if (!info)
+ return;
+
free(info->version_specific);
info->version_specific = NULL;
}
@@ -1544,7 +1538,7 @@ static int examine(struct target *target)
uint32_t word0 = cache_get32(target, 0);
uint32_t word1 = cache_get32(target, 1);
- riscv_info_t *generic_info = (riscv_info_t *) target->arch_info;
+ struct riscv_info *generic_info = riscv_info(target);
if (word0 == 1 && word1 == 0) {
generic_info->xlen = 32;
} else if (word0 == 0xffffffff && word1 == 3) {
@@ -2288,7 +2282,7 @@ static int arch_state(struct target *target)
return ERROR_OK;
}
-COMMAND_HELPER(riscv011_print_info, struct target *target)
+static COMMAND_HELPER(riscv011_print_info, struct target *target)
{
/* Abstract description. */
riscv_print_info_line(CMD, "target", "memory.read_while_running8", 0);
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index dd97496..e11265b 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Support for RISC-V, debug version 0.13, which is currently (2/4/17) the
@@ -34,7 +34,7 @@ static int riscv013_step_or_resume_current_hart(struct target *target,
bool step);
static void riscv013_clear_abstract_error(struct target *target);
-/* Implementations of the functions in riscv_info_t. */
+/* Implementations of the functions in struct riscv_info. */
static int riscv013_get_register(struct target *target,
riscv_reg_t *value, int rid);
static int riscv013_set_register(struct target *target, int regid, uint64_t value);
@@ -105,17 +105,6 @@ typedef enum slot {
#define CMDERR_HALT_RESUME 4
#define CMDERR_OTHER 7
-/*** Info about the core being debugged. ***/
-
-struct trigger {
- uint64_t address;
- uint32_t length;
- uint64_t mask;
- uint64_t value;
- bool read, write, execute;
- int unique_id;
-};
-
#define HART_INDEX_MULTIPLE -1
#define HART_INDEX_UNKNOWN -2
@@ -209,14 +198,14 @@ typedef struct {
bool selected;
} riscv013_info_t;
-LIST_HEAD(dm_list);
+static LIST_HEAD(dm_list);
static riscv013_info_t *get_info(const struct target *target)
{
- riscv_info_t *info = (riscv_info_t *) target->arch_info;
+ struct riscv_info *info = target->arch_info;
assert(info);
assert(info->version_specific);
- return (riscv013_info_t *) info->version_specific;
+ return info->version_specific;
}
/**
@@ -224,7 +213,7 @@ static riscv013_info_t *get_info(const struct target *target)
* global list of DMs. If it's not in there, then create one and initialize it
* to 0.
*/
-dm013_info_t *get_dm(struct target *target)
+static dm013_info_t *get_dm(struct target *target)
{
RISCV013_INFO(info);
if (info->dm)
@@ -677,7 +666,7 @@ static int dmi_write_exec(struct target *target, uint32_t address,
return dmi_op(target, NULL, NULL, DMI_OP_WRITE, address, value, true, ensure_success);
}
-int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
+static int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
bool authenticated, unsigned timeout_sec)
{
int result = dmi_op_timeout(target, dmstatus, NULL, DMI_OP_READ,
@@ -699,7 +688,7 @@ int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
return ERROR_OK;
}
-int dmstatus_read(struct target *target, uint32_t *dmstatus,
+static int dmstatus_read(struct target *target, uint32_t *dmstatus,
bool authenticated)
{
int result = dmstatus_read_timeout(target, dmstatus, authenticated,
@@ -721,7 +710,7 @@ static void increase_ac_busy_delay(struct target *target)
info->ac_busy_delay);
}
-uint32_t abstract_register_size(unsigned width)
+static uint32_t __attribute__((unused)) abstract_register_size(unsigned width)
{
switch (width) {
case 32:
@@ -987,14 +976,14 @@ static uint32_t abstract_memory_size(unsigned width)
* Creates a memory access abstract command.
*/
static uint32_t access_memory_command(struct target *target, bool virtual,
- unsigned width, bool postincrement, bool write)
+ unsigned width, bool postincrement, bool is_write)
{
uint32_t command = set_field(0, AC_ACCESS_MEMORY_CMDTYPE, 2);
command = set_field(command, AC_ACCESS_MEMORY_AAMVIRTUAL, virtual);
command |= abstract_memory_size(width);
command = set_field(command, AC_ACCESS_MEMORY_AAMPOSTINCREMENT,
postincrement);
- command = set_field(command, AC_ACCESS_MEMORY_WRITE, write);
+ command = set_field(command, AC_ACCESS_MEMORY_WRITE, is_write);
return command;
}
@@ -1502,7 +1491,10 @@ static int wait_for_authbusy(struct target *target, uint32_t *dmstatus)
static void deinit_target(struct target *target)
{
LOG_DEBUG("riscv_deinit_target()");
- riscv_info_t *info = (riscv_info_t *) target->arch_info;
+ struct riscv_info *info = target->arch_info;
+ if (!info)
+ return;
+
free(info->version_specific);
/* TODO: free register arch_info */
info->version_specific = NULL;
@@ -1884,7 +1876,7 @@ static unsigned riscv013_data_bits(struct target *target)
return 32;
}
-COMMAND_HELPER(riscv013_print_info, struct target *target)
+static COMMAND_HELPER(riscv013_print_info, struct target *target)
{
RISCV013_INFO(info);
@@ -2279,15 +2271,15 @@ static int sample_memory_bus_v1(struct target *target,
return ERROR_FAIL;
}
- unsigned int read = 0;
+ unsigned int read_count = 0;
for (unsigned int n = 0; n < repeat; n++) {
for (unsigned int i = 0; i < ARRAY_SIZE(config->bucket); i++) {
if (config->bucket[i].enabled) {
assert(i < RISCV_SAMPLE_BUF_TIMESTAMP_BEFORE);
uint64_t value = 0;
if (config->bucket[i].size_bytes > 4)
- value = ((uint64_t)riscv_batch_get_dmi_read_data(batch, read++)) << 32;
- value |= riscv_batch_get_dmi_read_data(batch, read++);
+ value = ((uint64_t)riscv_batch_get_dmi_read_data(batch, read_count++)) << 32;
+ value |= riscv_batch_get_dmi_read_data(batch, read_count++);
buf->buf[buf->used] = i;
buf_set_u64(buf->buf + buf->used + 1, 0, config->bucket[i].size_bytes * 8, value);
@@ -2441,9 +2433,7 @@ static int assert_reset(struct target *target)
/* TODO: Try to use hasel in dmcontrol */
/* Set haltreq for each hart. */
- uint32_t control = control_base;
-
- control = set_dmcontrol_hartsel(control_base, info->index);
+ uint32_t control = set_dmcontrol_hartsel(control_base, info->index);
control = set_field(control, DM_DMCONTROL_HALTREQ,
target->reset_halt ? 1 : 0);
dmi_write(target, DM_DMCONTROL, control);
@@ -2570,15 +2560,27 @@ static int execute_fence(struct target *target)
return ERROR_OK;
}
+static void log_memory_access128(target_addr_t address, uint64_t value_h,
+ uint64_t value_l, bool is_read)
+{
+ if (debug_level < LOG_LVL_DEBUG)
+ return;
+
+ char fmt[80];
+ sprintf(fmt, "M[0x%" TARGET_PRIxADDR "] %ss 0x%%016" PRIx64 "%%016" PRIx64,
+ address, is_read ? "read" : "write");
+ LOG_DEBUG(fmt, value_h, value_l);
+}
+
static void log_memory_access(target_addr_t address, uint64_t value,
- unsigned size_bytes, bool read)
+ unsigned size_bytes, bool is_read)
{
if (debug_level < LOG_LVL_DEBUG)
return;
char fmt[80];
sprintf(fmt, "M[0x%" TARGET_PRIxADDR "] %ss 0x%%0%d" PRIx64,
- address, read ? "read" : "write", size_bytes * 2);
+ address, is_read ? "read" : "write", size_bytes * 2);
switch (size_bytes) {
case 1:
value &= 0xff;
@@ -2903,7 +2905,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
return ERROR_OK;
}
-static void log_mem_access_result(struct target *target, bool success, int method, bool read)
+static void log_mem_access_result(struct target *target, bool success, int method, bool is_read)
{
RISCV_INFO(r);
bool warn = false;
@@ -2912,7 +2914,7 @@ static void log_mem_access_result(struct target *target, bool success, int metho
/* Compose the message */
snprintf(msg, 60, "%s to %s memory via %s.",
success ? "Succeeded" : "Failed",
- read ? "read" : "write",
+ is_read ? "read" : "write",
(method == RISCV_MEM_ACCESS_PROGBUF) ? "program buffer" :
(method == RISCV_MEM_ACCESS_SYSBUS) ? "system bus" : "abstract access");
@@ -2939,37 +2941,37 @@ static void log_mem_access_result(struct target *target, bool success, int metho
}
static bool mem_should_skip_progbuf(struct target *target, target_addr_t address,
- uint32_t size, bool read, char **skip_reason)
+ uint32_t size, bool is_read, char **skip_reason)
{
assert(skip_reason);
if (!has_sufficient_progbuf(target, 3)) {
LOG_DEBUG("Skipping mem %s via progbuf - insufficient progbuf size.",
- read ? "read" : "write");
+ is_read ? "read" : "write");
*skip_reason = "skipped (insufficient progbuf)";
return true;
}
if (target->state != TARGET_HALTED) {
LOG_DEBUG("Skipping mem %s via progbuf - target not halted.",
- read ? "read" : "write");
+ is_read ? "read" : "write");
*skip_reason = "skipped (target not halted)";
return true;
}
if (riscv_xlen(target) < size * 8) {
LOG_DEBUG("Skipping mem %s via progbuf - XLEN (%d) is too short for %d-bit memory access.",
- read ? "read" : "write", riscv_xlen(target), size * 8);
+ is_read ? "read" : "write", riscv_xlen(target), size * 8);
*skip_reason = "skipped (XLEN too short)";
return true;
}
if (size > 8) {
LOG_DEBUG("Skipping mem %s via progbuf - unsupported size.",
- read ? "read" : "write");
+ is_read ? "read" : "write");
*skip_reason = "skipped (unsupported size)";
return true;
}
if ((sizeof(address) * 8 > riscv_xlen(target)) && (address >> riscv_xlen(target))) {
LOG_DEBUG("Skipping mem %s via progbuf - progbuf only supports %u-bit address.",
- read ? "read" : "write", riscv_xlen(target));
+ is_read ? "read" : "write", riscv_xlen(target));
*skip_reason = "skipped (too large address)";
return true;
}
@@ -2978,25 +2980,25 @@ static bool mem_should_skip_progbuf(struct target *target, target_addr_t address
}
static bool mem_should_skip_sysbus(struct target *target, target_addr_t address,
- uint32_t size, uint32_t increment, bool read, char **skip_reason)
+ uint32_t size, uint32_t increment, bool is_read, char **skip_reason)
{
assert(skip_reason);
RISCV013_INFO(info);
if (!sba_supports_access(target, size)) {
LOG_DEBUG("Skipping mem %s via system bus - unsupported size.",
- read ? "read" : "write");
+ is_read ? "read" : "write");
*skip_reason = "skipped (unsupported size)";
return true;
}
unsigned int sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE);
if ((sizeof(address) * 8 > sbasize) && (address >> sbasize)) {
LOG_DEBUG("Skipping mem %s via system bus - sba only supports %u-bit address.",
- read ? "read" : "write", sbasize);
+ is_read ? "read" : "write", sbasize);
*skip_reason = "skipped (too large address)";
return true;
}
- if (read && increment != size && (get_field(info->sbcs, DM_SBCS_SBVERSION) == 0 || increment != 0)) {
+ if (is_read && increment != size && (get_field(info->sbcs, DM_SBCS_SBVERSION) == 0 || increment != 0)) {
LOG_DEBUG("Skipping mem read via system bus - "
"sba reads only support size==increment or also size==0 for sba v1.");
*skip_reason = "skipped (unsupported increment)";
@@ -3007,7 +3009,7 @@ static bool mem_should_skip_sysbus(struct target *target, target_addr_t address,
}
static bool mem_should_skip_abstract(struct target *target, target_addr_t address,
- uint32_t size, uint32_t increment, bool read, char **skip_reason)
+ uint32_t size, uint32_t increment, bool is_read, char **skip_reason)
{
assert(skip_reason);
@@ -3015,17 +3017,17 @@ static bool mem_should_skip_abstract(struct target *target, target_addr_t addres
/* TODO: Add 128b support if it's ever used. Involves modifying
read/write_abstract_arg() to work on two 64b values. */
LOG_DEBUG("Skipping mem %s via abstract access - unsupported size: %d bits",
- read ? "read" : "write", size * 8);
+ is_read ? "read" : "write", size * 8);
*skip_reason = "skipped (unsupported size)";
return true;
}
if ((sizeof(address) * 8 > riscv_xlen(target)) && (address >> riscv_xlen(target))) {
LOG_DEBUG("Skipping mem %s via abstract access - abstract access only supports %u-bit address.",
- read ? "read" : "write", riscv_xlen(target));
+ is_read ? "read" : "write", riscv_xlen(target));
*skip_reason = "skipped (too large address)";
return true;
}
- if (read && size != increment) {
+ if (is_read && size != increment) {
LOG_ERROR("Skipping mem read via abstract access - "
"abstract command reads only support size==increment.");
*skip_reason = "skipped (unsupported increment)";
@@ -3351,7 +3353,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
/* Now read whatever we got out of the batch. */
dmi_status_t status = DMI_STATUS_SUCCESS;
- unsigned read = 0;
+ unsigned read_count = 0;
assert(index >= 2);
for (unsigned j = index - 2; j < index + reads; j++) {
assert(j < count);
@@ -3360,9 +3362,9 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
if (j + 3 + ignore_last > next_index)
break;
- status = riscv_batch_get_dmi_read_op(batch, read);
- uint64_t value = riscv_batch_get_dmi_read_data(batch, read);
- read++;
+ status = riscv_batch_get_dmi_read_op(batch, read_count);
+ uint64_t value = riscv_batch_get_dmi_read_data(batch, read_count);
+ read_count++;
if (status != DMI_STATUS_SUCCESS) {
/* If we're here because of busy count, dmi_busy_delay will
* already have been increased and busy state will have been
@@ -3379,7 +3381,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
goto error;
}
if (size > 4) {
- status = riscv_batch_get_dmi_read_op(batch, read);
+ status = riscv_batch_get_dmi_read_op(batch, read_count);
if (status != DMI_STATUS_SUCCESS) {
LOG_WARNING("Batch memory read encountered DMI error %d. "
"Falling back on slower reads.", status);
@@ -3388,8 +3390,8 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
goto error;
}
value <<= 32;
- value |= riscv_batch_get_dmi_read_data(batch, read);
- read++;
+ value |= riscv_batch_get_dmi_read_data(batch, read_count);
+ read_count++;
}
riscv_addr_t offset = j * size;
buf_set_u64(buffer + offset, 0, 8 * size, value);
@@ -3764,35 +3766,49 @@ static int write_memory_bus_v1(struct target *target, target_addr_t address,
if (riscv_batch_available_scans(batch) < (size + 3) / 4)
break;
- if (size > 12)
- riscv_batch_add_dmi_write(batch, DM_SBDATA3,
- ((uint32_t) p[12]) |
+ uint32_t sbvalue[4] = { 0 };
+ if (size > 12) {
+ sbvalue[3] = ((uint32_t) p[12]) |
(((uint32_t) p[13]) << 8) |
(((uint32_t) p[14]) << 16) |
- (((uint32_t) p[15]) << 24), false);
+ (((uint32_t) p[15]) << 24);
+ riscv_batch_add_dmi_write(batch, DM_SBDATA3, sbvalue[3], false);
+ }
- if (size > 8)
- riscv_batch_add_dmi_write(batch, DM_SBDATA2,
- ((uint32_t) p[8]) |
+ if (size > 8) {
+ sbvalue[2] = ((uint32_t) p[8]) |
(((uint32_t) p[9]) << 8) |
(((uint32_t) p[10]) << 16) |
- (((uint32_t) p[11]) << 24), false);
- if (size > 4)
- riscv_batch_add_dmi_write(batch, DM_SBDATA1,
- ((uint32_t) p[4]) |
+ (((uint32_t) p[11]) << 24);
+ riscv_batch_add_dmi_write(batch, DM_SBDATA2, sbvalue[2], false);
+ }
+ if (size > 4) {
+ sbvalue[1] = ((uint32_t) p[4]) |
(((uint32_t) p[5]) << 8) |
(((uint32_t) p[6]) << 16) |
- (((uint32_t) p[7]) << 24), false);
- uint32_t value = p[0];
+ (((uint32_t) p[7]) << 24);
+ riscv_batch_add_dmi_write(batch, DM_SBDATA1, sbvalue[1], false);
+ }
+
+ sbvalue[0] = p[0];
if (size > 2) {
- value |= ((uint32_t) p[2]) << 16;
- value |= ((uint32_t) p[3]) << 24;
+ sbvalue[0] |= ((uint32_t) p[2]) << 16;
+ sbvalue[0] |= ((uint32_t) p[3]) << 24;
}
if (size > 1)
- value |= ((uint32_t) p[1]) << 8;
- riscv_batch_add_dmi_write(batch, DM_SBDATA0, value, false);
+ sbvalue[0] |= ((uint32_t) p[1]) << 8;
+
+ riscv_batch_add_dmi_write(batch, DM_SBDATA0, sbvalue[0], false);
+
+ if (size == 16) {
+ uint64_t value_h = (((uint64_t) sbvalue[3]) << 32) | sbvalue[2];
+ uint64_t value_l = (((uint64_t) sbvalue[1]) << 32) | sbvalue[0];
+ log_memory_access128(address + i * size, value_h, value_l, false);
+ } else {
+ uint64_t value = (((uint64_t) sbvalue[1]) << 32) | sbvalue[0];
+ log_memory_access(address + i * size, value, size, false);
+ }
- log_memory_access(address + i * size, value, size, false);
next_address += size;
}
@@ -4249,7 +4265,7 @@ static int select_prepped_harts(struct target *target)
unsigned int selected_index = 0;
list_for_each_entry(entry, &dm->target_list, list) {
struct target *t = entry->target;
- riscv_info_t *info = riscv_info(t);
+ struct riscv_info *info = riscv_info(t);
riscv013_info_t *info_013 = get_info(t);
unsigned index = info_013->index;
LOG_DEBUG("index=%d, coreid=%d, prepped=%d", index, t->coreid, info->prepped);
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index e9a817c..9322728 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
#include <assert.h>
#include <stdlib.h>
@@ -37,38 +37,38 @@
#define DBUS 0x11
-uint8_t ir_dtmcontrol[4] = {DTMCONTROL};
+static uint8_t ir_dtmcontrol[4] = {DTMCONTROL};
struct scan_field select_dtmcontrol = {
.in_value = NULL,
.out_value = ir_dtmcontrol
};
-uint8_t ir_dbus[4] = {DBUS};
+static uint8_t ir_dbus[4] = {DBUS};
struct scan_field select_dbus = {
.in_value = NULL,
.out_value = ir_dbus
};
-uint8_t ir_idcode[4] = {0x1};
+static uint8_t ir_idcode[4] = {0x1};
struct scan_field select_idcode = {
.in_value = NULL,
.out_value = ir_idcode
};
-bscan_tunnel_type_t bscan_tunnel_type;
+static bscan_tunnel_type_t bscan_tunnel_type;
int bscan_tunnel_ir_width; /* if zero, then tunneling is not present/active */
static int bscan_tunnel_ir_id; /* IR ID of the JTAG TAP to access the tunnel. Valid when not 0 */
static const uint8_t bscan_zero[4] = {0};
static const uint8_t bscan_one[4] = {1};
-uint8_t ir_user4[4];
-struct scan_field select_user4 = {
+static uint8_t ir_user4[4];
+static struct scan_field select_user4 = {
.in_value = NULL,
.out_value = ir_user4
};
-uint8_t bscan_tunneled_ir_width[4] = {5}; /* overridden by assignment in riscv_init_target */
-struct scan_field _bscan_tunnel_data_register_select_dmi[] = {
+static uint8_t bscan_tunneled_ir_width[4] = {5}; /* overridden by assignment in riscv_init_target */
+static struct scan_field _bscan_tunnel_data_register_select_dmi[] = {
{
.num_bits = 3,
.out_value = bscan_zero,
@@ -91,7 +91,7 @@ struct scan_field _bscan_tunnel_data_register_select_dmi[] = {
}
};
-struct scan_field _bscan_tunnel_nested_tap_select_dmi[] = {
+static struct scan_field _bscan_tunnel_nested_tap_select_dmi[] = {
{
.num_bits = 1,
.out_value = bscan_zero,
@@ -113,18 +113,18 @@ struct scan_field _bscan_tunnel_nested_tap_select_dmi[] = {
.in_value = NULL,
}
};
-struct scan_field *bscan_tunnel_nested_tap_select_dmi = _bscan_tunnel_nested_tap_select_dmi;
-uint32_t bscan_tunnel_nested_tap_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_nested_tap_select_dmi);
+static struct scan_field *bscan_tunnel_nested_tap_select_dmi = _bscan_tunnel_nested_tap_select_dmi;
+static uint32_t bscan_tunnel_nested_tap_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_nested_tap_select_dmi);
-struct scan_field *bscan_tunnel_data_register_select_dmi = _bscan_tunnel_data_register_select_dmi;
-uint32_t bscan_tunnel_data_register_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_data_register_select_dmi);
+static struct scan_field *bscan_tunnel_data_register_select_dmi = _bscan_tunnel_data_register_select_dmi;
+static uint32_t bscan_tunnel_data_register_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_data_register_select_dmi);
struct trigger {
uint64_t address;
uint32_t length;
uint64_t mask;
uint64_t value;
- bool read, write, execute;
+ bool is_read, is_write, is_execute;
int unique_id;
};
@@ -134,7 +134,7 @@ int riscv_command_timeout_sec = DEFAULT_COMMAND_TIMEOUT_SEC;
/* Wall-clock timeout after reset. Settable via RISC-V Target commands.*/
int riscv_reset_timeout_sec = DEFAULT_RESET_TIMEOUT_SEC;
-bool riscv_enable_virt2phys = true;
+static bool riscv_enable_virt2phys = true;
bool riscv_ebreakm = true;
bool riscv_ebreaks = true;
bool riscv_ebreaku = true;
@@ -146,7 +146,7 @@ static enum {
RO_REVERSED
} resume_order;
-const virt2phys_info_t sv32 = {
+static const virt2phys_info_t sv32 = {
.name = "Sv32",
.va_bits = 32,
.level = 2,
@@ -159,7 +159,7 @@ const virt2phys_info_t sv32 = {
.pa_ppn_mask = {0x3ff, 0xfff},
};
-const virt2phys_info_t sv39 = {
+static const virt2phys_info_t sv39 = {
.name = "Sv39",
.va_bits = 39,
.level = 3,
@@ -172,7 +172,7 @@ const virt2phys_info_t sv39 = {
.pa_ppn_mask = {0x1ff, 0x1ff, 0x3ffffff},
};
-const virt2phys_info_t sv48 = {
+static const virt2phys_info_t sv48 = {
.name = "Sv48",
.va_bits = 48,
.level = 4,
@@ -185,7 +185,12 @@ const virt2phys_info_t sv48 = {
.pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ffff},
};
-void riscv_sample_buf_maybe_add_timestamp(struct target *target, bool before)
+static enum riscv_halt_reason riscv_halt_reason(struct target *target);
+static void riscv_info_init(struct target *target, struct riscv_info *r);
+static void riscv_invalidate_register_cache(struct target *target);
+static int riscv_step_rtos_hart(struct target *target);
+
+static void riscv_sample_buf_maybe_add_timestamp(struct target *target, bool before)
{
RISCV_INFO(r);
uint32_t now = timeval_ms() & 0xffffffff;
@@ -334,13 +339,12 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
static struct target_type *get_target_type(struct target *target)
{
- riscv_info_t *info = (riscv_info_t *) target->arch_info;
-
- if (!info) {
+ if (!target->arch_info) {
LOG_ERROR("Target has not been initialized");
return NULL;
}
+ RISCV_INFO(info);
switch (info->dtm_version) {
case 0:
return &riscv011_target;
@@ -356,7 +360,7 @@ static struct target_type *get_target_type(struct target *target)
static int riscv_create_target(struct target *target, Jim_Interp *interp)
{
LOG_DEBUG("riscv_create_target()");
- target->arch_info = calloc(1, sizeof(riscv_info_t));
+ target->arch_info = calloc(1, sizeof(struct riscv_info));
if (!target->arch_info) {
LOG_ERROR("Failed to allocate RISC-V target structure.");
return ERROR_FAIL;
@@ -383,10 +387,7 @@ static int riscv_init_target(struct command_context *cmd_ctx,
assert(target->tap->ir_length >= 6);
ir_user4_raw = 0x23 << (target->tap->ir_length - 6);
}
- ir_user4[0] = (uint8_t)ir_user4_raw;
- ir_user4[1] = (uint8_t)(ir_user4_raw >>= 8);
- ir_user4[2] = (uint8_t)(ir_user4_raw >>= 8);
- ir_user4[3] = (uint8_t)(ir_user4_raw >>= 8);
+ h_u32_to_le(ir_user4, ir_user4_raw);
select_user4.num_bits = target->tap->ir_length;
bscan_tunneled_ir_width[0] = bscan_tunnel_ir_width;
if (bscan_tunnel_type == BSCAN_TUNNEL_DATA_REGISTER)
@@ -423,17 +424,20 @@ static void riscv_deinit_target(struct target *target)
{
LOG_DEBUG("riscv_deinit_target()");
- riscv_info_t *info = target->arch_info;
+ struct riscv_info *info = target->arch_info;
struct target_type *tt = get_target_type(target);
if (riscv_flush_registers(target) != ERROR_OK)
LOG_ERROR("[%s] Failed to flush registers. Ignoring this error.", target_name(target));
- if (tt && info->version_specific)
+ if (tt && info && info->version_specific)
tt->deinit_target(target);
riscv_free_registers(target);
+ if (!info)
+ return;
+
range_list_t *entry, *tmp;
list_for_each_entry_safe(entry, tmp, &info->hide_csr, list) {
free(entry->name);
@@ -462,9 +466,9 @@ static void trigger_from_breakpoint(struct trigger *trigger,
trigger->address = breakpoint->address;
trigger->length = breakpoint->length;
trigger->mask = ~0LL;
- trigger->read = false;
- trigger->write = false;
- trigger->execute = true;
+ trigger->is_read = false;
+ trigger->is_write = false;
+ trigger->is_execute = true;
/* unique_id is unique across both breakpoints and watchpoints. */
trigger->unique_id = breakpoint->unique_id;
}
@@ -589,9 +593,9 @@ static int maybe_add_trigger_t1(struct target *target, struct trigger *trigger)
}
tdata1 = 0;
- tdata1 = set_field(tdata1, bpcontrol_r, trigger->read);
- tdata1 = set_field(tdata1, bpcontrol_w, trigger->write);
- tdata1 = set_field(tdata1, bpcontrol_x, trigger->execute);
+ tdata1 = set_field(tdata1, bpcontrol_r, trigger->is_read);
+ tdata1 = set_field(tdata1, bpcontrol_w, trigger->is_write);
+ tdata1 = set_field(tdata1, bpcontrol_x, trigger->is_execute);
tdata1 = set_field(tdata1, bpcontrol_u, !!(r->misa & BIT('U' - 'A')));
tdata1 = set_field(tdata1, bpcontrol_s, !!(r->misa & BIT('S' - 'A')));
tdata1 = set_field(tdata1, bpcontrol_h, !!(r->misa & BIT('H' - 'A')));
@@ -703,9 +707,9 @@ static struct match_triggers_tdata1_fields fill_match_triggers_tdata1_fields_t2(
field_value(CSR_MCONTROL_M, 1) |
field_value(CSR_MCONTROL_S, !!(r->misa & BIT('S' - 'A'))) |
field_value(CSR_MCONTROL_U, !!(r->misa & BIT('U' - 'A'))) |
- field_value(CSR_MCONTROL_EXECUTE, trigger->execute) |
- field_value(CSR_MCONTROL_LOAD, trigger->read) |
- field_value(CSR_MCONTROL_STORE, trigger->write),
+ field_value(CSR_MCONTROL_EXECUTE, trigger->is_execute) |
+ field_value(CSR_MCONTROL_LOAD, trigger->is_read) |
+ field_value(CSR_MCONTROL_STORE, trigger->is_write),
.size = {
.any =
field_value(CSR_MCONTROL_SIZELO, CSR_MCONTROL_SIZELO_ANY & 3) |
@@ -746,9 +750,9 @@ static struct match_triggers_tdata1_fields fill_match_triggers_tdata1_fields_t6(
field_value(CSR_MCONTROL6_U, misa_u) |
field_value(CSR_MCONTROL6_VS, misa_h && misa_s) |
field_value(CSR_MCONTROL6_VU, misa_h && misa_u) |
- field_value(CSR_MCONTROL6_EXECUTE, trigger->execute) |
- field_value(CSR_MCONTROL6_LOAD, trigger->read) |
- field_value(CSR_MCONTROL6_STORE, trigger->write),
+ field_value(CSR_MCONTROL6_EXECUTE, trigger->is_execute) |
+ field_value(CSR_MCONTROL6_LOAD, trigger->is_read) |
+ field_value(CSR_MCONTROL6_STORE, trigger->is_write),
.size = {
.any = field_value(CSR_MCONTROL6_SIZE, CSR_MCONTROL6_SIZE_ANY),
.s8bit = field_value(CSR_MCONTROL6_SIZE, CSR_MCONTROL6_SIZE_8BIT)
@@ -773,7 +777,7 @@ static int maybe_add_trigger_t2_t6(struct target *target,
{
int ret = ERROR_OK;
- if (!trigger->execute && trigger->length > 1) {
+ if (!trigger->is_execute && trigger->length > 1) {
/* Setting a load/store trigger ("watchpoint") on a range of addresses */
if (can_use_napot_match(trigger)) {
@@ -858,7 +862,7 @@ static int maybe_add_trigger_t3(struct target *target, bool vs, bool vu,
ret = find_next_free_trigger(target, CSR_TDATA1_TYPE_ICOUNT, false, &idx);
if (ret != ERROR_OK)
return ret;
- ret = set_trigger(target, idx, tdata1, 0, CSR_MCONTROL_MASKMAX(riscv_xlen(target)));
+ ret = set_trigger(target, idx, tdata1, 0, 0);
if (ret != ERROR_OK)
return ret;
r->trigger_unique_id[idx] = unique_id;
@@ -1080,7 +1084,7 @@ int riscv_read_by_any_size(struct target *target, target_addr_t address, uint32_
return ERROR_FAIL;
}
-int riscv_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int riscv_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
{
LOG_TARGET_DEBUG(target, "@0x%" TARGET_PRIxADDR, breakpoint->address);
assert(breakpoint);
@@ -1162,7 +1166,7 @@ static int remove_trigger(struct target *target, int unique_id)
return ERROR_OK;
}
-int riscv_remove_breakpoint(struct target *target,
+static int riscv_remove_breakpoint(struct target *target,
struct breakpoint *breakpoint)
{
if (breakpoint->type == BKPT_SOFT) {
@@ -1198,9 +1202,9 @@ static void trigger_from_watchpoint(struct trigger *trigger,
trigger->length = watchpoint->length;
trigger->mask = watchpoint->mask;
trigger->value = watchpoint->value;
- trigger->read = (watchpoint->rw == WPT_READ || watchpoint->rw == WPT_ACCESS);
- trigger->write = (watchpoint->rw == WPT_WRITE || watchpoint->rw == WPT_ACCESS);
- trigger->execute = false;
+ trigger->is_read = (watchpoint->rw == WPT_READ || watchpoint->rw == WPT_ACCESS);
+ trigger->is_write = (watchpoint->rw == WPT_WRITE || watchpoint->rw == WPT_ACCESS);
+ trigger->is_execute = false;
/* unique_id is unique across both breakpoints and watchpoints. */
trigger->unique_id = watchpoint->unique_id;
}
@@ -1310,7 +1314,7 @@ static int riscv_hit_trigger_hit_bit(struct target *target, uint32_t *unique_id)
* The GDB server uses this information to tell GDB what data address has
* been hit, which enables GDB to print the hit variable along with its old
* and new value. */
-int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
+static int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
{
RISCV_INFO(r);
@@ -1478,7 +1482,7 @@ int riscv_flush_registers(struct target *target)
}
/* Convert: RISC-V hart's halt reason --> OpenOCD's generic debug reason */
-int set_debug_reason(struct target *target, enum riscv_halt_reason halt_reason)
+static int set_debug_reason(struct target *target, enum riscv_halt_reason halt_reason)
{
RISCV_INFO(r);
r->trigger_hit = -1;
@@ -1514,7 +1518,7 @@ int set_debug_reason(struct target *target, enum riscv_halt_reason halt_reason)
return ERROR_OK;
}
-int halt_prep(struct target *target)
+static int halt_prep(struct target *target)
{
RISCV_INFO(r);
@@ -1534,7 +1538,7 @@ int halt_prep(struct target *target)
return ERROR_OK;
}
-int riscv_halt_go_all_harts(struct target *target)
+static int riscv_halt_go_all_harts(struct target *target)
{
RISCV_INFO(r);
@@ -1553,9 +1557,9 @@ int riscv_halt_go_all_harts(struct target *target)
return ERROR_OK;
}
-int halt_go(struct target *target)
+static int halt_go(struct target *target)
{
- riscv_info_t *r = riscv_info(target);
+ RISCV_INFO(r);
int result;
if (!r->get_hart_state) {
struct target_type *tt = get_target_type(target);
@@ -1596,7 +1600,7 @@ int riscv_halt(struct target *target)
foreach_smp_target(tlist, target->smp_targets) {
struct target *t = tlist->target;
- riscv_info_t *i = riscv_info(t);
+ struct riscv_info *i = riscv_info(t);
if (i->prepped) {
if (halt_go(t) != ERROR_OK)
result = ERROR_FAIL;
@@ -1767,7 +1771,7 @@ static int resume_prep(struct target *target, int current,
static int resume_go(struct target *target, int current,
target_addr_t address, int handle_breakpoints, int debug_execution)
{
- riscv_info_t *r = riscv_info(target);
+ RISCV_INFO(r);
int result;
if (!r->get_hart_state) {
struct target_type *tt = get_target_type(target);
@@ -1794,7 +1798,7 @@ static int resume_finish(struct target *target, int debug_execution)
* @par single_hart When true, only resume a single hart even if SMP is
* configured. This is used to run algorithms on just one hart.
*/
-int riscv_resume(
+static int riscv_resume(
struct target *target,
int current,
target_addr_t address,
@@ -1834,7 +1838,7 @@ int riscv_resume(
foreach_smp_target_direction(resume_order == RO_NORMAL, tlist, targets) {
struct target *t = tlist->target;
- riscv_info_t *i = riscv_info(t);
+ struct riscv_info *i = riscv_info(t);
if (i->prepped) {
if (resume_go(t, current, address, handle_breakpoints,
debug_execution) != ERROR_OK)
@@ -1945,6 +1949,7 @@ static int riscv_address_translate(struct target *target,
LOG_DEBUG("virtual=0x%" TARGET_PRIxADDR "; mode=%s", virtual, info->name);
/* verify bits xlen-1:va_bits-1 are all equal */
+ assert(xlen >= info->va_bits);
target_addr_t mask = ((target_addr_t)1 << (xlen - (info->va_bits - 1))) - 1;
target_addr_t masked_msbs = (virtual >> (info->va_bits - 1)) & mask;
if (masked_msbs != 0 && masked_msbs != mask) {
@@ -2071,7 +2076,7 @@ static int riscv_write_memory(struct target *target, target_addr_t address,
return tt->write_memory(target, address, size, count, buffer);
}
-const char *riscv_get_gdb_arch(struct target *target)
+static const char *riscv_get_gdb_arch(struct target *target)
{
switch (riscv_xlen(target)) {
case 32:
@@ -2085,9 +2090,9 @@ const char *riscv_get_gdb_arch(struct target *target)
static int riscv_get_gdb_reg_list_internal(struct target *target,
struct reg **reg_list[], int *reg_list_size,
- enum target_register_class reg_class, bool read)
+ enum target_register_class reg_class, bool is_read)
{
- LOG_TARGET_DEBUG(target, "reg_class=%d, read=%d", reg_class, read);
+ LOG_TARGET_DEBUG(target, "reg_class=%d, read=%d", reg_class, is_read);
if (!target->reg_cache) {
LOG_ERROR("Target not initialized. Return ERROR_FAIL.");
@@ -2114,7 +2119,7 @@ static int riscv_get_gdb_reg_list_internal(struct target *target,
assert(!target->reg_cache->reg_list[i].valid ||
target->reg_cache->reg_list[i].size > 0);
(*reg_list)[i] = &target->reg_cache->reg_list[i];
- if (read &&
+ if (is_read &&
target->reg_cache->reg_list[i].exist &&
!target->reg_cache->reg_list[i].valid) {
if (target->reg_cache->reg_list[i].type->get(
@@ -2473,18 +2478,18 @@ static int riscv_poll_hart(struct target *target, enum riscv_next_action *next_a
int retval;
/* Detect if this EBREAK is a semihosting request. If so, handle it. */
switch (riscv_semihosting(target, &retval)) {
- case SEMI_NONE:
+ case SEMIHOSTING_NONE:
break;
- case SEMI_WAITING:
+ case SEMIHOSTING_WAITING:
/* This hart should remain halted. */
*next_action = RPH_REMAIN_HALTED;
break;
- case SEMI_HANDLED:
+ case SEMIHOSTING_HANDLED:
/* This hart should be resumed, along with any other
* harts that halted due to haltgroups. */
*next_action = RPH_RESUME;
return ERROR_OK;
- case SEMI_ERROR:
+ case SEMIHOSTING_ERROR:
return retval;
}
}
@@ -2526,7 +2531,7 @@ static int riscv_poll_hart(struct target *target, enum riscv_next_action *next_a
return ERROR_OK;
}
-int sample_memory(struct target *target)
+static int sample_memory(struct target *target)
{
RISCV_INFO(r);
@@ -2602,7 +2607,7 @@ int riscv_openocd_poll(struct target *target)
struct target_list *entry;
foreach_smp_target(entry, targets) {
struct target *t = entry->target;
- riscv_info_t *info = riscv_info(t);
+ struct riscv_info *info = riscv_info(t);
/* Clear here just in case there were errors and we never got to
* check this flag further down. */
@@ -2655,7 +2660,7 @@ int riscv_openocd_poll(struct target *target)
foreach_smp_target(entry, targets)
{
struct target *t = entry->target;
- riscv_info_t *info = riscv_info(t);
+ struct riscv_info *info = riscv_info(t);
if (info->halted_needs_event_callback) {
target_call_event_callbacks(t, info->halted_callback_event);
info->halted_needs_event_callback = false;
@@ -2877,7 +2882,7 @@ COMMAND_HANDLER(riscv_set_enable_virtual)
return ERROR_OK;
}
-int parse_ranges(struct list_head *ranges, const char *tcl_arg, const char *reg_type, unsigned int max_val)
+static int parse_ranges(struct list_head *ranges, const char *tcl_arg, const char *reg_type, unsigned int max_val)
{
char *args = strdup(tcl_arg);
if (!args)
@@ -3103,27 +3108,25 @@ COMMAND_HANDLER(riscv_authdata_write)
uint32_t value;
unsigned int index = 0;
- if (CMD_ARGC == 0) {
- /* nop */
- } else if (CMD_ARGC == 1) {
+ if (CMD_ARGC == 0 || CMD_ARGC > 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ if (CMD_ARGC == 1) {
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], value);
- } else if (CMD_ARGC == 2) {
+ } else {
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], index);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
- } else {
- LOG_ERROR("Command takes at most 2 arguments");
- return ERROR_COMMAND_SYNTAX_ERROR;
}
struct target *target = get_current_target(CMD_CTX);
RISCV_INFO(r);
- if (r->authdata_write) {
- return r->authdata_write(target, value, index);
- } else {
+ if (!r->authdata_write) {
LOG_ERROR("authdata_write is not implemented for this target.");
return ERROR_FAIL;
}
+
+ return r->authdata_write(target, value, index);
}
COMMAND_HANDLER(riscv_dmi_read)
@@ -4081,9 +4084,8 @@ static const struct command_registration riscv_exec_command_handlers[] = {
* protocol, then a command like `riscv semihosting enable` will make
* sense, but for now all semihosting commands are prefixed with `arm`.
*/
-extern const struct command_registration semihosting_common_handlers[];
-const struct command_registration riscv_command_handlers[] = {
+static const struct command_registration riscv_command_handlers[] = {
{
.name = "riscv",
.mode = COMMAND_ANY,
@@ -4165,9 +4167,13 @@ struct target_type riscv_target = {
/*** RISC-V Interface ***/
-void riscv_info_init(struct target *target, riscv_info_t *r)
+/* Initializes the shared RISC-V structure. */
+static void riscv_info_init(struct target *target, struct riscv_info *r)
{
memset(r, 0, sizeof(*r));
+
+ r->common_magic = RISCV_COMMON_MAGIC;
+
r->dtm_version = 1;
r->version_specific = NULL;
@@ -4255,7 +4261,7 @@ int riscv_interrupts_restore(struct target *target, uint64_t old_mstatus)
return reg_mstatus->type->set(reg_mstatus, mstatus_bytes);
}
-int riscv_step_rtos_hart(struct target *target)
+static int riscv_step_rtos_hart(struct target *target)
{
RISCV_INFO(r);
LOG_DEBUG("[%s] stepping", target_name(target));
@@ -4294,7 +4300,7 @@ unsigned riscv_xlen(const struct target *target)
return r->xlen;
}
-void riscv_invalidate_register_cache(struct target *target)
+static void riscv_invalidate_register_cache(struct target *target)
{
/* Do not invalidate the register cache if it is not yet set up
* (e.g. when the target failed to get examined). */
@@ -4328,7 +4334,7 @@ unsigned int riscv_count_harts(struct target *target)
* return true iff we are guaranteed that the register will read the same
* value in the future as the value we just read.
*/
-static bool gdb_regno_cacheable(enum gdb_regno regno, bool write)
+static bool gdb_regno_cacheable(enum gdb_regno regno, bool is_write)
{
/* GPRs, FPRs, vector registers are just normal data stores. */
if (regno <= GDB_REGNO_XPR31 ||
@@ -4359,7 +4365,7 @@ static bool gdb_regno_cacheable(enum gdb_regno regno, bool write)
* WARL registers might not contain the value we just wrote, but
* these ones won't spontaneously change their value either. *
*/
- return !write;
+ return !is_write;
case GDB_REGNO_TSELECT: /* I think this should be above, but then it doesn't work. */
case GDB_REGNO_TDATA1: /* Changes value when tselect is changed. */
@@ -4477,7 +4483,7 @@ int riscv_get_hart_state(struct target *target, enum riscv_hart_state *state)
return r->get_hart_state(target, state);
}
-enum riscv_halt_reason riscv_halt_reason(struct target *target)
+static enum riscv_halt_reason riscv_halt_reason(struct target *target)
{
RISCV_INFO(r);
if (target->state != TARGET_HALTED) {
@@ -5513,11 +5519,11 @@ int riscv_init_registers(struct target *target)
case CSR_VSIREG:
case CSR_VSTOPI:
r->exist = info->mtopi_readable &&
- riscv_supports_extension(target, 'V');
+ riscv_supports_extension(target, 'H');
break;
case CSR_VSTOPEI:
r->exist = info->mtopei_readable &&
- riscv_supports_extension(target, 'V');
+ riscv_supports_extension(target, 'H');
break;
case CSR_HIDELEGH:
case CSR_HVIENH:
@@ -5528,7 +5534,7 @@ int riscv_init_registers(struct target *target)
case CSR_VSIPH:
r->exist = info->mtopi_readable &&
riscv_xlen(target) == 32 &&
- riscv_supports_extension(target, 'V');
+ riscv_supports_extension(target, 'H');
break;
}
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index a6a1f93..59c3ec3 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -10,8 +10,11 @@ struct riscv_program;
#include "gdb_regs.h"
#include "jtag/jtag.h"
#include "target/register.h"
+#include "target/semihosting_common.h"
#include <helper/command.h>
+#define RISCV_COMMON_MAGIC 0x52495356U
+
/* The register cache is statically allocated. */
#define RISCV_MAX_HARTS 1024
#define RISCV_MAX_REGISTERS 5000
@@ -106,7 +109,9 @@ typedef struct {
char *name;
} range_list_t;
-typedef struct {
+struct riscv_info {
+ unsigned int common_magic;
+
unsigned dtm_version;
struct command_context *cmd_ctx;
@@ -268,7 +273,7 @@ typedef struct {
int64_t last_activity;
yes_no_maybe_t vsew64_supported;
-} riscv_info_t;
+};
COMMAND_HELPER(riscv_print_info_line, const char *section, const char *key,
unsigned int value);
@@ -304,27 +309,27 @@ extern bool riscv_ebreaku;
/* Everything needs the RISC-V specific info structure, so here's a nice macro
* that provides that. */
-static inline riscv_info_t *riscv_info(const struct target *target) __attribute__((unused));
-static inline riscv_info_t *riscv_info(const struct target *target)
+static inline struct riscv_info *riscv_info(const struct target *target) __attribute__((unused));
+static inline struct riscv_info *riscv_info(const struct target *target)
{
assert(target->arch_info);
return target->arch_info;
}
-#define RISCV_INFO(R) riscv_info_t *R = riscv_info(target);
+#define RISCV_INFO(R) struct riscv_info *R = riscv_info(target);
+
+static inline bool is_riscv(const struct riscv_info *riscv_info)
+{
+ return riscv_info->common_magic == RISCV_COMMON_MAGIC;
+}
-extern uint8_t ir_dtmcontrol[4];
extern struct scan_field select_dtmcontrol;
-extern uint8_t ir_dbus[4];
extern struct scan_field select_dbus;
-extern uint8_t ir_idcode[4];
extern struct scan_field select_idcode;
-extern struct scan_field select_user4;
extern struct scan_field *bscan_tunneled_select_dmi;
extern uint32_t bscan_tunneled_select_dmi_num_fields;
typedef enum { BSCAN_TUNNEL_NESTED_TAP, BSCAN_TUNNEL_DATA_REGISTER } bscan_tunnel_type_t;
extern int bscan_tunnel_ir_width;
-extern bscan_tunnel_type_t bscan_tunnel_type;
uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out);
void select_dmi_via_bscan(struct target *target);
@@ -334,15 +339,6 @@ int riscv_openocd_poll(struct target *target);
int riscv_halt(struct target *target);
-int riscv_resume(
- struct target *target,
- int current,
- target_addr_t address,
- int handle_breakpoints,
- int debug_execution,
- bool single_hart
-);
-
int riscv_openocd_step(
struct target *target,
int current,
@@ -355,13 +351,6 @@ int riscv_openocd_deassert_reset(struct target *target);
/*** RISC-V Interface ***/
-/* Initializes the shared RISC-V structure. */
-void riscv_info_init(struct target *target, riscv_info_t *r);
-
-/* Steps the hart that's currently selected in the RTOS, or if there is no RTOS
- * then the only hart. */
-int riscv_step_rtos_hart(struct target *target);
-
bool riscv_supports_extension(struct target *target, char letter);
/* Returns XLEN for the given (or current) hart. */
@@ -395,7 +384,6 @@ int riscv_flush_registers(struct target *target);
/* Checks the state of the current hart -- "is_halted" checks the actual
* on-device register. */
int riscv_get_hart_state(struct target *target, enum riscv_hart_state *state);
-enum riscv_halt_reason riscv_halt_reason(struct target *target);
/* These helper functions let the generic program interface get target-specific
* information. */
@@ -410,29 +398,17 @@ void riscv_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t
void riscv_fill_dmi_read_u64(struct target *target, char *buf, int a);
int riscv_dmi_write_u64_bits(struct target *target);
-/* Invalidates the register cache. */
-void riscv_invalidate_register_cache(struct target *target);
-
int riscv_enumerate_triggers(struct target *target);
-int riscv_add_breakpoint(struct target *target, struct breakpoint *breakpoint);
-int riscv_remove_breakpoint(struct target *target,
- struct breakpoint *breakpoint);
int riscv_add_watchpoint(struct target *target, struct watchpoint *watchpoint);
int riscv_remove_watchpoint(struct target *target,
struct watchpoint *watchpoint);
-int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_wp_address);
int riscv_init_registers(struct target *target);
void riscv_semihosting_init(struct target *target);
-typedef enum {
- SEMI_NONE, /* Not halted for a semihosting call. */
- SEMI_HANDLED, /* Call handled, and target was resumed. */
- SEMI_WAITING, /* Call handled, target is halted waiting until we can resume. */
- SEMI_ERROR /* Something went wrong. */
-} semihosting_result_t;
-semihosting_result_t riscv_semihosting(struct target *target, int *retval);
+
+enum semihosting_result riscv_semihosting(struct target *target, int *retval);
void riscv_add_bscan_tunneled_scan(struct target *target, struct scan_field *field,
riscv_bscan_tunneled_scan_context_t *ctxt);
diff --git a/src/target/riscv/riscv_semihosting.c b/src/target/riscv/riscv_semihosting.c
index 2c53813..da237ef 100644
--- a/src/target/riscv/riscv_semihosting.c
+++ b/src/target/riscv/riscv_semihosting.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2018 by Liviu Ionescu *
@@ -12,19 +12,6 @@
* *
* Copyright (C) 2016 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
@@ -44,7 +31,6 @@
#include <helper/log.h>
#include "target/target.h"
-#include "target/semihosting_common.h"
#include "riscv.h"
static int riscv_semihosting_setup(struct target *target, int enable);
@@ -67,23 +53,23 @@ void riscv_semihosting_init(struct target *target)
* @param retval Pointer to a location where the return code will be stored
* @return non-zero value if a request was processed or an error encountered
*/
-semihosting_result_t riscv_semihosting(struct target *target, int *retval)
+enum semihosting_result riscv_semihosting(struct target *target, int *retval)
{
struct semihosting *semihosting = target->semihosting;
if (!semihosting) {
LOG_DEBUG(" -> NONE (!semihosting)");
- return SEMI_NONE;
+ return SEMIHOSTING_NONE;
}
if (!semihosting->is_active) {
LOG_DEBUG(" -> NONE (!semihosting->is_active)");
- return SEMI_NONE;
+ return SEMIHOSTING_NONE;
}
riscv_reg_t pc;
int result = riscv_get_register(target, &pc, GDB_REGNO_PC);
if (result != ERROR_OK)
- return SEMI_ERROR;
+ return SEMIHOSTING_ERROR;
uint8_t tmp_buf[12];
@@ -92,7 +78,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
/* Instruction memories may not support arbitrary read size. Use any size that will work. */
*retval = riscv_read_by_any_size(target, (pc - 4) + 4 * i, 4, tmp_buf + 4 * i);
if (*retval != ERROR_OK)
- return SEMI_ERROR;
+ return SEMIHOSTING_ERROR;
}
/*
@@ -111,7 +97,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
if (pre != 0x01f01013 || ebreak != 0x00100073 || post != 0x40705013) {
/* Not the magic sequence defining semihosting. */
LOG_DEBUG(" -> NONE (no magic)");
- return SEMI_NONE;
+ return SEMIHOSTING_NONE;
}
/*
@@ -126,13 +112,13 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
result = riscv_get_register(target, &r0, GDB_REGNO_A0);
if (result != ERROR_OK) {
LOG_DEBUG(" -> ERROR (couldn't read a0)");
- return SEMI_ERROR;
+ return SEMIHOSTING_ERROR;
}
result = riscv_get_register(target, &r1, GDB_REGNO_A1);
if (result != ERROR_OK) {
LOG_DEBUG(" -> ERROR (couldn't read a1)");
- return SEMI_ERROR;
+ return SEMIHOSTING_ERROR;
}
semihosting->op = r0;
@@ -146,19 +132,19 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
*retval = semihosting_common(target);
if (*retval != ERROR_OK) {
LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op);
- return SEMI_ERROR;
+ return SEMIHOSTING_ERROR;
}
} else {
/* Unknown operation number, not a semihosting call. */
LOG_DEBUG(" -> NONE (unknown operation number)");
- return SEMI_NONE;
+ return SEMIHOSTING_NONE;
}
}
/* Resume right after the EBREAK 4 bytes instruction. */
*retval = riscv_set_register(target, GDB_REGNO_PC, pc + 4);
if (*retval != ERROR_OK)
- return SEMI_ERROR;
+ return SEMIHOSTING_ERROR;
/*
* Resume target if we are not waiting on a fileio
@@ -166,11 +152,11 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
*/
if (semihosting->is_resumable && !semihosting->hit_fileio) {
LOG_DEBUG(" -> HANDLED");
- return SEMI_HANDLED;
+ return SEMIHOSTING_HANDLED;
}
LOG_DEBUG(" -> WAITING");
- return SEMI_WAITING;
+ return SEMIHOSTING_WAITING;
}
/* -------------------------------------------------------------------------
diff --git a/src/target/rtt.c b/src/target/rtt.c
index 4183021..ef2c45d 100644
--- a/src/target/rtt.c
+++ b/src/target/rtt.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2016-2020 by Marc Schink <dev@zapb.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/rtt.h b/src/target/rtt.h
index 0122475..f3acda5 100644
--- a/src/target/rtt.h
+++ b/src/target/rtt.h
@@ -1,18 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (C) 2016-2020 by Marc Schink <dev@zapb.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_TARGET_RTT_H
diff --git a/src/target/semihosting_common.c b/src/target/semihosting_common.c
index 2df6e38..dc0dae2 100644
--- a/src/target/semihosting_common.c
+++ b/src/target/semihosting_common.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2018 by Liviu Ionescu *
* <ilg@livius.net> *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2016 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/**
@@ -103,16 +92,6 @@ static int semihosting_common_fileio_info(struct target *target,
static int semihosting_common_fileio_end(struct target *target, int result,
int fileio_errno, bool ctrl_c);
-static int semihosting_read_fields(struct target *target, size_t number,
- uint8_t *fields);
-static int semihosting_write_fields(struct target *target, size_t number,
- uint8_t *fields);
-static uint64_t semihosting_get_field(struct target *target, size_t index,
- uint8_t *fields);
-static void semihosting_set_field(struct target *target, uint64_t value,
- size_t index,
- uint8_t *fields);
-
/* Attempts to include gdb_server.h failed. */
extern int gdb_actual_connections;
@@ -166,6 +145,7 @@ int semihosting_common_init(struct target *target, void *setup,
semihosting->setup = setup;
semihosting->post_result = post_result;
+ semihosting->user_command_extension = NULL;
target->semihosting = semihosting;
@@ -426,7 +406,7 @@ int semihosting_common(struct target *target)
} else {
semihosting->result = close(fd);
semihosting->sys_errno = errno;
- LOG_DEBUG("close(%d)=%d", fd, (int)semihosting->result);
+ LOG_DEBUG("close(%d)=%" PRId64, fd, semihosting->result);
}
}
break;
@@ -651,10 +631,10 @@ int semihosting_common(struct target *target)
semihosting->result = fstat(fd, &buf);
if (semihosting->result == -1) {
semihosting->sys_errno = errno;
- LOG_DEBUG("fstat(%d)=%d", fd, (int)semihosting->result);
+ LOG_DEBUG("fstat(%d)=%" PRId64, fd, semihosting->result);
break;
}
- LOG_DEBUG("fstat(%d)=%d", fd, (int)semihosting->result);
+ LOG_DEBUG("fstat(%d)=%" PRId64, fd, semihosting->result);
semihosting->result = buf.st_size;
}
break;
@@ -711,8 +691,7 @@ int semihosting_common(struct target *target)
if (retval != ERROR_OK)
return retval;
}
- LOG_DEBUG("SYS_GET_CMDLINE=[%s],%d", arg,
- (int)semihosting->result);
+ LOG_DEBUG("SYS_GET_CMDLINE=[%s], %" PRId64, arg, semihosting->result);
}
break;
@@ -804,7 +783,7 @@ int semihosting_common(struct target *target)
int fd = semihosting_get_field(target, 0, fields);
semihosting->result = isatty(fd);
semihosting->sys_errno = errno;
- LOG_DEBUG("isatty(%d)=%d", fd, (int)semihosting->result);
+ LOG_DEBUG("isatty(%d)=%" PRId64, fd, semihosting->result);
}
break;
@@ -877,9 +856,11 @@ int semihosting_common(struct target *target)
semihosting->result = -1;
semihosting->sys_errno = ENOMEM;
} else {
- strncpy((char *)fn, semihosting->basedir, basedir_len);
- if (fn[basedir_len - 1] != '/')
- fn[basedir_len++] = '/';
+ if (basedir_len > 0) {
+ strcpy((char *)fn, semihosting->basedir);
+ if (fn[basedir_len - 1] != '/')
+ fn[basedir_len++] = '/';
+ }
retval = target_read_memory(target, addr, 1, len, fn + basedir_len);
if (retval != ERROR_OK) {
free(fn);
@@ -920,22 +901,19 @@ int semihosting_common(struct target *target)
semihosting->result = fd;
semihosting->stdin_fd = fd;
semihosting->sys_errno = errno;
- LOG_DEBUG("dup(STDIN)=%d",
- (int)semihosting->result);
+ LOG_DEBUG("dup(STDIN)=%" PRId64, semihosting->result);
} else if (mode < 8) {
int fd = dup(STDOUT_FILENO);
semihosting->result = fd;
semihosting->stdout_fd = fd;
semihosting->sys_errno = errno;
- LOG_DEBUG("dup(STDOUT)=%d",
- (int)semihosting->result);
+ LOG_DEBUG("dup(STDOUT)=%" PRId64, semihosting->result);
} else {
int fd = dup(STDERR_FILENO);
semihosting->result = fd;
semihosting->stderr_fd = fd;
semihosting->sys_errno = errno;
- LOG_DEBUG("dup(STDERR)=%d",
- (int)semihosting->result);
+ LOG_DEBUG("dup(STDERR)=%" PRId64, semihosting->result);
}
} else {
/* cygwin requires the permission setting
@@ -945,8 +923,7 @@ int semihosting_common(struct target *target)
open_host_modeflags[mode],
0644);
semihosting->sys_errno = errno;
- LOG_DEBUG("open('%s')=%d", fn,
- (int)semihosting->result);
+ LOG_DEBUG("open('%s')=%" PRId64, fn, semihosting->result);
}
}
free(fn);
@@ -1009,11 +986,11 @@ int semihosting_common(struct target *target)
semihosting->sys_errno = ENOMEM;
} else {
semihosting->result = semihosting_read(semihosting, fd, buf, len);
- LOG_DEBUG("read(%d, 0x%" PRIx64 ", %zu)=%d",
+ LOG_DEBUG("read(%d, 0x%" PRIx64 ", %zu)=%" PRId64,
fd,
addr,
len,
- (int)semihosting->result);
+ semihosting->result);
if (semihosting->result >= 0) {
retval = target_write_buffer(target, addr,
semihosting->result,
@@ -1049,7 +1026,7 @@ int semihosting_common(struct target *target)
return ERROR_FAIL;
}
semihosting->result = semihosting_getchar(semihosting, semihosting->stdin_fd);
- LOG_DEBUG("getchar()=%d", (int)semihosting->result);
+ LOG_DEBUG("getchar()=%" PRId64, semihosting->result);
break;
case SEMIHOSTING_SYS_REMOVE: /* 0x0E */
@@ -1095,8 +1072,7 @@ int semihosting_common(struct target *target)
fn[len] = 0;
semihosting->result = remove((char *)fn);
semihosting->sys_errno = errno;
- LOG_DEBUG("remove('%s')=%d", fn,
- (int)semihosting->result);
+ LOG_DEBUG("remove('%s')=%" PRId64, fn, semihosting->result);
free(fn);
}
@@ -1165,9 +1141,7 @@ int semihosting_common(struct target *target)
semihosting->result = rename((char *)fn1,
(char *)fn2);
semihosting->sys_errno = errno;
- LOG_DEBUG("rename('%s', '%s')=%d", fn1, fn2,
- (int)semihosting->result);
-
+ LOG_DEBUG("rename('%s', '%s')=%" PRId64 " %d", fn1, fn2, semihosting->result, errno);
free(fn1);
free(fn2);
}
@@ -1212,8 +1186,7 @@ int semihosting_common(struct target *target)
} else {
semihosting->result = lseek(fd, pos, SEEK_SET);
semihosting->sys_errno = errno;
- LOG_DEBUG("lseek(%d, %d)=%d", fd, (int)pos,
- (int)semihosting->result);
+ LOG_DEBUG("lseek(%d, %d)=%" PRId64, fd, (int)pos, semihosting->result);
if (semihosting->result == pos)
semihosting->result = 0;
}
@@ -1272,9 +1245,7 @@ int semihosting_common(struct target *target)
cmd[len] = 0;
semihosting->result = system(
(const char *)cmd);
- LOG_DEBUG("system('%s')=%d",
- cmd,
- (int)semihosting->result);
+ LOG_DEBUG("system('%s')=%" PRId64, cmd, semihosting->result);
}
free(cmd);
@@ -1353,11 +1324,11 @@ int semihosting_common(struct target *target)
}
semihosting->result = semihosting_write(semihosting, fd, buf, len);
semihosting->sys_errno = errno;
- LOG_DEBUG("write(%d, 0x%" PRIx64 ", %zu)=%d",
+ LOG_DEBUG("write(%d, 0x%" PRIx64 ", %zu)=%" PRId64,
fd,
addr,
len,
- (int)semihosting->result);
+ semihosting->result);
if (semihosting->result >= 0) {
/* The number of bytes that are NOT written.
* */
@@ -1446,7 +1417,7 @@ int semihosting_common(struct target *target)
}
break;
- case SEMIHOSTING_USER_CMD_0x100 ... SEMIHOSTING_USER_CMD_0x107:
+ case SEMIHOSTING_USER_CMD_0X100 ... SEMIHOSTING_USER_CMD_0X107:
/**
* This is a user defined operation (while user cmds 0x100-0x1ff
* are possible, only 0x100-0x107 are currently implemented).
@@ -1465,9 +1436,14 @@ int semihosting_common(struct target *target)
* Return
* On exit, the RETURN REGISTER contains the return status.
*/
- {
- assert(!semihosting_user_op_params);
+ if (semihosting->user_command_extension) {
+ retval = semihosting->user_command_extension(target);
+ if (retval != ERROR_NOT_IMPLEMENTED)
+ break;
+ /* If custom user command not handled, we are looking for the TCL handler */
+ }
+ assert(!semihosting_user_op_params);
retval = semihosting_read_fields(target, 2, fields);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to read fields for user defined command"
@@ -1505,11 +1481,8 @@ int semihosting_common(struct target *target)
target_handle_event(target, semihosting->op);
free(semihosting_user_op_params);
semihosting_user_op_params = NULL;
-
semihosting->result = 0;
break;
- }
-
case SEMIHOSTING_SYS_ELAPSED: /* 0x30 */
/*
@@ -1646,17 +1619,11 @@ static int semihosting_common_fileio_end(struct target *target, int result,
*/
switch (semihosting->op) {
case SEMIHOSTING_SYS_WRITE: /* 0x05 */
+ case SEMIHOSTING_SYS_READ: /* 0x06 */
if (result < 0)
- semihosting->result = fileio_info->param_3;
+ semihosting->result = fileio_info->param_3; /* Zero bytes read/written. */
else
- semihosting->result = 0;
- break;
-
- case SEMIHOSTING_SYS_READ: /* 0x06 */
- if (result == (int)fileio_info->param_3)
- semihosting->result = 0;
- if (result <= 0)
- semihosting->result = fileio_info->param_3;
+ semihosting->result = (int64_t)fileio_info->param_3 - result;
break;
case SEMIHOSTING_SYS_SEEK: /* 0x0a */
@@ -1668,10 +1635,13 @@ static int semihosting_common_fileio_end(struct target *target, int result,
return semihosting->post_result(target);
}
+/* -------------------------------------------------------------------------
+ * Utility functions. */
+
/**
* Read all fields of a command from target to buffer.
*/
-static int semihosting_read_fields(struct target *target, size_t number,
+int semihosting_read_fields(struct target *target, size_t number,
uint8_t *fields)
{
struct semihosting *semihosting = target->semihosting;
@@ -1683,7 +1653,7 @@ static int semihosting_read_fields(struct target *target, size_t number,
/**
* Write all fields of a command from buffer to target.
*/
-static int semihosting_write_fields(struct target *target, size_t number,
+int semihosting_write_fields(struct target *target, size_t number,
uint8_t *fields)
{
struct semihosting *semihosting = target->semihosting;
@@ -1695,7 +1665,7 @@ static int semihosting_write_fields(struct target *target, size_t number,
/**
* Extract a field from the buffer, considering register size and endianness.
*/
-static uint64_t semihosting_get_field(struct target *target, size_t index,
+uint64_t semihosting_get_field(struct target *target, size_t index,
uint8_t *fields)
{
struct semihosting *semihosting = target->semihosting;
@@ -1708,7 +1678,7 @@ static uint64_t semihosting_get_field(struct target *target, size_t index,
/**
* Store a field in the buffer, considering register size and endianness.
*/
-static void semihosting_set_field(struct target *target, uint64_t value,
+void semihosting_set_field(struct target *target, uint64_t value,
size_t index,
uint8_t *fields)
{
@@ -1832,7 +1802,7 @@ COMMAND_HANDLER(handle_common_semihosting_redirect_command)
{
struct target *target = get_current_target(CMD_CTX);
- if (target == NULL) {
+ if (!target) {
LOG_ERROR("No target selected");
return ERROR_FAIL;
}
diff --git a/src/target/semihosting_common.h b/src/target/semihosting_common.h
index 404080f..7c5f748 100644
--- a/src/target/semihosting_common.h
+++ b/src/target/semihosting_common.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2018 by Liviu Ionescu *
* <ilg@livius.net> *
* *
* Copyright (C) 2009 by Marvell Technology Group Ltd. *
* Written by Nicolas Pitre <nico@marvell.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_SEMIHOSTING_COMMON_H
@@ -76,9 +65,9 @@ enum semihosting_operation_numbers {
SEMIHOSTING_SYS_WRITE = 0x05,
SEMIHOSTING_SYS_WRITEC = 0x03,
SEMIHOSTING_SYS_WRITE0 = 0x04,
- SEMIHOSTING_USER_CMD_0x100 = 0x100, /* First user cmd op code */
- SEMIHOSTING_USER_CMD_0x107 = 0x107, /* Last supported user cmd op code */
- SEMIHOSTING_USER_CMD_0x1FF = 0x1FF, /* Last user cmd op code */
+ SEMIHOSTING_USER_CMD_0X100 = 0x100, /* First user cmd op code */
+ SEMIHOSTING_USER_CMD_0X107 = 0x107, /* Last supported user cmd op code */
+ SEMIHOSTING_USER_CMD_0X1FF = 0x1FF, /* Last user cmd op code */
};
/** Maximum allowed Tcl command segment length in bytes*/
@@ -103,6 +92,13 @@ enum semihosting_redirect_config {
SEMIHOSTING_REDIRECT_CFG_ALL,
};
+enum semihosting_result {
+ SEMIHOSTING_NONE, /* Not halted for a semihosting call. */
+ SEMIHOSTING_HANDLED, /* Call handled, and target was resumed. */
+ SEMIHOSTING_WAITING, /* Call handled, target is halted waiting until we can resume. */
+ SEMIHOSTING_ERROR /* Something went wrong. */
+};
+
struct target;
/*
@@ -179,6 +175,13 @@ struct semihosting {
/** Base directory for semihosting I/O operations. */
char *basedir;
+ /**
+ * Target's extension of semihosting user commands.
+ * @returns ERROR_NOT_IMPLEMENTED when user command is not handled, otherwise
+ * sets semihosting->result and semihosting->sys_errno and returns ERROR_OK.
+ */
+ int (*user_command_extension)(struct target *target);
+
int (*setup)(struct target *target, int enable);
int (*post_result)(struct target *target);
};
@@ -187,4 +190,17 @@ int semihosting_common_init(struct target *target, void *setup,
void *post_result);
int semihosting_common(struct target *target);
+/* utility functions which may also be used by semihosting extensions (custom vendor-defined syscalls) */
+int semihosting_read_fields(struct target *target, size_t number,
+ uint8_t *fields);
+int semihosting_write_fields(struct target *target, size_t number,
+ uint8_t *fields);
+uint64_t semihosting_get_field(struct target *target, size_t index,
+ uint8_t *fields);
+void semihosting_set_field(struct target *target, uint64_t value,
+ size_t index,
+ uint8_t *fields);
+
+extern const struct command_registration semihosting_common_handlers[];
+
#endif /* OPENOCD_TARGET_SEMIHOSTING_COMMON_H */
diff --git a/src/target/smp.c b/src/target/smp.c
index 569abd7..effc63f 100644
--- a/src/target/smp.c
+++ b/src/target/smp.c
@@ -1,19 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* *
* Copyright (C) ST-Ericsson SA 2011 *
* Author: Michel Jaouen <michel.jaouen@stericsson.com> for ST-Ericsson. *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/smp.h b/src/target/smp.h
index d373c90..20835a0 100644
--- a/src/target/smp.h
+++ b/src/target/smp.h
@@ -1,19 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* *
* Copyright (C) ST-Ericsson SA 2011 *
* Author: Michel Jaouen <michel.jaouen@stericsson.com> for ST-Ericsson. *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_SMP_H
diff --git a/src/target/startup.tcl b/src/target/startup.tcl
index 0e46992..290e79d 100644
--- a/src/target/startup.tcl
+++ b/src/target/startup.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Defines basic Tcl procs for OpenOCD target module
proc new_target_name { } {
diff --git a/src/target/stm8.c b/src/target/stm8.c
index 4102082..aa934c9 100644
--- a/src/target/stm8.c
+++ b/src/target/stm8.c
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* OpenOCD STM8 target driver
* Copyright (C) 2017 Ake Rehnman
* ake.rehnman(at)gmail.com
-*
-* This program is free software: you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation, either version 2 of the License, or
-* (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/stm8.h b/src/target/stm8.h
index b18ff58..55e1071 100644
--- a/src/target/stm8.h
+++ b/src/target/stm8.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* OpenOCD STM8 target driver
* Copyright (C) 2017 Ake Rehnman
* ake.rehnman(at)gmail.com
-*
-* This program is free software: you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation, either version 2 of the License, or
-* (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_TARGET_STM8_H
@@ -22,11 +11,12 @@
struct target;
-#define STM8_COMMON_MAGIC 0x53544D38
+#define STM8_COMMON_MAGIC 0x53544D38U
#define STM8_NUM_CORE_REGS 6
struct stm8_common {
- uint32_t common_magic;
+ unsigned int common_magic;
+
void *arch_info;
struct reg_cache *core_cache;
uint32_t core_regs[STM8_NUM_CORE_REGS];
diff --git a/src/target/target.c b/src/target/target.c
index a373848..f09c9a5 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -22,19 +24,6 @@
* *
* Copyright (C) 2011 Andreas Fritiofson *
* andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -88,6 +77,7 @@ extern struct target_type fa526_target;
extern struct target_type feroceon_target;
extern struct target_type dragonite_target;
extern struct target_type xscale_target;
+extern struct target_type xtensa_chip_target;
extern struct target_type cortexm_target;
extern struct target_type cortexa_target;
extern struct target_type aarch64_target;
@@ -105,7 +95,9 @@ extern struct target_type hla_target;
extern struct target_type nds32_v2_target;
extern struct target_type nds32_v3_target;
extern struct target_type nds32_v3m_target;
+extern struct target_type esp32_target;
extern struct target_type esp32s2_target;
+extern struct target_type esp32s3_target;
extern struct target_type or1k_target;
extern struct target_type quark_x10xx_target;
extern struct target_type quark_d20xx_target;
@@ -127,6 +119,7 @@ static struct target_type *target_types[] = {
&feroceon_target,
&dragonite_target,
&xscale_target,
+ &xtensa_chip_target,
&cortexm_target,
&cortexa_target,
&cortexr4_target,
@@ -142,7 +135,9 @@ static struct target_type *target_types[] = {
&nds32_v2_target,
&nds32_v3_target,
&nds32_v3m_target,
+ &esp32_target,
&esp32s2_target,
+ &esp32s3_target,
&or1k_target,
&quark_x10xx_target,
&quark_d20xx_target,
@@ -241,14 +236,14 @@ static const struct jim_nvp nvp_target_event[] = {
{ .value = TARGET_EVENT_TRACE_CONFIG, .name = "trace-config" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x100, .name = "semihosting-user-cmd-0x100" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x101, .name = "semihosting-user-cmd-0x101" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x102, .name = "semihosting-user-cmd-0x102" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x103, .name = "semihosting-user-cmd-0x103" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x104, .name = "semihosting-user-cmd-0x104" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x105, .name = "semihosting-user-cmd-0x105" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x106, .name = "semihosting-user-cmd-0x106" },
- { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0x107, .name = "semihosting-user-cmd-0x107" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X100, .name = "semihosting-user-cmd-0x100" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X101, .name = "semihosting-user-cmd-0x101" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X102, .name = "semihosting-user-cmd-0x102" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X103, .name = "semihosting-user-cmd-0x103" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X104, .name = "semihosting-user-cmd-0x104" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X105, .name = "semihosting-user-cmd-0x105" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X106, .name = "semihosting-user-cmd-0x106" },
+ { .value = TARGET_EVENT_SEMIHOSTING_USER_CMD_0X107, .name = "semihosting-user-cmd-0x107" },
{ .name = NULL, .value = -1 }
};
@@ -662,10 +657,10 @@ int target_resume(struct target *target, int current, target_addr_t address,
* Disable polling during resume() to guarantee the execution of handlers
* in the correct order.
*/
- bool save_poll = jtag_poll_get_enabled();
- jtag_poll_set_enabled(false);
+ bool save_poll_mask = jtag_poll_mask();
retval = target->type->resume(target, current, address, handle_breakpoints, debug_execution);
- jtag_poll_set_enabled(save_poll);
+ jtag_poll_unmask(save_poll_mask);
+
if (retval != ERROR_OK)
return retval;
@@ -693,14 +688,12 @@ static int target_process_reset(struct command_invocation *cmd, enum target_rese
* more predictable, i.e. dr/irscan & pathmove in events will
* not have JTAG operations injected into the middle of a sequence.
*/
- bool save_poll = jtag_poll_get_enabled();
-
- jtag_poll_set_enabled(false);
+ bool save_poll_mask = jtag_poll_mask();
sprintf(buf, "ocd_process_reset %s", n->name);
retval = Jim_Eval(cmd->ctx->interp, buf);
- jtag_poll_set_enabled(save_poll);
+ jtag_poll_unmask(save_poll_mask);
if (retval != JIM_OK) {
Jim_MakeErrorMessage(cmd->ctx->interp);
@@ -2088,7 +2081,7 @@ int target_alloc_working_area_try(struct target *target, uint32_t size, struct w
struct working_area *new_wa = malloc(sizeof(*new_wa));
if (new_wa) {
new_wa->next = NULL;
- new_wa->size = target->working_area_size & ~3UL; /* 4-byte align */
+ new_wa->size = ALIGN_DOWN(target->working_area_size, 4); /* 4-byte align */
new_wa->address = target->working_area;
new_wa->backup = NULL;
new_wa->user = NULL;
@@ -2099,8 +2092,7 @@ int target_alloc_working_area_try(struct target *target, uint32_t size, struct w
}
/* only allocate multiples of 4 byte */
- if (size % 4)
- size = (size + 3) & (~3UL);
+ size = ALIGN_UP(size, 4);
struct working_area *c = target->working_areas;
@@ -2254,7 +2246,7 @@ uint32_t target_get_working_area_avail(struct target *target)
uint32_t max_size = 0;
if (!c)
- return target->working_area_size;
+ return ALIGN_DOWN(target->working_area_size, 4);
while (c) {
if (c->free && max_size < c->size)
@@ -3337,7 +3329,7 @@ COMMAND_HANDLER(handle_soft_reset_halt_command)
{
struct target *target = get_current_target(CMD_CTX);
- LOG_USER("requesting target halt and executing a soft reset");
+ LOG_TARGET_INFO(target, "requesting target halt and executing a soft reset");
target_soft_reset_halt(target);
@@ -4727,7 +4719,7 @@ static int target_jim_read_memory(Jim_Interp *interp, int argc,
break;
}
- char value_buf[11];
+ char value_buf[19];
snprintf(value_buf, sizeof(value_buf), "0x%" PRIx64, v);
Jim_ListAppendElement(interp, result_list,
diff --git a/src/target/target.h b/src/target/target.h
index e67016c..197890b 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -13,19 +15,6 @@
* *
* Copyright (C) ST-Ericsson SA 2011 *
* michel.jaouen@stericsson.com : smp minimum support *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_TARGET_H
@@ -303,14 +292,14 @@ enum target_event {
TARGET_EVENT_TRACE_CONFIG,
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x100 = 0x100, /* semihosting allows user cmds from 0x100 to 0x1ff */
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x101 = 0x101,
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x102 = 0x102,
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x103 = 0x103,
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x104 = 0x104,
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x105 = 0x105,
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x106 = 0x106,
- TARGET_EVENT_SEMIHOSTING_USER_CMD_0x107 = 0x107,
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X100 = 0x100, /* semihosting allows user cmds from 0x100 to 0x1ff */
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X101 = 0x101,
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X102 = 0x102,
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X103 = 0x103,
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X104 = 0x104,
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X105 = 0x105,
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X106 = 0x106,
+ TARGET_EVENT_SEMIHOSTING_USER_CMD_0X107 = 0x107,
};
struct target_event_action {
diff --git a/src/target/target_request.c b/src/target/target_request.c
index 562b046..72c8421 100644
--- a/src/target/target_request.c
+++ b/src/target/target_request.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/target_request.h b/src/target/target_request.h
index 1b13173..62d5c74 100644
--- a/src/target/target_request.h
+++ b/src/target/target_request.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_TARGET_REQUEST_H
diff --git a/src/target/target_type.h b/src/target/target_type.h
index a26c2e7..9470803 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_TARGET_TYPE_H
@@ -297,6 +286,15 @@ struct target_type {
*/
int (*gdb_fileio_end)(struct target *target, int retcode, int fileio_errno, bool ctrl_c);
+ /* Parse target-specific GDB query commands.
+ * The string pointer "response_p" is always assigned by the called function
+ * to a pointer to a NULL-terminated string, even when the function returns
+ * an error. The string memory is not freed by the caller, so this function
+ * must pay attention for possible memory leaks if the string memory is
+ * dynamically allocated.
+ */
+ int (*gdb_query_custom)(struct target *target, const char *packet, char **response_p);
+
/* do target profiling
*/
int (*profiling)(struct target *target, uint32_t *samples,
diff --git a/src/target/testee.c b/src/target/testee.c
index 236ac9a..6875652 100644
--- a/src/target/testee.c
+++ b/src/target/testee.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/trace.c b/src/target/trace.c
index f2ceb03..333a787 100644
--- a/src/target/trace.c
+++ b/src/target/trace.c
@@ -1,19 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/trace.h b/src/target/trace.h
index 45308c0..e3d787e 100644
--- a/src/target/trace.h
+++ b/src/target/trace.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_TRACE_H
diff --git a/src/target/x86_32_common.c b/src/target/x86_32_common.c
index d119be1..ecaf52b 100644
--- a/src/target/x86_32_common.c
+++ b/src/target/x86_32_common.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright(c) 2013 Intel Corporation.
*
@@ -7,19 +9,6 @@
* Julien Carreno (julien.carreno@intel.com)
* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
* Contact Information:
* Intel Corporation
*/
diff --git a/src/target/x86_32_common.h b/src/target/x86_32_common.h
index 14e6e35..7392447 100644
--- a/src/target/x86_32_common.h
+++ b/src/target/x86_32_common.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright(c) 2013-2016 Intel Corporation.
*
@@ -7,19 +9,6 @@
* Julien Carreno (julien.carreno@intel.com)
* Jeffrey Maxwell (jeffrey.r.maxwell@intel.com)
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
* Contact Information:
* Intel Corporation
*/
@@ -159,7 +148,7 @@ enum {
PMCR,
};
-#define X86_32_COMMON_MAGIC 0x86328632
+#define X86_32_COMMON_MAGIC 0x86328632U
enum {
/* memory read/write */
@@ -211,7 +200,8 @@ struct swbp_mem_patch {
#define NUM_PM_REGS 18 /* regs used in save/restore */
struct x86_32_common {
- uint32_t common_magic;
+ unsigned int common_magic;
+
void *arch_info;
enum x86_core_type core_type;
struct reg_cache *cache;
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 78bd099..066ff8c 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2006, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -7,19 +9,6 @@
* *
* Copyright (C) 2009 Michael Schwingen *
* michael@schwingen.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
diff --git a/src/target/xscale.h b/src/target/xscale.h
index a86edb2..36a69bc 100644
--- a/src/target/xscale.h
+++ b/src/target/xscale.h
@@ -1,22 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_XSCALE_H
@@ -26,7 +15,7 @@
#include "armv4_5_mmu.h"
#include "trace.h"
-#define XSCALE_COMMON_MAGIC 0x58534341
+#define XSCALE_COMMON_MAGIC 0x58534341U
/* These four JTAG instructions are architecturally defined.
* Lengths are core-specific; originally 5 bits, later 7.
@@ -82,11 +71,11 @@ struct xscale_trace {
};
struct xscale_common {
+ unsigned int common_magic;
+
/* armv4/5 common stuff */
struct arm arm;
- int common_magic;
-
/* XScale registers (CP15, DBG) */
struct reg_cache *reg_cache;
diff --git a/src/target/xtensa/Makefile.am b/src/target/xtensa/Makefile.am
index f6cee99..94c7c4a 100644
--- a/src/target/xtensa/Makefile.am
+++ b/src/target/xtensa/Makefile.am
@@ -1,7 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libxtensa.la
%C%_libxtensa_la_SOURCES = \
%D%/xtensa.c \
%D%/xtensa.h \
+ %D%/xtensa_chip.c \
+ %D%/xtensa_chip.h \
%D%/xtensa_debug_module.c \
%D%/xtensa_debug_module.h \
%D%/xtensa_regs.h
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index a955960..4dfff6a 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -1,24 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Generic Xtensa target API for OpenOCD *
+ * Copyright (C) 2020-2022 Cadence Design Systems, Inc. *
* Copyright (C) 2016-2019 Espressif Systems Ltd. *
* Derived from esp108.c *
* Author: Angus Gratton gus@projectgus.com *
- * Author: Jeroen Domburg <jeroen@espressif.com> *
- * Author: Alexey Gerenkov <alexey@espressif.com> *
- * Author: Andrey Gramakov <andrei.gramakov@espressif.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -30,325 +17,270 @@
#include <helper/align.h>
#include <target/register.h>
+#include "xtensa_chip.h"
#include "xtensa.h"
-
-#define _XT_INS_FORMAT_RSR(OPCODE, SR, T) ((OPCODE) \
- | (((SR) & 0xFF) << 8) \
+/* Swap 4-bit Xtensa opcodes and fields */
+#define XT_NIBSWAP8(V) \
+ ((((V) & 0x0F) << 4) \
+ | (((V) & 0xF0) >> 4))
+
+#define XT_NIBSWAP16(V) \
+ ((((V) & 0x000F) << 12) \
+ | (((V) & 0x00F0) << 4) \
+ | (((V) & 0x0F00) >> 4) \
+ | (((V) & 0xF000) >> 12))
+
+#define XT_NIBSWAP24(V) \
+ ((((V) & 0x00000F) << 20) \
+ | (((V) & 0x0000F0) << 12) \
+ | (((V) & 0x000F00) << 4) \
+ | (((V) & 0x00F000) >> 4) \
+ | (((V) & 0x0F0000) >> 12) \
+ | (((V) & 0xF00000) >> 20))
+
+/* _XT_INS_FORMAT_*()
+ * Instruction formatting converted from little-endian inputs
+ * and shifted to the MSB-side of DIR for BE systems.
+ */
+#define _XT_INS_FORMAT_RSR(X, OPCODE, SR, T) \
+ (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE) \
+ | (((T) & 0x0F) << 16) \
+ | (((SR) & 0xFF) << 8)) << 8 \
+ : (OPCODE) \
+ | (((SR) & 0xFF) << 8) \
| (((T) & 0x0F) << 4))
-#define _XT_INS_FORMAT_RRR(OPCODE, ST, R) ((OPCODE) \
- | (((ST) & 0xFF) << 4) \
+#define _XT_INS_FORMAT_RRR(X, OPCODE, ST, R) \
+ (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE) \
+ | ((XT_NIBSWAP8((ST) & 0xFF)) << 12) \
+ | (((R) & 0x0F) << 8)) << 8 \
+ : (OPCODE) \
+ | (((ST) & 0xFF) << 4) \
| (((R) & 0x0F) << 12))
-#define _XT_INS_FORMAT_RRRN(OPCODE, S, T, IMM4) ((OPCODE) \
- | (((T) & 0x0F) << 4) \
- | (((S) & 0x0F) << 8) \
+#define _XT_INS_FORMAT_RRRN(X, OPCODE, S, T, IMM4) \
+ (XT_ISBE(X) ? (XT_NIBSWAP16(OPCODE) \
+ | (((T) & 0x0F) << 8) \
+ | (((S) & 0x0F) << 4) \
+ | ((IMM4) & 0x0F)) << 16 \
+ : (OPCODE) \
+ | (((T) & 0x0F) << 4) \
+ | (((S) & 0x0F) << 8) \
| (((IMM4) & 0x0F) << 12))
-#define _XT_INS_FORMAT_RRI8(OPCODE, R, S, T, IMM8) ((OPCODE) \
- | (((IMM8) & 0xFF) << 16) \
- | (((R) & 0x0F) << 12) \
- | (((S) & 0x0F) << 8) \
+#define _XT_INS_FORMAT_RRI8(X, OPCODE, R, S, T, IMM8) \
+ (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE) \
+ | (((T) & 0x0F) << 16) \
+ | (((S) & 0x0F) << 12) \
+ | (((R) & 0x0F) << 8) \
+ | ((IMM8) & 0xFF)) << 8 \
+ : (OPCODE) \
+ | (((IMM8) & 0xFF) << 16) \
+ | (((R) & 0x0F) << 12) \
+ | (((S) & 0x0F) << 8) \
| (((T) & 0x0F) << 4))
-#define _XT_INS_FORMAT_RRI4(OPCODE, IMM4, R, S, T) ((OPCODE) \
- | (((IMM4) & 0x0F) << 20) \
- | (((R) & 0x0F) << 12) \
- | (((S) & 0x0F) << 8) \
+#define _XT_INS_FORMAT_RRI4(X, OPCODE, IMM4, R, S, T) \
+ (XT_ISBE(X) ? (XT_NIBSWAP24(OPCODE) \
+ | (((T) & 0x0F) << 16) \
+ | (((S) & 0x0F) << 12) \
+ | (((R) & 0x0F) << 8)) << 8 \
+ | ((IMM4) & 0x0F) \
+ : (OPCODE) \
+ | (((IMM4) & 0x0F) << 20) \
+ | (((R) & 0x0F) << 12) \
+ | (((S) & 0x0F) << 8) \
| (((T) & 0x0F) << 4))
/* Xtensa processor instruction opcodes
- * "Return From Debug Operation" to Normal */
-#define XT_INS_RFDO 0xf1e000
+*/
+/* "Return From Debug Operation" to Normal */
+#define XT_INS_RFDO(X) (XT_ISBE(X) ? 0x000e1f << 8 : 0xf1e000)
/* "Return From Debug and Dispatch" - allow sw debugging stuff to take over */
-#define XT_INS_RFDD 0xf1e010
+#define XT_INS_RFDD(X) (XT_ISBE(X) ? 0x010e1f << 8 : 0xf1e010)
/* Load to DDR register, increase addr register */
-#define XT_INS_LDDR32P(S) (0x0070E0 | ((S) << 8))
+#define XT_INS_LDDR32P(X, S) (XT_ISBE(X) ? (0x0E0700 | ((S) << 12)) << 8 : (0x0070E0 | ((S) << 8)))
/* Store from DDR register, increase addr register */
-#define XT_INS_SDDR32P(S) (0x0070F0 | ((S) << 8))
-
-/* Load 32-bit Indirect from A(S) + 4 * IMM8 to A(T) */
-#define XT_INS_L32I(S, T, IMM8) _XT_INS_FORMAT_RRI8(0x002002, 0, S, T, IMM8)
-/* Load 16-bit Unsigned from A(S) + 2 * IMM8 to A(T) */
-#define XT_INS_L16UI(S, T, IMM8) _XT_INS_FORMAT_RRI8(0x001002, 0, S, T, IMM8)
-/* Load 8-bit Unsigned from A(S) + IMM8 to A(T) */
-#define XT_INS_L8UI(S, T, IMM8) _XT_INS_FORMAT_RRI8(0x000002, 0, S, T, IMM8)
-
-/* Store 32-bit Indirect to A(S) + 4 * IMM8 from A(T) */
-#define XT_INS_S32I(S, T, IMM8) _XT_INS_FORMAT_RRI8(0x006002, 0, S, T, IMM8)
-/* Store 16-bit to A(S) + 2 * IMM8 from A(T) */
-#define XT_INS_S16I(S, T, IMM8) _XT_INS_FORMAT_RRI8(0x005002, 0, S, T, IMM8)
-/* Store 8-bit to A(S) + IMM8 from A(T) */
-#define XT_INS_S8I(S, T, IMM8) _XT_INS_FORMAT_RRI8(0x004002, 0, S, T, IMM8)
+#define XT_INS_SDDR32P(X, S) (XT_ISBE(X) ? (0x0F0700 | ((S) << 12)) << 8 : (0x0070F0 | ((S) << 8)))
+
+/* Load 32-bit Indirect from A(S)+4*IMM8 to A(T) */
+#define XT_INS_L32I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x002002, 0, S, T, IMM8)
+/* Load 16-bit Unsigned from A(S)+2*IMM8 to A(T) */
+#define XT_INS_L16UI(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x001002, 0, S, T, IMM8)
+/* Load 8-bit Unsigned from A(S)+IMM8 to A(T) */
+#define XT_INS_L8UI(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x000002, 0, S, T, IMM8)
+
+/* Store 32-bit Indirect to A(S)+4*IMM8 from A(T) */
+#define XT_INS_S32I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x006002, 0, S, T, IMM8)
+/* Store 16-bit to A(S)+2*IMM8 from A(T) */
+#define XT_INS_S16I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x005002, 0, S, T, IMM8)
+/* Store 8-bit to A(S)+IMM8 from A(T) */
+#define XT_INS_S8I(X, S, T, IMM8) _XT_INS_FORMAT_RRI8(X, 0x004002, 0, S, T, IMM8)
+
+/* Cache Instructions */
+#define XT_INS_IHI(X, S, IMM8) _XT_INS_FORMAT_RRI8(X, 0x0070E2, 0, S, 0, IMM8)
+#define XT_INS_DHWBI(X, S, IMM8) _XT_INS_FORMAT_RRI8(X, 0x007052, 0, S, 0, IMM8)
+#define XT_INS_DHWB(X, S, IMM8) _XT_INS_FORMAT_RRI8(X, 0x007042, 0, S, 0, IMM8)
+#define XT_INS_ISYNC(X) (XT_ISBE(X) ? 0x000200 << 8 : 0x002000)
+
+/* Control Instructions */
+#define XT_INS_JX(X, S) (XT_ISBE(X) ? (0x050000 | ((S) << 12)) : (0x0000a0 | ((S) << 8)))
+#define XT_INS_CALL0(X, IMM18) (XT_ISBE(X) ? (0x500000 | ((IMM18) & 0x3ffff)) : (0x000005 | (((IMM18) & 0x3ffff) << 6)))
/* Read Special Register */
-#define XT_INS_RSR(SR, T) _XT_INS_FORMAT_RSR(0x030000, SR, T)
+#define XT_INS_RSR(X, SR, T) _XT_INS_FORMAT_RSR(X, 0x030000, SR, T)
/* Write Special Register */
-#define XT_INS_WSR(SR, T) _XT_INS_FORMAT_RSR(0x130000, SR, T)
+#define XT_INS_WSR(X, SR, T) _XT_INS_FORMAT_RSR(X, 0x130000, SR, T)
/* Swap Special Register */
-#define XT_INS_XSR(SR, T) _XT_INS_FORMAT_RSR(0x610000, SR, T)
+#define XT_INS_XSR(X, SR, T) _XT_INS_FORMAT_RSR(X, 0x610000, SR, T)
/* Rotate Window by (-8..7) */
-#define XT_INS_ROTW(N) ((0x408000) | (((N) & 15) << 4))
+#define XT_INS_ROTW(X, N) (XT_ISBE(X) ? ((0x000804) | (((N) & 15) << 16)) << 8 : ((0x408000) | (((N) & 15) << 4)))
/* Read User Register */
-#define XT_INS_RUR(UR, T) _XT_INS_FORMAT_RRR(0xE30000, UR, T)
+#define XT_INS_RUR(X, UR, T) _XT_INS_FORMAT_RRR(X, 0xE30000, UR, T)
/* Write User Register */
-#define XT_INS_WUR(UR, T) _XT_INS_FORMAT_RSR(0xF30000, UR, T)
+#define XT_INS_WUR(X, UR, T) _XT_INS_FORMAT_RSR(X, 0xF30000, UR, T)
/* Read Floating-Point Register */
-#define XT_INS_RFR(FR, T) _XT_INS_FORMAT_RRR(0xFA0000, (((FR) << 4) | 0x4), T)
+#define XT_INS_RFR(X, FR, T) _XT_INS_FORMAT_RRR(X, 0xFA0000, ((FR << 4) | 0x4), T)
/* Write Floating-Point Register */
-#define XT_INS_WFR(FR, T) _XT_INS_FORMAT_RRR(0xFA0000, (((FR) << 4) | 0x5), T)
-
-/* 32-bit break */
-#define XT_INS_BREAK(IMM1, IMM2) _XT_INS_FORMAT_RRR(0x000000, \
- (((IMM1) & 0x0F) << 4) | ((IMM2) & 0x0F), 0x4)
-/* 16-bit break */
-#define XT_INS_BREAKN(IMM4) _XT_INS_FORMAT_RRRN(0x00000D, IMM4, 0x2, 0xF)
+#define XT_INS_WFR(X, FR, T) _XT_INS_FORMAT_RRR(X, 0xFA0000, ((T << 4) | 0x5), FR)
-#define XT_INS_L32E(R, S, T) _XT_INS_FORMAT_RRI4(0x90000, 0, R, S, T)
-#define XT_INS_S32E(R, S, T) _XT_INS_FORMAT_RRI4(0x490000, 0, R, S, T)
-#define XT_INS_L32E_S32E_MASK 0xFF000F
+#define XT_INS_L32E(X, R, S, T) _XT_INS_FORMAT_RRI4(X, 0x090000, 0, R, S, T)
+#define XT_INS_S32E(X, R, S, T) _XT_INS_FORMAT_RRI4(X, 0x490000, 0, R, S, T)
+#define XT_INS_L32E_S32E_MASK(X) (XT_ISBE(X) ? 0xF000FF << 8 : 0xFF000F)
-#define XT_INS_RFWO 0x3400
-#define XT_INS_RFWU 0x3500
-#define XT_INS_RFWO_RFWU_MASK 0xFFFFFF
+#define XT_INS_RFWO(X) (XT_ISBE(X) ? 0x004300 << 8 : 0x003400)
+#define XT_INS_RFWU(X) (XT_ISBE(X) ? 0x005300 << 8 : 0x003500)
+#define XT_INS_RFWO_RFWU_MASK(X) (XT_ISBE(X) ? 0xFFFFFF << 8 : 0xFFFFFF)
#define XT_WATCHPOINTS_NUM_MAX 2
-/* Special register number macro for DDR register.
-* this gets used a lot so making a shortcut to it is
-* useful.
-*/
-#define XT_SR_DDR (xtensa_regs[XT_REG_IDX_OCD_DDR].reg_num)
-
-/*Same thing for A3/A4 */
+/* Special register number macro for DDR, PS, WB, A3, A4 registers.
+ * These get used a lot so making a shortcut is useful.
+ */
+#define XT_SR_DDR (xtensa_regs[XT_REG_IDX_DDR].reg_num)
+#define XT_SR_PS (xtensa_regs[XT_REG_IDX_PS].reg_num)
+#define XT_SR_WB (xtensa_regs[XT_REG_IDX_WINDOWBASE].reg_num)
#define XT_REG_A3 (xtensa_regs[XT_REG_IDX_AR3].reg_num)
#define XT_REG_A4 (xtensa_regs[XT_REG_IDX_AR4].reg_num)
-#define XT_PC_REG_NUM_BASE (176)
-#define XT_SW_BREAKPOINTS_MAX_NUM 32
-
-const struct xtensa_reg_desc xtensa_regs[XT_NUM_REGS] = {
- { "pc", XT_PC_REG_NUM_BASE /*+XT_DEBUGLEVEL*/, XT_REG_SPECIAL, 0 }, /* actually epc[debuglevel] */
- { "ar0", 0x00, XT_REG_GENERAL, 0 },
- { "ar1", 0x01, XT_REG_GENERAL, 0 },
- { "ar2", 0x02, XT_REG_GENERAL, 0 },
- { "ar3", 0x03, XT_REG_GENERAL, 0 },
- { "ar4", 0x04, XT_REG_GENERAL, 0 },
- { "ar5", 0x05, XT_REG_GENERAL, 0 },
- { "ar6", 0x06, XT_REG_GENERAL, 0 },
- { "ar7", 0x07, XT_REG_GENERAL, 0 },
- { "ar8", 0x08, XT_REG_GENERAL, 0 },
- { "ar9", 0x09, XT_REG_GENERAL, 0 },
- { "ar10", 0x0A, XT_REG_GENERAL, 0 },
- { "ar11", 0x0B, XT_REG_GENERAL, 0 },
- { "ar12", 0x0C, XT_REG_GENERAL, 0 },
- { "ar13", 0x0D, XT_REG_GENERAL, 0 },
- { "ar14", 0x0E, XT_REG_GENERAL, 0 },
- { "ar15", 0x0F, XT_REG_GENERAL, 0 },
- { "ar16", 0x10, XT_REG_GENERAL, 0 },
- { "ar17", 0x11, XT_REG_GENERAL, 0 },
- { "ar18", 0x12, XT_REG_GENERAL, 0 },
- { "ar19", 0x13, XT_REG_GENERAL, 0 },
- { "ar20", 0x14, XT_REG_GENERAL, 0 },
- { "ar21", 0x15, XT_REG_GENERAL, 0 },
- { "ar22", 0x16, XT_REG_GENERAL, 0 },
- { "ar23", 0x17, XT_REG_GENERAL, 0 },
- { "ar24", 0x18, XT_REG_GENERAL, 0 },
- { "ar25", 0x19, XT_REG_GENERAL, 0 },
- { "ar26", 0x1A, XT_REG_GENERAL, 0 },
- { "ar27", 0x1B, XT_REG_GENERAL, 0 },
- { "ar28", 0x1C, XT_REG_GENERAL, 0 },
- { "ar29", 0x1D, XT_REG_GENERAL, 0 },
- { "ar30", 0x1E, XT_REG_GENERAL, 0 },
- { "ar31", 0x1F, XT_REG_GENERAL, 0 },
- { "ar32", 0x20, XT_REG_GENERAL, 0 },
- { "ar33", 0x21, XT_REG_GENERAL, 0 },
- { "ar34", 0x22, XT_REG_GENERAL, 0 },
- { "ar35", 0x23, XT_REG_GENERAL, 0 },
- { "ar36", 0x24, XT_REG_GENERAL, 0 },
- { "ar37", 0x25, XT_REG_GENERAL, 0 },
- { "ar38", 0x26, XT_REG_GENERAL, 0 },
- { "ar39", 0x27, XT_REG_GENERAL, 0 },
- { "ar40", 0x28, XT_REG_GENERAL, 0 },
- { "ar41", 0x29, XT_REG_GENERAL, 0 },
- { "ar42", 0x2A, XT_REG_GENERAL, 0 },
- { "ar43", 0x2B, XT_REG_GENERAL, 0 },
- { "ar44", 0x2C, XT_REG_GENERAL, 0 },
- { "ar45", 0x2D, XT_REG_GENERAL, 0 },
- { "ar46", 0x2E, XT_REG_GENERAL, 0 },
- { "ar47", 0x2F, XT_REG_GENERAL, 0 },
- { "ar48", 0x30, XT_REG_GENERAL, 0 },
- { "ar49", 0x31, XT_REG_GENERAL, 0 },
- { "ar50", 0x32, XT_REG_GENERAL, 0 },
- { "ar51", 0x33, XT_REG_GENERAL, 0 },
- { "ar52", 0x34, XT_REG_GENERAL, 0 },
- { "ar53", 0x35, XT_REG_GENERAL, 0 },
- { "ar54", 0x36, XT_REG_GENERAL, 0 },
- { "ar55", 0x37, XT_REG_GENERAL, 0 },
- { "ar56", 0x38, XT_REG_GENERAL, 0 },
- { "ar57", 0x39, XT_REG_GENERAL, 0 },
- { "ar58", 0x3A, XT_REG_GENERAL, 0 },
- { "ar59", 0x3B, XT_REG_GENERAL, 0 },
- { "ar60", 0x3C, XT_REG_GENERAL, 0 },
- { "ar61", 0x3D, XT_REG_GENERAL, 0 },
- { "ar62", 0x3E, XT_REG_GENERAL, 0 },
- { "ar63", 0x3F, XT_REG_GENERAL, 0 },
- { "lbeg", 0x00, XT_REG_SPECIAL, 0 },
- { "lend", 0x01, XT_REG_SPECIAL, 0 },
- { "lcount", 0x02, XT_REG_SPECIAL, 0 },
- { "sar", 0x03, XT_REG_SPECIAL, 0 },
- { "windowbase", 0x48, XT_REG_SPECIAL, 0 },
- { "windowstart", 0x49, XT_REG_SPECIAL, 0 },
- { "configid0", 0xB0, XT_REG_SPECIAL, 0 },
- { "configid1", 0xD0, XT_REG_SPECIAL, 0 },
- { "ps", 0xC6, XT_REG_SPECIAL, 0 }, /* actually EPS[debuglevel] */
- { "threadptr", 0xE7, XT_REG_USER, 0 },
- { "br", 0x04, XT_REG_SPECIAL, 0 },
- { "scompare1", 0x0C, XT_REG_SPECIAL, 0 },
- { "acclo", 0x10, XT_REG_SPECIAL, 0 },
- { "acchi", 0x11, XT_REG_SPECIAL, 0 },
- { "m0", 0x20, XT_REG_SPECIAL, 0 },
- { "m1", 0x21, XT_REG_SPECIAL, 0 },
- { "m2", 0x22, XT_REG_SPECIAL, 0 },
- { "m3", 0x23, XT_REG_SPECIAL, 0 },
- { "f0", 0x00, XT_REG_FR, XT_REGF_COPROC0 },
- { "f1", 0x01, XT_REG_FR, XT_REGF_COPROC0 },
- { "f2", 0x02, XT_REG_FR, XT_REGF_COPROC0 },
- { "f3", 0x03, XT_REG_FR, XT_REGF_COPROC0 },
- { "f4", 0x04, XT_REG_FR, XT_REGF_COPROC0 },
- { "f5", 0x05, XT_REG_FR, XT_REGF_COPROC0 },
- { "f6", 0x06, XT_REG_FR, XT_REGF_COPROC0 },
- { "f7", 0x07, XT_REG_FR, XT_REGF_COPROC0 },
- { "f8", 0x08, XT_REG_FR, XT_REGF_COPROC0 },
- { "f9", 0x09, XT_REG_FR, XT_REGF_COPROC0 },
- { "f10", 0x0A, XT_REG_FR, XT_REGF_COPROC0 },
- { "f11", 0x0B, XT_REG_FR, XT_REGF_COPROC0 },
- { "f12", 0x0C, XT_REG_FR, XT_REGF_COPROC0 },
- { "f13", 0x0D, XT_REG_FR, XT_REGF_COPROC0 },
- { "f14", 0x0E, XT_REG_FR, XT_REGF_COPROC0 },
- { "f15", 0x0F, XT_REG_FR, XT_REGF_COPROC0 },
- { "fcr", 0xE8, XT_REG_USER, XT_REGF_COPROC0 },
- { "fsr", 0xE9, XT_REG_USER, XT_REGF_COPROC0 },
- { "mmid", 0x59, XT_REG_SPECIAL, XT_REGF_NOREAD },
- { "ibreakenable", 0x60, XT_REG_SPECIAL, 0 },
- { "memctl", 0x61, XT_REG_SPECIAL, 0 },
- { "atomctl", 0x63, XT_REG_SPECIAL, 0 },
- { "ibreaka0", 0x80, XT_REG_SPECIAL, 0 },
- { "ibreaka1", 0x81, XT_REG_SPECIAL, 0 },
- { "dbreaka0", 0x90, XT_REG_SPECIAL, 0 },
- { "dbreaka1", 0x91, XT_REG_SPECIAL, 0 },
- { "dbreakc0", 0xA0, XT_REG_SPECIAL, 0 },
- { "dbreakc1", 0xA1, XT_REG_SPECIAL, 0 },
- { "epc1", 0xB1, XT_REG_SPECIAL, 0 },
- { "epc2", 0xB2, XT_REG_SPECIAL, 0 },
- { "epc3", 0xB3, XT_REG_SPECIAL, 0 },
- { "epc4", 0xB4, XT_REG_SPECIAL, 0 },
- { "epc5", 0xB5, XT_REG_SPECIAL, 0 },
- { "epc6", 0xB6, XT_REG_SPECIAL, 0 },
- { "epc7", 0xB7, XT_REG_SPECIAL, 0 },
- { "depc", 0xC0, XT_REG_SPECIAL, 0 },
- { "eps2", 0xC2, XT_REG_SPECIAL, 0 },
- { "eps3", 0xC3, XT_REG_SPECIAL, 0 },
- { "eps4", 0xC4, XT_REG_SPECIAL, 0 },
- { "eps5", 0xC5, XT_REG_SPECIAL, 0 },
- { "eps6", 0xC6, XT_REG_SPECIAL, 0 },
- { "eps7", 0xC7, XT_REG_SPECIAL, 0 },
- { "excsave1", 0xD1, XT_REG_SPECIAL, 0 },
- { "excsave2", 0xD2, XT_REG_SPECIAL, 0 },
- { "excsave3", 0xD3, XT_REG_SPECIAL, 0 },
- { "excsave4", 0xD4, XT_REG_SPECIAL, 0 },
- { "excsave5", 0xD5, XT_REG_SPECIAL, 0 },
- { "excsave6", 0xD6, XT_REG_SPECIAL, 0 },
- { "excsave7", 0xD7, XT_REG_SPECIAL, 0 },
- { "cpenable", 0xE0, XT_REG_SPECIAL, 0 },
- { "interrupt", 0xE2, XT_REG_SPECIAL, 0 },
- { "intset", 0xE2, XT_REG_SPECIAL, XT_REGF_NOREAD },
- { "intclear", 0xE3, XT_REG_SPECIAL, XT_REGF_NOREAD },
- { "intenable", 0xE4, XT_REG_SPECIAL, 0 },
- { "vecbase", 0xE7, XT_REG_SPECIAL, 0 },
- { "exccause", 0xE8, XT_REG_SPECIAL, 0 },
- { "debugcause", 0xE9, XT_REG_SPECIAL, 0 },
- { "ccount", 0xEA, XT_REG_SPECIAL, 0 },
- { "prid", 0xEB, XT_REG_SPECIAL, 0 },
- { "icount", 0xEC, XT_REG_SPECIAL, 0 },
- { "icountlevel", 0xED, XT_REG_SPECIAL, 0 },
- { "excvaddr", 0xEE, XT_REG_SPECIAL, 0 },
- { "ccompare0", 0xF0, XT_REG_SPECIAL, 0 },
- { "ccompare1", 0xF1, XT_REG_SPECIAL, 0 },
- { "ccompare2", 0xF2, XT_REG_SPECIAL, 0 },
- { "misc0", 0xF4, XT_REG_SPECIAL, 0 },
- { "misc1", 0xF5, XT_REG_SPECIAL, 0 },
- { "misc2", 0xF6, XT_REG_SPECIAL, 0 },
- { "misc3", 0xF7, XT_REG_SPECIAL, 0 },
- { "litbase", 0x05, XT_REG_SPECIAL, 0 },
- { "ptevaddr", 0x53, XT_REG_SPECIAL, 0 },
- { "rasid", 0x5A, XT_REG_SPECIAL, 0 },
- { "itlbcfg", 0x5B, XT_REG_SPECIAL, 0 },
- { "dtlbcfg", 0x5C, XT_REG_SPECIAL, 0 },
- { "mepc", 0x6A, XT_REG_SPECIAL, 0 },
- { "meps", 0x6B, XT_REG_SPECIAL, 0 },
- { "mesave", 0x6C, XT_REG_SPECIAL, 0 },
- { "mesr", 0x6D, XT_REG_SPECIAL, 0 },
- { "mecr", 0x6E, XT_REG_SPECIAL, 0 },
- { "mevaddr", 0x6F, XT_REG_SPECIAL, 0 },
- { "a0", XT_REG_IDX_AR0, XT_REG_RELGEN, 0 }, /* WARNING: For these registers, regnum points to the */
- { "a1", XT_REG_IDX_AR1, XT_REG_RELGEN, 0 }, /* index of the corresponding ARxregisters, NOT to */
- { "a2", XT_REG_IDX_AR2, XT_REG_RELGEN, 0 }, /* the processor register number! */
- { "a3", XT_REG_IDX_AR3, XT_REG_RELGEN, 0 },
- { "a4", XT_REG_IDX_AR4, XT_REG_RELGEN, 0 },
- { "a5", XT_REG_IDX_AR5, XT_REG_RELGEN, 0 },
- { "a6", XT_REG_IDX_AR6, XT_REG_RELGEN, 0 },
- { "a7", XT_REG_IDX_AR7, XT_REG_RELGEN, 0 },
- { "a8", XT_REG_IDX_AR8, XT_REG_RELGEN, 0 },
- { "a9", XT_REG_IDX_AR9, XT_REG_RELGEN, 0 },
- { "a10", XT_REG_IDX_AR10, XT_REG_RELGEN, 0 },
- { "a11", XT_REG_IDX_AR11, XT_REG_RELGEN, 0 },
- { "a12", XT_REG_IDX_AR12, XT_REG_RELGEN, 0 },
- { "a13", XT_REG_IDX_AR13, XT_REG_RELGEN, 0 },
- { "a14", XT_REG_IDX_AR14, XT_REG_RELGEN, 0 },
- { "a15", XT_REG_IDX_AR15, XT_REG_RELGEN, 0 },
-
- { "pwrctl", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pwrstat", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "eristat", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "cs_itctrl", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "cs_claimset", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "cs_claimclr", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "cs_lockaccess", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "cs_lockstatus", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "cs_authstatus", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "fault_info", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_id", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_ctrl", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_stat", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_data", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_addr", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_pctrigger", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_pcmatch", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_delay", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_memstart", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "trax_memend", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pmg", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pmoc", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pm0", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pm1", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pmctrl0", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pmctrl1", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pmstat0", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "pmstat1", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "ocd_id", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "ocd_dcrclr", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "ocd_dcrset", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "ocd_dsr", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
- { "ddr", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD },
+#define XT_PS_REG_NUM_BASE (0xc0U) /* (EPS2 - 2), for adding DBGLEVEL */
+#define XT_PC_REG_NUM_BASE (0xb0U) /* (EPC1 - 1), for adding DBGLEVEL */
+#define XT_PC_REG_NUM_VIRTUAL (0xffU) /* Marker for computing PC (EPC[DBGLEVEL) */
+#define XT_PC_DBREG_NUM_BASE (0x20U) /* External (i.e., GDB) access */
+
+#define XT_SW_BREAKPOINTS_MAX_NUM 32
+#define XT_HW_IBREAK_MAX_NUM 2
+#define XT_HW_DBREAK_MAX_NUM 2
+
+struct xtensa_reg_desc xtensa_regs[XT_NUM_REGS] = {
+ XT_MK_REG_DESC("pc", XT_PC_REG_NUM_VIRTUAL, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("ar0", 0x00, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar1", 0x01, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar2", 0x02, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar3", 0x03, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar4", 0x04, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar5", 0x05, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar6", 0x06, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar7", 0x07, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar8", 0x08, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar9", 0x09, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar10", 0x0A, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar11", 0x0B, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar12", 0x0C, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar13", 0x0D, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar14", 0x0E, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar15", 0x0F, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar16", 0x10, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar17", 0x11, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar18", 0x12, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar19", 0x13, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar20", 0x14, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar21", 0x15, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar22", 0x16, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar23", 0x17, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar24", 0x18, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar25", 0x19, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar26", 0x1A, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar27", 0x1B, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar28", 0x1C, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar29", 0x1D, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar30", 0x1E, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar31", 0x1F, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar32", 0x20, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar33", 0x21, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar34", 0x22, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar35", 0x23, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar36", 0x24, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar37", 0x25, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar38", 0x26, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar39", 0x27, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar40", 0x28, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar41", 0x29, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar42", 0x2A, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar43", 0x2B, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar44", 0x2C, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar45", 0x2D, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar46", 0x2E, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar47", 0x2F, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar48", 0x30, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar49", 0x31, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar50", 0x32, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar51", 0x33, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar52", 0x34, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar53", 0x35, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar54", 0x36, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar55", 0x37, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar56", 0x38, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar57", 0x39, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar58", 0x3A, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar59", 0x3B, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar60", 0x3C, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar61", 0x3D, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar62", 0x3E, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("ar63", 0x3F, XT_REG_GENERAL, 0),
+ XT_MK_REG_DESC("windowbase", 0x48, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("windowstart", 0x49, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("ps", 0xE6, XT_REG_SPECIAL, 0), /* PS (not mapped through EPS[]) */
+ XT_MK_REG_DESC("ibreakenable", 0x60, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("ddr", 0x68, XT_REG_DEBUG, XT_REGF_NOREAD),
+ XT_MK_REG_DESC("ibreaka0", 0x80, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("ibreaka1", 0x81, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("dbreaka0", 0x90, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("dbreaka1", 0x91, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("dbreakc0", 0xA0, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("dbreakc1", 0xA1, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("cpenable", 0xE0, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("exccause", 0xE8, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("debugcause", 0xE9, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("icount", 0xEC, XT_REG_SPECIAL, 0),
+ XT_MK_REG_DESC("icountlevel", 0xED, XT_REG_SPECIAL, 0),
+
+ /* WARNING: For these registers, regnum points to the
+ * index of the corresponding ARx registers, NOT to
+ * the processor register number! */
+ XT_MK_REG_DESC("a0", XT_REG_IDX_AR0, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a1", XT_REG_IDX_AR1, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a2", XT_REG_IDX_AR2, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a3", XT_REG_IDX_AR3, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a4", XT_REG_IDX_AR4, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a5", XT_REG_IDX_AR5, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a6", XT_REG_IDX_AR6, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a7", XT_REG_IDX_AR7, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a8", XT_REG_IDX_AR8, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a9", XT_REG_IDX_AR9, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a10", XT_REG_IDX_AR10, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a11", XT_REG_IDX_AR11, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a12", XT_REG_IDX_AR12, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a13", XT_REG_IDX_AR13, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a14", XT_REG_IDX_AR14, XT_REG_RELGEN, 0),
+ XT_MK_REG_DESC("a15", XT_REG_IDX_AR15, XT_REG_RELGEN, 0),
};
-
/**
* Types of memory used at xtensa target
*/
@@ -357,11 +289,27 @@ enum xtensa_mem_region_type {
XTENSA_MEM_REG_IRAM,
XTENSA_MEM_REG_DROM,
XTENSA_MEM_REG_DRAM,
- XTENSA_MEM_REG_URAM,
- XTENSA_MEM_REG_XLMI,
+ XTENSA_MEM_REG_SRAM,
+ XTENSA_MEM_REG_SROM,
XTENSA_MEM_REGS_NUM
};
+/* Register definition as union for list allocation */
+union xtensa_reg_val_u {
+ xtensa_reg_val_t val;
+ uint8_t buf[4];
+};
+
+static const struct xtensa_keyval_info_s xt_qerr[XT_QERR_NUM] = {
+ { .chrval = "E00", .intval = ERROR_FAIL },
+ { .chrval = "E01", .intval = ERROR_FAIL },
+ { .chrval = "E02", .intval = ERROR_COMMAND_ARGUMENT_INVALID },
+ { .chrval = "E03", .intval = ERROR_FAIL },
+};
+
+/* Set to true for extra debug logging */
+static const bool xtensa_extra_debug_log;
+
/**
* Gets a config for the specific mem type
*/
@@ -378,10 +326,10 @@ static inline const struct xtensa_local_mem_config *xtensa_get_mem_config(
return &xtensa->core_config->drom;
case XTENSA_MEM_REG_DRAM:
return &xtensa->core_config->dram;
- case XTENSA_MEM_REG_URAM:
- return &xtensa->core_config->uram;
- case XTENSA_MEM_REG_XLMI:
- return &xtensa->core_config->xlmi;
+ case XTENSA_MEM_REG_SRAM:
+ return &xtensa->core_config->sram;
+ case XTENSA_MEM_REG_SROM:
+ return &xtensa->core_config->srom;
default:
return NULL;
}
@@ -424,14 +372,47 @@ static inline const struct xtensa_local_mem_region_config *xtensa_target_memory_
return NULL;
}
+static inline bool xtensa_is_cacheable(const struct xtensa_cache_config *cache,
+ const struct xtensa_local_mem_config *mem,
+ target_addr_t address)
+{
+ if (!cache->size)
+ return false;
+ return xtensa_memory_region_find(mem, address);
+}
+
+static inline bool xtensa_is_icacheable(struct xtensa *xtensa, target_addr_t address)
+{
+ return xtensa_is_cacheable(&xtensa->core_config->icache, &xtensa->core_config->iram, address) ||
+ xtensa_is_cacheable(&xtensa->core_config->icache, &xtensa->core_config->irom, address) ||
+ xtensa_is_cacheable(&xtensa->core_config->icache, &xtensa->core_config->sram, address) ||
+ xtensa_is_cacheable(&xtensa->core_config->icache, &xtensa->core_config->srom, address);
+}
+
+static inline bool xtensa_is_dcacheable(struct xtensa *xtensa, target_addr_t address)
+{
+ return xtensa_is_cacheable(&xtensa->core_config->dcache, &xtensa->core_config->dram, address) ||
+ xtensa_is_cacheable(&xtensa->core_config->dcache, &xtensa->core_config->drom, address) ||
+ xtensa_is_cacheable(&xtensa->core_config->dcache, &xtensa->core_config->sram, address) ||
+ xtensa_is_cacheable(&xtensa->core_config->dcache, &xtensa->core_config->srom, address);
+}
+
static int xtensa_core_reg_get(struct reg *reg)
{
- /*We don't need this because we read all registers on halt anyway. */
+ /* We don't need this because we read all registers on halt anyway. */
struct xtensa *xtensa = (struct xtensa *)reg->arch_info;
struct target *target = xtensa->target;
if (target->state != TARGET_HALTED)
return ERROR_TARGET_NOT_HALTED;
+ if (!reg->exist) {
+ if (strncmp(reg->name, "?0x", 3) == 0) {
+ unsigned int regnum = strtoul(reg->name + 1, 0, 0);
+ LOG_WARNING("Read unknown register 0x%04x ignored", regnum);
+ return ERROR_OK;
+ }
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
return ERROR_OK;
}
@@ -444,7 +425,31 @@ static int xtensa_core_reg_set(struct reg *reg, uint8_t *buf)
if (target->state != TARGET_HALTED)
return ERROR_TARGET_NOT_HALTED;
+ if (!reg->exist) {
+ if (strncmp(reg->name, "?0x", 3) == 0) {
+ unsigned int regnum = strtoul(reg->name + 1, 0, 0);
+ LOG_WARNING("Write unknown register 0x%04x ignored", regnum);
+ return ERROR_OK;
+ }
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
buf_cpy(buf, reg->value, reg->size);
+
+ if (xtensa->core_config->windowed) {
+ /* If the user updates a potential scratch register, track for conflicts */
+ for (enum xtensa_ar_scratch_set_e s = 0; s < XT_AR_SCRATCH_NUM; s++) {
+ if (strcmp(reg->name, xtensa->scratch_ars[s].chrval) == 0) {
+ LOG_DEBUG("Scratch reg %s [0x%08" PRIx32 "] set from gdb", reg->name,
+ buf_get_u32(reg->value, 0, 32));
+ LOG_DEBUG("scratch_ars mapping: a3/%s, a4/%s",
+ xtensa->scratch_ars[XT_AR_SCRATCH_AR3].chrval,
+ xtensa->scratch_ars[XT_AR_SCRATCH_AR4].chrval);
+ xtensa->scratch_ars[s].intval = true;
+ break;
+ }
+ }
+ }
reg->dirty = true;
reg->valid = true;
@@ -456,26 +461,13 @@ static const struct reg_arch_type xtensa_reg_type = {
.set = xtensa_core_reg_set,
};
-const struct reg_arch_type xtensa_user_reg_u32_type = {
- .get = xtensa_core_reg_get,
- .set = xtensa_core_reg_set,
-};
-
-const struct reg_arch_type xtensa_user_reg_u128_type = {
- .get = xtensa_core_reg_get,
- .set = xtensa_core_reg_set,
-};
-
-static inline size_t xtensa_insn_size_get(uint32_t insn)
-{
- return insn & BIT(3) ? 2 : XT_ISNS_SZ_MAX;
-}
-
/* Convert a register index that's indexed relative to windowbase, to the real address. */
-static enum xtensa_reg_id xtensa_windowbase_offset_to_canonical(enum xtensa_reg_id reg_idx, int windowbase)
+static enum xtensa_reg_id xtensa_windowbase_offset_to_canonical(struct xtensa *xtensa,
+ enum xtensa_reg_id reg_idx,
+ int windowbase)
{
unsigned int idx;
- if (reg_idx >= XT_REG_IDX_AR0 && reg_idx <= XT_REG_IDX_AR63) {
+ if (reg_idx >= XT_REG_IDX_AR0 && reg_idx <= XT_REG_IDX_ARLAST) {
idx = reg_idx - XT_REG_IDX_AR0;
} else if (reg_idx >= XT_REG_IDX_A0 && reg_idx <= XT_REG_IDX_A15) {
idx = reg_idx - XT_REG_IDX_A0;
@@ -483,12 +475,14 @@ static enum xtensa_reg_id xtensa_windowbase_offset_to_canonical(enum xtensa_reg_
LOG_ERROR("Error: can't convert register %d to non-windowbased register!", reg_idx);
return -1;
}
- return ((idx + windowbase * 4) & 63) + XT_REG_IDX_AR0;
+ return ((idx + windowbase * 4) & (xtensa->core_config->aregs_num - 1)) + XT_REG_IDX_AR0;
}
-static enum xtensa_reg_id xtensa_canonical_to_windowbase_offset(enum xtensa_reg_id reg_idx, int windowbase)
+static enum xtensa_reg_id xtensa_canonical_to_windowbase_offset(struct xtensa *xtensa,
+ enum xtensa_reg_id reg_idx,
+ int windowbase)
{
- return xtensa_windowbase_offset_to_canonical(reg_idx, -windowbase);
+ return xtensa_windowbase_offset_to_canonical(xtensa, reg_idx, -windowbase);
}
static void xtensa_mark_register_dirty(struct xtensa *xtensa, enum xtensa_reg_id reg_idx)
@@ -497,36 +491,78 @@ static void xtensa_mark_register_dirty(struct xtensa *xtensa, enum xtensa_reg_id
reg_list[reg_idx].dirty = true;
}
-static int xtensa_queue_dbg_reg_read(struct xtensa *xtensa, unsigned int reg, uint8_t *data)
+static void xtensa_queue_exec_ins(struct xtensa *xtensa, uint32_t ins)
{
- struct xtensa_debug_module *dm = &xtensa->dbg_mod;
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DIR0EXEC, ins);
+}
- if (!xtensa->core_config->trace.enabled &&
- (reg <= NARADR_MEMADDREND || (reg >= NARADR_PMG && reg <= NARADR_PMSTAT7))) {
- LOG_ERROR("Can not access %u reg when Trace Port option disabled!", reg);
- return ERROR_FAIL;
+static void xtensa_queue_exec_ins_wide(struct xtensa *xtensa, uint8_t *ops, uint8_t oplen)
+{
+ const int max_oplen = 64; /* 8 DIRx regs: max width 64B */
+ if ((oplen > 0) && (oplen <= max_oplen)) {
+ uint8_t ops_padded[max_oplen];
+ memcpy(ops_padded, ops, oplen);
+ memset(ops_padded + oplen, 0, max_oplen - oplen);
+ unsigned int oplenw = DIV_ROUND_UP(oplen, sizeof(uint32_t));
+ for (int32_t i = oplenw - 1; i > 0; i--)
+ xtensa_queue_dbg_reg_write(xtensa,
+ XDMREG_DIR0 + i,
+ target_buffer_get_u32(xtensa->target, &ops_padded[sizeof(uint32_t)*i]));
+ /* Write DIR0EXEC last */
+ xtensa_queue_dbg_reg_write(xtensa,
+ XDMREG_DIR0EXEC,
+ target_buffer_get_u32(xtensa->target, &ops_padded[0]));
}
- return dm->dbg_ops->queue_reg_read(dm, reg, data);
}
-static int xtensa_queue_dbg_reg_write(struct xtensa *xtensa, unsigned int reg, uint32_t data)
+static int xtensa_queue_pwr_reg_write(struct xtensa *xtensa, unsigned int reg, uint32_t data)
{
struct xtensa_debug_module *dm = &xtensa->dbg_mod;
+ return dm->pwr_ops->queue_reg_write(dm, reg, data);
+}
- if (!xtensa->core_config->trace.enabled &&
- (reg <= NARADR_MEMADDREND || (reg >= NARADR_PMG && reg <= NARADR_PMSTAT7))) {
- LOG_ERROR("Can not access %u reg when Trace Port option disabled!", reg);
- return ERROR_FAIL;
+/* NOTE: Assumes A3 has already been saved */
+static int xtensa_window_state_save(struct target *target, uint32_t *woe)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ int woe_dis;
+ uint8_t woe_buf[4];
+
+ if (xtensa->core_config->windowed) {
+ /* Save PS (LX) and disable window overflow exceptions prior to AR save */
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_PS, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, woe_buf);
+ int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to read PS (%d)!", res);
+ return res;
+ }
+ xtensa_core_status_check(target);
+ *woe = buf_get_u32(woe_buf, 0, 32);
+ woe_dis = *woe & ~XT_PS_WOE_MSK;
+ LOG_DEBUG("Clearing PS.WOE (0x%08" PRIx32 " -> 0x%08" PRIx32 ")", *woe, woe_dis);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, woe_dis);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_PS, XT_REG_A3));
}
- return dm->dbg_ops->queue_reg_write(dm, reg, data);
+ return ERROR_OK;
}
-static void xtensa_queue_exec_ins(struct xtensa *xtensa, uint32_t ins)
+/* NOTE: Assumes A3 has already been saved */
+static void xtensa_window_state_restore(struct target *target, uint32_t woe)
{
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DIR0EXEC, ins);
+ struct xtensa *xtensa = target_to_xtensa(target);
+ if (xtensa->core_config->windowed) {
+ /* Restore window overflow exception state */
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, woe);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_PS, XT_REG_A3));
+ LOG_DEBUG("Restored PS.WOE (0x%08" PRIx32 ")", woe);
+ }
}
-static bool xtensa_reg_is_readable(enum xtensa_reg_flags flags, xtensa_reg_val_t cpenable)
+static bool xtensa_reg_is_readable(int flags, int cpenable)
{
if (flags & XT_REGF_NOREAD)
return false;
@@ -535,69 +571,17 @@ static bool xtensa_reg_is_readable(enum xtensa_reg_flags flags, xtensa_reg_val_t
return true;
}
-static int xtensa_queue_pwr_reg_write(struct xtensa *xtensa, unsigned int reg, uint32_t data)
+static bool xtensa_scratch_regs_fixup(struct xtensa *xtensa, struct reg *reg_list, int i, int j, int a_idx, int ar_idx)
{
- struct xtensa_debug_module *dm = &xtensa->dbg_mod;
- return dm->pwr_ops->queue_reg_write(dm, reg, data);
-}
-
-static bool xtensa_special_reg_exists(struct xtensa *xtensa, enum xtensa_reg_id reg_idx)
-{
- /* TODO: array of size XT_NUM_REGS can be used here to map special register ID to
- * corresponding config option 'enabled' flag */
- if (reg_idx >= XT_REG_IDX_LBEG && reg_idx <= XT_REG_IDX_LCOUNT)
- return xtensa->core_config->loop;
- else if (reg_idx == XT_REG_IDX_BR)
- return xtensa->core_config->boolean;
- else if (reg_idx == XT_REG_IDX_LITBASE)
- return xtensa->core_config->ext_l32r;
- else if (reg_idx == XT_REG_IDX_SCOMPARE1 || reg_idx == XT_REG_IDX_ATOMCTL)
- return xtensa->core_config->cond_store;
- else if (reg_idx >= XT_REG_IDX_ACCLO && reg_idx <= XT_REG_IDX_M3)
- return xtensa->core_config->mac16;
- else if (reg_idx == XT_REG_IDX_WINDOWBASE || reg_idx == XT_REG_IDX_WINDOWSTART)
- return xtensa->core_config->windowed;
- else if (reg_idx >= XT_REG_IDX_PTEVADDR && reg_idx <= XT_REG_IDX_DTLBCFG)
- return xtensa->core_config->mmu.enabled;
- else if (reg_idx == XT_REG_IDX_MMID)
- return xtensa->core_config->trace.enabled;
- else if (reg_idx >= XT_REG_IDX_MEPC && reg_idx <= XT_REG_IDX_MEVADDR)
- return xtensa->core_config->mem_err_check;
- else if (reg_idx == XT_REG_IDX_CPENABLE)
- return xtensa->core_config->coproc;
- else if (reg_idx == XT_REG_IDX_VECBASE)
- return xtensa->core_config->reloc_vec;
- else if (reg_idx == XT_REG_IDX_CCOUNT)
- return xtensa->core_config->tim_irq.enabled;
- else if (reg_idx >= XT_REG_IDX_CCOMPARE0 && reg_idx <= XT_REG_IDX_CCOMPARE2)
- return xtensa->core_config->tim_irq.enabled &&
- (reg_idx - XT_REG_IDX_CCOMPARE0 < xtensa->core_config->tim_irq.comp_num);
- else if (reg_idx == XT_REG_IDX_PRID)
- return xtensa->core_config->proc_id;
- else if (reg_idx >= XT_REG_IDX_MISC0 && reg_idx <= XT_REG_IDX_MISC3)
- return reg_idx - XT_REG_IDX_MISC0 < xtensa->core_config->miscregs_num;
- return true;
-}
-
-static bool xtensa_user_reg_exists(struct xtensa *xtensa, enum xtensa_reg_id reg_idx)
-{
- if (reg_idx == XT_REG_IDX_THREADPTR)
- return xtensa->core_config->threadptr;
- if (reg_idx == XT_REG_IDX_FCR || reg_idx == XT_REG_IDX_FSR)
- return xtensa->core_config->fp_coproc;
- return false;
-}
-
-static inline bool xtensa_fp_reg_exists(struct xtensa *xtensa, enum xtensa_reg_id reg_idx)
-{
- return xtensa->core_config->fp_coproc;
-}
-
-static inline bool xtensa_regular_reg_exists(struct xtensa *xtensa, enum xtensa_reg_id reg_idx)
-{
- if (reg_idx >= XT_REG_IDX_AR0 && reg_idx <= XT_REG_IDX_AR63)
- return reg_idx - XT_REG_IDX_AR0 < xtensa->core_config->aregs_num;
- return true;
+ int a_name = (a_idx == XT_AR_SCRATCH_A3) ? 3 : 4;
+ if (xtensa->scratch_ars[a_idx].intval && !xtensa->scratch_ars[ar_idx].intval) {
+ LOG_DEBUG("AR conflict: a%d -> ar%d", a_name, j - XT_REG_IDX_AR0);
+ memcpy(reg_list[j].value, reg_list[i].value, sizeof(xtensa_reg_val_t));
+ } else {
+ LOG_DEBUG("AR conflict: ar%d -> a%d", j - XT_REG_IDX_AR0, a_name);
+ memcpy(reg_list[i].value, reg_list[j].value, sizeof(xtensa_reg_val_t));
+ }
+ return xtensa->scratch_ars[a_idx].intval && xtensa->scratch_ars[ar_idx].intval;
}
static int xtensa_write_dirty_registers(struct target *target)
@@ -605,45 +589,50 @@ static int xtensa_write_dirty_registers(struct target *target)
struct xtensa *xtensa = target_to_xtensa(target);
int res;
xtensa_reg_val_t regval, windowbase = 0;
- bool scratch_reg_dirty = false;
+ bool scratch_reg_dirty = false, delay_cpenable = false;
struct reg *reg_list = xtensa->core_cache->reg_list;
+ unsigned int reg_list_size = xtensa->core_cache->num_regs;
+ bool preserve_a3 = false;
+ uint8_t a3_buf[4];
+ xtensa_reg_val_t a3 = 0, woe;
LOG_TARGET_DEBUG(target, "start");
- /*We need to write the dirty registers in the cache list back to the processor.
- *Start by writing the SFR/user registers. */
- for (unsigned int i = 0; i < XT_NUM_REGS; i++) {
+ /* We need to write the dirty registers in the cache list back to the processor.
+ * Start by writing the SFR/user registers. */
+ for (unsigned int i = 0; i < reg_list_size; i++) {
+ struct xtensa_reg_desc *rlist = (i < XT_NUM_REGS) ? xtensa_regs : xtensa->optregs;
+ unsigned int ridx = (i < XT_NUM_REGS) ? i : i - XT_NUM_REGS;
if (reg_list[i].dirty) {
- if (xtensa_regs[i].type == XT_REG_SPECIAL ||
- xtensa_regs[i].type == XT_REG_USER ||
- xtensa_regs[i].type == XT_REG_FR) {
+ if (rlist[ridx].type == XT_REG_SPECIAL ||
+ rlist[ridx].type == XT_REG_USER ||
+ rlist[ridx].type == XT_REG_FR) {
scratch_reg_dirty = true;
+ if (i == XT_REG_IDX_CPENABLE) {
+ delay_cpenable = true;
+ continue;
+ }
regval = xtensa_reg_get(target, i);
- LOG_TARGET_DEBUG(target, "Writing back reg %s val %08" PRIX32,
- xtensa_regs[i].name,
+ LOG_TARGET_DEBUG(target, "Writing back reg %s (%d) val %08" PRIX32,
+ reg_list[i].name,
+ rlist[ridx].reg_num,
regval);
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, regval);
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(XT_SR_DDR, XT_REG_A3));
- if (xtensa_regs[i].type == XT_REG_USER) {
- if (reg_list[i].exist)
- xtensa_queue_exec_ins(xtensa,
- XT_INS_WUR(xtensa_regs[i].reg_num,
- XT_REG_A3));
- } else if (xtensa_regs[i].type == XT_REG_FR) {
- if (reg_list[i].exist)
- xtensa_queue_exec_ins(xtensa,
- XT_INS_WFR(xtensa_regs[i].reg_num,
- XT_REG_A3));
- } else {/*SFR */
- if (reg_list[i].exist) {
- unsigned int reg_num = xtensa_regs[i].reg_num;
- if (reg_num == XT_PC_REG_NUM_BASE)
- /* reg number of PC for debug interrupt
- * depends on NDEBUGLEVEL */
- reg_num += xtensa->core_config->debug.irq_level;
-
- xtensa_queue_exec_ins(xtensa,
- XT_INS_WSR(reg_num, XT_REG_A3));
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, regval);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ if (reg_list[i].exist) {
+ unsigned int reg_num = rlist[ridx].reg_num;
+ if (rlist[ridx].type == XT_REG_USER) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_WUR(xtensa, reg_num, XT_REG_A3));
+ } else if (rlist[ridx].type == XT_REG_FR) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_WFR(xtensa, reg_num, XT_REG_A3));
+ } else {/*SFR */
+ if (reg_num == XT_PC_REG_NUM_VIRTUAL)
+ /* reg number of PC for debug interrupt depends on NDEBUGLEVEL
+ **/
+ reg_num =
+ (XT_PC_REG_NUM_BASE +
+ xtensa->core_config->debug.irq_level);
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, reg_num, XT_REG_A3));
}
}
reg_list[i].dirty = false;
@@ -652,31 +641,66 @@ static int xtensa_write_dirty_registers(struct target *target)
}
if (scratch_reg_dirty)
xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
+ if (delay_cpenable) {
+ regval = xtensa_reg_get(target, XT_REG_IDX_CPENABLE);
+ LOG_TARGET_DEBUG(target, "Writing back reg cpenable (224) val %08" PRIX32, regval);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, regval);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa,
+ xtensa_regs[XT_REG_IDX_CPENABLE].reg_num,
+ XT_REG_A3));
+ reg_list[XT_REG_IDX_CPENABLE].dirty = false;
+ }
- if (xtensa->core_config->user_regs_num > 0 &&
- xtensa->core_config->queue_write_dirty_user_regs)
- xtensa->core_config->queue_write_dirty_user_regs(target);
+ preserve_a3 = (xtensa->core_config->windowed);
+ if (preserve_a3) {
+ /* Save (windowed) A3 for scratch use */
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, a3_buf);
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ if (res != ERROR_OK)
+ return res;
+ xtensa_core_status_check(target);
+ a3 = buf_get_u32(a3_buf, 0, 32);
+ }
if (xtensa->core_config->windowed) {
- /*Grab the windowbase, we need it. */
+ res = xtensa_window_state_save(target, &woe);
+ if (res != ERROR_OK)
+ return res;
+ /* Grab the windowbase, we need it. */
windowbase = xtensa_reg_get(target, XT_REG_IDX_WINDOWBASE);
- /*Check if there are problems with both the ARx as well as the corresponding Rx
- * registers set and dirty. */
- /*Warn the user if this happens, not much else we can do... */
+ /* Check if there are mismatches between the ARx and corresponding Ax registers.
+ * When the user sets a register on a windowed config, xt-gdb may set the ARx
+ * register directly. Thus we take ARx as priority over Ax if both are dirty
+ * and it's unclear if the user set one over the other explicitly.
+ */
for (unsigned int i = XT_REG_IDX_A0; i <= XT_REG_IDX_A15; i++) {
- unsigned int j = xtensa_windowbase_offset_to_canonical(i, windowbase);
+ unsigned int j = xtensa_windowbase_offset_to_canonical(xtensa, i, windowbase);
if (reg_list[i].dirty && reg_list[j].dirty) {
- if (memcmp(reg_list[i].value, reg_list[j].value,
- sizeof(xtensa_reg_val_t)) != 0)
- LOG_WARNING(
- "Warning: Both A%d as well as the physical register it points to (AR%d) are dirty and differs in value. Results are undefined!",
- i - XT_REG_IDX_A0,
- j - XT_REG_IDX_AR0);
+ if (memcmp(reg_list[i].value, reg_list[j].value, sizeof(xtensa_reg_val_t)) != 0) {
+ bool show_warning = true;
+ if (i == XT_REG_IDX_A3)
+ show_warning = xtensa_scratch_regs_fixup(xtensa,
+ reg_list, i, j, XT_AR_SCRATCH_A3, XT_AR_SCRATCH_AR3);
+ else if (i == XT_REG_IDX_A4)
+ show_warning = xtensa_scratch_regs_fixup(xtensa,
+ reg_list, i, j, XT_AR_SCRATCH_A4, XT_AR_SCRATCH_AR4);
+ if (show_warning)
+ LOG_WARNING(
+ "Warning: Both A%d [0x%08" PRIx32
+ "] as well as its underlying physical register "
+ "(AR%d) [0x%08" PRIx32 "] are dirty and differ in value",
+ i - XT_REG_IDX_A0,
+ buf_get_u32(reg_list[i].value, 0, 32),
+ j - XT_REG_IDX_AR0,
+ buf_get_u32(reg_list[j].value, 0, 32));
+ }
}
}
}
- /*Write A0-A16 */
+ /* Write A0-A16. */
for (unsigned int i = 0; i < 16; i++) {
if (reg_list[XT_REG_IDX_A0 + i].dirty) {
regval = xtensa_reg_get(target, XT_REG_IDX_A0 + i);
@@ -684,22 +708,26 @@ static int xtensa_write_dirty_registers(struct target *target)
xtensa_regs[XT_REG_IDX_A0 + i].name,
regval,
xtensa_regs[XT_REG_IDX_A0 + i].reg_num);
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, regval);
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(XT_SR_DDR, i));
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, regval);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, i));
reg_list[XT_REG_IDX_A0 + i].dirty = false;
+ if (i == 3) {
+ /* Avoid stomping A3 during restore at end of function */
+ a3 = regval;
+ }
}
}
if (xtensa->core_config->windowed) {
- /*Now write AR0-AR63. */
- for (unsigned int j = 0; j < 64; j += 16) {
- /*Write the 16 registers we can see */
+ /* Now write AR registers */
+ for (unsigned int j = 0; j < XT_REG_IDX_ARLAST; j += 16) {
+ /* Write the 16 registers we can see */
for (unsigned int i = 0; i < 16; i++) {
if (i + j < xtensa->core_config->aregs_num) {
enum xtensa_reg_id realadr =
- xtensa_windowbase_offset_to_canonical(XT_REG_IDX_AR0 + i + j,
+ xtensa_windowbase_offset_to_canonical(xtensa, XT_REG_IDX_AR0 + i + j,
windowbase);
- /*Write back any dirty un-windowed registers */
+ /* Write back any dirty un-windowed registers */
if (reg_list[realadr].dirty) {
regval = xtensa_reg_get(target, realadr);
LOG_TARGET_DEBUG(
@@ -708,55 +736,38 @@ static int xtensa_write_dirty_registers(struct target *target)
xtensa_regs[realadr].name,
regval,
xtensa_regs[realadr].reg_num);
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, regval);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, regval);
xtensa_queue_exec_ins(xtensa,
- XT_INS_RSR(XT_SR_DDR, xtensa_regs[XT_REG_IDX_AR0 + i].reg_num));
+ XT_INS_RSR(xtensa, XT_SR_DDR,
+ xtensa_regs[XT_REG_IDX_AR0 + i].reg_num));
reg_list[realadr].dirty = false;
+ if ((i + j) == 3)
+ /* Avoid stomping AR during A3 restore at end of function */
+ a3 = regval;
}
}
}
/*Now rotate the window so we'll see the next 16 registers. The final rotate
* will wraparound, */
/*leaving us in the state we were. */
- xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(4));
+ xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, 4));
}
- }
- res = jtag_execute_queue();
- xtensa_core_status_check(target);
- return res;
-}
+ xtensa_window_state_restore(target, woe);
-int xtensa_queue_write_dirty_user_regs_u32(struct target *target)
-{
- struct xtensa *xtensa = target_to_xtensa(target);
- struct reg *reg_list = xtensa->core_cache->reg_list;
- xtensa_reg_val_t reg_val;
- bool scratch_reg_dirty = false;
-
- LOG_TARGET_DEBUG(target, "start");
+ for (enum xtensa_ar_scratch_set_e s = 0; s < XT_AR_SCRATCH_NUM; s++)
+ xtensa->scratch_ars[s].intval = false;
+ }
- /* We need to write the dirty registers in the cache list back to the processor.
- * Start by writing the SFR/user registers. */
- for (unsigned int i = 0; i < xtensa->core_config->user_regs_num; i++) {
- if (!reg_list[XT_USR_REG_START + i].dirty)
- continue;
- scratch_reg_dirty = true;
- reg_val = xtensa_reg_get(target, XT_USR_REG_START + i);
- LOG_TARGET_DEBUG(target, "Writing back reg %s val %08" PRIX32,
- xtensa->core_config->user_regs[i].name,
- reg_val);
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, reg_val);
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(XT_SR_DDR, XT_REG_A3));
- xtensa_queue_exec_ins(xtensa,
- XT_INS_WUR(xtensa->core_config->user_regs[i].reg_num,
- XT_REG_A3));
- reg_list[XT_USR_REG_START + i].dirty = false;
+ if (preserve_a3) {
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, a3);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
}
- if (scratch_reg_dirty)
- xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
- return ERROR_OK;
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ xtensa_core_status_check(target);
+
+ return res;
}
static inline bool xtensa_is_stopped(struct target *target)
@@ -768,14 +779,20 @@ static inline bool xtensa_is_stopped(struct target *target)
int xtensa_examine(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
- unsigned int cmd = PWRCTL_DEBUGWAKEUP | PWRCTL_MEMWAKEUP | PWRCTL_COREWAKEUP;
+ unsigned int cmd = PWRCTL_DEBUGWAKEUP(xtensa) | PWRCTL_MEMWAKEUP(xtensa) | PWRCTL_COREWAKEUP(xtensa);
LOG_DEBUG("coreid = %d", target->coreid);
- xtensa_queue_pwr_reg_write(xtensa, DMREG_PWRCTL, cmd);
- xtensa_queue_pwr_reg_write(xtensa, DMREG_PWRCTL, cmd | PWRCTL_JTAGDEBUGUSE);
+
+ if (xtensa->core_config->core_type == XT_UNDEF) {
+ LOG_ERROR("XTensa core not configured; is xtensa-core-openocd.cfg missing?");
+ return ERROR_FAIL;
+ }
+
+ xtensa_queue_pwr_reg_write(xtensa, XDMREG_PWRCTL, cmd);
+ xtensa_queue_pwr_reg_write(xtensa, XDMREG_PWRCTL, cmd | PWRCTL_JTAGDEBUGUSE(xtensa));
xtensa_dm_queue_enable(&xtensa->dbg_mod);
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK)
return res;
if (!xtensa_dm_is_online(&xtensa->dbg_mod)) {
@@ -792,15 +809,15 @@ int xtensa_examine(struct target *target)
int xtensa_wakeup(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
- unsigned int cmd = PWRCTL_DEBUGWAKEUP | PWRCTL_MEMWAKEUP | PWRCTL_COREWAKEUP;
+ unsigned int cmd = PWRCTL_DEBUGWAKEUP(xtensa) | PWRCTL_MEMWAKEUP(xtensa) | PWRCTL_COREWAKEUP(xtensa);
if (xtensa->reset_asserted)
- cmd |= PWRCTL_CORERESET;
- xtensa_queue_pwr_reg_write(xtensa, DMREG_PWRCTL, cmd);
+ cmd |= PWRCTL_CORERESET(xtensa);
+ xtensa_queue_pwr_reg_write(xtensa, XDMREG_PWRCTL, cmd);
/* TODO: can we join this with the write above? */
- xtensa_queue_pwr_reg_write(xtensa, DMREG_PWRCTL, cmd | PWRCTL_JTAGDEBUGUSE);
+ xtensa_queue_pwr_reg_write(xtensa, XDMREG_PWRCTL, cmd | PWRCTL_JTAGDEBUGUSE(xtensa));
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- return jtag_execute_queue();
+ return xtensa_dm_queue_execute(&xtensa->dbg_mod);
}
int xtensa_smpbreak_write(struct xtensa *xtensa, uint32_t set)
@@ -811,11 +828,11 @@ int xtensa_smpbreak_write(struct xtensa *xtensa, uint32_t set)
OCDDCR_DEBUGMODEOUTEN | OCDDCR_ENABLEOCD);
LOG_TARGET_DEBUG(xtensa->target, "write smpbreak set=0x%" PRIx32 " clear=0x%" PRIx32, set, clear);
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DCRSET, set | OCDDCR_ENABLEOCD);
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DCRCLR, clear);
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DSR, dsr_data);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DCRSET, set | OCDDCR_ENABLEOCD);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DCRCLR, clear);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DSR, dsr_data);
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- return jtag_execute_queue();
+ return xtensa_dm_queue_execute(&xtensa->dbg_mod);
}
int xtensa_smpbreak_set(struct target *target, uint32_t set)
@@ -834,9 +851,9 @@ int xtensa_smpbreak_read(struct xtensa *xtensa, uint32_t *val)
{
uint8_t dcr_buf[sizeof(uint32_t)];
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DCRSET, dcr_buf);
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DCRSET, dcr_buf);
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
*val = buf_get_u32(dcr_buf, 0, 32);
return res;
@@ -892,7 +909,7 @@ int xtensa_core_status_check(struct target *target)
OCDDSR_EXECEXCEPTION | OCDDSR_EXECOVERRUN);
if (res != ERROR_OK && !xtensa->suppress_dsr_errors)
LOG_TARGET_ERROR(target, "clearing DSR failed!");
- return xtensa->suppress_dsr_errors ? ERROR_OK : ERROR_FAIL;
+ return ERROR_FAIL;
}
return ERROR_OK;
}
@@ -901,7 +918,6 @@ xtensa_reg_val_t xtensa_reg_get(struct target *target, enum xtensa_reg_id reg_id
{
struct xtensa *xtensa = target_to_xtensa(target);
struct reg *reg = &xtensa->core_cache->reg_list[reg_id];
- assert(reg_id < xtensa->core_cache->num_regs && "Attempt to access non-existing reg!");
return xtensa_reg_get_value(reg);
}
@@ -909,28 +925,54 @@ void xtensa_reg_set(struct target *target, enum xtensa_reg_id reg_id, xtensa_reg
{
struct xtensa *xtensa = target_to_xtensa(target);
struct reg *reg = &xtensa->core_cache->reg_list[reg_id];
- assert(reg_id < xtensa->core_cache->num_regs && "Attempt to access non-existing reg!");
if (xtensa_reg_get_value(reg) == value)
return;
xtensa_reg_set_value(reg, value);
}
+/* Set Ax (XT_REG_RELGEN) register along with its underlying ARx (XT_REG_GENERAL) */
+void xtensa_reg_set_deep_relgen(struct target *target, enum xtensa_reg_id a_idx, xtensa_reg_val_t value)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ uint32_t windowbase = (xtensa->core_config->windowed ?
+ xtensa_reg_get(target, XT_REG_IDX_WINDOWBASE) : 0);
+ int ar_idx = xtensa_windowbase_offset_to_canonical(xtensa, a_idx, windowbase);
+ xtensa_reg_set(target, a_idx, value);
+ xtensa_reg_set(target, ar_idx, value);
+}
+
+/* Read cause for entering halted state; return bitmask in DEBUGCAUSE_* format */
+uint32_t xtensa_cause_get(struct target *target)
+{
+ return xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE);
+}
+
+void xtensa_cause_clear(struct target *target)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ xtensa_reg_set(target, XT_REG_IDX_DEBUGCAUSE, 0);
+ xtensa->core_cache->reg_list[XT_REG_IDX_DEBUGCAUSE].dirty = false;
+}
+
int xtensa_assert_reset(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
LOG_TARGET_DEBUG(target, "target_number=%i, begin", target->target_number);
- target->state = TARGET_RESET;
xtensa_queue_pwr_reg_write(xtensa,
- DMREG_PWRCTL,
- PWRCTL_JTAGDEBUGUSE | PWRCTL_DEBUGWAKEUP | PWRCTL_MEMWAKEUP | PWRCTL_COREWAKEUP |
- PWRCTL_CORERESET);
+ XDMREG_PWRCTL,
+ PWRCTL_JTAGDEBUGUSE(xtensa) | PWRCTL_DEBUGWAKEUP(xtensa) | PWRCTL_MEMWAKEUP(xtensa) |
+ PWRCTL_COREWAKEUP(xtensa) | PWRCTL_CORERESET(xtensa));
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK)
return res;
+
+ /* registers are now invalid */
xtensa->reset_asserted = true;
- return res;
+ register_cache_invalidate(xtensa->core_cache);
+ target->state = TARGET_RESET;
+ return ERROR_OK;
}
int xtensa_deassert_reset(struct target *target)
@@ -940,13 +982,14 @@ int xtensa_deassert_reset(struct target *target)
LOG_TARGET_DEBUG(target, "halt=%d", target->reset_halt);
if (target->reset_halt)
xtensa_queue_dbg_reg_write(xtensa,
- NARADR_DCRSET,
+ XDMREG_DCRSET,
OCDDCR_ENABLEOCD | OCDDCR_DEBUGINTERRUPT);
xtensa_queue_pwr_reg_write(xtensa,
- DMREG_PWRCTL,
- PWRCTL_JTAGDEBUGUSE | PWRCTL_DEBUGWAKEUP | PWRCTL_MEMWAKEUP | PWRCTL_COREWAKEUP);
+ XDMREG_PWRCTL,
+ PWRCTL_JTAGDEBUGUSE(xtensa) | PWRCTL_DEBUGWAKEUP(xtensa) | PWRCTL_MEMWAKEUP(xtensa) |
+ PWRCTL_COREWAKEUP(xtensa));
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK)
return res;
target->state = TARGET_RUNNING;
@@ -954,17 +997,43 @@ int xtensa_deassert_reset(struct target *target)
return res;
}
+int xtensa_soft_reset_halt(struct target *target)
+{
+ LOG_TARGET_DEBUG(target, "begin");
+ return xtensa_assert_reset(target);
+}
+
int xtensa_fetch_all_regs(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
struct reg *reg_list = xtensa->core_cache->reg_list;
- xtensa_reg_val_t cpenable = 0, windowbase = 0;
- uint8_t regvals[XT_NUM_REGS][sizeof(xtensa_reg_val_t)];
- uint8_t dsrs[XT_NUM_REGS][sizeof(xtensa_dsr_t)];
+ unsigned int reg_list_size = xtensa->core_cache->num_regs;
+ xtensa_reg_val_t cpenable = 0, windowbase = 0, a3;
+ uint32_t woe;
+ uint8_t a3_buf[4];
bool debug_dsrs = !xtensa->regs_fetched || LOG_LEVEL_IS(LOG_LVL_DEBUG);
+ union xtensa_reg_val_u *regvals = calloc(reg_list_size, sizeof(*regvals));
+ if (!regvals) {
+ LOG_TARGET_ERROR(target, "unable to allocate memory for regvals!");
+ return ERROR_FAIL;
+ }
+ union xtensa_reg_val_u *dsrs = calloc(reg_list_size, sizeof(*dsrs));
+ if (!dsrs) {
+ LOG_TARGET_ERROR(target, "unable to allocate memory for dsrs!");
+ free(regvals);
+ return ERROR_FAIL;
+ }
+
LOG_TARGET_DEBUG(target, "start");
+ /* Save (windowed) A3 so cache matches physical AR3; A3 usable as scratch */
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, a3_buf);
+ int res = xtensa_window_state_save(target, &woe);
+ if (res != ERROR_OK)
+ goto xtensa_fetch_all_regs_done;
+
/* Assume the CPU has just halted. We now want to fill the register cache with all the
* register contents GDB needs. For speed, we pipeline all the read operations, execute them
* in one go, then sort everything out from the regvals variable. */
@@ -975,176 +1044,181 @@ int xtensa_fetch_all_regs(struct target *target)
for (unsigned int i = 0; i < 16; i++) {
if (i + j < xtensa->core_config->aregs_num) {
xtensa_queue_exec_ins(xtensa,
- XT_INS_WSR(XT_SR_DDR, xtensa_regs[XT_REG_IDX_AR0 + i].reg_num));
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DDR, regvals[XT_REG_IDX_AR0 + i + j]);
+ XT_INS_WSR(xtensa, XT_SR_DDR, xtensa_regs[XT_REG_IDX_AR0 + i].reg_num));
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR,
+ regvals[XT_REG_IDX_AR0 + i + j].buf);
if (debug_dsrs)
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DSR, dsrs[XT_REG_IDX_AR0 + i + j]);
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DSR,
+ dsrs[XT_REG_IDX_AR0 + i + j].buf);
}
}
- if (xtensa->core_config->windowed) {
+ if (xtensa->core_config->windowed)
/* Now rotate the window so we'll see the next 16 registers. The final rotate
* will wraparound, */
/* leaving us in the state we were. */
- xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(4));
- }
+ xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, 4));
}
+ xtensa_window_state_restore(target, woe);
+
if (xtensa->core_config->coproc) {
- /* As the very first thing after AREGS, go grab the CPENABLE registers. It indicates
- * if we can also grab the FP */
- /* (and theoretically other coprocessor) registers, or if this is a bad thing to do.*/
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa_regs[XT_REG_IDX_CPENABLE].reg_num, XT_REG_A3));
- xtensa_queue_exec_ins(xtensa, XT_INS_WSR(XT_SR_DDR, XT_REG_A3));
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DDR, regvals[XT_REG_IDX_CPENABLE]);
- }
- int res = jtag_execute_queue();
+ /* As the very first thing after AREGS, go grab CPENABLE */
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, xtensa_regs[XT_REG_IDX_CPENABLE].reg_num, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, regvals[XT_REG_IDX_CPENABLE].buf);
+ }
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK) {
LOG_ERROR("Failed to read ARs (%d)!", res);
- return res;
+ goto xtensa_fetch_all_regs_done;
}
xtensa_core_status_check(target);
- if (xtensa->core_config->coproc)
- cpenable = buf_get_u32(regvals[XT_REG_IDX_CPENABLE], 0, 32);
+ a3 = buf_get_u32(a3_buf, 0, 32);
+
+ if (xtensa->core_config->coproc) {
+ cpenable = buf_get_u32(regvals[XT_REG_IDX_CPENABLE].buf, 0, 32);
+
+ /* Enable all coprocessors (by setting all bits in CPENABLE) so we can read FP and user registers. */
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, 0xffffffff);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, xtensa_regs[XT_REG_IDX_CPENABLE].reg_num, XT_REG_A3));
+
+ /* Save CPENABLE; flag dirty later (when regcache updated) so original value is always restored */
+ LOG_TARGET_DEBUG(target, "CPENABLE: was 0x%" PRIx32 ", all enabled", cpenable);
+ xtensa_reg_set(target, XT_REG_IDX_CPENABLE, cpenable);
+ }
/* We're now free to use any of A0-A15 as scratch registers
* Grab the SFRs and user registers first. We use A3 as a scratch register. */
- for (unsigned int i = 0; i < XT_NUM_REGS; i++) {
- if (xtensa_reg_is_readable(xtensa_regs[i].flags, cpenable) && reg_list[i].exist &&
- (xtensa_regs[i].type == XT_REG_SPECIAL ||
- xtensa_regs[i].type == XT_REG_USER || xtensa_regs[i].type == XT_REG_FR)) {
- if (xtensa_regs[i].type == XT_REG_USER) {
- xtensa_queue_exec_ins(xtensa, XT_INS_RUR(xtensa_regs[i].reg_num, XT_REG_A3));
- } else if (xtensa_regs[i].type == XT_REG_FR) {
- xtensa_queue_exec_ins(xtensa, XT_INS_RFR(xtensa_regs[i].reg_num, XT_REG_A3));
- } else { /*SFR */
- unsigned int reg_num = xtensa_regs[i].reg_num;
- if (reg_num == XT_PC_REG_NUM_BASE) {
+ for (unsigned int i = 0; i < reg_list_size; i++) {
+ struct xtensa_reg_desc *rlist = (i < XT_NUM_REGS) ? xtensa_regs : xtensa->optregs;
+ unsigned int ridx = (i < XT_NUM_REGS) ? i : i - XT_NUM_REGS;
+ if (xtensa_reg_is_readable(rlist[ridx].flags, cpenable) && rlist[ridx].exist) {
+ bool reg_fetched = true;
+ unsigned int reg_num = rlist[ridx].reg_num;
+ switch (rlist[ridx].type) {
+ case XT_REG_USER:
+ xtensa_queue_exec_ins(xtensa, XT_INS_RUR(xtensa, reg_num, XT_REG_A3));
+ break;
+ case XT_REG_FR:
+ xtensa_queue_exec_ins(xtensa, XT_INS_RFR(xtensa, reg_num, XT_REG_A3));
+ break;
+ case XT_REG_SPECIAL:
+ if (reg_num == XT_PC_REG_NUM_VIRTUAL) {
/* reg number of PC for debug interrupt depends on NDEBUGLEVEL */
- reg_num += xtensa->core_config->debug.irq_level;
+ reg_num = (XT_PC_REG_NUM_BASE + xtensa->core_config->debug.irq_level);
+ } else if (reg_num == xtensa_regs[XT_REG_IDX_PS].reg_num) {
+ /* reg number of PS for debug interrupt depends on NDEBUGLEVEL */
+ reg_num = (XT_PS_REG_NUM_BASE + xtensa->core_config->debug.irq_level);
+ } else if (reg_num == xtensa_regs[XT_REG_IDX_CPENABLE].reg_num) {
+ /* CPENABLE already read/updated; don't re-read */
+ reg_fetched = false;
+ break;
}
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(reg_num, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
+ break;
+ default:
+ reg_fetched = false;
+ }
+ if (reg_fetched) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, regvals[i].buf);
+ if (debug_dsrs)
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DSR, dsrs[i].buf);
}
- xtensa_queue_exec_ins(xtensa, XT_INS_WSR(XT_SR_DDR, XT_REG_A3));
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DDR, regvals[i]);
- if (debug_dsrs)
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DSR, dsrs[i]);
}
}
/* Ok, send the whole mess to the CPU. */
- res = jtag_execute_queue();
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK) {
LOG_ERROR("Failed to fetch AR regs!");
- return res;
+ goto xtensa_fetch_all_regs_done;
}
xtensa_core_status_check(target);
if (debug_dsrs) {
/* DSR checking: follows order in which registers are requested. */
- for (unsigned int i = 0; i < XT_NUM_REGS; i++) {
- if (xtensa_reg_is_readable(xtensa_regs[i].flags, cpenable) && reg_list[i].exist &&
- (xtensa_regs[i].type == XT_REG_SPECIAL || xtensa_regs[i].type == XT_REG_USER ||
- xtensa_regs[i].type == XT_REG_FR)) {
- if (buf_get_u32(dsrs[i], 0, 32) & OCDDSR_EXECEXCEPTION) {
- LOG_ERROR("Exception reading %s!", xtensa_regs[i].name);
- return ERROR_FAIL;
+ for (unsigned int i = 0; i < reg_list_size; i++) {
+ struct xtensa_reg_desc *rlist = (i < XT_NUM_REGS) ? xtensa_regs : xtensa->optregs;
+ unsigned int ridx = (i < XT_NUM_REGS) ? i : i - XT_NUM_REGS;
+ if (xtensa_reg_is_readable(rlist[ridx].flags, cpenable) && rlist[ridx].exist &&
+ (rlist[ridx].type != XT_REG_DEBUG) &&
+ (rlist[ridx].type != XT_REG_RELGEN) &&
+ (rlist[ridx].type != XT_REG_TIE) &&
+ (rlist[ridx].type != XT_REG_OTHER)) {
+ if (buf_get_u32(dsrs[i].buf, 0, 32) & OCDDSR_EXECEXCEPTION) {
+ LOG_ERROR("Exception reading %s!", reg_list[i].name);
+ res = ERROR_FAIL;
+ goto xtensa_fetch_all_regs_done;
}
}
}
}
- if (xtensa->core_config->user_regs_num > 0 && xtensa->core_config->fetch_user_regs) {
- res = xtensa->core_config->fetch_user_regs(target);
- if (res != ERROR_OK)
- return res;
- }
-
- if (xtensa->core_config->windowed) {
+ if (xtensa->core_config->windowed)
/* We need the windowbase to decode the general addresses. */
- windowbase = buf_get_u32(regvals[XT_REG_IDX_WINDOWBASE], 0, 32);
- }
+ windowbase = buf_get_u32(regvals[XT_REG_IDX_WINDOWBASE].buf, 0, 32);
/* Decode the result and update the cache. */
- for (unsigned int i = 0; i < XT_NUM_REGS; i++) {
- if (xtensa_reg_is_readable(xtensa_regs[i].flags, cpenable) && reg_list[i].exist) {
- if (xtensa_regs[i].type == XT_REG_GENERAL) {
- /* TODO: add support for non-windowed configs */
- assert(
- xtensa->core_config->windowed &&
- "Regs fetch is not supported for non-windowed configs!");
+ for (unsigned int i = 0; i < reg_list_size; i++) {
+ struct xtensa_reg_desc *rlist = (i < XT_NUM_REGS) ? xtensa_regs : xtensa->optregs;
+ unsigned int ridx = (i < XT_NUM_REGS) ? i : i - XT_NUM_REGS;
+ if (xtensa_reg_is_readable(rlist[ridx].flags, cpenable) && rlist[ridx].exist) {
+ if ((xtensa->core_config->windowed) && (rlist[ridx].type == XT_REG_GENERAL)) {
/* The 64-value general register set is read from (windowbase) on down.
* We need to get the real register address by subtracting windowbase and
* wrapping around. */
- int realadr = xtensa_canonical_to_windowbase_offset(i, windowbase);
- buf_cpy(regvals[realadr], reg_list[i].value, reg_list[i].size);
- } else if (xtensa_regs[i].type == XT_REG_RELGEN) {
- buf_cpy(regvals[xtensa_regs[i].reg_num], reg_list[i].value, reg_list[i].size);
+ enum xtensa_reg_id realadr = xtensa_canonical_to_windowbase_offset(xtensa, i,
+ windowbase);
+ buf_cpy(regvals[realadr].buf, reg_list[i].value, reg_list[i].size);
+ } else if (rlist[ridx].type == XT_REG_RELGEN) {
+ buf_cpy(regvals[rlist[ridx].reg_num].buf, reg_list[i].value, reg_list[i].size);
+ if (xtensa_extra_debug_log) {
+ xtensa_reg_val_t regval = buf_get_u32(regvals[rlist[ridx].reg_num].buf, 0, 32);
+ LOG_DEBUG("%s = 0x%x", rlist[ridx].name, regval);
+ }
} else {
- buf_cpy(regvals[i], reg_list[i].value, reg_list[i].size);
+ xtensa_reg_val_t regval = buf_get_u32(regvals[i].buf, 0, 32);
+ bool is_dirty = (i == XT_REG_IDX_CPENABLE);
+ if (xtensa_extra_debug_log)
+ LOG_INFO("Register %s: 0x%X", reg_list[i].name, regval);
+ xtensa_reg_set(target, i, regval);
+ reg_list[i].dirty = is_dirty; /*always do this _after_ xtensa_reg_set! */
}
reg_list[i].valid = true;
} else {
- reg_list[i].valid = false;
- }
- }
- /* We have used A3 as a scratch register and we will need to write that back. */
- xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
- xtensa->regs_fetched = true;
-
- return ERROR_OK;
-}
-
-int xtensa_fetch_user_regs_u32(struct target *target)
-{
- struct xtensa *xtensa = target_to_xtensa(target);
- struct reg *reg_list = xtensa->core_cache->reg_list;
- xtensa_reg_val_t cpenable = 0;
- uint8_t regvals[XT_USER_REGS_NUM_MAX][sizeof(xtensa_reg_val_t)];
- uint8_t dsrs[XT_USER_REGS_NUM_MAX][sizeof(xtensa_dsr_t)];
- bool debug_dsrs = !xtensa->regs_fetched || LOG_LEVEL_IS(LOG_LVL_DEBUG);
-
- assert(xtensa->core_config->user_regs_num < XT_USER_REGS_NUM_MAX && "Too many user regs configured!");
- if (xtensa->core_config->coproc)
- cpenable = xtensa_reg_get(target, XT_REG_IDX_CPENABLE);
-
- for (unsigned int i = 0; i < xtensa->core_config->user_regs_num; i++) {
- if (!xtensa_reg_is_readable(xtensa->core_config->user_regs[i].flags, cpenable))
- continue;
- xtensa_queue_exec_ins(xtensa, XT_INS_RUR(xtensa->core_config->user_regs[i].reg_num, XT_REG_A3));
- xtensa_queue_exec_ins(xtensa, XT_INS_WSR(XT_SR_DDR, XT_REG_A3));
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DDR, regvals[i]);
- if (debug_dsrs)
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DSR, dsrs[i]);
- }
- /* Ok, send the whole mess to the CPU. */
- int res = jtag_execute_queue();
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to fetch AR regs!");
- return res;
- }
- xtensa_core_status_check(target);
-
- if (debug_dsrs) {
- /* DSR checking: follows order in which registers are requested. */
- for (unsigned int i = 0; i < xtensa->core_config->user_regs_num; i++) {
- if (!xtensa_reg_is_readable(xtensa->core_config->user_regs[i].flags, cpenable))
- continue;
- if (buf_get_u32(dsrs[i], 0, 32) & OCDDSR_EXECEXCEPTION) {
- LOG_ERROR("Exception reading %s!", xtensa->core_config->user_regs[i].name);
- return ERROR_FAIL;
+ if ((rlist[ridx].flags & XT_REGF_MASK) == XT_REGF_NOREAD) {
+ /* Report read-only registers all-zero but valid */
+ reg_list[i].valid = true;
+ xtensa_reg_set(target, i, 0);
+ } else {
+ reg_list[i].valid = false;
}
}
}
- for (unsigned int i = 0; i < xtensa->core_config->user_regs_num; i++) {
- if (xtensa_reg_is_readable(xtensa->core_config->user_regs[i].flags, cpenable)) {
- buf_cpy(regvals[i], reg_list[XT_USR_REG_START + i].value, reg_list[XT_USR_REG_START + i].size);
- reg_list[XT_USR_REG_START + i].valid = true;
- } else {
- reg_list[XT_USR_REG_START + i].valid = false;
- }
- }
-
- /* We have used A3 as a scratch register and we will need to write that back. */
+ if (xtensa->core_config->windowed) {
+ /* We have used A3 as a scratch register.
+ * Windowed configs: restore A3's AR (XT_REG_GENERAL) and and flag for write-back.
+ */
+ enum xtensa_reg_id ar3_idx = xtensa_windowbase_offset_to_canonical(xtensa, XT_REG_IDX_A3, windowbase);
+ xtensa_reg_set(target, ar3_idx, a3);
+ xtensa_mark_register_dirty(xtensa, ar3_idx);
+
+ /* Reset scratch_ars[] on fetch. .chrval tracks AR mapping and changes w/ window */
+ sprintf(xtensa->scratch_ars[XT_AR_SCRATCH_AR3].chrval, "ar%d", ar3_idx - XT_REG_IDX_AR0);
+ enum xtensa_reg_id ar4_idx = xtensa_windowbase_offset_to_canonical(xtensa, XT_REG_IDX_A4, windowbase);
+ sprintf(xtensa->scratch_ars[XT_AR_SCRATCH_AR4].chrval, "ar%d", ar4_idx - XT_REG_IDX_AR0);
+ for (enum xtensa_ar_scratch_set_e s = 0; s < XT_AR_SCRATCH_NUM; s++)
+ xtensa->scratch_ars[s].intval = false;
+ }
+
+ /* We have used A3 (XT_REG_RELGEN) as a scratch register. Restore and flag for write-back. */
+ xtensa_reg_set(target, XT_REG_IDX_A3, a3);
xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
- return ERROR_OK;
+ xtensa->regs_fetched = true;
+xtensa_fetch_all_regs_done:
+ free(regvals);
+ free(dsrs);
+ return res;
}
int xtensa_get_gdb_reg_list(struct target *target,
@@ -1153,23 +1227,65 @@ int xtensa_get_gdb_reg_list(struct target *target,
enum target_register_class reg_class)
{
struct xtensa *xtensa = target_to_xtensa(target);
- unsigned int num_regs = xtensa->core_config->gdb_general_regs_num;
+ unsigned int num_regs;
- if (reg_class == REG_CLASS_ALL)
- num_regs = xtensa->regs_num;
+ if (reg_class == REG_CLASS_GENERAL) {
+ if ((xtensa->genpkt_regs_num == 0) || !xtensa->contiguous_regs_list) {
+ LOG_ERROR("reg_class %d unhandled; 'xtgregs' not found", reg_class);
+ return ERROR_FAIL;
+ }
+ num_regs = xtensa->genpkt_regs_num;
+ } else {
+ /* Determine whether to return a contiguous or sparse register map */
+ num_regs = xtensa->regmap_contiguous ? xtensa->total_regs_num : xtensa->dbregs_num;
+ }
- LOG_DEBUG("reg_class=%i, num_regs=%d", reg_class, num_regs);
+ LOG_DEBUG("reg_class=%i, num_regs=%d", (int)reg_class, num_regs);
- *reg_list = malloc(num_regs * sizeof(struct reg *));
+ *reg_list = calloc(num_regs, sizeof(struct reg *));
if (!*reg_list)
return ERROR_FAIL;
- for (unsigned int k = 0; k < num_regs; k++) {
- unsigned int reg_id = xtensa->core_config->gdb_regs_mapping[k];
- (*reg_list)[k] = &xtensa->core_cache->reg_list[reg_id];
+ *reg_list_size = num_regs;
+ if (xtensa->regmap_contiguous) {
+ assert((num_regs <= xtensa->total_regs_num) && "contiguous regmap size internal error!");
+ for (unsigned int i = 0; i < num_regs; i++)
+ (*reg_list)[i] = xtensa->contiguous_regs_list[i];
+ return ERROR_OK;
}
- *reg_list_size = num_regs;
+ for (unsigned int i = 0; i < num_regs; i++)
+ (*reg_list)[i] = (struct reg *)&xtensa->empty_regs[i];
+ unsigned int k = 0;
+ for (unsigned int i = 0; i < xtensa->core_cache->num_regs && k < num_regs; i++) {
+ if (xtensa->core_cache->reg_list[i].exist) {
+ struct xtensa_reg_desc *rlist = (i < XT_NUM_REGS) ? xtensa_regs : xtensa->optregs;
+ unsigned int ridx = (i < XT_NUM_REGS) ? i : i - XT_NUM_REGS;
+ int sparse_idx = rlist[ridx].dbreg_num;
+ if (i == XT_REG_IDX_PS) {
+ if (xtensa->eps_dbglevel_idx == 0) {
+ LOG_ERROR("eps_dbglevel_idx not set\n");
+ return ERROR_FAIL;
+ }
+ (*reg_list)[sparse_idx] = &xtensa->core_cache->reg_list[xtensa->eps_dbglevel_idx];
+ if (xtensa_extra_debug_log)
+ LOG_DEBUG("SPARSE GDB reg 0x%x getting EPS%d 0x%x",
+ sparse_idx, xtensa->core_config->debug.irq_level,
+ xtensa_reg_get_value((*reg_list)[sparse_idx]));
+ } else if (rlist[ridx].type == XT_REG_RELGEN) {
+ (*reg_list)[sparse_idx - XT_REG_IDX_ARFIRST] = &xtensa->core_cache->reg_list[i];
+ } else {
+ (*reg_list)[sparse_idx] = &xtensa->core_cache->reg_list[i];
+ }
+ if (i == XT_REG_IDX_PC)
+ /* Make a duplicate copy of PC for external access */
+ (*reg_list)[XT_PC_DBREG_NUM_BASE] = &xtensa->core_cache->reg_list[i];
+ k++;
+ }
+ }
+
+ if (k == num_regs)
+ LOG_ERROR("SPARSE GDB reg list full (size %d)", k);
return ERROR_OK;
}
@@ -1199,9 +1315,9 @@ int xtensa_halt(struct target *target)
}
LOG_TARGET_DEBUG(target, "Core status 0x%" PRIx32, xtensa_dm_core_status_get(&xtensa->dbg_mod));
if (!xtensa_is_stopped(target)) {
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DCRSET, OCDDCR_ENABLEOCD | OCDDCR_DEBUGINTERRUPT);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DCRSET, OCDDCR_ENABLEOCD | OCDDCR_DEBUGINTERRUPT);
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- res = jtag_execute_queue();
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK)
LOG_TARGET_ERROR(target, "Failed to set OCDDCR_DEBUGINTERRUPT. Can't halt.");
}
@@ -1233,21 +1349,21 @@ int xtensa_prepare_resume(struct target *target,
if (address && !current) {
xtensa_reg_set(target, XT_REG_IDX_PC, address);
} else {
- xtensa_reg_val_t cause = xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE);
- if (cause & DEBUGCAUSE_DB) {
+ uint32_t cause = xtensa_cause_get(target);
+ LOG_TARGET_DEBUG(target, "DEBUGCAUSE 0x%x (watchpoint %lu) (break %lu)",
+ cause, (cause & DEBUGCAUSE_DB), (cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN)));
+ if (cause & DEBUGCAUSE_DB)
/* We stopped due to a watchpoint. We can't just resume executing the
* instruction again because */
/* that would trigger the watchpoint again. To fix this, we single-step,
* which ignores watchpoints. */
xtensa_do_step(target, current, address, handle_breakpoints);
- }
- if (cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN)) {
+ if (cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN))
/* We stopped due to a break instruction. We can't just resume executing the
* instruction again because */
/* that would trigger the break again. To fix this, we single-step, which
* ignores break. */
xtensa_do_step(target, current, address, handle_breakpoints);
- }
}
/* Write back hw breakpoints. Current FreeRTOS SMP code can set a hw breakpoint on an
@@ -1274,8 +1390,8 @@ int xtensa_do_resume(struct target *target)
LOG_TARGET_DEBUG(target, "start");
- xtensa_queue_exec_ins(xtensa, XT_INS_RFDO);
- int res = jtag_execute_queue();
+ xtensa_queue_exec_ins(xtensa, XT_INS_RFDO(xtensa));
+ int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK) {
LOG_TARGET_ERROR(target, "Failed to exec RFDO %d!", res);
return res;
@@ -1315,18 +1431,19 @@ int xtensa_resume(struct target *target,
static bool xtensa_pc_in_winexc(struct target *target, target_addr_t pc)
{
+ struct xtensa *xtensa = target_to_xtensa(target);
uint8_t insn_buf[XT_ISNS_SZ_MAX];
int err = xtensa_read_buffer(target, pc, sizeof(insn_buf), insn_buf);
if (err != ERROR_OK)
return false;
xtensa_insn_t insn = buf_get_u32(insn_buf, 0, 24);
- xtensa_insn_t masked = insn & XT_INS_L32E_S32E_MASK;
- if (masked == XT_INS_L32E(0, 0, 0) || masked == XT_INS_S32E(0, 0, 0))
+ xtensa_insn_t masked = insn & XT_INS_L32E_S32E_MASK(xtensa);
+ if (masked == XT_INS_L32E(xtensa, 0, 0, 0) || masked == XT_INS_S32E(xtensa, 0, 0, 0))
return true;
- masked = insn & XT_INS_RFWO_RFWU_MASK;
- if (masked == XT_INS_RFWO || masked == XT_INS_RFWU)
+ masked = insn & XT_INS_RFWO_RFWU_MASK(xtensa);
+ if (masked == XT_INS_RFWO(xtensa) || masked == XT_INS_RFWU(xtensa))
return true;
return false;
@@ -1339,7 +1456,8 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
const uint32_t icount_val = -2; /* ICOUNT value to load for 1 step */
xtensa_reg_val_t dbreakc[XT_WATCHPOINTS_NUM_MAX];
xtensa_reg_val_t icountlvl, cause;
- xtensa_reg_val_t oldps, newps, oldpc, cur_pc;
+ xtensa_reg_val_t oldps, oldpc, cur_pc;
+ bool ps_lowered = false;
LOG_TARGET_DEBUG(target, "current=%d, address=" TARGET_ADDR_FMT ", handle_breakpoints=%i",
current, address, handle_breakpoints);
@@ -1349,16 +1467,16 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
return ERROR_TARGET_NOT_HALTED;
}
- if (xtensa->core_config->debug.icount_sz != 32) {
- LOG_TARGET_WARNING(target, "stepping for ICOUNT less then 32 bits is not implemented!");
+ if (xtensa->eps_dbglevel_idx == 0) {
+ LOG_ERROR("eps_dbglevel_idx not set\n");
return ERROR_FAIL;
}
- /* Save old ps/pc */
- oldps = xtensa_reg_get(target, XT_REG_IDX_PS);
+ /* Save old ps (EPS[dbglvl] on LX), pc */
+ oldps = xtensa_reg_get(target, xtensa->eps_dbglevel_idx);
oldpc = xtensa_reg_get(target, XT_REG_IDX_PC);
- cause = xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE);
+ cause = xtensa_cause_get(target);
LOG_TARGET_DEBUG(target, "oldps=%" PRIx32 ", oldpc=%" PRIx32 " dbg_cause=%" PRIx32 " exc_cause=%" PRIx32,
oldps,
oldpc,
@@ -1367,8 +1485,7 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
if (handle_breakpoints && (cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN))) {
/* handle hard-coded SW breakpoints (e.g. syscalls) */
LOG_TARGET_DEBUG(target, "Increment PC to pass break instruction...");
- xtensa_reg_set(target, XT_REG_IDX_DEBUGCAUSE, 0); /* so we don't recurse into the same routine */
- xtensa->core_cache->reg_list[XT_REG_IDX_DEBUGCAUSE].dirty = false;
+ xtensa_cause_clear(target); /* so we don't recurse into the same routine */
/* pretend that we have stepped */
if (cause & DEBUGCAUSE_BI)
xtensa_reg_set(target, XT_REG_IDX_PC, oldpc + 3); /* PC = PC+3 */
@@ -1377,13 +1494,22 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
return ERROR_OK;
}
- /* Xtensa has an ICOUNTLEVEL register which sets the maximum interrupt level at which the
- * instructions are to be counted while stepping.
- * For example, if we need to step by 2 instructions, and an interrupt occurs inbetween,
- * the processor will execute the interrupt, return, and halt after the 2nd instruction.
- * However, sometimes we don't want the interrupt handlers to be executed at all, while
- * stepping through the code. In this case (XT_STEPPING_ISR_OFF), PS.INTLEVEL can be raised
- * to only allow Debug and NMI interrupts.
+ /* Xtensa LX has an ICOUNTLEVEL register which sets the maximum interrupt level
+ * at which the instructions are to be counted while stepping.
+ *
+ * For example, if we need to step by 2 instructions, and an interrupt occurs
+ * in between, the processor will trigger the interrupt and halt after the 2nd
+ * instruction within the interrupt vector and/or handler.
+ *
+ * However, sometimes we don't want the interrupt handlers to be executed at all
+ * while stepping through the code. In this case (XT_STEPPING_ISR_OFF),
+ * ICOUNTLEVEL can be lowered to the executing code's (level + 1) to prevent ISR
+ * code from being counted during stepping. Note that C exception handlers must
+ * run at level 0 and hence will be counted and stepped into, should one occur.
+ *
+ * TODO: Certain instructions should never be single-stepped and should instead
+ * be emulated (per DUG): RSIL >= DBGLEVEL, RSR/WSR [ICOUNT|ICOUNTLEVEL], and
+ * RFI >= DBGLEVEL.
*/
if (xtensa->stepping_isr_mode == XT_STEPPING_ISR_OFF) {
if (!xtensa->core_config->high_irq.enabled) {
@@ -1392,18 +1518,11 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
"disabling IRQs while stepping is not implemented w/o high prio IRQs option!");
return ERROR_FAIL;
}
- /* Mask all interrupts below Debug, i.e. PS.INTLEVEL = DEBUGLEVEL - 1 */
- xtensa_reg_val_t temp_ps = (oldps & ~0xF) | (xtensa->core_config->debug.irq_level - 1);
- xtensa_reg_set(target, XT_REG_IDX_PS, temp_ps);
+ /* Update ICOUNTLEVEL accordingly */
+ icountlvl = MIN((oldps & 0xF) + 1, xtensa->core_config->debug.irq_level);
+ } else {
+ icountlvl = xtensa->core_config->debug.irq_level;
}
- /* Regardless of ISRs masking mode we need to count instructions at any CINTLEVEL during step.
- So set `icountlvl` to DEBUGLEVEL.
- If ISRs are masked they are disabled in PS (see above), so having `icountlvl` set to DEBUGLEVEL
- will allow to step through any type of the code, e.g. 'high int level' ISR.
- If ISRs are not masked With `icountlvl` set to DEBUGLEVEL, we can step into any ISR
- which can happen (enabled in PS).
- */
- icountlvl = xtensa->core_config->debug.irq_level;
if (cause & DEBUGCAUSE_DB) {
/* We stopped due to a watchpoint. We can't just resume executing the instruction again because
@@ -1412,21 +1531,27 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
LOG_TARGET_DEBUG(
target,
"Single-stepping to get past instruction that triggered the watchpoint...");
- xtensa_reg_set(target, XT_REG_IDX_DEBUGCAUSE, 0); /*so we don't recurse into
- * the same routine */
- xtensa->core_cache->reg_list[XT_REG_IDX_DEBUGCAUSE].dirty = false;
- /*Save all DBREAKCx registers and set to 0 to disable watchpoints */
+ xtensa_cause_clear(target); /* so we don't recurse into the same routine */
+ /* Save all DBREAKCx registers and set to 0 to disable watchpoints */
for (unsigned int slot = 0; slot < xtensa->core_config->debug.dbreaks_num; slot++) {
dbreakc[slot] = xtensa_reg_get(target, XT_REG_IDX_DBREAKC0 + slot);
xtensa_reg_set(target, XT_REG_IDX_DBREAKC0 + slot, 0);
}
}
- if (!handle_breakpoints && (cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN))) {
+ if (!handle_breakpoints && (cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN)))
/* handle normal SW breakpoint */
- xtensa_reg_set(target, XT_REG_IDX_DEBUGCAUSE, 0); /*so we don't recurse into
- * the same routine */
- xtensa->core_cache->reg_list[XT_REG_IDX_DEBUGCAUSE].dirty = false;
+ xtensa_cause_clear(target); /* so we don't recurse into the same routine */
+ if ((oldps & 0xf) >= icountlvl) {
+ /* Lower interrupt level to allow stepping, but flag eps[dbglvl] to be restored */
+ ps_lowered = true;
+ uint32_t newps = (oldps & ~0xf) | (icountlvl - 1);
+ xtensa_reg_set(target, xtensa->eps_dbglevel_idx, newps);
+ LOG_TARGET_DEBUG(target,
+ "Lowering PS.INTLEVEL to allow stepping: %s <- 0x%08" PRIx32 " (was 0x%08" PRIx32 ")",
+ xtensa->core_cache->reg_list[xtensa->eps_dbglevel_idx].name,
+ newps,
+ oldps);
}
do {
xtensa_reg_set(target, XT_REG_IDX_ICOUNTLEVEL, icountlvl);
@@ -1470,18 +1595,15 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
target->state = TARGET_RUNNING;
return ERROR_FAIL;
}
- target->debug_reason = DBG_REASON_SINGLESTEP;
- target->state = TARGET_HALTED;
xtensa_fetch_all_regs(target);
-
cur_pc = xtensa_reg_get(target, XT_REG_IDX_PC);
LOG_TARGET_DEBUG(target,
"cur_ps=%" PRIx32 ", cur_pc=%" PRIx32 " dbg_cause=%" PRIx32 " exc_cause=%" PRIx32,
xtensa_reg_get(target, XT_REG_IDX_PS),
cur_pc,
- xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE),
+ xtensa_cause_get(target),
xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE));
/* Do not step into WindowOverflow if ISRs are masked.
@@ -1504,6 +1626,10 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
LOG_DEBUG("Stepped from %" PRIX32 " to %" PRIX32, oldpc, cur_pc);
break;
} while (true);
+
+ target->debug_reason = DBG_REASON_SINGLESTEP;
+ target->state = TARGET_HALTED;
+ target_call_event_callbacks(target, TARGET_EVENT_HALTED);
LOG_DEBUG("Done stepping, PC=%" PRIX32, cur_pc);
if (cause & DEBUGCAUSE_DB) {
@@ -1514,12 +1640,11 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
}
/* Restore int level */
- /* TODO: Theoretically, this can mess up stepping over an instruction that modifies
- * ps.intlevel by itself. TODO: Look into this. */
- if (xtensa->stepping_isr_mode == XT_STEPPING_ISR_OFF) {
- newps = xtensa_reg_get(target, XT_REG_IDX_PS);
- newps = (newps & ~0xF) | (oldps & 0xf);
- xtensa_reg_set(target, XT_REG_IDX_PS, newps);
+ if (ps_lowered) {
+ LOG_DEBUG("Restoring %s after stepping: 0x%08" PRIx32,
+ xtensa->core_cache->reg_list[xtensa->eps_dbglevel_idx].name,
+ oldps);
+ xtensa_reg_set(target, xtensa->eps_dbglevel_idx, oldps);
}
/* write ICOUNTLEVEL back to zero */
@@ -1567,7 +1692,7 @@ static inline target_addr_t xtensa_get_overlap_size(target_addr_t r1_start,
}
/**
- * Check if the address gets to memory regions, and it's access mode
+ * Check if the address gets to memory regions, and its access mode
*/
static bool xtensa_memory_op_validate_range(struct xtensa *xtensa, target_addr_t address, size_t size, int access)
{
@@ -1598,6 +1723,7 @@ int xtensa_read_memory(struct target *target, target_addr_t address, uint32_t si
target_addr_t addrend_al = ALIGN_UP(address + size * count, 4);
target_addr_t adr = addrstart_al;
uint8_t *albuff;
+ bool bswap = xtensa->target->endianness == TARGET_BIG_ENDIAN;
if (target->state != TARGET_HALTED) {
LOG_TARGET_WARNING(target, "target not halted");
@@ -1612,39 +1738,62 @@ int xtensa_read_memory(struct target *target, target_addr_t address, uint32_t si
}
}
- if (addrstart_al == address && addrend_al == address + (size * count)) {
- albuff = buffer;
- } else {
- albuff = malloc(addrend_al - addrstart_al);
- if (!albuff) {
- LOG_TARGET_ERROR(target, "Out of memory allocating %" TARGET_PRIdADDR " bytes!",
- addrend_al - addrstart_al);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
+ unsigned int alloc_bytes = ALIGN_UP(addrend_al - addrstart_al, sizeof(uint32_t));
+ albuff = calloc(alloc_bytes, 1);
+ if (!albuff) {
+ LOG_TARGET_ERROR(target, "Out of memory allocating %" PRId64 " bytes!",
+ addrend_al - addrstart_al);
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
/* We're going to use A3 here */
xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
/* Write start address to A3 */
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, addrstart_al);
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, addrstart_al);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
/* Now we can safely read data from addrstart_al up to addrend_al into albuff */
- for (unsigned int i = 0; adr != addrend_al; i += sizeof(uint32_t), adr += sizeof(uint32_t)) {
- xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(XT_REG_A3));
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DDR, &albuff[i]);
+ if (xtensa->probe_lsddr32p != 0) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(xtensa, XT_REG_A3));
+ for (unsigned int i = 0; adr != addrend_al; i += sizeof(uint32_t), adr += sizeof(uint32_t))
+ xtensa_queue_dbg_reg_read(xtensa,
+ (adr + sizeof(uint32_t) == addrend_al) ? XDMREG_DDR : XDMREG_DDREXEC,
+ &albuff[i]);
+ } else {
+ xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A4);
+ for (unsigned int i = 0; adr != addrend_al; i += sizeof(uint32_t), adr += sizeof(uint32_t)) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_L32I(xtensa, XT_REG_A3, XT_REG_A4, 0));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A4));
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, &albuff[i]);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, adr + sizeof(uint32_t));
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ }
}
- int res = jtag_execute_queue();
- if (res == ERROR_OK)
+ int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ if (res == ERROR_OK) {
+ bool prev_suppress = xtensa->suppress_dsr_errors;
+ xtensa->suppress_dsr_errors = true;
res = xtensa_core_status_check(target);
- if (res != ERROR_OK)
- LOG_TARGET_WARNING(target, "Failed reading %d bytes at address " TARGET_ADDR_FMT,
- count * size, address);
-
- if (albuff != buffer) {
- memcpy(buffer, albuff + (address & 3), (size * count));
- free(albuff);
+ if (xtensa->probe_lsddr32p == -1)
+ xtensa->probe_lsddr32p = 1;
+ xtensa->suppress_dsr_errors = prev_suppress;
+ }
+ if (res != ERROR_OK) {
+ if (xtensa->probe_lsddr32p != 0) {
+ /* Disable fast memory access instructions and retry before reporting an error */
+ LOG_TARGET_INFO(target, "Disabling LDDR32.P/SDDR32.P");
+ xtensa->probe_lsddr32p = 0;
+ res = xtensa_read_memory(target, address, size, count, buffer);
+ bswap = false;
+ } else {
+ LOG_TARGET_WARNING(target, "Failed reading %d bytes at address "TARGET_ADDR_FMT,
+ count * size, address);
+ }
}
+ if (bswap)
+ buf_bswap32(albuff, albuff, addrend_al - addrstart_al);
+ memcpy(buffer, albuff + (address & 3), (size * count));
+ free(albuff);
return res;
}
@@ -1670,6 +1819,7 @@ int xtensa_write_memory(struct target *target,
target_addr_t adr = addrstart_al;
int res;
uint8_t *albuff;
+ bool fill_head_tail = false;
if (target->state != TARGET_HALTED) {
LOG_TARGET_WARNING(target, "target not halted");
@@ -1688,38 +1838,53 @@ int xtensa_write_memory(struct target *target,
/* Allocate a temporary buffer to put the aligned bytes in, if needed. */
if (addrstart_al == address && addrend_al == address + (size * count)) {
- /* We discard the const here because albuff can also be non-const */
- albuff = (uint8_t *)buffer;
+ if (xtensa->target->endianness == TARGET_BIG_ENDIAN)
+ /* Need a buffer for byte-swapping */
+ albuff = malloc(addrend_al - addrstart_al);
+ else
+ /* We discard the const here because albuff can also be non-const */
+ albuff = (uint8_t *)buffer;
} else {
+ fill_head_tail = true;
albuff = malloc(addrend_al - addrstart_al);
- if (!albuff) {
- LOG_TARGET_ERROR(target, "Out of memory allocating %" TARGET_PRIdADDR " bytes!",
- addrend_al - addrstart_al);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
+ }
+ if (!albuff) {
+ LOG_TARGET_ERROR(target, "Out of memory allocating %" PRId64 " bytes!",
+ addrend_al - addrstart_al);
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
/* We're going to use A3 here */
xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
/* If we're using a temp aligned buffer, we need to fill the head and/or tail bit of it. */
- if (albuff != buffer) {
+ if (fill_head_tail) {
/* See if we need to read the first and/or last word. */
if (address & 3) {
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, addrstart_al);
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(XT_SR_DDR, XT_REG_A3));
- xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(XT_REG_A3));
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DDR, &albuff[0]);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, addrstart_al);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ if (xtensa->probe_lsddr32p == 1) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(xtensa, XT_REG_A3));
+ } else {
+ xtensa_queue_exec_ins(xtensa, XT_INS_L32I(xtensa, XT_REG_A3, XT_REG_A3, 0));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ }
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, &albuff[0]);
}
if ((address + (size * count)) & 3) {
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, addrend_al - 4);
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(XT_SR_DDR, XT_REG_A3));
- xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(XT_REG_A3));
- xtensa_queue_dbg_reg_read(xtensa, NARADR_DDR,
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, addrend_al - 4);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ if (xtensa->probe_lsddr32p == 1) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(xtensa, XT_REG_A3));
+ } else {
+ xtensa_queue_exec_ins(xtensa, XT_INS_L32I(xtensa, XT_REG_A3, XT_REG_A3, 0));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ }
+ xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR,
&albuff[addrend_al - addrstart_al - 4]);
}
/* Grab bytes */
- res = jtag_execute_queue();
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (res != ERROR_OK) {
LOG_ERROR("Error issuing unaligned memory write context instruction(s): %d", res);
if (albuff != buffer)
@@ -1727,24 +1892,110 @@ int xtensa_write_memory(struct target *target,
return res;
}
xtensa_core_status_check(target);
- /* Copy data to be written into the aligned buffer */
+ if (xtensa->target->endianness == TARGET_BIG_ENDIAN) {
+ bool swapped_w0 = false;
+ if (address & 3) {
+ buf_bswap32(&albuff[0], &albuff[0], 4);
+ swapped_w0 = true;
+ }
+ if ((address + (size * count)) & 3) {
+ if ((addrend_al - addrstart_al - 4 == 0) && swapped_w0) {
+ /* Don't double-swap if buffer start/end are within the same word */
+ } else {
+ buf_bswap32(&albuff[addrend_al - addrstart_al - 4],
+ &albuff[addrend_al - addrstart_al - 4], 4);
+ }
+ }
+ }
+ /* Copy data to be written into the aligned buffer (in host-endianness) */
memcpy(&albuff[address & 3], buffer, size * count);
/* Now we can write albuff in aligned uint32s. */
}
+ if (xtensa->target->endianness == TARGET_BIG_ENDIAN)
+ buf_bswap32(albuff, fill_head_tail ? albuff : buffer, addrend_al - addrstart_al);
+
/* Write start address to A3 */
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, addrstart_al);
- xtensa_queue_exec_ins(xtensa, XT_INS_RSR(XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, addrstart_al);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
/* Write the aligned buffer */
- for (unsigned int i = 0; adr != addrend_al; i += sizeof(uint32_t), adr += sizeof(uint32_t)) {
- xtensa_queue_dbg_reg_write(xtensa, NARADR_DDR, buf_get_u32(&albuff[i], 0, 32));
- xtensa_queue_exec_ins(xtensa, XT_INS_SDDR32P(XT_REG_A3));
+ if (xtensa->probe_lsddr32p != 0) {
+ for (unsigned int i = 0; adr != addrend_al; i += sizeof(uint32_t), adr += sizeof(uint32_t)) {
+ if (i == 0) {
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, buf_get_u32(&albuff[i], 0, 32));
+ xtensa_queue_exec_ins(xtensa, XT_INS_SDDR32P(xtensa, XT_REG_A3));
+ } else {
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDREXEC, buf_get_u32(&albuff[i], 0, 32));
+ }
+ }
+ } else {
+ xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A4);
+ for (unsigned int i = 0; adr != addrend_al; i += sizeof(uint32_t), adr += sizeof(uint32_t)) {
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, buf_get_u32(&albuff[i], 0, 32));
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A4));
+ xtensa_queue_exec_ins(xtensa, XT_INS_S32I(xtensa, XT_REG_A3, XT_REG_A4, 0));
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, adr + sizeof(uint32_t));
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ }
}
- res = jtag_execute_queue();
- if (res == ERROR_OK)
+
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ if (res == ERROR_OK) {
+ bool prev_suppress = xtensa->suppress_dsr_errors;
+ xtensa->suppress_dsr_errors = true;
res = xtensa_core_status_check(target);
- if (res != ERROR_OK)
- LOG_TARGET_WARNING(target, "Failed writing %d bytes at address " TARGET_ADDR_FMT, count * size, address);
+ if (xtensa->probe_lsddr32p == -1)
+ xtensa->probe_lsddr32p = 1;
+ xtensa->suppress_dsr_errors = prev_suppress;
+ }
+ if (res != ERROR_OK) {
+ if (xtensa->probe_lsddr32p != 0) {
+ /* Disable fast memory access instructions and retry before reporting an error */
+ LOG_TARGET_INFO(target, "Disabling LDDR32.P/SDDR32.P");
+ xtensa->probe_lsddr32p = 0;
+ res = xtensa_write_memory(target, address, size, count, buffer);
+ } else {
+ LOG_TARGET_WARNING(target, "Failed writing %d bytes at address "TARGET_ADDR_FMT,
+ count * size, address);
+ }
+ } else {
+ /* Invalidate ICACHE, writeback DCACHE if present */
+ uint32_t issue_ihi = xtensa_is_icacheable(xtensa, address);
+ uint32_t issue_dhwb = xtensa_is_dcacheable(xtensa, address);
+ if (issue_ihi || issue_dhwb) {
+ uint32_t ilinesize = issue_ihi ? xtensa->core_config->icache.line_size : UINT32_MAX;
+ uint32_t dlinesize = issue_dhwb ? xtensa->core_config->dcache.line_size : UINT32_MAX;
+ uint32_t linesize = MIN(ilinesize, dlinesize);
+ uint32_t off = 0;
+ adr = addrstart_al;
+
+ while ((adr + off) < addrend_al) {
+ if (off == 0) {
+ /* Write start address to A3 */
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, adr);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ }
+ if (issue_ihi)
+ xtensa_queue_exec_ins(xtensa, XT_INS_IHI(xtensa, XT_REG_A3, off));
+ if (issue_dhwb)
+ xtensa_queue_exec_ins(xtensa, XT_INS_DHWBI(xtensa, XT_REG_A3, off));
+ off += linesize;
+ if (off > 1020) {
+ /* IHI, DHWB have 8-bit immediate operands (0..1020) */
+ adr += off;
+ off = 0;
+ }
+ }
+
+ /* Execute cache WB/INV instructions */
+ res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ xtensa_core_status_check(target);
+ if (res != ERROR_OK)
+ LOG_TARGET_ERROR(target,
+ "Error issuing cache writeback/invaldate instruction(s): %d",
+ res);
+ }
+ }
if (albuff != buffer)
free(albuff);
@@ -1766,8 +2017,18 @@ int xtensa_checksum_memory(struct target *target, target_addr_t address, uint32_
int xtensa_poll(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
+ if (xtensa_dm_poll(&xtensa->dbg_mod) != ERROR_OK) {
+ target->state = TARGET_UNKNOWN;
+ return ERROR_TARGET_NOT_EXAMINED;
+ }
- int res = xtensa_dm_power_status_read(&xtensa->dbg_mod, PWRSTAT_DEBUGWASRESET | PWRSTAT_COREWASRESET);
+ int res = xtensa_dm_power_status_read(&xtensa->dbg_mod, PWRSTAT_DEBUGWASRESET(xtensa) |
+ PWRSTAT_COREWASRESET(xtensa));
+ if (xtensa->dbg_mod.power_status.stat != xtensa->dbg_mod.power_status.stath)
+ LOG_TARGET_DEBUG(target, "PWRSTAT: read 0x%08" PRIx32 ", clear 0x%08lx, reread 0x%08" PRIx32,
+ xtensa->dbg_mod.power_status.stat,
+ PWRSTAT_DEBUGWASRESET(xtensa) | PWRSTAT_COREWASRESET(xtensa),
+ xtensa->dbg_mod.power_status.stath);
if (res != ERROR_OK)
return res;
@@ -1785,10 +2046,16 @@ int xtensa_poll(struct target *target)
if (res != ERROR_OK)
return res;
+ uint32_t prev_dsr = xtensa->dbg_mod.core_status.dsr;
res = xtensa_dm_core_status_read(&xtensa->dbg_mod);
if (res != ERROR_OK)
return res;
- if (xtensa->dbg_mod.power_status.stath & PWRSTAT_COREWASRESET) {
+ if (prev_dsr != xtensa->dbg_mod.core_status.dsr)
+ LOG_TARGET_DEBUG(target,
+ "DSR has changed: was 0x%08" PRIx32 " now 0x%08" PRIx32,
+ prev_dsr,
+ xtensa->dbg_mod.core_status.dsr);
+ if (xtensa->dbg_mod.power_status.stath & PWRSTAT_COREWASRESET(xtensa)) {
/* if RESET state is persitent */
target->state = TARGET_RESET;
} else if (!xtensa_dm_is_powered(&xtensa->dbg_mod)) {
@@ -1811,7 +2078,7 @@ int xtensa_poll(struct target *target)
* priorities: watchpoint == breakpoint > single step > debug interrupt. */
/* Watchpoint and breakpoint events at the same time results in special
* debug reason: DBG_REASON_WPTANDBKPT. */
- xtensa_reg_val_t halt_cause = xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE);
+ uint32_t halt_cause = xtensa_cause_get(target);
/* TODO: Add handling of DBG_REASON_EXC_CATCH */
if (halt_cause & DEBUGCAUSE_IC)
target->debug_reason = DBG_REASON_SINGLESTEP;
@@ -1823,7 +2090,8 @@ int xtensa_poll(struct target *target)
} else if (halt_cause & DEBUGCAUSE_DB) {
target->debug_reason = DBG_REASON_WATCHPOINT;
}
- LOG_TARGET_DEBUG(target, "Target halted, pc=0x%08" PRIX32 ", debug_reason=%08x, oldstate=%08x",
+ LOG_TARGET_DEBUG(target, "Target halted, pc=0x%08" PRIx32
+ ", debug_reason=%08" PRIx32 ", oldstate=%08" PRIx32,
xtensa_reg_get(target, XT_REG_IDX_PC),
target->debug_reason,
oldstate);
@@ -1831,8 +2099,6 @@ int xtensa_poll(struct target *target)
halt_cause,
xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE),
xtensa->dbg_mod.core_status.dsr);
- LOG_TARGET_INFO(target, "Target halted, PC=0x%08" PRIX32 ", debug_reason=%08x",
- xtensa_reg_get(target, XT_REG_IDX_PC), target->debug_reason);
xtensa_dm_core_status_clear(
&xtensa->dbg_mod,
OCDDSR_DEBUGPENDBREAK | OCDDSR_DEBUGINTBREAK | OCDDSR_DEBUGPENDTRAX |
@@ -1866,25 +2132,101 @@ int xtensa_poll(struct target *target)
return ERROR_OK;
}
+static int xtensa_update_instruction(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ unsigned int issue_ihi = xtensa_is_icacheable(xtensa, address);
+ unsigned int issue_dhwbi = xtensa_is_dcacheable(xtensa, address);
+ uint32_t icache_line_size = issue_ihi ? xtensa->core_config->icache.line_size : UINT32_MAX;
+ uint32_t dcache_line_size = issue_dhwbi ? xtensa->core_config->dcache.line_size : UINT32_MAX;
+ unsigned int same_ic_line = ((address & (icache_line_size - 1)) + size) <= icache_line_size;
+ unsigned int same_dc_line = ((address & (dcache_line_size - 1)) + size) <= dcache_line_size;
+ int ret;
+
+ if (size > icache_line_size)
+ return ERROR_FAIL;
+
+ if (issue_ihi || issue_dhwbi) {
+ /* We're going to use A3 here */
+ xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
+
+ /* Write start address to A3 and invalidate */
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, address);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ LOG_TARGET_DEBUG(target, "DHWBI, IHI for address "TARGET_ADDR_FMT, address);
+ if (issue_dhwbi) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_DHWBI(xtensa, XT_REG_A3, 0));
+ if (!same_dc_line) {
+ LOG_TARGET_DEBUG(target,
+ "DHWBI second dcache line for address "TARGET_ADDR_FMT,
+ address + 4);
+ xtensa_queue_exec_ins(xtensa, XT_INS_DHWBI(xtensa, XT_REG_A3, 4));
+ }
+ }
+ if (issue_ihi) {
+ xtensa_queue_exec_ins(xtensa, XT_INS_IHI(xtensa, XT_REG_A3, 0));
+ if (!same_ic_line) {
+ LOG_TARGET_DEBUG(target,
+ "IHI second icache line for address "TARGET_ADDR_FMT,
+ address + 4);
+ xtensa_queue_exec_ins(xtensa, XT_INS_IHI(xtensa, XT_REG_A3, 4));
+ }
+ }
+
+ /* Execute invalidate instructions */
+ ret = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ xtensa_core_status_check(target);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Error issuing cache invaldate instruction(s): %d", ret);
+ return ret;
+ }
+ }
+
+ /* Write new instructions to memory */
+ ret = target_write_buffer(target, address, size, buffer);
+ if (ret != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "Error writing instruction to memory: %d", ret);
+ return ret;
+ }
+
+ if (issue_dhwbi) {
+ /* Flush dcache so instruction propagates. A3 may be corrupted during memory write */
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, address);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_DHWB(xtensa, XT_REG_A3, 0));
+ LOG_DEBUG("DHWB dcache line for address "TARGET_ADDR_FMT, address);
+ if (!same_dc_line) {
+ LOG_TARGET_DEBUG(target, "DHWB second dcache line for address "TARGET_ADDR_FMT, address + 4);
+ xtensa_queue_exec_ins(xtensa, XT_INS_DHWB(xtensa, XT_REG_A3, 4));
+ }
+
+ /* Execute invalidate instructions */
+ ret = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ xtensa_core_status_check(target);
+ }
+
+ /* TODO: Handle L2 cache if present */
+ return ret;
+}
+
static int xtensa_sw_breakpoint_add(struct target *target,
struct breakpoint *breakpoint,
struct xtensa_sw_breakpoint *sw_bp)
{
+ struct xtensa *xtensa = target_to_xtensa(target);
int ret = target_read_buffer(target, breakpoint->address, XT_ISNS_SZ_MAX, sw_bp->insn);
if (ret != ERROR_OK) {
LOG_TARGET_ERROR(target, "Failed to read original instruction (%d)!", ret);
return ret;
}
- sw_bp->insn_sz = xtensa_insn_size_get(buf_get_u32(sw_bp->insn, 0, 24));
+ sw_bp->insn_sz = MIN(XT_ISNS_SZ_MAX, breakpoint->length);
sw_bp->oocd_bp = breakpoint;
- uint32_t break_insn = sw_bp->insn_sz == XT_ISNS_SZ_MAX ? XT_INS_BREAK(0, 0) : XT_INS_BREAKN(0);
- /* convert to target endianness */
- uint8_t break_insn_buff[4];
- target_buffer_set_u32(target, break_insn_buff, break_insn);
+ uint32_t break_insn = sw_bp->insn_sz == XT_ISNS_SZ_MAX ? XT_INS_BREAK(xtensa, 0, 0) : XT_INS_BREAKN(xtensa, 0);
- ret = target_write_buffer(target, breakpoint->address, sw_bp->insn_sz, break_insn_buff);
+ /* Underlying memory write will convert instruction endianness, don't do that here */
+ ret = xtensa_update_instruction(target, breakpoint->address, sw_bp->insn_sz, (uint8_t *)&break_insn);
if (ret != ERROR_OK) {
LOG_TARGET_ERROR(target, "Failed to write breakpoint instruction (%d)!", ret);
return ret;
@@ -1895,9 +2237,9 @@ static int xtensa_sw_breakpoint_add(struct target *target,
static int xtensa_sw_breakpoint_remove(struct target *target, struct xtensa_sw_breakpoint *sw_bp)
{
- int ret = target_write_buffer(target, sw_bp->oocd_bp->address, sw_bp->insn_sz, sw_bp->insn);
+ int ret = xtensa_update_instruction(target, sw_bp->oocd_bp->address, sw_bp->insn_sz, sw_bp->insn);
if (ret != ERROR_OK) {
- LOG_TARGET_ERROR(target, "Failed to read insn (%d)!", ret);
+ LOG_TARGET_ERROR(target, "Failed to write insn (%d)!", ret);
return ret;
}
sw_bp->oocd_bp = NULL;
@@ -1941,7 +2283,8 @@ int xtensa_breakpoint_add(struct target *target, struct breakpoint *breakpoint)
xtensa->hw_brps[slot] = breakpoint;
/* We will actually write the breakpoints when we resume the target. */
- LOG_TARGET_DEBUG(target, "placed HW breakpoint @ " TARGET_ADDR_FMT,
+ LOG_TARGET_DEBUG(target, "placed HW breakpoint %u @ " TARGET_ADDR_FMT,
+ slot,
breakpoint->address);
return ERROR_OK;
@@ -2063,6 +2406,12 @@ static int xtensa_build_reg_cache(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
+ unsigned int last_dbreg_num = 0;
+
+ if (xtensa->core_regs_num + xtensa->num_optregs != xtensa->total_regs_num)
+ LOG_TARGET_WARNING(target, "Register count MISMATCH: %d core regs, %d extended regs; %d expected",
+ xtensa->core_regs_num, xtensa->num_optregs, xtensa->total_regs_num);
+
struct reg_cache *reg_cache = calloc(1, sizeof(struct reg_cache));
if (!reg_cache) {
@@ -2071,86 +2420,101 @@ static int xtensa_build_reg_cache(struct target *target)
}
reg_cache->name = "Xtensa registers";
reg_cache->next = NULL;
- reg_cache->num_regs = XT_NUM_REGS + xtensa->core_config->user_regs_num;
/* Init reglist */
- struct reg *reg_list = calloc(reg_cache->num_regs, sizeof(struct reg));
+ unsigned int reg_list_size = XT_NUM_REGS + xtensa->num_optregs;
+ struct reg *reg_list = calloc(reg_list_size, sizeof(struct reg));
if (!reg_list) {
LOG_ERROR("Failed to alloc reg list!");
goto fail;
}
- xtensa->regs_num = 0;
-
- for (unsigned int i = 0; i < XT_NUM_REGS; i++) {
- reg_list[i].exist = false;
- if (xtensa_regs[i].type == XT_REG_USER) {
- if (xtensa_user_reg_exists(xtensa, i))
- reg_list[i].exist = true;
- else
- LOG_DEBUG("User reg '%s' (%d) does not exist", xtensa_regs[i].name, i);
- } else if (xtensa_regs[i].type == XT_REG_FR) {
- if (xtensa_fp_reg_exists(xtensa, i))
- reg_list[i].exist = true;
- else
- LOG_DEBUG("FP reg '%s' (%d) does not exist", xtensa_regs[i].name, i);
- } else if (xtensa_regs[i].type == XT_REG_SPECIAL) {
- if (xtensa_special_reg_exists(xtensa, i))
- reg_list[i].exist = true;
- else
- LOG_DEBUG("Special reg '%s' (%d) does not exist", xtensa_regs[i].name, i);
- } else {
- if (xtensa_regular_reg_exists(xtensa, i))
- reg_list[i].exist = true;
- else
- LOG_DEBUG("Regular reg '%s' (%d) does not exist", xtensa_regs[i].name, i);
- }
- reg_list[i].name = xtensa_regs[i].name;
- reg_list[i].size = 32;
- reg_list[i].value = calloc(1, 4 /*XT_REG_LEN*/);/* make Clang Static Analyzer happy */
- if (!reg_list[i].value) {
- LOG_ERROR("Failed to alloc reg list value!");
+ xtensa->dbregs_num = 0;
+ unsigned int didx = 0;
+ for (unsigned int whichlist = 0; whichlist < 2; whichlist++) {
+ struct xtensa_reg_desc *rlist = (whichlist == 0) ? xtensa_regs : xtensa->optregs;
+ unsigned int listsize = (whichlist == 0) ? XT_NUM_REGS : xtensa->num_optregs;
+ for (unsigned int i = 0; i < listsize; i++, didx++) {
+ reg_list[didx].exist = rlist[i].exist;
+ reg_list[didx].name = rlist[i].name;
+ reg_list[didx].size = 32;
+ reg_list[didx].value = calloc(1, 4 /*XT_REG_LEN*/); /* make Clang Static Analyzer happy */
+ if (!reg_list[didx].value) {
+ LOG_ERROR("Failed to alloc reg list value!");
+ goto fail;
+ }
+ reg_list[didx].dirty = false;
+ reg_list[didx].valid = false;
+ reg_list[didx].type = &xtensa_reg_type;
+ reg_list[didx].arch_info = xtensa;
+ if (rlist[i].exist && (rlist[i].dbreg_num > last_dbreg_num))
+ last_dbreg_num = rlist[i].dbreg_num;
+
+ if (xtensa_extra_debug_log) {
+ LOG_TARGET_DEBUG(target,
+ "POPULATE %-16s list %d exist %d, idx %d, type %d, dbreg_num 0x%04x",
+ reg_list[didx].name,
+ whichlist,
+ reg_list[didx].exist,
+ didx,
+ rlist[i].type,
+ rlist[i].dbreg_num);
+ }
+ }
+ }
+
+ xtensa->dbregs_num = last_dbreg_num + 1;
+ reg_cache->reg_list = reg_list;
+ reg_cache->num_regs = reg_list_size;
+
+ LOG_TARGET_DEBUG(target, "xtensa->total_regs_num %d reg_list_size %d xtensa->dbregs_num %d",
+ xtensa->total_regs_num, reg_list_size, xtensa->dbregs_num);
+
+ /* Construct empty-register list for handling unknown register requests */
+ xtensa->empty_regs = calloc(xtensa->dbregs_num, sizeof(struct reg));
+ if (!xtensa->empty_regs) {
+ LOG_TARGET_ERROR(target, "ERROR: Out of memory");
+ goto fail;
+ }
+ for (unsigned int i = 0; i < xtensa->dbregs_num; i++) {
+ xtensa->empty_regs[i].name = calloc(8, sizeof(char));
+ if (!xtensa->empty_regs[i].name) {
+ LOG_TARGET_ERROR(target, "ERROR: Out of memory");
goto fail;
}
- reg_list[i].dirty = false;
- reg_list[i].valid = false;
- reg_list[i].type = &xtensa_reg_type;
- reg_list[i].arch_info = xtensa;
- if (reg_list[i].exist)
- xtensa->regs_num++;
- }
- for (unsigned int i = 0; i < xtensa->core_config->user_regs_num; i++) {
- reg_list[XT_USR_REG_START + i].exist = true;
- reg_list[XT_USR_REG_START + i].name = xtensa->core_config->user_regs[i].name;
- reg_list[XT_USR_REG_START + i].size = xtensa->core_config->user_regs[i].size;
- reg_list[XT_USR_REG_START + i].value = calloc(1, reg_list[XT_USR_REG_START + i].size / 8);
- if (!reg_list[XT_USR_REG_START + i].value) {
- LOG_ERROR("Failed to alloc user reg list value!");
+ sprintf((char *)xtensa->empty_regs[i].name, "?0x%04x", i & 0x0000FFFF);
+ xtensa->empty_regs[i].size = 32;
+ xtensa->empty_regs[i].type = &xtensa_reg_type;
+ xtensa->empty_regs[i].value = calloc(1, 4 /*XT_REG_LEN*/); /* make Clang Static Analyzer happy */
+ if (!xtensa->empty_regs[i].value) {
+ LOG_ERROR("Failed to alloc empty reg list value!");
goto fail;
}
- reg_list[XT_USR_REG_START + i].dirty = false;
- reg_list[XT_USR_REG_START + i].valid = false;
- reg_list[XT_USR_REG_START + i].type = xtensa->core_config->user_regs[i].type;
- reg_list[XT_USR_REG_START + i].arch_info = xtensa;
- xtensa->regs_num++;
- }
- if (xtensa->core_config->gdb_general_regs_num >= xtensa->regs_num) {
- LOG_ERROR("Regs number less then GDB general regs number!");
- goto fail;
+ xtensa->empty_regs[i].arch_info = xtensa;
}
- /* assign GDB reg numbers to registers */
- for (unsigned int gdb_reg_id = 0; gdb_reg_id < xtensa->regs_num; gdb_reg_id++) {
- unsigned int reg_id = xtensa->core_config->gdb_regs_mapping[gdb_reg_id];
- if (reg_id >= reg_cache->num_regs) {
- LOG_ERROR("Invalid GDB map!");
+ /* Construct contiguous register list from contiguous descriptor list */
+ if (xtensa->regmap_contiguous && xtensa->contiguous_regs_desc) {
+ xtensa->contiguous_regs_list = calloc(xtensa->total_regs_num, sizeof(struct reg *));
+ if (!xtensa->contiguous_regs_list) {
+ LOG_TARGET_ERROR(target, "ERROR: Out of memory");
goto fail;
}
- if (!reg_list[reg_id].exist) {
- LOG_ERROR("Non-existing reg in GDB map!");
- goto fail;
+ for (unsigned int i = 0; i < xtensa->total_regs_num; i++) {
+ unsigned int j;
+ for (j = 0; j < reg_cache->num_regs; j++) {
+ if (!strcmp(reg_cache->reg_list[j].name, xtensa->contiguous_regs_desc[i]->name)) {
+ xtensa->contiguous_regs_list[i] = &(reg_cache->reg_list[j]);
+ LOG_TARGET_DEBUG(target,
+ "POPULATE contiguous regs list: %-16s, dbreg_num 0x%04x",
+ xtensa->contiguous_regs_list[i]->name,
+ xtensa->contiguous_regs_desc[i]->dbreg_num);
+ break;
+ }
+ }
+ if (j == reg_cache->num_regs)
+ LOG_TARGET_WARNING(target, "contiguous register %s not found",
+ xtensa->contiguous_regs_desc[i]->name);
}
- reg_list[reg_id].number = gdb_reg_id;
}
- reg_cache->reg_list = reg_list;
xtensa->algo_context_backup = calloc(reg_cache->num_regs, sizeof(void *));
if (!xtensa->algo_context_backup) {
@@ -2165,7 +2529,6 @@ static int xtensa_build_reg_cache(struct target *target)
goto fail;
}
}
-
xtensa->core_cache = reg_cache;
if (cache_p)
*cache_p = reg_cache;
@@ -2173,10 +2536,17 @@ static int xtensa_build_reg_cache(struct target *target)
fail:
if (reg_list) {
- for (unsigned int i = 0; i < reg_cache->num_regs; i++)
+ for (unsigned int i = 0; i < reg_list_size; i++)
free(reg_list[i].value);
free(reg_list);
}
+ if (xtensa->empty_regs) {
+ for (unsigned int i = 0; i < xtensa->dbregs_num; i++) {
+ free((void *)xtensa->empty_regs[i].name);
+ free(xtensa->empty_regs[i].value);
+ }
+ free(xtensa->empty_regs);
+ }
if (xtensa->algo_context_backup) {
for (unsigned int i = 0; i < reg_cache->num_regs; i++)
free(xtensa->algo_context_backup[i]);
@@ -2187,21 +2557,322 @@ fail:
return ERROR_FAIL;
}
+static int32_t xtensa_gdbqc_parse_exec_tie_ops(struct target *target, char *opstr)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ int32_t status = ERROR_COMMAND_ARGUMENT_INVALID;
+ /* Process op[] list */
+ while (opstr && (*opstr == ':')) {
+ uint8_t ops[32];
+ unsigned int oplen = strtoul(opstr + 1, &opstr, 16);
+ if (oplen > 32) {
+ LOG_TARGET_ERROR(target, "TIE access instruction too long (%d)\n", oplen);
+ break;
+ }
+ unsigned int i = 0;
+ while ((i < oplen) && opstr && (*opstr == ':'))
+ ops[i++] = strtoul(opstr + 1, &opstr, 16);
+ if (i != oplen) {
+ LOG_TARGET_ERROR(target, "TIE access instruction malformed (%d)\n", i);
+ break;
+ }
+
+ char insn_buf[128];
+ sprintf(insn_buf, "Exec %d-byte TIE sequence: ", oplen);
+ for (i = 0; i < oplen; i++)
+ sprintf(insn_buf + strlen(insn_buf), "%02x:", ops[i]);
+ LOG_TARGET_DEBUG(target, "%s", insn_buf);
+ xtensa_queue_exec_ins_wide(xtensa, ops, oplen); /* Handles endian-swap */
+ status = ERROR_OK;
+ }
+ return status;
+}
+
+static int xtensa_gdbqc_qxtreg(struct target *target, const char *packet, char **response_p)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ bool iswrite = (packet[0] == 'Q');
+ enum xtensa_qerr_e error;
+
+ /* Read/write TIE register. Requires spill location.
+ * qxtreg<num>:<len>:<oplen>:<op[0]>:<...>[:<oplen>:<op[0]>:<...>]
+ * Qxtreg<num>:<len>:<oplen>:<op[0]>:<...>[:<oplen>:<op[0]>:<...>]=<value>
+ */
+ if (!(xtensa->spill_buf)) {
+ LOG_ERROR("Spill location not specified. Try 'target remote <host>:3333 &spill_location0'");
+ error = XT_QERR_FAIL;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+
+ char *delim;
+ uint32_t regnum = strtoul(packet + 6, &delim, 16);
+ if (*delim != ':') {
+ LOG_ERROR("Malformed qxtreg packet");
+ error = XT_QERR_INVAL;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ uint32_t reglen = strtoul(delim + 1, &delim, 16);
+ if (*delim != ':') {
+ LOG_ERROR("Malformed qxtreg packet");
+ error = XT_QERR_INVAL;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ uint8_t regbuf[XT_QUERYPKT_RESP_MAX];
+ memset(regbuf, 0, XT_QUERYPKT_RESP_MAX);
+ LOG_DEBUG("TIE reg 0x%08" PRIx32 " %s (%d bytes)", regnum, iswrite ? "write" : "read", reglen);
+ if (reglen * 2 + 1 > XT_QUERYPKT_RESP_MAX) {
+ LOG_ERROR("TIE register too large");
+ error = XT_QERR_MEM;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+
+ /* (1) Save spill memory, (1.5) [if write then store value to spill location],
+ * (2) read old a4, (3) write spill address to a4.
+ * NOTE: ensure a4 is restored properly by all error handling logic
+ */
+ unsigned int memop_size = (xtensa->spill_loc & 3) ? 1 : 4;
+ int status = xtensa_read_memory(target, xtensa->spill_loc, memop_size,
+ xtensa->spill_bytes / memop_size, xtensa->spill_buf);
+ if (status != ERROR_OK) {
+ LOG_ERROR("Spill memory save");
+ error = XT_QERR_MEM;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ if (iswrite) {
+ /* Extract value and store in spill memory */
+ unsigned int b = 0;
+ char *valbuf = strchr(delim, '=');
+ if (!(valbuf && (*valbuf == '='))) {
+ LOG_ERROR("Malformed Qxtreg packet");
+ error = XT_QERR_INVAL;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ valbuf++;
+ while (*valbuf && *(valbuf + 1)) {
+ char bytestr[3] = { 0, 0, 0 };
+ strncpy(bytestr, valbuf, 2);
+ regbuf[b++] = strtoul(bytestr, NULL, 16);
+ valbuf += 2;
+ }
+ if (b != reglen) {
+ LOG_ERROR("Malformed Qxtreg packet");
+ error = XT_QERR_INVAL;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ status = xtensa_write_memory(target, xtensa->spill_loc, memop_size,
+ reglen / memop_size, regbuf);
+ if (status != ERROR_OK) {
+ LOG_ERROR("TIE value store");
+ error = XT_QERR_MEM;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ }
+ xtensa_reg_val_t orig_a4 = xtensa_reg_get(target, XT_REG_IDX_A4);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, xtensa->spill_loc);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A4));
+
+ int32_t tieop_status = xtensa_gdbqc_parse_exec_tie_ops(target, delim);
+
+ /* Restore a4 but not yet spill memory. Execute it all... */
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, orig_a4);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A4));
+ status = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ if (status != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "TIE queue execute: %d\n", status);
+ tieop_status = status;
+ }
+ status = xtensa_core_status_check(target);
+ if (status != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "TIE instr execute: %d\n", status);
+ tieop_status = status;
+ }
+
+ if (tieop_status == ERROR_OK) {
+ if (iswrite) {
+ /* TIE write succeeded; send OK */
+ strcpy(*response_p, "OK");
+ } else {
+ /* TIE read succeeded; copy result from spill memory */
+ status = xtensa_read_memory(target, xtensa->spill_loc, memop_size, reglen, regbuf);
+ if (status != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "TIE result read");
+ tieop_status = status;
+ }
+ unsigned int i;
+ for (i = 0; i < reglen; i++)
+ sprintf(*response_p + 2 * i, "%02x", regbuf[i]);
+ *(*response_p + 2 * i) = '\0';
+ LOG_TARGET_DEBUG(target, "TIE response: %s", *response_p);
+ }
+ }
+
+ /* Restore spill memory first, then report any previous errors */
+ status = xtensa_write_memory(target, xtensa->spill_loc, memop_size,
+ xtensa->spill_bytes / memop_size, xtensa->spill_buf);
+ if (status != ERROR_OK) {
+ LOG_ERROR("Spill memory restore");
+ error = XT_QERR_MEM;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ if (tieop_status != ERROR_OK) {
+ LOG_ERROR("TIE execution");
+ error = XT_QERR_FAIL;
+ goto xtensa_gdbqc_qxtreg_fail;
+ }
+ return ERROR_OK;
+
+xtensa_gdbqc_qxtreg_fail:
+ strcpy(*response_p, xt_qerr[error].chrval);
+ return xt_qerr[error].intval;
+}
+
+int xtensa_gdb_query_custom(struct target *target, const char *packet, char **response_p)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ enum xtensa_qerr_e error;
+ if (!packet || !response_p) {
+ LOG_TARGET_ERROR(target, "invalid parameter: packet %p response_p %p", packet, response_p);
+ return ERROR_FAIL;
+ }
+
+ *response_p = xtensa->qpkt_resp;
+ if (strncmp(packet, "qxtn", 4) == 0) {
+ strcpy(*response_p, "OpenOCD");
+ return ERROR_OK;
+ } else if (strncasecmp(packet, "qxtgdbversion=", 14) == 0) {
+ return ERROR_OK;
+ } else if ((strncmp(packet, "Qxtsis=", 7) == 0) || (strncmp(packet, "Qxtsds=", 7) == 0)) {
+ /* Confirm host cache params match core .cfg file */
+ struct xtensa_cache_config *cachep = (packet[4] == 'i') ?
+ &xtensa->core_config->icache : &xtensa->core_config->dcache;
+ unsigned int line_size = 0, size = 0, way_count = 0;
+ sscanf(&packet[7], "%x,%x,%x", &line_size, &size, &way_count);
+ if ((cachep->line_size != line_size) ||
+ (cachep->size != size) ||
+ (cachep->way_count != way_count)) {
+ LOG_TARGET_WARNING(target, "%cCache mismatch; check xtensa-core-XXX.cfg file",
+ cachep == &xtensa->core_config->icache ? 'I' : 'D');
+ }
+ strcpy(*response_p, "OK");
+ return ERROR_OK;
+ } else if ((strncmp(packet, "Qxtiram=", 8) == 0) || (strncmp(packet, "Qxtirom=", 8) == 0)) {
+ /* Confirm host IRAM/IROM params match core .cfg file */
+ struct xtensa_local_mem_config *memp = (packet[5] == 'a') ?
+ &xtensa->core_config->iram : &xtensa->core_config->irom;
+ unsigned int base = 0, size = 0, i;
+ char *pkt = (char *)&packet[7];
+ do {
+ pkt++;
+ size = strtoul(pkt, &pkt, 16);
+ pkt++;
+ base = strtoul(pkt, &pkt, 16);
+ LOG_TARGET_DEBUG(target, "memcheck: %dB @ 0x%08x", size, base);
+ for (i = 0; i < memp->count; i++) {
+ if ((memp->regions[i].base == base) && (memp->regions[i].size == size))
+ break;
+ }
+ if (i == memp->count) {
+ LOG_TARGET_WARNING(target, "%s mismatch; check xtensa-core-XXX.cfg file",
+ memp == &xtensa->core_config->iram ? "IRAM" : "IROM");
+ break;
+ }
+ for (i = 0; i < 11; i++) {
+ pkt++;
+ strtoul(pkt, &pkt, 16);
+ }
+ } while (pkt && (pkt[0] == ','));
+ strcpy(*response_p, "OK");
+ return ERROR_OK;
+ } else if (strncmp(packet, "Qxtexcmlvl=", 11) == 0) {
+ /* Confirm host EXCM_LEVEL matches core .cfg file */
+ unsigned int excm_level = strtoul(&packet[11], NULL, 0);
+ if (!xtensa->core_config->high_irq.enabled ||
+ (excm_level != xtensa->core_config->high_irq.excm_level))
+ LOG_TARGET_WARNING(target, "EXCM_LEVEL mismatch; check xtensa-core-XXX.cfg file");
+ strcpy(*response_p, "OK");
+ return ERROR_OK;
+ } else if ((strncmp(packet, "Qxtl2cs=", 8) == 0) ||
+ (strncmp(packet, "Qxtl2ca=", 8) == 0) ||
+ (strncmp(packet, "Qxtdensity=", 11) == 0)) {
+ strcpy(*response_p, "OK");
+ return ERROR_OK;
+ } else if (strncmp(packet, "Qxtspill=", 9) == 0) {
+ char *delim;
+ uint32_t spill_loc = strtoul(packet + 9, &delim, 16);
+ if (*delim != ':') {
+ LOG_ERROR("Malformed Qxtspill packet");
+ error = XT_QERR_INVAL;
+ goto xtensa_gdb_query_custom_fail;
+ }
+ xtensa->spill_loc = spill_loc;
+ xtensa->spill_bytes = strtoul(delim + 1, NULL, 16);
+ if (xtensa->spill_buf)
+ free(xtensa->spill_buf);
+ xtensa->spill_buf = calloc(1, xtensa->spill_bytes);
+ if (!xtensa->spill_buf) {
+ LOG_ERROR("Spill buf alloc");
+ error = XT_QERR_MEM;
+ goto xtensa_gdb_query_custom_fail;
+ }
+ LOG_TARGET_DEBUG(target, "Set spill 0x%08" PRIx32 " (%d)", xtensa->spill_loc, xtensa->spill_bytes);
+ strcpy(*response_p, "OK");
+ return ERROR_OK;
+ } else if (strncasecmp(packet, "qxtreg", 6) == 0) {
+ return xtensa_gdbqc_qxtreg(target, packet, response_p);
+ } else if ((strncmp(packet, "qTStatus", 8) == 0) ||
+ (strncmp(packet, "qxtftie", 7) == 0) ||
+ (strncmp(packet, "qxtstie", 7) == 0)) {
+ /* Return empty string to indicate trace, TIE wire debug are unsupported */
+ strcpy(*response_p, "");
+ return ERROR_OK;
+ }
+
+ /* Warn for all other queries, but do not return errors */
+ LOG_TARGET_WARNING(target, "Unknown target-specific query packet: %s", packet);
+ strcpy(*response_p, "");
+ return ERROR_OK;
+
+xtensa_gdb_query_custom_fail:
+ strcpy(*response_p, xt_qerr[error].chrval);
+ return xt_qerr[error].intval;
+}
+
int xtensa_init_arch_info(struct target *target, struct xtensa *xtensa,
- const struct xtensa_config *xtensa_config,
const struct xtensa_debug_module_config *dm_cfg)
{
target->arch_info = xtensa;
xtensa->common_magic = XTENSA_COMMON_MAGIC;
xtensa->target = target;
- xtensa->core_config = xtensa_config;
xtensa->stepping_isr_mode = XT_STEPPING_ISR_ON;
- if (!xtensa->core_config->exc.enabled || !xtensa->core_config->irq.enabled ||
- !xtensa->core_config->high_irq.enabled || !xtensa->core_config->debug.enabled) {
- LOG_ERROR("Xtensa configuration does not support debugging!");
+ xtensa->core_config = calloc(1, sizeof(struct xtensa_config));
+ if (!xtensa->core_config) {
+ LOG_ERROR("Xtensa configuration alloc failed\n");
return ERROR_FAIL;
}
+
+ /* Default cache settings are disabled with 1 way */
+ xtensa->core_config->icache.way_count = 1;
+ xtensa->core_config->dcache.way_count = 1;
+
+ /* chrval: AR3/AR4 register names will change with window mapping.
+ * intval: tracks whether scratch register was set through gdb P packet.
+ */
+ for (enum xtensa_ar_scratch_set_e s = 0; s < XT_AR_SCRATCH_NUM; s++) {
+ xtensa->scratch_ars[s].chrval = calloc(8, sizeof(char));
+ if (!xtensa->scratch_ars[s].chrval) {
+ for (enum xtensa_ar_scratch_set_e f = 0; f < s; f++)
+ free(xtensa->scratch_ars[f].chrval);
+ free(xtensa->core_config);
+ LOG_ERROR("Xtensa scratch AR alloc failed\n");
+ return ERROR_FAIL;
+ }
+ xtensa->scratch_ars[s].intval = false;
+ sprintf(xtensa->scratch_ars[s].chrval, "%s%d",
+ ((s == XT_AR_SCRATCH_A3) || (s == XT_AR_SCRATCH_A4)) ? "a" : "ar",
+ ((s == XT_AR_SCRATCH_A3) || (s == XT_AR_SCRATCH_AR3)) ? 3 : 4);
+ }
+
return xtensa_dm_init(&xtensa->dbg_mod, dm_cfg);
}
@@ -2215,12 +2886,12 @@ int xtensa_target_init(struct command_context *cmd_ctx, struct target *target)
struct xtensa *xtensa = target_to_xtensa(target);
xtensa->come_online_probes_num = 3;
- xtensa->hw_brps = calloc(xtensa->core_config->debug.ibreaks_num, sizeof(struct breakpoint *));
+ xtensa->hw_brps = calloc(XT_HW_IBREAK_MAX_NUM, sizeof(struct breakpoint *));
if (!xtensa->hw_brps) {
LOG_ERROR("Failed to alloc memory for HW breakpoints!");
return ERROR_FAIL;
}
- xtensa->hw_wps = calloc(xtensa->core_config->debug.dbreaks_num, sizeof(struct watchpoint *));
+ xtensa->hw_wps = calloc(XT_HW_DBREAK_MAX_NUM, sizeof(struct watchpoint *));
if (!xtensa->hw_wps) {
free(xtensa->hw_brps);
LOG_ERROR("Failed to alloc memory for HW watchpoints!");
@@ -2234,6 +2905,11 @@ int xtensa_target_init(struct command_context *cmd_ctx, struct target *target)
return ERROR_FAIL;
}
+ xtensa->spill_loc = 0xffffffff;
+ xtensa->spill_bytes = 0;
+ xtensa->spill_buf = NULL;
+ xtensa->probe_lsddr32p = -1; /* Probe for fast load/store operations */
+
return xtensa_build_reg_cache(target);
}
@@ -2254,6 +2930,21 @@ static void xtensa_free_reg_cache(struct target *target)
}
xtensa->core_cache = NULL;
xtensa->algo_context_backup = NULL;
+
+ if (xtensa->empty_regs) {
+ for (unsigned int i = 0; i < xtensa->dbregs_num; i++) {
+ free((void *)xtensa->empty_regs[i].name);
+ free(xtensa->empty_regs[i].value);
+ }
+ free(xtensa->empty_regs);
+ }
+ xtensa->empty_regs = NULL;
+ if (xtensa->optregs) {
+ for (unsigned int i = 0; i < xtensa->num_optregs; i++)
+ free((void *)xtensa->optregs[i].name);
+ free(xtensa->optregs);
+ }
+ xtensa->optregs = NULL;
}
void xtensa_target_deinit(struct target *target)
@@ -2263,22 +2954,30 @@ void xtensa_target_deinit(struct target *target)
LOG_DEBUG("start");
if (target_was_examined(target)) {
- int ret = xtensa_queue_dbg_reg_write(xtensa, NARADR_DCRCLR, OCDDCR_ENABLEOCD);
+ int ret = xtensa_queue_dbg_reg_write(xtensa, XDMREG_DCRCLR, OCDDCR_ENABLEOCD);
if (ret != ERROR_OK) {
LOG_ERROR("Failed to queue OCDDCR_ENABLEOCD clear operation!");
return;
}
xtensa_dm_queue_tdi_idle(&xtensa->dbg_mod);
- ret = jtag_execute_queue();
+ ret = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (ret != ERROR_OK) {
LOG_ERROR("Failed to clear OCDDCR_ENABLEOCD!");
return;
}
+ xtensa_dm_deinit(&xtensa->dbg_mod);
}
xtensa_free_reg_cache(target);
free(xtensa->hw_brps);
free(xtensa->hw_wps);
free(xtensa->sw_brps);
+ if (xtensa->spill_buf) {
+ free(xtensa->spill_buf);
+ xtensa->spill_buf = NULL;
+ }
+ for (enum xtensa_ar_scratch_set_e s = 0; s < XT_AR_SCRATCH_NUM; s++)
+ free(xtensa->scratch_ars[s].chrval);
+ free(xtensa->core_config);
}
const char *xtensa_get_gdb_arch(struct target *target)
@@ -2286,6 +2985,523 @@ const char *xtensa_get_gdb_arch(struct target *target)
return "xtensa";
}
+/* exe <ascii-encoded hexadecimal instruction bytes> */
+static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ /* Process ascii-encoded hex byte string */
+ const char *parm = CMD_ARGV[0];
+ unsigned int parm_len = strlen(parm);
+ if ((parm_len >= 64) || (parm_len & 1)) {
+ LOG_ERROR("Invalid parameter length (%d): must be even, < 64 characters", parm_len);
+ return ERROR_FAIL;
+ }
+
+ uint8_t ops[32];
+ memset(ops, 0, 32);
+ unsigned int oplen = parm_len / 2;
+ char encoded_byte[3] = { 0, 0, 0 };
+ for (unsigned int i = 0; i < oplen; i++) {
+ encoded_byte[0] = *parm++;
+ encoded_byte[1] = *parm++;
+ ops[i] = strtoul(encoded_byte, NULL, 16);
+ }
+
+ /* GDB must handle state save/restore.
+ * Flush reg cache in case spill location is in an AR
+ * Update CPENABLE only for this execution; later restore cached copy
+ * Keep a copy of exccause in case executed code triggers an exception
+ */
+ int status = xtensa_write_dirty_registers(target);
+ if (status != ERROR_OK) {
+ LOG_ERROR("%s: Failed to write back register cache.", target_name(target));
+ return ERROR_FAIL;
+ }
+ xtensa_reg_val_t exccause = xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE);
+ xtensa_reg_val_t cpenable = xtensa_reg_get(target, XT_REG_IDX_CPENABLE);
+ xtensa_reg_val_t a3 = xtensa_reg_get(target, XT_REG_IDX_A3);
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, 0xffffffff);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+ xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa,
+ xtensa_regs[XT_REG_IDX_CPENABLE].reg_num, XT_REG_A3));
+ xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, a3);
+ xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+
+ /* Queue instruction list and execute everything */
+ LOG_TARGET_DEBUG(target, "execute stub: %s", CMD_ARGV[0]);
+ xtensa_queue_exec_ins_wide(xtensa, ops, oplen); /* Handles endian-swap */
+ status = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+ if (status != ERROR_OK)
+ LOG_TARGET_ERROR(target, "TIE queue execute: %d\n", status);
+ status = xtensa_core_status_check(target);
+ if (status != ERROR_OK)
+ LOG_TARGET_ERROR(target, "TIE instr execute: %d\n", status);
+
+ /* Reread register cache and restore saved regs after instruction execution */
+ if (xtensa_fetch_all_regs(target) != ERROR_OK)
+ LOG_TARGET_ERROR(target, "%s: Failed to fetch register cache (post-exec).", target_name(target));
+ xtensa_reg_set(target, XT_REG_IDX_EXCCAUSE, exccause);
+ xtensa_reg_set(target, XT_REG_IDX_CPENABLE, cpenable);
+ return status;
+}
+
+COMMAND_HANDLER(xtensa_cmd_exe)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_exe_do, get_current_target(CMD_CTX));
+}
+
+/* xtdef <name> */
+COMMAND_HELPER(xtensa_cmd_xtdef_do, struct xtensa *xtensa)
+{
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ const char *core_name = CMD_ARGV[0];
+ if (strcasecmp(core_name, "LX") == 0) {
+ xtensa->core_config->core_type = XT_LX;
+ } else {
+ LOG_ERROR("xtdef [LX]\n");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(xtensa_cmd_xtdef)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtdef_do,
+ target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
+static inline bool xtensa_cmd_xtopt_legal_val(char *opt, int val, int min, int max)
+{
+ if ((val < min) || (val > max)) {
+ LOG_ERROR("xtopt %s (%d) out of range [%d..%d]\n", opt, val, min, max);
+ return false;
+ }
+ return true;
+}
+
+/* xtopt <name> <value> */
+COMMAND_HELPER(xtensa_cmd_xtopt_do, struct xtensa *xtensa)
+{
+ if (CMD_ARGC != 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ const char *opt_name = CMD_ARGV[0];
+ int opt_val = strtol(CMD_ARGV[1], NULL, 0);
+ if (strcasecmp(opt_name, "arnum") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("arnum", opt_val, 0, 64))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->aregs_num = opt_val;
+ } else if (strcasecmp(opt_name, "windowed") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("windowed", opt_val, 0, 1))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->windowed = opt_val;
+ } else if (strcasecmp(opt_name, "cpenable") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("cpenable", opt_val, 0, 1))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->coproc = opt_val;
+ } else if (strcasecmp(opt_name, "exceptions") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("exceptions", opt_val, 0, 1))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->exceptions = opt_val;
+ } else if (strcasecmp(opt_name, "intnum") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("intnum", opt_val, 0, 32))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->irq.enabled = (opt_val > 0);
+ xtensa->core_config->irq.irq_num = opt_val;
+ } else if (strcasecmp(opt_name, "hipriints") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("hipriints", opt_val, 0, 1))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->high_irq.enabled = opt_val;
+ } else if (strcasecmp(opt_name, "excmlevel") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("excmlevel", opt_val, 1, 6))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ if (!xtensa->core_config->high_irq.enabled) {
+ LOG_ERROR("xtopt excmlevel requires hipriints\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ xtensa->core_config->high_irq.excm_level = opt_val;
+ } else if (strcasecmp(opt_name, "intlevels") == 0) {
+ if (xtensa->core_config->core_type == XT_LX) {
+ if (!xtensa_cmd_xtopt_legal_val("intlevels", opt_val, 2, 6))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ } else {
+ if (!xtensa_cmd_xtopt_legal_val("intlevels", opt_val, 1, 255))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ if (!xtensa->core_config->high_irq.enabled) {
+ LOG_ERROR("xtopt intlevels requires hipriints\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ xtensa->core_config->high_irq.level_num = opt_val;
+ } else if (strcasecmp(opt_name, "debuglevel") == 0) {
+ if (xtensa->core_config->core_type == XT_LX) {
+ if (!xtensa_cmd_xtopt_legal_val("debuglevel", opt_val, 2, 6))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ } else {
+ if (!xtensa_cmd_xtopt_legal_val("debuglevel", opt_val, 0, 0))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+ xtensa->core_config->debug.enabled = 1;
+ xtensa->core_config->debug.irq_level = opt_val;
+ } else if (strcasecmp(opt_name, "ibreaknum") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("ibreaknum", opt_val, 0, 2))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->debug.ibreaks_num = opt_val;
+ } else if (strcasecmp(opt_name, "dbreaknum") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("dbreaknum", opt_val, 0, 2))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->debug.dbreaks_num = opt_val;
+ } else if (strcasecmp(opt_name, "tracemem") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("tracemem", opt_val, 0, 256 * 1024))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->trace.mem_sz = opt_val;
+ xtensa->core_config->trace.enabled = (opt_val > 0);
+ } else if (strcasecmp(opt_name, "tracememrev") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("tracememrev", opt_val, 0, 1))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->trace.reversed_mem_access = opt_val;
+ } else if (strcasecmp(opt_name, "perfcount") == 0) {
+ if (!xtensa_cmd_xtopt_legal_val("perfcount", opt_val, 0, 8))
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ xtensa->core_config->debug.perfcount_num = opt_val;
+ } else {
+ LOG_WARNING("Unknown xtensa command ignored: \"xtopt %s %s\"", CMD_ARGV[0], CMD_ARGV[1]);
+ return ERROR_OK;
+ }
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(xtensa_cmd_xtopt)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtopt_do,
+ target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
+/* xtmem <type> [parameters] */
+COMMAND_HELPER(xtensa_cmd_xtmem_do, struct xtensa *xtensa)
+{
+ struct xtensa_cache_config *cachep = NULL;
+ struct xtensa_local_mem_config *memp = NULL;
+ int mem_access = 0;
+ bool is_dcache = false;
+
+ if (CMD_ARGC == 0) {
+ LOG_ERROR("xtmem <type> [parameters]\n");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ const char *mem_name = CMD_ARGV[0];
+ if (strcasecmp(mem_name, "icache") == 0) {
+ cachep = &xtensa->core_config->icache;
+ } else if (strcasecmp(mem_name, "dcache") == 0) {
+ cachep = &xtensa->core_config->dcache;
+ is_dcache = true;
+ } else if (strcasecmp(mem_name, "l2cache") == 0) {
+ /* TODO: support L2 cache */
+ } else if (strcasecmp(mem_name, "l2addr") == 0) {
+ /* TODO: support L2 cache */
+ } else if (strcasecmp(mem_name, "iram") == 0) {
+ memp = &xtensa->core_config->iram;
+ mem_access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE;
+ } else if (strcasecmp(mem_name, "dram") == 0) {
+ memp = &xtensa->core_config->dram;
+ mem_access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE;
+ } else if (strcasecmp(mem_name, "sram") == 0) {
+ memp = &xtensa->core_config->sram;
+ mem_access = XT_MEM_ACCESS_READ | XT_MEM_ACCESS_WRITE;
+ } else if (strcasecmp(mem_name, "irom") == 0) {
+ memp = &xtensa->core_config->irom;
+ mem_access = XT_MEM_ACCESS_READ;
+ } else if (strcasecmp(mem_name, "drom") == 0) {
+ memp = &xtensa->core_config->drom;
+ mem_access = XT_MEM_ACCESS_READ;
+ } else if (strcasecmp(mem_name, "srom") == 0) {
+ memp = &xtensa->core_config->srom;
+ mem_access = XT_MEM_ACCESS_READ;
+ } else {
+ LOG_ERROR("xtmem types: <icache|dcache|l2cache|l2addr|iram|irom|dram|drom|sram|srom>\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ if (cachep) {
+ if ((CMD_ARGC != 4) && (CMD_ARGC != 5)) {
+ LOG_ERROR("xtmem <cachetype> <linebytes> <cachebytes> <ways> [writeback]\n");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+ cachep->line_size = strtoul(CMD_ARGV[1], NULL, 0);
+ cachep->size = strtoul(CMD_ARGV[2], NULL, 0);
+ cachep->way_count = strtoul(CMD_ARGV[3], NULL, 0);
+ cachep->writeback = ((CMD_ARGC == 5) && is_dcache) ?
+ strtoul(CMD_ARGV[4], NULL, 0) : 0;
+ } else if (memp) {
+ if (CMD_ARGC != 3) {
+ LOG_ERROR("xtmem <memtype> <baseaddr> <bytes>\n");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+ struct xtensa_local_mem_region_config *memcfgp = &memp->regions[memp->count];
+ memcfgp->base = strtoul(CMD_ARGV[1], NULL, 0);
+ memcfgp->size = strtoul(CMD_ARGV[2], NULL, 0);
+ memcfgp->access = mem_access;
+ memp->count++;
+ }
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(xtensa_cmd_xtmem)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtmem_do,
+ target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
+/* xtmpu <num FG seg> <min seg size> <lockable> <executeonly> */
+COMMAND_HELPER(xtensa_cmd_xtmpu_do, struct xtensa *xtensa)
+{
+ if (CMD_ARGC != 4) {
+ LOG_ERROR("xtmpu <num FG seg> <min seg size> <lockable> <executeonly>\n");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ unsigned int nfgseg = strtoul(CMD_ARGV[0], NULL, 0);
+ unsigned int minsegsize = strtoul(CMD_ARGV[1], NULL, 0);
+ unsigned int lockable = strtoul(CMD_ARGV[2], NULL, 0);
+ unsigned int execonly = strtoul(CMD_ARGV[3], NULL, 0);
+
+ if ((nfgseg > 32)) {
+ LOG_ERROR("<nfgseg> must be within [0..32]\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ } else if (minsegsize & (minsegsize - 1)) {
+ LOG_ERROR("<minsegsize> must be a power of 2 >= 32\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ } else if (lockable > 1) {
+ LOG_ERROR("<lockable> must be 0 or 1\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ } else if (execonly > 1) {
+ LOG_ERROR("<execonly> must be 0 or 1\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ xtensa->core_config->mpu.enabled = true;
+ xtensa->core_config->mpu.nfgseg = nfgseg;
+ xtensa->core_config->mpu.minsegsize = minsegsize;
+ xtensa->core_config->mpu.lockable = lockable;
+ xtensa->core_config->mpu.execonly = execonly;
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(xtensa_cmd_xtmpu)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtmpu_do,
+ target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
+/* xtmmu <NIREFILLENTRIES> <NDREFILLENTRIES> <IVARWAY56> <DVARWAY56> */
+COMMAND_HELPER(xtensa_cmd_xtmmu_do, struct xtensa *xtensa)
+{
+ if (CMD_ARGC != 2) {
+ LOG_ERROR("xtmmu <NIREFILLENTRIES> <NDREFILLENTRIES>\n");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ unsigned int nirefillentries = strtoul(CMD_ARGV[0], NULL, 0);
+ unsigned int ndrefillentries = strtoul(CMD_ARGV[1], NULL, 0);
+ if ((nirefillentries != 16) && (nirefillentries != 32)) {
+ LOG_ERROR("<nirefillentries> must be 16 or 32\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ } else if ((ndrefillentries != 16) && (ndrefillentries != 32)) {
+ LOG_ERROR("<ndrefillentries> must be 16 or 32\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ xtensa->core_config->mmu.enabled = true;
+ xtensa->core_config->mmu.itlb_entries_count = nirefillentries;
+ xtensa->core_config->mmu.dtlb_entries_count = ndrefillentries;
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(xtensa_cmd_xtmmu)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtmmu_do,
+ target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
+/* xtregs <numregs>
+ * xtreg <regname> <regnum> */
+COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
+{
+ if (CMD_ARGC == 1) {
+ int32_t numregs = strtoul(CMD_ARGV[0], NULL, 0);
+ if ((numregs <= 0) || (numregs > UINT16_MAX)) {
+ LOG_ERROR("xtreg <numregs>: Invalid 'numregs' (%d)", numregs);
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+ if ((xtensa->genpkt_regs_num > 0) && (numregs < (int32_t)xtensa->genpkt_regs_num)) {
+ LOG_ERROR("xtregs (%d) must be larger than numgenregs (%d) (if xtregfmt specified)",
+ numregs, xtensa->genpkt_regs_num);
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+ xtensa->total_regs_num = numregs;
+ xtensa->core_regs_num = 0;
+ xtensa->num_optregs = 0;
+ /* A little more memory than required, but saves a second initialization pass */
+ xtensa->optregs = calloc(xtensa->total_regs_num, sizeof(struct xtensa_reg_desc));
+ if (!xtensa->optregs) {
+ LOG_ERROR("Failed to allocate xtensa->optregs!");
+ return ERROR_FAIL;
+ }
+ return ERROR_OK;
+ } else if (CMD_ARGC != 2) {
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ /* "xtregfmt contiguous" must be specified prior to the first "xtreg" definition
+ * if general register (g-packet) requests or contiguous register maps are supported */
+ if (xtensa->regmap_contiguous && !xtensa->contiguous_regs_desc) {
+ xtensa->contiguous_regs_desc = calloc(xtensa->total_regs_num, sizeof(struct xtensa_reg_desc *));
+ if (!xtensa->contiguous_regs_desc) {
+ LOG_ERROR("Failed to allocate xtensa->contiguous_regs_desc!");
+ return ERROR_FAIL;
+ }
+ }
+
+ const char *regname = CMD_ARGV[0];
+ unsigned int regnum = strtoul(CMD_ARGV[1], NULL, 0);
+ if (regnum > UINT16_MAX) {
+ LOG_ERROR("<regnum> must be a 16-bit number");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ if ((xtensa->num_optregs + xtensa->core_regs_num) >= xtensa->total_regs_num) {
+ if (xtensa->total_regs_num)
+ LOG_ERROR("'xtreg %s 0x%04x': Too many registers (%d expected, %d core %d extended)",
+ regname, regnum,
+ xtensa->total_regs_num, xtensa->core_regs_num, xtensa->num_optregs);
+ else
+ LOG_ERROR("'xtreg %s 0x%04x': Number of registers unspecified",
+ regname, regnum);
+ return ERROR_FAIL;
+ }
+
+ /* Determine whether register belongs in xtensa_regs[] or xtensa->xtensa_spec_regs[] */
+ struct xtensa_reg_desc *rptr = &xtensa->optregs[xtensa->num_optregs];
+ bool is_extended_reg = true;
+ unsigned int ridx;
+ for (ridx = 0; ridx < XT_NUM_REGS; ridx++) {
+ if (strcmp(CMD_ARGV[0], xtensa_regs[ridx].name) == 0) {
+ /* Flag core register as defined */
+ rptr = &xtensa_regs[ridx];
+ xtensa->core_regs_num++;
+ is_extended_reg = false;
+ break;
+ }
+ }
+
+ rptr->exist = true;
+ if (is_extended_reg) {
+ /* Register ID, debugger-visible register ID */
+ rptr->name = strdup(CMD_ARGV[0]);
+ rptr->dbreg_num = regnum;
+ rptr->reg_num = (regnum & XT_REG_INDEX_MASK);
+ xtensa->num_optregs++;
+
+ /* Register type */
+ if ((regnum & XT_REG_GENERAL_MASK) == XT_REG_GENERAL_VAL) {
+ rptr->type = XT_REG_GENERAL;
+ } else if ((regnum & XT_REG_USER_MASK) == XT_REG_USER_VAL) {
+ rptr->type = XT_REG_USER;
+ } else if ((regnum & XT_REG_FR_MASK) == XT_REG_FR_VAL) {
+ rptr->type = XT_REG_FR;
+ } else if ((regnum & XT_REG_SPECIAL_MASK) == XT_REG_SPECIAL_VAL) {
+ rptr->type = XT_REG_SPECIAL;
+ } else if ((regnum & XT_REG_RELGEN_MASK) == XT_REG_RELGEN_VAL) {
+ /* WARNING: For these registers, regnum points to the
+ * index of the corresponding ARx registers, NOT to
+ * the processor register number! */
+ rptr->type = XT_REG_RELGEN;
+ rptr->reg_num += XT_REG_IDX_ARFIRST;
+ rptr->dbreg_num += XT_REG_IDX_ARFIRST;
+ } else if ((regnum & XT_REG_TIE_MASK) != 0) {
+ rptr->type = XT_REG_TIE;
+ } else {
+ rptr->type = XT_REG_OTHER;
+ }
+
+ /* Register flags */
+ if ((strcmp(rptr->name, "mmid") == 0) || (strcmp(rptr->name, "eraccess") == 0) ||
+ (strcmp(rptr->name, "ddr") == 0) || (strcmp(rptr->name, "intset") == 0) ||
+ (strcmp(rptr->name, "intclear") == 0))
+ rptr->flags = XT_REGF_NOREAD;
+ else
+ rptr->flags = 0;
+
+ if ((rptr->reg_num == (XT_PS_REG_NUM_BASE + xtensa->core_config->debug.irq_level)) &&
+ (xtensa->core_config->core_type == XT_LX) && (rptr->type == XT_REG_SPECIAL)) {
+ xtensa->eps_dbglevel_idx = XT_NUM_REGS + xtensa->num_optregs - 1;
+ LOG_DEBUG("Setting PS (%s) index to %d", rptr->name, xtensa->eps_dbglevel_idx);
+ }
+ } else if (strcmp(rptr->name, "cpenable") == 0) {
+ xtensa->core_config->coproc = true;
+ }
+
+ /* Build out list of contiguous registers in specified order */
+ unsigned int running_reg_count = xtensa->num_optregs + xtensa->core_regs_num;
+ if (xtensa->contiguous_regs_desc) {
+ assert((running_reg_count <= xtensa->total_regs_num) && "contiguous register address internal error!");
+ xtensa->contiguous_regs_desc[running_reg_count - 1] = rptr;
+ }
+ if (xtensa_extra_debug_log)
+ LOG_DEBUG("Added %s register %-16s: 0x%04x/0x%02x t%d (%d of %d)",
+ is_extended_reg ? "config-specific" : "core",
+ rptr->name, rptr->dbreg_num, rptr->reg_num, rptr->type,
+ is_extended_reg ? xtensa->num_optregs : ridx,
+ is_extended_reg ? xtensa->total_regs_num : XT_NUM_REGS);
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(xtensa_cmd_xtreg)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtreg_do,
+ target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
+/* xtregfmt <contiguous|sparse> [numgregs] */
+COMMAND_HELPER(xtensa_cmd_xtregfmt_do, struct xtensa *xtensa)
+{
+ if ((CMD_ARGC == 1) || (CMD_ARGC == 2)) {
+ if (!strcasecmp(CMD_ARGV[0], "sparse")) {
+ return ERROR_OK;
+ } else if (!strcasecmp(CMD_ARGV[0], "contiguous")) {
+ xtensa->regmap_contiguous = true;
+ if (CMD_ARGC == 2) {
+ unsigned int numgregs = strtoul(CMD_ARGV[1], NULL, 0);
+ if ((numgregs <= 0) ||
+ ((numgregs > xtensa->total_regs_num) &&
+ (xtensa->total_regs_num > 0))) {
+ LOG_ERROR("xtregfmt: if specified, numgregs (%d) must be <= numregs (%d)",
+ numgregs, xtensa->total_regs_num);
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+ xtensa->genpkt_regs_num = numgregs;
+ }
+ return ERROR_OK;
+ }
+ }
+ return ERROR_COMMAND_SYNTAX_ERROR;
+}
+
+COMMAND_HANDLER(xtensa_cmd_xtregfmt)
+{
+ return CALL_COMMAND_HANDLER(xtensa_cmd_xtregfmt_do,
+ target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
COMMAND_HELPER(xtensa_cmd_permissive_mode_do, struct xtensa *xtensa)
{
return CALL_COMMAND_HANDLER(handle_command_parse_bool,
@@ -2436,7 +3652,7 @@ COMMAND_HANDLER(xtensa_cmd_mask_interrupts)
COMMAND_HELPER(xtensa_cmd_smpbreak_do, struct target *target)
{
- int res = ERROR_OK;
+ int res;
uint32_t val = 0;
if (CMD_ARGC >= 1) {
@@ -2469,16 +3685,15 @@ COMMAND_HELPER(xtensa_cmd_smpbreak_do, struct target *target)
} else {
struct xtensa *xtensa = target_to_xtensa(target);
res = xtensa_smpbreak_read(xtensa, &val);
- if (res == ERROR_OK) {
+ if (res == ERROR_OK)
command_print(CMD, "Current bits set:%s%s%s%s",
(val & OCDDCR_BREAKINEN) ? " BreakIn" : "",
(val & OCDDCR_BREAKOUTEN) ? " BreakOut" : "",
(val & OCDDCR_RUNSTALLINEN) ? " RunStallIn" : "",
(val & OCDDCR_DEBUGMODEOUTEN) ? " DebugModeOut" : ""
);
- } else {
+ else
command_print(CMD, "Failed to get smpbreak config %d", res);
- }
}
return res;
}
@@ -2667,12 +3882,68 @@ COMMAND_HANDLER(xtensa_cmd_tracedump)
target_to_xtensa(get_current_target(CMD_CTX)), CMD_ARGV[0]);
}
-const struct command_registration xtensa_command_handlers[] = {
+static const struct command_registration xtensa_any_command_handlers[] = {
+ {
+ .name = "xtdef",
+ .handler = xtensa_cmd_xtdef,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa core type",
+ .usage = "<type>",
+ },
+ {
+ .name = "xtopt",
+ .handler = xtensa_cmd_xtopt,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa core option",
+ .usage = "<name> <value>",
+ },
+ {
+ .name = "xtmem",
+ .handler = xtensa_cmd_xtmem,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa memory/cache option",
+ .usage = "<type> [parameters]",
+ },
+ {
+ .name = "xtmmu",
+ .handler = xtensa_cmd_xtmmu,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa MMU option",
+ .usage = "<NIREFILLENTRIES> <NDREFILLENTRIES> <IVARWAY56> <DVARWAY56>",
+ },
+ {
+ .name = "xtmpu",
+ .handler = xtensa_cmd_xtmpu,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa MPU option",
+ .usage = "<num FG seg> <min seg size> <lockable> <executeonly>",
+ },
+ {
+ .name = "xtreg",
+ .handler = xtensa_cmd_xtreg,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure Xtensa register",
+ .usage = "<regname> <regnum>",
+ },
+ {
+ .name = "xtregs",
+ .handler = xtensa_cmd_xtreg,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure number of Xtensa registers",
+ .usage = "<numregs>",
+ },
+ {
+ .name = "xtregfmt",
+ .handler = xtensa_cmd_xtregfmt,
+ .mode = COMMAND_CONFIG,
+ .help = "Configure format of Xtensa register map",
+ .usage = "<contiguous|sparse> [numgregs]",
+ },
{
.name = "set_permissive",
.handler = xtensa_cmd_permissive_mode,
.mode = COMMAND_ANY,
- .help = "When set to 1, enable Xtensa permissive mode (less client-side checks)",
+ .help = "When set to 1, enable Xtensa permissive mode (fewer client-side checks)",
.usage = "[0|1]",
},
{
@@ -2687,8 +3958,7 @@ const struct command_registration xtensa_command_handlers[] = {
.handler = xtensa_cmd_smpbreak,
.mode = COMMAND_ANY,
.help = "Set the way the CPU chains OCD breaks",
- .usage =
- "[none|breakinout|runstall] | [BreakIn] [BreakOut] [RunStallIn] [DebugModeOut]",
+ .usage = "[none|breakinout|runstall] | [BreakIn] [BreakOut] [RunStallIn] [DebugModeOut]",
},
{
.name = "perfmon_enable",
@@ -2701,8 +3971,7 @@ const struct command_registration xtensa_command_handlers[] = {
.name = "perfmon_dump",
.handler = xtensa_cmd_perfmon_dump,
.mode = COMMAND_EXEC,
- .help =
- "Dump performance counter value. If no argument specified, dumps all counters.",
+ .help = "Dump performance counter value. If no argument specified, dumps all counters.",
.usage = "[counter_id]",
},
{
@@ -2727,5 +3996,23 @@ const struct command_registration xtensa_command_handlers[] = {
.help = "Tracing: Dump trace memory to a files. One file per core.",
.usage = "<outfile>",
},
+ {
+ .name = "exe",
+ .handler = xtensa_cmd_exe,
+ .mode = COMMAND_ANY,
+ .help = "Xtensa stub execution",
+ .usage = "<ascii-encoded hexadecimal instruction bytes>",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration xtensa_command_handlers[] = {
+ {
+ .name = "xtensa",
+ .mode = COMMAND_ANY,
+ .help = "Xtensa command group",
+ .usage = "",
+ .chain = xtensa_any_command_handlers,
+ },
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/xtensa/xtensa.h b/src/target/xtensa/xtensa.h
index d8b15e1..4d98f3a 100644
--- a/src/target/xtensa/xtensa.h
+++ b/src/target/xtensa/xtensa.h
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Generic Xtensa target *
+ * Copyright (C) 2020-2022 Cadence Design Systems, Inc. *
* Copyright (C) 2019 Espressif Systems Ltd. *
- * Author: Alexey Gerenkov <alexey@espressif.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_XTENSA_H
@@ -31,41 +20,77 @@
* Holds the interface to Xtensa cores.
*/
-#define XT_ISNS_SZ_MAX 3
+/* Big-endian vs. little-endian detection */
+#define XT_ISBE(X) ((X)->target->endianness == TARGET_BIG_ENDIAN)
+
+/* 24-bit break; BE version field-swapped then byte-swapped for use in memory R/W fns */
+#define XT_INS_BREAK_LE(S, T) (0x004000 | (((S) & 0xF) << 8) | (((T) & 0xF) << 4))
+#define XT_INS_BREAK_BE(S, T) (0x000400 | (((S) & 0xF) << 12) | ((T) & 0xF))
+#define XT_INS_BREAK(X, S, T) (XT_ISBE(X) ? XT_INS_BREAK_BE(S, T) : XT_INS_BREAK_LE(S, T))
+
+/* 16-bit break; BE version field-swapped then byte-swapped for use in memory R/W fns */
+#define XT_INS_BREAKN_LE(IMM4) (0xF02D | (((IMM4) & 0xF) << 8))
+#define XT_INS_BREAKN_BE(IMM4) (0x0FD2 | (((IMM4) & 0xF) << 12))
+#define XT_INS_BREAKN(X, IMM4) (XT_ISBE(X) ? XT_INS_BREAKN_BE(IMM4) : XT_INS_BREAKN_LE(IMM4))
+
+#define XT_ISNS_SZ_MAX 3
+
+#define XT_PS_RING(_v_) ((uint32_t)((_v_) & 0x3) << 6)
+#define XT_PS_RING_MSK (0x3 << 6)
+#define XT_PS_RING_GET(_v_) (((_v_) >> 6) & 0x3)
+#define XT_PS_CALLINC_MSK (0x3 << 16)
+#define XT_PS_OWB_MSK (0xF << 8)
+#define XT_PS_WOE_MSK BIT(18)
-#define XT_PS_RING(_v_) ((uint32_t)((_v_) & 0x3) << 6)
-#define XT_PS_RING_MSK (0x3 << 6)
-#define XT_PS_RING_GET(_v_) (((_v_) >> 6) & 0x3)
-#define XT_PS_CALLINC_MSK (0x3 << 16)
-#define XT_PS_OWB_MSK (0xF << 8)
+#define XT_LOCAL_MEM_REGIONS_NUM_MAX 8
-#define XT_LOCAL_MEM_REGIONS_NUM_MAX 8
+#define XT_AREGS_NUM_MAX 64
+#define XT_USER_REGS_NUM_MAX 256
-#define XT_AREGS_NUM_MAX 64
-#define XT_USER_REGS_NUM_MAX 256
+#define XT_MEM_ACCESS_NONE 0x0
+#define XT_MEM_ACCESS_READ 0x1
+#define XT_MEM_ACCESS_WRITE 0x2
+
+#define XT_MAX_TIE_REG_WIDTH (512) /* TIE register file max 4096 bits */
+#define XT_QUERYPKT_RESP_MAX (XT_MAX_TIE_REG_WIDTH * 2 + 1)
+
+enum xtensa_qerr_e {
+ XT_QERR_INTERNAL = 0,
+ XT_QERR_FAIL,
+ XT_QERR_INVAL,
+ XT_QERR_MEM,
+ XT_QERR_NUM,
+};
+
+/* An and ARn registers potentially used as scratch regs */
+enum xtensa_ar_scratch_set_e {
+ XT_AR_SCRATCH_A3 = 0,
+ XT_AR_SCRATCH_AR3,
+ XT_AR_SCRATCH_A4,
+ XT_AR_SCRATCH_AR4,
+ XT_AR_SCRATCH_NUM
+};
-#define XT_MEM_ACCESS_NONE 0x0
-#define XT_MEM_ACCESS_READ 0x1
-#define XT_MEM_ACCESS_WRITE 0x2
+struct xtensa_keyval_info_s {
+ char *chrval;
+ int intval;
+};
-enum xtensa_mem_err_detect {
- XT_MEM_ERR_DETECT_NONE,
- XT_MEM_ERR_DETECT_PARITY,
- XT_MEM_ERR_DETECT_ECC,
+enum xtensa_type {
+ XT_UNDEF = 0,
+ XT_LX,
};
struct xtensa_cache_config {
uint8_t way_count;
- uint8_t line_size;
- uint16_t size;
- bool writeback;
- enum xtensa_mem_err_detect mem_err_check;
+ uint32_t line_size;
+ uint32_t size;
+ int writeback;
};
struct xtensa_local_mem_region_config {
target_addr_t base;
uint32_t size;
- enum xtensa_mem_err_detect mem_err_check;
int access;
};
@@ -78,13 +103,14 @@ struct xtensa_mmu_config {
bool enabled;
uint8_t itlb_entries_count;
uint8_t dtlb_entries_count;
- bool ivarway56;
- bool dvarway56;
};
-struct xtensa_exception_config {
+struct xtensa_mpu_config {
bool enabled;
- uint8_t depc_num;
+ uint8_t nfgseg;
+ uint32_t minsegsize;
+ bool lockable;
+ bool execonly;
};
struct xtensa_irq_config {
@@ -94,8 +120,8 @@ struct xtensa_irq_config {
struct xtensa_high_prio_irq_config {
bool enabled;
+ uint8_t level_num;
uint8_t excm_level;
- uint8_t nmi_num;
};
struct xtensa_debug_config {
@@ -103,7 +129,7 @@ struct xtensa_debug_config {
uint8_t irq_level;
uint8_t ibreaks_num;
uint8_t dbreaks_num;
- uint8_t icount_sz;
+ uint8_t perfcount_num;
};
struct xtensa_tracing_config {
@@ -112,48 +138,26 @@ struct xtensa_tracing_config {
bool reversed_mem_access;
};
-struct xtensa_timer_irq_config {
- bool enabled;
- uint8_t comp_num;
-};
-
struct xtensa_config {
- bool density;
+ enum xtensa_type core_type;
uint8_t aregs_num;
bool windowed;
bool coproc;
- bool fp_coproc;
- bool loop;
- uint8_t miscregs_num;
- bool threadptr;
- bool boolean;
- bool cond_store;
- bool ext_l32r;
- bool mac16;
- bool reloc_vec;
- bool proc_id;
- bool mem_err_check;
- uint16_t user_regs_num;
- const struct xtensa_user_reg_desc *user_regs;
- int (*fetch_user_regs)(struct target *target);
- int (*queue_write_dirty_user_regs)(struct target *target);
+ bool exceptions;
+ struct xtensa_irq_config irq;
+ struct xtensa_high_prio_irq_config high_irq;
+ struct xtensa_mmu_config mmu;
+ struct xtensa_mpu_config mpu;
+ struct xtensa_debug_config debug;
+ struct xtensa_tracing_config trace;
struct xtensa_cache_config icache;
struct xtensa_cache_config dcache;
struct xtensa_local_mem_config irom;
struct xtensa_local_mem_config iram;
struct xtensa_local_mem_config drom;
struct xtensa_local_mem_config dram;
- struct xtensa_local_mem_config uram;
- struct xtensa_local_mem_config xlmi;
- struct xtensa_mmu_config mmu;
- struct xtensa_exception_config exc;
- struct xtensa_irq_config irq;
- struct xtensa_high_prio_irq_config high_irq;
- struct xtensa_timer_irq_config tim_irq;
- struct xtensa_debug_config debug;
- struct xtensa_tracing_config trace;
- unsigned int gdb_general_regs_num;
- const unsigned int *gdb_regs_mapping;
+ struct xtensa_local_mem_config sram;
+ struct xtensa_local_mem_config srom;
};
typedef uint32_t xtensa_insn_t;
@@ -187,13 +191,26 @@ struct xtensa_sw_breakpoint {
*/
struct xtensa {
unsigned int common_magic;
- const struct xtensa_config *core_config;
+ struct xtensa_chip_common *xtensa_chip;
+ struct xtensa_config *core_config;
struct xtensa_debug_module dbg_mod;
struct reg_cache *core_cache;
- unsigned int regs_num;
+ unsigned int total_regs_num;
+ unsigned int core_regs_num;
+ bool regmap_contiguous;
+ unsigned int genpkt_regs_num;
+ struct xtensa_reg_desc **contiguous_regs_desc;
+ struct reg **contiguous_regs_list;
+ /* Per-config Xtensa registers as specified via "xtreg" in xtensa-core*.cfg */
+ struct xtensa_reg_desc *optregs;
+ unsigned int num_optregs;
+ struct reg *empty_regs;
+ char qpkt_resp[XT_QUERYPKT_RESP_MAX];
/* An array of pointers to buffers to backup registers' values while algo is run on target.
* Size is 'regs_num'. */
void **algo_context_backup;
+ unsigned int eps_dbglevel_idx;
+ unsigned int dbregs_num;
struct target *target;
bool reset_asserted;
enum xtensa_stepping_isr_mode stepping_isr_mode;
@@ -204,11 +221,18 @@ struct xtensa {
bool permissive_mode; /* bypass memory checks */
bool suppress_dsr_errors;
uint32_t smp_break;
+ uint32_t spill_loc;
+ unsigned int spill_bytes;
+ uint8_t *spill_buf;
+ int8_t probe_lsddr32p;
/* Sometimes debug module's 'powered' bit is cleared after reset, but get set after some
* time.This is the number of polling periods after which core is considered to be powered
* off (marked as unexamined) if the bit retains to be cleared (e.g. if core is disabled by
* SW running on target).*/
uint8_t come_online_probes_num;
+ bool proc_syscall;
+ bool halt_request;
+ struct xtensa_keyval_info_s scratch_ars[XT_AR_SCRATCH_NUM];
bool regs_fetched; /* true after first register fetch completed successfully */
};
@@ -222,7 +246,6 @@ static inline struct xtensa *target_to_xtensa(struct target *target)
int xtensa_init_arch_info(struct target *target,
struct xtensa *xtensa,
- const struct xtensa_config *cfg,
const struct xtensa_debug_module_config *dm_cfg);
int xtensa_target_init(struct command_context *cmd_ctx, struct target *target);
void xtensa_target_deinit(struct target *target);
@@ -245,11 +268,41 @@ static inline bool xtensa_data_addr_valid(struct target *target, uint32_t addr)
return true;
if (xtensa_addr_in_mem(&xtensa->core_config->dram, addr))
return true;
- if (xtensa_addr_in_mem(&xtensa->core_config->uram, addr))
+ if (xtensa_addr_in_mem(&xtensa->core_config->sram, addr))
return true;
return false;
}
+static inline int xtensa_queue_dbg_reg_read(struct xtensa *xtensa, enum xtensa_dm_reg reg, uint8_t *data)
+{
+ struct xtensa_debug_module *dm = &xtensa->dbg_mod;
+
+ if (!xtensa->core_config->trace.enabled &&
+ (reg <= XDMREG_MEMADDREND || (reg >= XDMREG_PMG && reg <= XDMREG_PMSTAT7))) {
+ LOG_ERROR("Can not access %u reg when Trace Port option disabled!", reg);
+ return ERROR_FAIL;
+ }
+ return dm->dbg_ops->queue_reg_read(dm, reg, data);
+}
+
+static inline int xtensa_queue_dbg_reg_write(struct xtensa *xtensa, enum xtensa_dm_reg reg, uint32_t data)
+{
+ struct xtensa_debug_module *dm = &xtensa->dbg_mod;
+
+ if (!xtensa->core_config->trace.enabled &&
+ (reg <= XDMREG_MEMADDREND || (reg >= XDMREG_PMG && reg <= XDMREG_PMSTAT7))) {
+ LOG_ERROR("Can not access %u reg when Trace Port option disabled!", reg);
+ return ERROR_FAIL;
+ }
+ return dm->dbg_ops->queue_reg_write(dm, reg, data);
+}
+
+static inline int xtensa_core_status_clear(struct target *target, uint32_t bits)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ return xtensa_dm_core_status_clear(&xtensa->dbg_mod, bits);
+}
+
int xtensa_core_status_check(struct target *target);
int xtensa_examine(struct target *target);
@@ -260,11 +313,15 @@ int xtensa_smpbreak_write(struct xtensa *xtensa, uint32_t set);
int xtensa_smpbreak_read(struct xtensa *xtensa, uint32_t *val);
xtensa_reg_val_t xtensa_reg_get(struct target *target, enum xtensa_reg_id reg_id);
void xtensa_reg_set(struct target *target, enum xtensa_reg_id reg_id, xtensa_reg_val_t value);
+void xtensa_reg_set_deep_relgen(struct target *target, enum xtensa_reg_id a_idx, xtensa_reg_val_t value);
int xtensa_fetch_all_regs(struct target *target);
int xtensa_get_gdb_reg_list(struct target *target,
struct reg **reg_list[],
int *reg_list_size,
enum target_register_class reg_class);
+uint32_t xtensa_cause_get(struct target *target);
+void xtensa_cause_clear(struct target *target);
+void xtensa_cause_reset(struct target *target);
int xtensa_poll(struct target *target);
void xtensa_on_poll(struct target *target);
int xtensa_halt(struct target *target);
@@ -293,17 +350,31 @@ int xtensa_write_buffer(struct target *target, target_addr_t address, uint32_t c
int xtensa_checksum_memory(struct target *target, target_addr_t address, uint32_t count, uint32_t *checksum);
int xtensa_assert_reset(struct target *target);
int xtensa_deassert_reset(struct target *target);
+int xtensa_soft_reset_halt(struct target *target);
int xtensa_breakpoint_add(struct target *target, struct breakpoint *breakpoint);
int xtensa_breakpoint_remove(struct target *target, struct breakpoint *breakpoint);
int xtensa_watchpoint_add(struct target *target, struct watchpoint *watchpoint);
int xtensa_watchpoint_remove(struct target *target, struct watchpoint *watchpoint);
void xtensa_set_permissive_mode(struct target *target, bool state);
-int xtensa_fetch_user_regs_u32(struct target *target);
-int xtensa_queue_write_dirty_user_regs_u32(struct target *target);
const char *xtensa_get_gdb_arch(struct target *target);
+int xtensa_gdb_query_custom(struct target *target, const char *packet, char **response_p);
+
+COMMAND_HELPER(xtensa_cmd_xtdef_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_xtopt_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_xtmem_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_xtmpu_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_xtmmu_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_xtregfmt_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_permissive_mode_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_mask_interrupts_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_smpbreak_do, struct target *target);
+COMMAND_HELPER(xtensa_cmd_perfmon_dump_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_perfmon_enable_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_tracestart_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_tracestop_do, struct xtensa *xtensa);
+COMMAND_HELPER(xtensa_cmd_tracedump_do, struct xtensa *xtensa, const char *fname);
-extern const struct reg_arch_type xtensa_user_reg_u32_type;
-extern const struct reg_arch_type xtensa_user_reg_u128_type;
extern const struct command_registration xtensa_command_handlers[];
#endif /* OPENOCD_TARGET_XTENSA_H */
diff --git a/src/target/xtensa/xtensa_chip.c b/src/target/xtensa/xtensa_chip.c
new file mode 100644
index 0000000..c62992f
--- /dev/null
+++ b/src/target/xtensa/xtensa_chip.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * Xtensa Chip-level Target Support for OpenOCD *
+ * Copyright (C) 2020-2022 Cadence Design Systems, Inc. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "assert.h"
+#include <target/target.h>
+#include <target/target_type.h>
+#include <target/arm_adi_v5.h>
+#include <rtos/rtos.h>
+#include "xtensa_chip.h"
+
+int xtensa_chip_init_arch_info(struct target *target, void *arch_info,
+ struct xtensa_debug_module_config *dm_cfg)
+{
+ struct xtensa_chip_common *xtensa_chip = (struct xtensa_chip_common *)arch_info;
+ int ret = xtensa_init_arch_info(target, &xtensa_chip->xtensa, dm_cfg);
+ if (ret != ERROR_OK)
+ return ret;
+ /* All xtensa target structures point back to original xtensa_chip */
+ xtensa_chip->xtensa.xtensa_chip = arch_info;
+ return ERROR_OK;
+}
+
+int xtensa_chip_target_init(struct command_context *cmd_ctx, struct target *target)
+{
+ return xtensa_target_init(cmd_ctx, target);
+}
+
+int xtensa_chip_arch_state(struct target *target)
+{
+ return ERROR_OK;
+}
+
+static int xtensa_chip_poll(struct target *target)
+{
+ enum target_state old_state = target->state;
+ int ret = xtensa_poll(target);
+
+ if (old_state != TARGET_HALTED && target->state == TARGET_HALTED) {
+ /*Call any event callbacks that are applicable */
+ if (old_state == TARGET_DEBUG_RUNNING)
+ target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
+ else
+ target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ }
+
+ return ret;
+}
+
+static int xtensa_chip_virt2phys(struct target *target,
+ target_addr_t virtual, target_addr_t *physical)
+{
+ if (physical) {
+ *physical = virtual;
+ return ERROR_OK;
+ }
+ return ERROR_FAIL;
+}
+
+static const struct xtensa_debug_ops xtensa_chip_dm_dbg_ops = {
+ .queue_enable = xtensa_dm_queue_enable,
+ .queue_reg_read = xtensa_dm_queue_reg_read,
+ .queue_reg_write = xtensa_dm_queue_reg_write
+};
+
+static const struct xtensa_power_ops xtensa_chip_dm_pwr_ops = {
+ .queue_reg_read = xtensa_dm_queue_pwr_reg_read,
+ .queue_reg_write = xtensa_dm_queue_pwr_reg_write
+};
+
+static int xtensa_chip_target_create(struct target *target, Jim_Interp *interp)
+{
+ struct xtensa_debug_module_config xtensa_chip_dm_cfg = {
+ .dbg_ops = &xtensa_chip_dm_dbg_ops,
+ .pwr_ops = &xtensa_chip_dm_pwr_ops,
+ .tap = NULL,
+ .queue_tdi_idle = NULL,
+ .queue_tdi_idle_arg = NULL,
+ .dap = NULL,
+ .debug_ap = NULL,
+ .debug_apsel = DP_APSEL_INVALID,
+ .ap_offset = 0,
+ };
+
+ struct adiv5_private_config *pc = target->private_config;
+ if (adiv5_verify_config(pc) == ERROR_OK) {
+ xtensa_chip_dm_cfg.dap = pc->dap;
+ xtensa_chip_dm_cfg.debug_apsel = pc->ap_num;
+ xtensa_chip_dm_cfg.ap_offset = target->dbgbase;
+ LOG_DEBUG("DAP: ap_num %" PRId64 " DAP %p\n", pc->ap_num, pc->dap);
+ } else {
+ xtensa_chip_dm_cfg.tap = target->tap;
+ LOG_DEBUG("JTAG: %s:%s pos %d", target->tap->chip, target->tap->tapname,
+ target->tap->abs_chain_position);
+ }
+
+ struct xtensa_chip_common *xtensa_chip = calloc(1, sizeof(struct xtensa_chip_common));
+ if (!xtensa_chip) {
+ LOG_ERROR("Failed to alloc chip-level memory!");
+ return ERROR_FAIL;
+ }
+
+ int ret = xtensa_chip_init_arch_info(target, xtensa_chip, &xtensa_chip_dm_cfg);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Failed to init arch info!");
+ free(xtensa_chip);
+ return ret;
+ }
+
+ /*Assume running target. If different, the first poll will fix this. */
+ target->state = TARGET_RUNNING;
+ target->debug_reason = DBG_REASON_NOTHALTED;
+ return ERROR_OK;
+}
+
+static void xtensa_chip_target_deinit(struct target *target)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ xtensa_target_deinit(target);
+ free(xtensa->xtensa_chip);
+}
+
+static int xtensa_chip_examine(struct target *target)
+{
+ struct xtensa *xtensa = target_to_xtensa(target);
+ int retval = xtensa_dm_examine(&xtensa->dbg_mod);
+ if (retval == ERROR_OK)
+ retval = xtensa_examine(target);
+ return retval;
+}
+
+static int xtensa_chip_jim_configure(struct target *target, struct jim_getopt_info *goi)
+{
+ static bool dap_configured;
+ int ret = adiv5_jim_configure(target, goi);
+ if (ret == JIM_OK) {
+ LOG_DEBUG("xtensa '-dap' target option found");
+ dap_configured = true;
+ }
+ if (!dap_configured) {
+ LOG_DEBUG("xtensa '-dap' target option not yet found, assuming JTAG...");
+ target->has_dap = false;
+ }
+ return ret;
+}
+
+/** Methods for generic example of Xtensa-based chip-level targets. */
+struct target_type xtensa_chip_target = {
+ .name = "xtensa",
+
+ .poll = xtensa_chip_poll,
+ .arch_state = xtensa_chip_arch_state,
+
+ .halt = xtensa_halt,
+ .resume = xtensa_resume,
+ .step = xtensa_step,
+
+ .assert_reset = xtensa_assert_reset,
+ .deassert_reset = xtensa_deassert_reset,
+ .soft_reset_halt = xtensa_soft_reset_halt,
+
+ .virt2phys = xtensa_chip_virt2phys,
+ .mmu = xtensa_mmu_is_enabled,
+ .read_memory = xtensa_read_memory,
+ .write_memory = xtensa_write_memory,
+
+ .read_buffer = xtensa_read_buffer,
+ .write_buffer = xtensa_write_buffer,
+
+ .checksum_memory = xtensa_checksum_memory,
+
+ .get_gdb_reg_list = xtensa_get_gdb_reg_list,
+
+ .add_breakpoint = xtensa_breakpoint_add,
+ .remove_breakpoint = xtensa_breakpoint_remove,
+
+ .add_watchpoint = xtensa_watchpoint_add,
+ .remove_watchpoint = xtensa_watchpoint_remove,
+
+ .target_create = xtensa_chip_target_create,
+ .target_jim_configure = xtensa_chip_jim_configure,
+ .init_target = xtensa_chip_target_init,
+ .examine = xtensa_chip_examine,
+ .deinit_target = xtensa_chip_target_deinit,
+
+ .gdb_query_custom = xtensa_gdb_query_custom,
+
+ .commands = xtensa_command_handlers,
+};
diff --git a/src/target/xtensa/xtensa_chip.h b/src/target/xtensa/xtensa_chip.h
new file mode 100644
index 0000000..5200deb
--- /dev/null
+++ b/src/target/xtensa/xtensa_chip.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Xtensa Chip-level Target Support for OpenOCD *
+ * Copyright (C) 2020-2022 Cadence Design Systems, Inc. *
+ ***************************************************************************/
+
+#ifndef OPENOCD_TARGET_XTENSA_CHIP_H
+#define OPENOCD_TARGET_XTENSA_CHIP_H
+
+#include <target/target.h>
+#include "xtensa.h"
+#include "xtensa_debug_module.h"
+
+struct xtensa_chip_common {
+ struct xtensa xtensa;
+ /* Chip-specific extensions can be added here */
+};
+
+static inline struct xtensa_chip_common *target_to_xtensa_chip(struct target *target)
+{
+ return container_of(target->arch_info, struct xtensa_chip_common, xtensa);
+}
+
+int xtensa_chip_init_arch_info(struct target *target, void *arch_info,
+ struct xtensa_debug_module_config *dm_cfg);
+int xtensa_chip_target_init(struct command_context *cmd_ctx, struct target *target);
+int xtensa_chip_arch_state(struct target *target);
+void xtensa_chip_queue_tdi_idle(struct target *target);
+void xtensa_chip_on_reset(struct target *target);
+bool xtensa_chip_on_halt(struct target *target);
+void xtensa_chip_on_poll(struct target *target);
+
+#endif /* OPENOCD_TARGET_XTENSA_CHIP_H */
diff --git a/src/target/xtensa/xtensa_debug_module.c b/src/target/xtensa/xtensa_debug_module.c
index c6959ae..31d7a94 100644
--- a/src/target/xtensa/xtensa_debug_module.c
+++ b/src/target/xtensa/xtensa_debug_module.c
@@ -1,25 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
- * Generic Xtensa debug module API for OpenOCD *
+ * Xtensa Debug Module (XDM) Support for OpenOCD *
+ * Copyright (C) 2020-2022 Cadence Design Systems, Inc. *
* Copyright (C) 2019 Espressif Systems Ltd. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include <config.h>
#endif
+#include <helper/align.h>
#include "xtensa_debug_module.h"
#define TAPINS_PWRCTL 0x08
@@ -35,11 +26,18 @@
#define TAPINS_IDCODE_LEN 32
#define TAPINS_BYPASS_LEN 1
+/* Table of power register offsets for APB space */
+static const struct xtensa_dm_pwr_reg_offsets xdm_pwr_regs[XDMREG_PWRNUM] =
+ XTENSA_DM_PWR_REG_OFFSETS;
+
+/* Table of debug register offsets for Nexus and APB space */
+static const struct xtensa_dm_reg_offsets xdm_regs[XDMREG_NUM] =
+ XTENSA_DM_REG_OFFSETS;
static void xtensa_dm_add_set_ir(struct xtensa_debug_module *dm, uint8_t value)
{
struct scan_field field;
- uint8_t t[4] = { 0 };
+ uint8_t t[4] = { 0, 0, 0, 0 };
memset(&field, 0, sizeof(field));
field.num_bits = dm->tap->ir_length;
@@ -67,87 +65,167 @@ int xtensa_dm_init(struct xtensa_debug_module *dm, const struct xtensa_debug_mod
{
if (!dm || !cfg)
return ERROR_FAIL;
+ if (!IS_ALIGNED(cfg->ap_offset, XTENSA_DM_APB_ALIGN)) {
+ LOG_ERROR("Xtensa DM APB offset must be aligned to a %dKB multiple",
+ XTENSA_DM_APB_ALIGN / 1024);
+ return ERROR_FAIL;
+ }
dm->pwr_ops = cfg->pwr_ops;
dm->dbg_ops = cfg->dbg_ops;
dm->tap = cfg->tap;
dm->queue_tdi_idle = cfg->queue_tdi_idle;
dm->queue_tdi_idle_arg = cfg->queue_tdi_idle_arg;
+ dm->dap = cfg->dap;
+ dm->debug_ap = cfg->debug_ap;
+ dm->debug_apsel = cfg->debug_apsel;
+ dm->ap_offset = cfg->ap_offset;
return ERROR_OK;
}
-int xtensa_dm_queue_enable(struct xtensa_debug_module *dm)
+void xtensa_dm_deinit(struct xtensa_debug_module *dm)
{
- return dm->dbg_ops->queue_reg_write(dm, NARADR_DCRSET, OCDDCR_ENABLEOCD);
+ if (dm->debug_ap) {
+ dap_put_ap(dm->debug_ap);
+ dm->debug_ap = NULL;
+ }
}
-int xtensa_dm_queue_reg_read(struct xtensa_debug_module *dm, unsigned int reg, uint8_t *value)
+int xtensa_dm_poll(struct xtensa_debug_module *dm)
{
- uint8_t regdata = (reg << 1) | 0;
- uint8_t dummy[4] = { 0, 0, 0, 0 };
+ /* Check if debug_ap is available to prevent segmentation fault.
+ * If the re-examination after an error does not find a MEM-AP
+ * (e.g. the target stopped communicating), debug_ap pointer
+ * can suddenly become NULL.
+ */
+ return (!dm || (dm->dap && !dm->debug_ap)) ? ERROR_FAIL : ERROR_OK;
+}
+
+int xtensa_dm_examine(struct xtensa_debug_module *dm)
+{
+ struct adiv5_dap *swjdp = dm->dap;
+ int retval = ERROR_OK;
+
+ if (swjdp) {
+ LOG_DEBUG("DM examine: DAP AP select %d", dm->debug_apsel);
+ if (dm->debug_ap) {
+ dap_put_ap(dm->debug_ap);
+ dm->debug_ap = NULL;
+ }
+ if (dm->debug_apsel == DP_APSEL_INVALID) {
+ LOG_DEBUG("DM examine: search for APB-type MEM-AP...");
+ /* TODO: Determine whether AP_TYPE_AXI_AP APs can be supported... */
+ retval = dap_find_get_ap(swjdp, AP_TYPE_APB_AP, &dm->debug_ap);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not find MEM-AP to control the core");
+ return retval;
+ }
+ } else {
+ dm->debug_ap = dap_get_ap(swjdp, dm->debug_apsel);
+ }
+
+ /* TODO: Allow a user-specified AP instead of relying on AP_TYPE_APB_AP */
+ dm->debug_apsel = dm->debug_ap->ap_num;
+ LOG_DEBUG("DM examine: Setting apsel to %d", dm->debug_apsel);
+
+ /* Leave (only) generic DAP stuff for debugport_init(); */
+ dm->debug_ap->memaccess_tck = 8;
+
+ retval = mem_ap_init(dm->debug_ap);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("MEM-AP init failed: %d", retval);
+ return retval;
+ }
+
+ /* TODO: how to set autoincrement range? Hard-code it to 1024 bytes for now */
+ dm->debug_ap->tar_autoincr_block = (1 << 10);
+ }
+
+ return retval;
+}
- if (reg > NARADR_MAX) {
+int xtensa_dm_queue_enable(struct xtensa_debug_module *dm)
+{
+ return dm->dbg_ops->queue_reg_write(dm, XDMREG_DCRSET, OCDDCR_ENABLEOCD);
+}
+
+int xtensa_dm_queue_reg_read(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint8_t *value)
+{
+ if (reg >= XDMREG_NUM) {
LOG_ERROR("Invalid DBG reg ID %d!", reg);
return ERROR_FAIL;
}
+ if (dm->dap)
+ /* NOTE: Future optimization: mem_ap_read_u32() offers higher performance with
+ * queued reads, but requires an API change to pass value as a 32-bit pointer.
+ */
+ return mem_ap_read_buf(dm->debug_ap, value, 4, 1, xdm_regs[reg].apb + dm->ap_offset);
+ uint8_t regdata = (xdm_regs[reg].nar << 1) | 0;
+ uint8_t dummy[4] = { 0, 0, 0, 0 };
xtensa_dm_add_set_ir(dm, TAPINS_NARSEL);
xtensa_dm_add_dr_scan(dm, TAPINS_NARSEL_ADRLEN, &regdata, NULL, TAP_IDLE);
xtensa_dm_add_dr_scan(dm, TAPINS_NARSEL_DATALEN, dummy, value, TAP_IDLE);
return ERROR_OK;
}
-int xtensa_dm_queue_reg_write(struct xtensa_debug_module *dm, unsigned int reg, uint32_t value)
+int xtensa_dm_queue_reg_write(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint32_t value)
{
- uint8_t regdata = (reg << 1) | 1;
- uint8_t valdata[] = { value, value >> 8, value >> 16, value >> 24 };
-
- if (reg > NARADR_MAX) {
+ if (reg >= XDMREG_NUM) {
LOG_ERROR("Invalid DBG reg ID %d!", reg);
return ERROR_FAIL;
}
+ if (dm->dap)
+ return mem_ap_write_u32(dm->debug_ap, xdm_regs[reg].apb + dm->ap_offset, value);
+ uint8_t regdata = (xdm_regs[reg].nar << 1) | 1;
+ uint8_t valdata[] = { value, value >> 8, value >> 16, value >> 24 };
xtensa_dm_add_set_ir(dm, TAPINS_NARSEL);
xtensa_dm_add_dr_scan(dm, TAPINS_NARSEL_ADRLEN, &regdata, NULL, TAP_IDLE);
xtensa_dm_add_dr_scan(dm, TAPINS_NARSEL_DATALEN, valdata, NULL, TAP_IDLE);
return ERROR_OK;
}
-int xtensa_dm_queue_pwr_reg_read(struct xtensa_debug_module *dm, unsigned int reg, uint8_t *data, uint8_t clear)
+int xtensa_dm_queue_pwr_reg_read(struct xtensa_debug_module *dm,
+ enum xtensa_dm_pwr_reg reg,
+ uint8_t *data,
+ uint32_t clear)
{
- uint8_t value_clr = clear;
- uint8_t tap_insn;
- int tap_insn_sz;
-
- if (reg == DMREG_PWRCTL) {
- tap_insn = TAPINS_PWRCTL;
- tap_insn_sz = TAPINS_PWRCTL_LEN;
- } else if (reg == DMREG_PWRSTAT) {
- tap_insn = TAPINS_PWRSTAT;
- tap_insn_sz = TAPINS_PWRSTAT_LEN;
- } else {
+ if (reg >= XDMREG_PWRNUM) {
LOG_ERROR("Invalid PWR reg ID %d!", reg);
return ERROR_FAIL;
}
+ if (dm->dap) {
+ /* NOTE: Future optimization: mem_ap_read_u32() offers higher performance with
+ * queued reads, but requires an API change to pass value as a 32-bit pointer.
+ */
+ uint32_t apbreg = xdm_pwr_regs[reg].apb + dm->ap_offset;
+ int retval = mem_ap_read_buf(dm->debug_ap, data, 4, 1, apbreg);
+ if (retval == ERROR_OK)
+ retval = mem_ap_write_u32(dm->debug_ap, apbreg, clear);
+ return retval;
+ }
+ uint8_t value_clr = (uint8_t)clear;
+ uint8_t tap_insn = (reg == XDMREG_PWRCTL) ? TAPINS_PWRCTL : TAPINS_PWRSTAT;
+ int tap_insn_sz = (reg == XDMREG_PWRCTL) ? TAPINS_PWRCTL_LEN : TAPINS_PWRSTAT_LEN;
xtensa_dm_add_set_ir(dm, tap_insn);
xtensa_dm_add_dr_scan(dm, tap_insn_sz, &value_clr, data, TAP_IDLE);
return ERROR_OK;
}
-int xtensa_dm_queue_pwr_reg_write(struct xtensa_debug_module *dm, unsigned int reg, uint8_t data)
+int xtensa_dm_queue_pwr_reg_write(struct xtensa_debug_module *dm,
+ enum xtensa_dm_pwr_reg reg,
+ uint32_t data)
{
- uint8_t value = data;
- uint8_t tap_insn;
- int tap_insn_sz;
-
- if (reg == DMREG_PWRCTL) {
- tap_insn = TAPINS_PWRCTL;
- tap_insn_sz = TAPINS_PWRCTL_LEN;
- } else if (reg == DMREG_PWRSTAT) {
- tap_insn = TAPINS_PWRSTAT;
- tap_insn_sz = TAPINS_PWRSTAT_LEN;
- } else {
+ if (reg >= XDMREG_PWRNUM) {
LOG_ERROR("Invalid PWR reg ID %d!", reg);
return ERROR_FAIL;
}
+ if (dm->dap) {
+ uint32_t apbreg = xdm_pwr_regs[reg].apb + dm->ap_offset;
+ return mem_ap_write_u32(dm->debug_ap, apbreg, data);
+ }
+ uint8_t tap_insn = (reg == XDMREG_PWRCTL) ? TAPINS_PWRCTL : TAPINS_PWRSTAT;
+ int tap_insn_sz = (reg == XDMREG_PWRCTL) ? TAPINS_PWRCTL_LEN : TAPINS_PWRSTAT_LEN;
+ uint8_t value = (uint8_t)data;
xtensa_dm_add_set_ir(dm, tap_insn);
xtensa_dm_add_dr_scan(dm, tap_insn_sz, &value, NULL, TAP_IDLE);
return ERROR_OK;
@@ -157,9 +235,9 @@ int xtensa_dm_device_id_read(struct xtensa_debug_module *dm)
{
uint8_t id_buf[sizeof(uint32_t)];
- dm->dbg_ops->queue_reg_read(dm, NARADR_OCDID, id_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_OCDID, id_buf);
xtensa_dm_queue_tdi_idle(dm);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
if (res != ERROR_OK)
return res;
dm->device_id = buf_get_u32(id_buf, 0, 32);
@@ -168,16 +246,22 @@ int xtensa_dm_device_id_read(struct xtensa_debug_module *dm)
int xtensa_dm_power_status_read(struct xtensa_debug_module *dm, uint32_t clear)
{
- /* uint8_t id_buf[sizeof(uint32_t)]; */
+ uint8_t stat_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 };
+ uint8_t stath_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 };
/* TODO: JTAG does not work when PWRCTL_JTAGDEBUGUSE is not set.
- * It is set in xtensa_examine(), need to move reading of NARADR_OCDID out of this function */
- /* dm->dbg_ops->queue_reg_read(dm, NARADR_OCDID, id_buf);
+ * It is set in xtensa_examine(), need to move reading of XDMREG_OCDID out of this function */
+ /* dm->dbg_ops->queue_reg_read(dm, XDMREG_OCDID, id_buf);
*Read reset state */
- dm->pwr_ops->queue_reg_read(dm, DMREG_PWRSTAT, &dm->power_status.stat, clear);
- dm->pwr_ops->queue_reg_read(dm, DMREG_PWRSTAT, &dm->power_status.stath, clear);
+ dm->pwr_ops->queue_reg_read(dm, XDMREG_PWRSTAT, stat_buf, clear);
+ dm->pwr_ops->queue_reg_read(dm, XDMREG_PWRSTAT, stath_buf, clear);
xtensa_dm_queue_tdi_idle(dm);
- return jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
+ if (res != ERROR_OK)
+ return res;
+ dm->power_status.stat = buf_get_u32(stat_buf, 0, 32);
+ dm->power_status.stath = buf_get_u32(stath_buf, 0, 32);
+ return res;
}
int xtensa_dm_core_status_read(struct xtensa_debug_module *dm)
@@ -185,9 +269,9 @@ int xtensa_dm_core_status_read(struct xtensa_debug_module *dm)
uint8_t dsr_buf[sizeof(uint32_t)];
xtensa_dm_queue_enable(dm);
- dm->dbg_ops->queue_reg_read(dm, NARADR_DSR, dsr_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_DSR, dsr_buf);
xtensa_dm_queue_tdi_idle(dm);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
if (res != ERROR_OK)
return res;
dm->core_status.dsr = buf_get_u32(dsr_buf, 0, 32);
@@ -196,37 +280,37 @@ int xtensa_dm_core_status_read(struct xtensa_debug_module *dm)
int xtensa_dm_core_status_clear(struct xtensa_debug_module *dm, xtensa_dsr_t bits)
{
- dm->dbg_ops->queue_reg_write(dm, NARADR_DSR, bits);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_DSR, bits);
xtensa_dm_queue_tdi_idle(dm);
- return jtag_execute_queue();
+ return xtensa_dm_queue_execute(dm);
}
int xtensa_dm_trace_start(struct xtensa_debug_module *dm, struct xtensa_trace_start_config *cfg)
{
/*Turn off trace unit so we can start a new trace. */
- dm->dbg_ops->queue_reg_write(dm, NARADR_TRAXCTRL, 0);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_TRAXCTRL, 0);
xtensa_dm_queue_tdi_idle(dm);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
if (res != ERROR_OK)
return res;
/*Set up parameters */
- dm->dbg_ops->queue_reg_write(dm, NARADR_TRAXADDR, 0);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_TRAXADDR, 0);
if (cfg->stopmask != XTENSA_STOPMASK_DISABLED) {
- dm->dbg_ops->queue_reg_write(dm, NARADR_PCMATCHCTRL,
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_PCMATCHCTRL,
(cfg->stopmask << PCMATCHCTRL_PCML_SHIFT));
- dm->dbg_ops->queue_reg_write(dm, NARADR_TRIGGERPC, cfg->stoppc);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_TRIGGERPC, cfg->stoppc);
}
- dm->dbg_ops->queue_reg_write(dm, NARADR_DELAYCNT, cfg->after);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_DELAYCNT, cfg->after);
/*Options are mostly hardcoded for now. ToDo: make this more configurable. */
dm->dbg_ops->queue_reg_write(
dm,
- NARADR_TRAXCTRL,
+ XDMREG_TRAXCTRL,
TRAXCTRL_TREN |
((cfg->stopmask != XTENSA_STOPMASK_DISABLED) ? TRAXCTRL_PCMEN : 0) | TRAXCTRL_TMEN |
(cfg->after_is_words ? 0 : TRAXCTRL_CNTU) | (0 << TRAXCTRL_SMPER_SHIFT) | TRAXCTRL_PTOWS);
xtensa_dm_queue_tdi_idle(dm);
- return jtag_execute_queue();
+ return xtensa_dm_queue_execute(dm);
}
int xtensa_dm_trace_stop(struct xtensa_debug_module *dm, bool pto_enable)
@@ -235,9 +319,9 @@ int xtensa_dm_trace_stop(struct xtensa_debug_module *dm, bool pto_enable)
uint32_t traxctl;
struct xtensa_trace_status trace_status;
- dm->dbg_ops->queue_reg_read(dm, NARADR_TRAXCTRL, traxctl_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_TRAXCTRL, traxctl_buf);
xtensa_dm_queue_tdi_idle(dm);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
if (res != ERROR_OK)
return res;
traxctl = buf_get_u32(traxctl_buf, 0, 32);
@@ -245,9 +329,9 @@ int xtensa_dm_trace_stop(struct xtensa_debug_module *dm, bool pto_enable)
if (!pto_enable)
traxctl &= ~(TRAXCTRL_PTOWS | TRAXCTRL_PTOWT);
- dm->dbg_ops->queue_reg_write(dm, NARADR_TRAXCTRL, traxctl | TRAXCTRL_TRSTP);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_TRAXCTRL, traxctl | TRAXCTRL_TRSTP);
xtensa_dm_queue_tdi_idle(dm);
- res = jtag_execute_queue();
+ res = xtensa_dm_queue_execute(dm);
if (res != ERROR_OK)
return res;
@@ -267,9 +351,9 @@ int xtensa_dm_trace_status_read(struct xtensa_debug_module *dm, struct xtensa_tr
{
uint8_t traxstat_buf[sizeof(uint32_t)];
- dm->dbg_ops->queue_reg_read(dm, NARADR_TRAXSTAT, traxstat_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_TRAXSTAT, traxstat_buf);
xtensa_dm_queue_tdi_idle(dm);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
if (res == ERROR_OK && status)
status->stat = buf_get_u32(traxstat_buf, 0, 32);
return res;
@@ -285,12 +369,12 @@ int xtensa_dm_trace_config_read(struct xtensa_debug_module *dm, struct xtensa_tr
if (!config)
return ERROR_FAIL;
- dm->dbg_ops->queue_reg_read(dm, NARADR_TRAXCTRL, traxctl_buf);
- dm->dbg_ops->queue_reg_read(dm, NARADR_MEMADDRSTART, memadrstart_buf);
- dm->dbg_ops->queue_reg_read(dm, NARADR_MEMADDREND, memadrend_buf);
- dm->dbg_ops->queue_reg_read(dm, NARADR_TRAXADDR, adr_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_TRAXCTRL, traxctl_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_MEMADDRSTART, memadrstart_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_MEMADDREND, memadrend_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_TRAXADDR, adr_buf);
xtensa_dm_queue_tdi_idle(dm);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
if (res == ERROR_OK) {
config->ctrl = buf_get_u32(traxctl_buf, 0, 32);
config->memaddr_start = buf_get_u32(memadrstart_buf, 0, 32);
@@ -306,9 +390,9 @@ int xtensa_dm_trace_data_read(struct xtensa_debug_module *dm, uint8_t *dest, uin
return ERROR_FAIL;
for (unsigned int i = 0; i < size / 4; i++)
- dm->dbg_ops->queue_reg_read(dm, NARADR_TRAXDATA, &dest[i * 4]);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_TRAXDATA, &dest[i * 4]);
xtensa_dm_queue_tdi_idle(dm);
- return jtag_execute_queue();
+ return xtensa_dm_queue_execute(dm);
}
int xtensa_dm_perfmon_enable(struct xtensa_debug_module *dm, int counter_id,
@@ -324,13 +408,13 @@ int xtensa_dm_perfmon_enable(struct xtensa_debug_module *dm, int counter_id,
(config->kernelcnt << 3);
/* enable performance monitor */
- dm->dbg_ops->queue_reg_write(dm, NARADR_PMG, 0x1);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_PMG, 0x1);
/* reset counter */
- dm->dbg_ops->queue_reg_write(dm, NARADR_PM0 + counter_id, 0);
- dm->dbg_ops->queue_reg_write(dm, NARADR_PMCTRL0 + counter_id, pmctrl);
- dm->dbg_ops->queue_reg_read(dm, NARADR_PMSTAT0 + counter_id, pmstat_buf);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_PM0 + counter_id, 0);
+ dm->dbg_ops->queue_reg_write(dm, XDMREG_PMCTRL0 + counter_id, pmctrl);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_PMSTAT0 + counter_id, pmstat_buf);
xtensa_dm_queue_tdi_idle(dm);
- return jtag_execute_queue();
+ return xtensa_dm_queue_execute(dm);
}
int xtensa_dm_perfmon_dump(struct xtensa_debug_module *dm, int counter_id,
@@ -339,10 +423,10 @@ int xtensa_dm_perfmon_dump(struct xtensa_debug_module *dm, int counter_id,
uint8_t pmstat_buf[4];
uint8_t pmcount_buf[4];
- dm->dbg_ops->queue_reg_read(dm, NARADR_PMSTAT0 + counter_id, pmstat_buf);
- dm->dbg_ops->queue_reg_read(dm, NARADR_PM0 + counter_id, pmcount_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_PMSTAT0 + counter_id, pmstat_buf);
+ dm->dbg_ops->queue_reg_read(dm, XDMREG_PM0 + counter_id, pmcount_buf);
xtensa_dm_queue_tdi_idle(dm);
- int res = jtag_execute_queue();
+ int res = xtensa_dm_queue_execute(dm);
if (res == ERROR_OK) {
uint32_t stat = buf_get_u32(pmstat_buf, 0, 32);
uint64_t result = buf_get_u32(pmcount_buf, 0, 32);
diff --git a/src/target/xtensa/xtensa_debug_module.h b/src/target/xtensa/xtensa_debug_module.h
index 692f0f6..b382e03 100644
--- a/src/target/xtensa/xtensa_debug_module.h
+++ b/src/target/xtensa/xtensa_debug_module.h
@@ -1,36 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
- * Xtensa debug module API *
+ * Xtensa Debug Module (XDM) Support for OpenOCD *
+ * Copyright (C) 2020-2022 Cadence Design Systems, Inc. *
* Copyright (C) 2019 Espressif Systems Ltd. *
- * <alexey@espressif.com> *
- * *
* Derived from original ESP8266 target. *
- * Copyright (C) 2015 by Angus Gratton *
- * gus@projectgus.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
+ * Author: Angus Gratton gus@projectgus.com *
***************************************************************************/
#ifndef OPENOCD_TARGET_XTENSA_DEBUG_MODULE_H
#define OPENOCD_TARGET_XTENSA_DEBUG_MODULE_H
#include <jtag/jtag.h>
+#include <target/arm_adi_v5.h>
#include <helper/bits.h>
#include <target/target.h>
/* Virtual IDs for using with xtensa_power_ops API */
-#define DMREG_PWRCTL 0x00
-#define DMREG_PWRSTAT 0x01
+enum xtensa_dm_pwr_reg {
+ XDMREG_PWRCTL = 0x00,
+ XDMREG_PWRSTAT,
+ XDMREG_PWRNUM
+};
+
+/* Debug Module Power Register offsets within APB */
+struct xtensa_dm_pwr_reg_offsets {
+ uint16_t apb;
+};
+
+/* Debug Module Power Register offset structure; must include XDMREG_PWRNUM entries */
+#define XTENSA_DM_PWR_REG_OFFSETS { \
+ /* Power/Reset Registers */ \
+ { .apb = 0x3020 }, /* XDMREG_PWRCTL */ \
+ { .apb = 0x3024 }, /* XDMREG_PWRSTAT */ \
+}
/*
From the manual:
@@ -43,81 +46,203 @@
Module to happen correctly. When it is set, any write to this bit clears it.
Either don't access it, or re-write it to 1 so JTAG accesses continue.
*/
-#define PWRCTL_JTAGDEBUGUSE BIT(7)
-#define PWRCTL_DEBUGRESET BIT(6)
-#define PWRCTL_CORERESET BIT(4)
-#define PWRCTL_DEBUGWAKEUP BIT(2)
-#define PWRCTL_MEMWAKEUP BIT(1)
-#define PWRCTL_COREWAKEUP BIT(0)
-
-#define PWRSTAT_DEBUGWASRESET BIT(6)
-#define PWRSTAT_COREWASRESET BIT(4)
-#define PWRSTAT_CORESTILLNEEDED BIT(3)
-#define PWRSTAT_DEBUGDOMAINON BIT(2)
-#define PWRSTAT_MEMDOMAINON BIT(1)
-#define PWRSTAT_COREDOMAINON BIT(0)
-
-/* *** NAR addresses (also used as IDs for debug registers in xtensa_debug_ops API) ***
- *TRAX registers */
-#define NARADR_TRAXID 0x00
-#define NARADR_TRAXCTRL 0x01
-#define NARADR_TRAXSTAT 0x02
-#define NARADR_TRAXDATA 0x03
-#define NARADR_TRAXADDR 0x04
-#define NARADR_TRIGGERPC 0x05
-#define NARADR_PCMATCHCTRL 0x06
-#define NARADR_DELAYCNT 0x07
-#define NARADR_MEMADDRSTART 0x08
-#define NARADR_MEMADDREND 0x09
-/*Performance monitor registers */
-#define NARADR_PMG 0x20
-#define NARADR_INTPC 0x24
-#define NARADR_PM0 0x28
-/*... */
-#define NARADR_PM7 0x2F
-#define NARADR_PMCTRL0 0x30
-/*... */
-#define NARADR_PMCTRL7 0x37
-#define NARADR_PMSTAT0 0x38
-/*... */
-#define NARADR_PMSTAT7 0x3F
-/*OCD registers */
-#define NARADR_OCDID 0x40
-#define NARADR_DCRCLR 0x42
-#define NARADR_DCRSET 0x43
-#define NARADR_DSR 0x44
-#define NARADR_DDR 0x45
-#define NARADR_DDREXEC 0x46
-#define NARADR_DIR0EXEC 0x47
-#define NARADR_DIR0 0x48
-#define NARADR_DIR1 0x49
-/*... */
-#define NARADR_DIR7 0x4F
-/*Misc registers */
-#define NARADR_PWRCTL 0x58
-#define NARADR_PWRSTAT 0x59
-#define NARADR_ERISTAT 0x5A
-/*CoreSight registers */
-#define NARADR_ITCTRL 0x60
-#define NARADR_CLAIMSET 0x68
-#define NARADR_CLAIMCLR 0x69
-#define NARADR_LOCKACCESS 0x6c
-#define NARADR_LOCKSTATUS 0x6d
-#define NARADR_AUTHSTATUS 0x6e
-#define NARADR_DEVID 0x72
-#define NARADR_DEVTYPE 0x73
-#define NARADR_PERID4 0x74
-/*... */
-#define NARADR_PERID7 0x77
-#define NARADR_PERID0 0x78
-/*... */
-#define NARADR_PERID3 0x7b
-#define NARADR_COMPID0 0x7c
-/*... */
-#define NARADR_COMPID3 0x7f
-#define NARADR_MAX NARADR_COMPID3
-
-/*OCD registers, bit definitions */
+#define PWRCTL_JTAGDEBUGUSE(x) (((x)->dbg_mod.dap) ? (0) : BIT(7))
+#define PWRCTL_DEBUGRESET(x) (((x)->dbg_mod.dap) ? BIT(28) : BIT(6))
+#define PWRCTL_CORERESET(x) (((x)->dbg_mod.dap) ? BIT(16) : BIT(4))
+#define PWRCTL_DEBUGWAKEUP(x) (((x)->dbg_mod.dap) ? BIT(12) : BIT(2))
+#define PWRCTL_MEMWAKEUP(x) (((x)->dbg_mod.dap) ? BIT(8) : BIT(1))
+#define PWRCTL_COREWAKEUP(x) (((x)->dbg_mod.dap) ? BIT(0) : BIT(0))
+
+#define PWRSTAT_DEBUGWASRESET_DM(d) (((d)->dap) ? BIT(28) : BIT(6))
+#define PWRSTAT_COREWASRESET_DM(d) (((d)->dap) ? BIT(16) : BIT(4))
+#define PWRSTAT_DEBUGWASRESET(x) (PWRSTAT_DEBUGWASRESET_DM(&((x)->dbg_mod)))
+#define PWRSTAT_COREWASRESET(x) (PWRSTAT_COREWASRESET_DM(&((x)->dbg_mod)))
+#define PWRSTAT_CORESTILLNEEDED(x) (((x)->dbg_mod.dap) ? BIT(4) : BIT(3))
+#define PWRSTAT_DEBUGDOMAINON(x) (((x)->dbg_mod.dap) ? BIT(12) : BIT(2))
+#define PWRSTAT_MEMDOMAINON(x) (((x)->dbg_mod.dap) ? BIT(8) : BIT(1))
+#define PWRSTAT_COREDOMAINON(x) (((x)->dbg_mod.dap) ? BIT(0) : BIT(0))
+
+/* Virtual IDs for using with xtensa_debug_ops API */
+enum xtensa_dm_reg {
+ /* TRAX Registers */
+ XDMREG_TRAXID = 0x00,
+ XDMREG_TRAXCTRL,
+ XDMREG_TRAXSTAT,
+ XDMREG_TRAXDATA,
+ XDMREG_TRAXADDR,
+ XDMREG_TRIGGERPC,
+ XDMREG_PCMATCHCTRL,
+ XDMREG_DELAYCNT,
+ XDMREG_MEMADDRSTART,
+ XDMREG_MEMADDREND,
+
+ /* Performance Monitor Registers */
+ XDMREG_PMG,
+ XDMREG_INTPC,
+ XDMREG_PM0,
+ XDMREG_PM1,
+ XDMREG_PM2,
+ XDMREG_PM3,
+ XDMREG_PM4,
+ XDMREG_PM5,
+ XDMREG_PM6,
+ XDMREG_PM7,
+ XDMREG_PMCTRL0,
+ XDMREG_PMCTRL1,
+ XDMREG_PMCTRL2,
+ XDMREG_PMCTRL3,
+ XDMREG_PMCTRL4,
+ XDMREG_PMCTRL5,
+ XDMREG_PMCTRL6,
+ XDMREG_PMCTRL7,
+ XDMREG_PMSTAT0,
+ XDMREG_PMSTAT1,
+ XDMREG_PMSTAT2,
+ XDMREG_PMSTAT3,
+ XDMREG_PMSTAT4,
+ XDMREG_PMSTAT5,
+ XDMREG_PMSTAT6,
+ XDMREG_PMSTAT7,
+
+ /* OCD Registers */
+ XDMREG_OCDID,
+ XDMREG_DCRCLR,
+ XDMREG_DCRSET,
+ XDMREG_DSR,
+ XDMREG_DDR,
+ XDMREG_DDREXEC,
+ XDMREG_DIR0EXEC,
+ XDMREG_DIR0,
+ XDMREG_DIR1,
+ XDMREG_DIR2,
+ XDMREG_DIR3,
+ XDMREG_DIR4,
+ XDMREG_DIR5,
+ XDMREG_DIR6,
+ XDMREG_DIR7,
+
+ /* Misc Registers */
+ XDMREG_ERISTAT,
+
+ /* CoreSight Registers */
+ XDMREG_ITCTRL,
+ XDMREG_CLAIMSET,
+ XDMREG_CLAIMCLR,
+ XDMREG_LOCKACCESS,
+ XDMREG_LOCKSTATUS,
+ XDMREG_AUTHSTATUS,
+ XDMREG_DEVID,
+ XDMREG_DEVTYPE,
+ XDMREG_PERID4,
+ XDMREG_PERID5,
+ XDMREG_PERID6,
+ XDMREG_PERID7,
+ XDMREG_PERID0,
+ XDMREG_PERID1,
+ XDMREG_PERID2,
+ XDMREG_PERID3,
+ XDMREG_COMPID0,
+ XDMREG_COMPID1,
+ XDMREG_COMPID2,
+ XDMREG_COMPID3,
+
+ XDMREG_NUM
+};
+
+/* Debug Module Register offsets within Nexus (NAR) or APB */
+struct xtensa_dm_reg_offsets {
+ uint8_t nar;
+ uint16_t apb;
+};
+
+/* Debug Module Register offset structure; must include XDMREG_NUM entries */
+#define XTENSA_DM_REG_OFFSETS { \
+ /* TRAX Registers */ \
+ { .nar = 0x00, .apb = 0x0000 }, /* XDMREG_TRAXID */ \
+ { .nar = 0x01, .apb = 0x0004 }, /* XDMREG_TRAXCTRL */ \
+ { .nar = 0x02, .apb = 0x0008 }, /* XDMREG_TRAXSTAT */ \
+ { .nar = 0x03, .apb = 0x000c }, /* XDMREG_TRAXDATA */ \
+ { .nar = 0x04, .apb = 0x0010 }, /* XDMREG_TRAXADDR */ \
+ { .nar = 0x05, .apb = 0x0014 }, /* XDMREG_TRIGGERPC */ \
+ { .nar = 0x06, .apb = 0x0018 }, /* XDMREG_PCMATCHCTRL */ \
+ { .nar = 0x07, .apb = 0x001c }, /* XDMREG_DELAYCNT */ \
+ { .nar = 0x08, .apb = 0x0020 }, /* XDMREG_MEMADDRSTART */ \
+ { .nar = 0x09, .apb = 0x0024 }, /* XDMREG_MEMADDREND */ \
+ \
+ /* Performance Monitor Registers */ \
+ { .nar = 0x20, .apb = 0x1000 }, /* XDMREG_PMG */ \
+ { .nar = 0x24, .apb = 0x1010 }, /* XDMREG_INTPC */ \
+ { .nar = 0x28, .apb = 0x1080 }, /* XDMREG_PM0 */ \
+ { .nar = 0x29, .apb = 0x1084 }, /* XDMREG_PM1 */ \
+ { .nar = 0x2a, .apb = 0x1088 }, /* XDMREG_PM2 */ \
+ { .nar = 0x2b, .apb = 0x108c }, /* XDMREG_PM3 */ \
+ { .nar = 0x2c, .apb = 0x1090 }, /* XDMREG_PM4 */ \
+ { .nar = 0x2d, .apb = 0x1094 }, /* XDMREG_PM5 */ \
+ { .nar = 0x2e, .apb = 0x1098 }, /* XDMREG_PM6 */ \
+ { .nar = 0x2f, .apb = 0x109c }, /* XDMREG_PM7 */ \
+ { .nar = 0x30, .apb = 0x1100 }, /* XDMREG_PMCTRL0 */ \
+ { .nar = 0x31, .apb = 0x1104 }, /* XDMREG_PMCTRL1 */ \
+ { .nar = 0x32, .apb = 0x1108 }, /* XDMREG_PMCTRL2 */ \
+ { .nar = 0x33, .apb = 0x110c }, /* XDMREG_PMCTRL3 */ \
+ { .nar = 0x34, .apb = 0x1110 }, /* XDMREG_PMCTRL4 */ \
+ { .nar = 0x35, .apb = 0x1114 }, /* XDMREG_PMCTRL5 */ \
+ { .nar = 0x36, .apb = 0x1118 }, /* XDMREG_PMCTRL6 */ \
+ { .nar = 0x37, .apb = 0x111c }, /* XDMREG_PMCTRL7 */ \
+ { .nar = 0x38, .apb = 0x1180 }, /* XDMREG_PMSTAT0 */ \
+ { .nar = 0x39, .apb = 0x1184 }, /* XDMREG_PMSTAT1 */ \
+ { .nar = 0x3a, .apb = 0x1188 }, /* XDMREG_PMSTAT2 */ \
+ { .nar = 0x3b, .apb = 0x118c }, /* XDMREG_PMSTAT3 */ \
+ { .nar = 0x3c, .apb = 0x1190 }, /* XDMREG_PMSTAT4 */ \
+ { .nar = 0x3d, .apb = 0x1194 }, /* XDMREG_PMSTAT5 */ \
+ { .nar = 0x3e, .apb = 0x1198 }, /* XDMREG_PMSTAT6 */ \
+ { .nar = 0x3f, .apb = 0x119c }, /* XDMREG_PMSTAT7 */ \
+ \
+ /* OCD Registers */ \
+ { .nar = 0x40, .apb = 0x2000 }, /* XDMREG_OCDID */ \
+ { .nar = 0x42, .apb = 0x2008 }, /* XDMREG_DCRCLR */ \
+ { .nar = 0x43, .apb = 0x200c }, /* XDMREG_DCRSET */ \
+ { .nar = 0x44, .apb = 0x2010 }, /* XDMREG_DSR */ \
+ { .nar = 0x45, .apb = 0x2014 }, /* XDMREG_DDR */ \
+ { .nar = 0x46, .apb = 0x2018 }, /* XDMREG_DDREXEC */ \
+ { .nar = 0x47, .apb = 0x201c }, /* XDMREG_DIR0EXEC */ \
+ { .nar = 0x48, .apb = 0x2020 }, /* XDMREG_DIR0 */ \
+ { .nar = 0x49, .apb = 0x2024 }, /* XDMREG_DIR1 */ \
+ { .nar = 0x4a, .apb = 0x2028 }, /* XDMREG_DIR2 */ \
+ { .nar = 0x4b, .apb = 0x202c }, /* XDMREG_DIR3 */ \
+ { .nar = 0x4c, .apb = 0x2030 }, /* XDMREG_DIR4 */ \
+ { .nar = 0x4d, .apb = 0x2034 }, /* XDMREG_DIR5 */ \
+ { .nar = 0x4e, .apb = 0x2038 }, /* XDMREG_DIR6 */ \
+ { .nar = 0x4f, .apb = 0x203c }, /* XDMREG_DIR7 */ \
+ \
+ /* Misc Registers */ \
+ { .nar = 0x5a, .apb = 0x3028 }, /* XDMREG_ERISTAT */ \
+ \
+ /* CoreSight Registers */ \
+ { .nar = 0x60, .apb = 0x3f00 }, /* XDMREG_ITCTRL */ \
+ { .nar = 0x68, .apb = 0x3fa0 }, /* XDMREG_CLAIMSET */ \
+ { .nar = 0x69, .apb = 0x3fa4 }, /* XDMREG_CLAIMCLR */ \
+ { .nar = 0x6c, .apb = 0x3fb0 }, /* XDMREG_LOCKACCESS */ \
+ { .nar = 0x6d, .apb = 0x3fb4 }, /* XDMREG_LOCKSTATUS */ \
+ { .nar = 0x6e, .apb = 0x3fb8 }, /* XDMREG_AUTHSTATUS */ \
+ { .nar = 0x72, .apb = 0x3fc8 }, /* XDMREG_DEVID */ \
+ { .nar = 0x73, .apb = 0x3fcc }, /* XDMREG_DEVTYPE */ \
+ { .nar = 0x74, .apb = 0x3fd0 }, /* XDMREG_PERID4 */ \
+ { .nar = 0x75, .apb = 0x3fd4 }, /* XDMREG_PERID5 */ \
+ { .nar = 0x76, .apb = 0x3fd8 }, /* XDMREG_PERID6 */ \
+ { .nar = 0x77, .apb = 0x3fdc }, /* XDMREG_PERID7 */ \
+ { .nar = 0x78, .apb = 0x3fe0 }, /* XDMREG_PERID0 */ \
+ { .nar = 0x79, .apb = 0x3fe4 }, /* XDMREG_PERID1 */ \
+ { .nar = 0x7a, .apb = 0x3fe8 }, /* XDMREG_PERID2 */ \
+ { .nar = 0x7b, .apb = 0x3fec }, /* XDMREG_PERID3 */ \
+ { .nar = 0x7c, .apb = 0x3ff0 }, /* XDMREG_COMPID0 */ \
+ { .nar = 0x7d, .apb = 0x3ff4 }, /* XDMREG_COMPID1 */ \
+ { .nar = 0x7e, .apb = 0x3ff8 }, /* XDMREG_COMPID2 */ \
+ { .nar = 0x7f, .apb = 0x3ffc }, /* XDMREG_COMPID3 */ \
+}
+
+#define XTENSA_DM_APB_ALIGN 0x4000
+
+/* OCD registers, bit definitions */
#define OCDDCR_ENABLEOCD BIT(0)
#define OCDDCR_DEBUGINTERRUPT BIT(1)
#define OCDDCR_INTERRUPTALLCONDS BIT(2)
@@ -164,7 +289,7 @@
#define TRAXCTRL_CTIEN BIT(5) /* Cross-trigger enable */
#define TRAXCTRL_TMEN BIT(7) /* Tracemem Enable. Always set. */
#define TRAXCTRL_CNTU BIT(9) /* Post-stop-trigger countdown units; selects when DelayCount-- happens.
- *0 - every 32-bit word written to tracemem, 1 - every cpu instruction */
+ * 0 - every 32-bit word written to tracemem, 1 - every cpu instruction */
#define TRAXCTRL_TSEN BIT(11) /* Undocumented/deprecated? */
#define TRAXCTRL_SMPER_SHIFT 12 /* Send sync every 2^(9-smper) messages. 7=reserved, 0=no sync msg */
#define TRAXCTRL_SMPER_MASK 0x07 /* Synchronization message period */
@@ -202,7 +327,7 @@
#define PCMATCHCTRL_PCML_SHIFT 0 /* Amount of lower bits to ignore in pc trigger register */
#define PCMATCHCTRL_PCML_MASK 0x1F
#define PCMATCHCTRL_PCMS BIT(31) /* PC Match Sense, 0-match when procs PC is in-range, 1-match when
- *out-of-range */
+ * out-of-range */
#define XTENSA_MAX_PERF_COUNTERS 2
#define XTENSA_MAX_PERF_SELECT 32
@@ -216,20 +341,24 @@ struct xtensa_debug_ops {
/** enable operation */
int (*queue_enable)(struct xtensa_debug_module *dm);
/** register read. */
- int (*queue_reg_read)(struct xtensa_debug_module *dm, unsigned int reg, uint8_t *data);
+ int (*queue_reg_read)(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint8_t *data);
/** register write. */
- int (*queue_reg_write)(struct xtensa_debug_module *dm, unsigned int reg, uint32_t data);
+ int (*queue_reg_write)(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint32_t data);
};
+/* Xtensa power registers are 8 bits wide on JTAG interfaces but 32 bits wide
+ * when accessed via APB/DAP. In order to use DAP queuing APIs (for optimal
+ * performance), the XDM power register APIs take 32-bit register params.
+ */
struct xtensa_power_ops {
/** register read. */
- int (*queue_reg_read)(struct xtensa_debug_module *dm, unsigned int reg, uint8_t *data,
- uint8_t clear);
+ int (*queue_reg_read)(struct xtensa_debug_module *dm, enum xtensa_dm_pwr_reg reg, uint8_t *data,
+ uint32_t clear);
/** register write. */
- int (*queue_reg_write)(struct xtensa_debug_module *dm, unsigned int reg, uint8_t data);
+ int (*queue_reg_write)(struct xtensa_debug_module *dm, enum xtensa_dm_pwr_reg reg, uint32_t data);
};
-typedef uint8_t xtensa_pwrstat_t;
+typedef uint32_t xtensa_pwrstat_t;
typedef uint32_t xtensa_ocdid_t;
typedef uint32_t xtensa_dsr_t;
typedef uint32_t xtensa_traxstat_t;
@@ -283,29 +412,62 @@ struct xtensa_perfmon_result {
struct xtensa_debug_module_config {
const struct xtensa_power_ops *pwr_ops;
const struct xtensa_debug_ops *dbg_ops;
+
+ /* Either JTAG or DAP structures will be populated */
struct jtag_tap *tap;
void (*queue_tdi_idle)(struct target *target);
void *queue_tdi_idle_arg;
+
+ /* For targets conforming to ARM Debug Interface v5,
+ * "dap" references the Debug Access Port (DAP)
+ * used to make requests to the target;
+ * "debug_ap" is AP instance connected to processor
+ */
+ struct adiv5_dap *dap;
+ struct adiv5_ap *debug_ap;
+ int debug_apsel;
+ uint32_t ap_offset;
};
struct xtensa_debug_module {
const struct xtensa_power_ops *pwr_ops;
const struct xtensa_debug_ops *dbg_ops;
+
+ /* Either JTAG or DAP structures will be populated */
struct jtag_tap *tap;
void (*queue_tdi_idle)(struct target *target);
void *queue_tdi_idle_arg;
+ /* DAP struct; AP instance connected to processor */
+ struct adiv5_dap *dap;
+ struct adiv5_ap *debug_ap;
+ int debug_apsel;
+
struct xtensa_power_status power_status;
struct xtensa_core_status core_status;
xtensa_ocdid_t device_id;
+ uint32_t ap_offset;
};
int xtensa_dm_init(struct xtensa_debug_module *dm, const struct xtensa_debug_module_config *cfg);
+void xtensa_dm_deinit(struct xtensa_debug_module *dm);
+int xtensa_dm_poll(struct xtensa_debug_module *dm);
+int xtensa_dm_examine(struct xtensa_debug_module *dm);
int xtensa_dm_queue_enable(struct xtensa_debug_module *dm);
-int xtensa_dm_queue_reg_read(struct xtensa_debug_module *dm, unsigned int reg, uint8_t *value);
-int xtensa_dm_queue_reg_write(struct xtensa_debug_module *dm, unsigned int reg, uint32_t value);
-int xtensa_dm_queue_pwr_reg_read(struct xtensa_debug_module *dm, unsigned int reg, uint8_t *data, uint8_t clear);
-int xtensa_dm_queue_pwr_reg_write(struct xtensa_debug_module *dm, unsigned int reg, uint8_t data);
+int xtensa_dm_queue_reg_read(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint8_t *value);
+int xtensa_dm_queue_reg_write(struct xtensa_debug_module *dm, enum xtensa_dm_reg reg, uint32_t value);
+int xtensa_dm_queue_pwr_reg_read(struct xtensa_debug_module *dm,
+ enum xtensa_dm_pwr_reg reg,
+ uint8_t *data,
+ uint32_t clear);
+int xtensa_dm_queue_pwr_reg_write(struct xtensa_debug_module *dm,
+ enum xtensa_dm_pwr_reg reg,
+ uint32_t data);
+
+static inline int xtensa_dm_queue_execute(struct xtensa_debug_module *dm)
+{
+ return dm->dap ? dap_run(dm->dap) : jtag_execute_queue();
+}
static inline void xtensa_dm_queue_tdi_idle(struct xtensa_debug_module *dm)
{
@@ -352,19 +514,19 @@ static inline bool xtensa_dm_is_online(struct xtensa_debug_module *dm)
int res = xtensa_dm_device_id_read(dm);
if (res != ERROR_OK)
return false;
- return (dm->device_id != 0xffffffff && dm->device_id != 0);
+ return dm->device_id != 0xffffffff && dm->device_id != 0;
}
static inline bool xtensa_dm_tap_was_reset(struct xtensa_debug_module *dm)
{
- return !(dm->power_status.prev_stat & PWRSTAT_DEBUGWASRESET) &&
- dm->power_status.stat & PWRSTAT_DEBUGWASRESET;
+ return !(dm->power_status.prev_stat & PWRSTAT_DEBUGWASRESET_DM(dm)) &&
+ dm->power_status.stat & PWRSTAT_DEBUGWASRESET_DM(dm);
}
static inline bool xtensa_dm_core_was_reset(struct xtensa_debug_module *dm)
{
- return !(dm->power_status.prev_stat & PWRSTAT_COREWASRESET) &&
- dm->power_status.stat & PWRSTAT_COREWASRESET;
+ return !(dm->power_status.prev_stat & PWRSTAT_COREWASRESET_DM(dm)) &&
+ dm->power_status.stat & PWRSTAT_COREWASRESET_DM(dm);
}
static inline bool xtensa_dm_core_is_stalled(struct xtensa_debug_module *dm)
diff --git a/src/target/xtensa/xtensa_regs.h b/src/target/xtensa/xtensa_regs.h
index 7602131..1d9d365 100644
--- a/src/target/xtensa/xtensa_regs.h
+++ b/src/target/xtensa/xtensa_regs.h
@@ -1,22 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Generic Xtensa target API for OpenOCD *
+ * Copyright (C) 2020-2022 Cadence Design Systems, Inc. *
* Copyright (C) 2016-2019 Espressif Systems Ltd. *
* Author: Angus Gratton gus@projectgus.com *
- * Author: Jeroen Domburg <jeroen@espressif.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
+
#ifndef OPENOCD_TARGET_XTENSA_REGS_H
#define OPENOCD_TARGET_XTENSA_REGS_H
@@ -25,6 +15,7 @@ struct reg_arch_type;
enum xtensa_reg_id {
XT_REG_IDX_PC = 0,
XT_REG_IDX_AR0,
+ XT_REG_IDX_ARFIRST = XT_REG_IDX_AR0,
XT_REG_IDX_AR1,
XT_REG_IDX_AR2,
XT_REG_IDX_AR3,
@@ -40,152 +31,23 @@ enum xtensa_reg_id {
XT_REG_IDX_AR13,
XT_REG_IDX_AR14,
XT_REG_IDX_AR15,
- XT_REG_IDX_AR16,
- XT_REG_IDX_AR17,
- XT_REG_IDX_AR18,
- XT_REG_IDX_AR19,
- XT_REG_IDX_AR20,
- XT_REG_IDX_AR21,
- XT_REG_IDX_AR22,
- XT_REG_IDX_AR23,
- XT_REG_IDX_AR24,
- XT_REG_IDX_AR25,
- XT_REG_IDX_AR26,
- XT_REG_IDX_AR27,
- XT_REG_IDX_AR28,
- XT_REG_IDX_AR29,
- XT_REG_IDX_AR30,
- XT_REG_IDX_AR31,
- XT_REG_IDX_AR32,
- XT_REG_IDX_AR33,
- XT_REG_IDX_AR34,
- XT_REG_IDX_AR35,
- XT_REG_IDX_AR36,
- XT_REG_IDX_AR37,
- XT_REG_IDX_AR38,
- XT_REG_IDX_AR39,
- XT_REG_IDX_AR40,
- XT_REG_IDX_AR41,
- XT_REG_IDX_AR42,
- XT_REG_IDX_AR43,
- XT_REG_IDX_AR44,
- XT_REG_IDX_AR45,
- XT_REG_IDX_AR46,
- XT_REG_IDX_AR47,
- XT_REG_IDX_AR48,
- XT_REG_IDX_AR49,
- XT_REG_IDX_AR50,
- XT_REG_IDX_AR51,
- XT_REG_IDX_AR52,
- XT_REG_IDX_AR53,
- XT_REG_IDX_AR54,
- XT_REG_IDX_AR55,
- XT_REG_IDX_AR56,
- XT_REG_IDX_AR57,
- XT_REG_IDX_AR58,
- XT_REG_IDX_AR59,
- XT_REG_IDX_AR60,
- XT_REG_IDX_AR61,
- XT_REG_IDX_AR62,
- XT_REG_IDX_AR63,
- XT_REG_IDX_LBEG,
- XT_REG_IDX_LEND,
- XT_REG_IDX_LCOUNT,
- XT_REG_IDX_SAR,
+ XT_REG_IDX_ARLAST = 64, /* Max 64 ARs */
XT_REG_IDX_WINDOWBASE,
XT_REG_IDX_WINDOWSTART,
- XT_REG_IDX_CONFIGID0,
- XT_REG_IDX_CONFIGID1,
XT_REG_IDX_PS,
- XT_REG_IDX_THREADPTR,
- XT_REG_IDX_BR,
- XT_REG_IDX_SCOMPARE1,
- XT_REG_IDX_ACCLO,
- XT_REG_IDX_ACCHI,
- XT_REG_IDX_M0,
- XT_REG_IDX_M1,
- XT_REG_IDX_M2,
- XT_REG_IDX_M3,
- XT_REG_IDX_F0,
- XT_REG_IDX_F1,
- XT_REG_IDX_F2,
- XT_REG_IDX_F3,
- XT_REG_IDX_F4,
- XT_REG_IDX_F5,
- XT_REG_IDX_F6,
- XT_REG_IDX_F7,
- XT_REG_IDX_F8,
- XT_REG_IDX_F9,
- XT_REG_IDX_F10,
- XT_REG_IDX_F11,
- XT_REG_IDX_F12,
- XT_REG_IDX_F13,
- XT_REG_IDX_F14,
- XT_REG_IDX_F15,
- XT_REG_IDX_FCR,
- XT_REG_IDX_FSR,
- XT_REG_IDX_MMID,
XT_REG_IDX_IBREAKENABLE,
- XT_REG_IDX_MEMCTL,
- XT_REG_IDX_ATOMCTL,
+ XT_REG_IDX_DDR,
XT_REG_IDX_IBREAKA0,
XT_REG_IDX_IBREAKA1,
XT_REG_IDX_DBREAKA0,
XT_REG_IDX_DBREAKA1,
XT_REG_IDX_DBREAKC0,
XT_REG_IDX_DBREAKC1,
- XT_REG_IDX_EPC1,
- XT_REG_IDX_EPC2,
- XT_REG_IDX_EPC3,
- XT_REG_IDX_EPC4,
- XT_REG_IDX_EPC5,
- XT_REG_IDX_EPC6,
- XT_REG_IDX_EPC7,
- XT_REG_IDX_DEPC,
- XT_REG_IDX_EPS2,
- XT_REG_IDX_EPS3,
- XT_REG_IDX_EPS4,
- XT_REG_IDX_EPS5,
- XT_REG_IDX_EPS6,
- XT_REG_IDX_EPS7,
- XT_REG_IDX_EXCSAVE1,
- XT_REG_IDX_EXCSAVE2,
- XT_REG_IDX_EXCSAVE3,
- XT_REG_IDX_EXCSAVE4,
- XT_REG_IDX_EXCSAVE5,
- XT_REG_IDX_EXCSAVE6,
- XT_REG_IDX_EXCSAVE7,
XT_REG_IDX_CPENABLE,
- XT_REG_IDX_INTERRUPT,
- XT_REG_IDX_INTSET,
- XT_REG_IDX_INTCLEAR,
- XT_REG_IDX_INTENABLE,
- XT_REG_IDX_VECBASE,
XT_REG_IDX_EXCCAUSE,
XT_REG_IDX_DEBUGCAUSE,
- XT_REG_IDX_CCOUNT,
- XT_REG_IDX_PRID,
XT_REG_IDX_ICOUNT,
XT_REG_IDX_ICOUNTLEVEL,
- XT_REG_IDX_EXCVADDR,
- XT_REG_IDX_CCOMPARE0,
- XT_REG_IDX_CCOMPARE1,
- XT_REG_IDX_CCOMPARE2,
- XT_REG_IDX_MISC0,
- XT_REG_IDX_MISC1,
- XT_REG_IDX_MISC2,
- XT_REG_IDX_MISC3,
- XT_REG_IDX_LITBASE,
- XT_REG_IDX_PTEVADDR,
- XT_REG_IDX_RASID,
- XT_REG_IDX_ITLBCFG,
- XT_REG_IDX_DTLBCFG,
- XT_REG_IDX_MEPC,
- XT_REG_IDX_MEPS,
- XT_REG_IDX_MESAVE,
- XT_REG_IDX_MESR,
- XT_REG_IDX_MECR,
- XT_REG_IDX_MEVADDR,
XT_REG_IDX_A0,
XT_REG_IDX_A1,
XT_REG_IDX_A2,
@@ -202,77 +64,72 @@ enum xtensa_reg_id {
XT_REG_IDX_A13,
XT_REG_IDX_A14,
XT_REG_IDX_A15,
- XT_REG_IDX_PWRCTL,
- XT_REG_IDX_PWRSTAT,
- XT_REG_IDX_ERISTAT,
- XT_REG_IDX_CS_ITCTRL,
- XT_REG_IDX_CS_CLAIMSET,
- XT_REG_IDX_CS_CLAIMCLR,
- XT_REG_IDX_CS_LOCKACCESS,
- XT_REG_IDX_CS_LOCKSTATUS,
- XT_REG_IDX_CS_AUTHSTATUS,
- XT_REG_IDX_FAULT_INFO,
- XT_REG_IDX_TRAX_ID,
- XT_REG_IDX_TRAX_CTRL,
- XT_REG_IDX_TRAX_STAT,
- XT_REG_IDX_TRAX_DATA,
- XT_REG_IDX_TRAX_ADDR,
- XT_REG_IDX_TRAX_PCTRIGGER,
- XT_REG_IDX_TRAX_PCMATCH,
- XT_REG_IDX_TRAX_DELAY,
- XT_REG_IDX_TRAX_MEMSTART,
- XT_REG_IDX_TRAX_MEMEND,
- XT_REG_IDX_PMG,
- XT_REG_IDX_PMPC,
- XT_REG_IDX_PM0,
- XT_REG_IDX_PM1,
- XT_REG_IDX_PMCTRL0,
- XT_REG_IDX_PMCTRL1,
- XT_REG_IDX_PMSTAT0,
- XT_REG_IDX_PMSTAT1,
- XT_REG_IDX_OCD_ID,
- XT_REG_IDX_OCD_DCRCLR,
- XT_REG_IDX_OCD_DCRSET,
- XT_REG_IDX_OCD_DSR,
- XT_REG_IDX_OCD_DDR,
- XT_NUM_REGS,
- /* chip-specific user registers go after ISA-defined ones */
- XT_USR_REG_START = XT_NUM_REGS
+ XT_NUM_REGS
};
typedef uint32_t xtensa_reg_val_t;
+#define XT_NUM_A_REGS 16
+
enum xtensa_reg_type {
XT_REG_GENERAL = 0, /* General-purpose register; part of the windowed register set */
XT_REG_USER = 1, /* User register, needs RUR to read */
XT_REG_SPECIAL = 2, /* Special register, needs RSR to read */
XT_REG_DEBUG = 3, /* Register used for the debug interface. Don't mess with this. */
XT_REG_RELGEN = 4, /* Relative general address. Points to the absolute addresses plus the window
- *index */
+ * index */
XT_REG_FR = 5, /* Floating-point register */
+ XT_REG_TIE = 6, /* TIE (custom) register */
+ XT_REG_OTHER = 7, /* Other (typically legacy) register */
+ XT_REG_TYPE_NUM,
+
+ /* enum names must be one of the above types + _VAL or _MASK */
+ XT_REG_GENERAL_MASK = 0xFFC0,
+ XT_REG_GENERAL_VAL = 0x0100,
+ XT_REG_USER_MASK = 0xFF00,
+ XT_REG_USER_VAL = 0x0300,
+ XT_REG_SPECIAL_MASK = 0xFF00,
+ XT_REG_SPECIAL_VAL = 0x0200,
+ XT_REG_DEBUG_MASK = 0xFF00,
+ XT_REG_DEBUG_VAL = 0x0200,
+ XT_REG_RELGEN_MASK = 0xFFE0,
+ XT_REG_RELGEN_VAL = 0x0000,
+ XT_REG_FR_MASK = 0xFFF0,
+ XT_REG_FR_VAL = 0x0030,
+ XT_REG_TIE_MASK = 0xF000,
+ XT_REG_TIE_VAL = 0xF000, /* unused */
+ XT_REG_OTHER_MASK = 0xFFFF,
+ XT_REG_OTHER_VAL = 0xF000, /* unused */
+
+ XT_REG_INDEX_MASK = 0x00FF
};
enum xtensa_reg_flags {
XT_REGF_NOREAD = 0x01, /* Register is write-only */
- XT_REGF_COPROC0 = 0x02 /* Can't be read if coproc0 isn't enabled */
+ XT_REGF_COPROC0 = 0x02, /* Can't be read if coproc0 isn't enabled */
+ XT_REGF_MASK = 0x03
};
struct xtensa_reg_desc {
const char *name;
+ bool exist;
unsigned int reg_num; /* ISA register num (meaning depends on register type) */
+ unsigned int dbreg_num; /* Debugger-visible register num (reg type encoded) */
enum xtensa_reg_type type;
enum xtensa_reg_flags flags;
};
-struct xtensa_user_reg_desc {
- const char *name;
- /* ISA register num (meaning depends on register type) */
- unsigned int reg_num;
- enum xtensa_reg_flags flags;
- uint32_t size;
- const struct reg_arch_type *type;
-};
+#define _XT_MK_DBREGN(reg_num, reg_type) \
+ ((reg_type ## _VAL) | (reg_num))
+
+#define _XT_MK_DBREGN_MASK(reg_num, reg_mask) \
+ ((reg_mask) | (reg_num))
+
+#define XT_MK_REG_DESC(n, r, t, f) \
+ { .name = (n), .exist = false, .reg_num = (r), \
+ .dbreg_num = _XT_MK_DBREGN(r, t), .type = (t), \
+ .flags = (f) }
-extern const struct xtensa_reg_desc xtensa_regs[XT_NUM_REGS];
+extern struct xtensa_reg_desc xtensa_regs[XT_NUM_REGS];
#endif /* OPENOCD_TARGET_XTENSA_REGS_H */
diff --git a/src/transport/Makefile.am b/src/transport/Makefile.am
index 9076d9b..cb4f48f 100644
--- a/src/transport/Makefile.am
+++ b/src/transport/Makefile.am
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libtransport.la
%C%_libtransport_la_SOURCES = \
%D%/transport.c \
diff --git a/src/transport/transport.c b/src/transport/transport.c
index ba1af33..d72a48b 100644
--- a/src/transport/transport.c
+++ b/src/transport/transport.c
@@ -1,18 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (c) 2010 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/transport/transport.h b/src/transport/transport.h
index e04f780..00d8b07 100644
--- a/src/transport/transport.h
+++ b/src/transport/transport.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/*
* Copyright (c) 2010 by David Brownell
* Copyright (C) 2011 Tomasz Boleslaw CEDRO (http://www.tomek.cedro.info)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef OPENOCD_TRANSPORT_TRANSPORT_H
diff --git a/src/xsvf/Makefile.am b/src/xsvf/Makefile.am
index 61e6fb9..08f1cc1 100644
--- a/src/xsvf/Makefile.am
+++ b/src/xsvf/Makefile.am
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
noinst_LTLIBRARIES += %D%/libxsvf.la
%C%_libxsvf_la_SOURCES = %D%/xsvf.c %D%/xsvf.h
diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c
index c4ce55a..0266c21 100644
--- a/src/xsvf/xsvf.c
+++ b/src/xsvf/xsvf.c
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
@@ -10,19 +12,6 @@
* *
* Copyright (C) 2009 SoftPLC Corporation. http://softplc.com *
* Dick Hollenbeck <dick@softplc.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
/* The specification for SVF is available here:
diff --git a/src/xsvf/xsvf.h b/src/xsvf/xsvf.h
index aa0f4f0..04ba056 100644
--- a/src/xsvf/xsvf.h
+++ b/src/xsvf/xsvf.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_XSVF_XSVF_H
diff --git a/tcl/bitsbytes.tcl b/tcl/bitsbytes.tcl
index 756c725..03d758e 100644
--- a/tcl/bitsbytes.tcl
+++ b/tcl/bitsbytes.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#----------------------------------------
# Purpose - Create some $BIT variables
# Create $K and $M variables
diff --git a/tcl/board/8devices-lima.cfg b/tcl/board/8devices-lima.cfg
index 0d35cfb..a094cae 100644
--- a/tcl/board/8devices-lima.cfg
+++ b/tcl/board/8devices-lima.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Product page:
# https://www.8devices.com/products/lima
#
diff --git a/tcl/board/actux3.cfg b/tcl/board/actux3.cfg
index 0de4cb4..edb529c 100644
--- a/tcl/board/actux3.cfg
+++ b/tcl/board/actux3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# board config file for AcTux3/XBA IXP42x board
# Date: 2010-12-16
# Author: Michael Schwingen <michael@schwingen.org>
diff --git a/tcl/board/adapteva_parallella1.cfg b/tcl/board/adapteva_parallella1.cfg
index 83d1cd4..d6336a8 100644
--- a/tcl/board/adapteva_parallella1.cfg
+++ b/tcl/board/adapteva_parallella1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Adapteva Parallella-I board (via Porcupine-1 adapter board)
#
diff --git a/tcl/board/adsp-sc584-ezbrd.cfg b/tcl/board/adsp-sc584-ezbrd.cfg
index 82df381..366a24a 100644
--- a/tcl/board/adsp-sc584-ezbrd.cfg
+++ b/tcl/board/adsp-sc584-ezbrd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Analog Devices ADSP-SC584-EZBRD evaluation board
#
diff --git a/tcl/board/alphascale_asm9260_ek.cfg b/tcl/board/alphascale_asm9260_ek.cfg
index 1c12682..33a8354 100644
--- a/tcl/board/alphascale_asm9260_ek.cfg
+++ b/tcl/board/alphascale_asm9260_ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/alphascale_asm9260t.cfg]
reset_config trst_and_srst
diff --git a/tcl/board/altera_sockit.cfg b/tcl/board/altera_sockit.cfg
index 4d10aef..bbd87d6 100644
--- a/tcl/board/altera_sockit.cfg
+++ b/tcl/board/altera_sockit.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Cyclone V SocKit board
# http://www.altera.com/b/arrow-sockit.html
diff --git a/tcl/board/am3517evm.cfg b/tcl/board/am3517evm.cfg
index 8d6eba1..0b19be6 100644
--- a/tcl/board/am3517evm.cfg
+++ b/tcl/board/am3517evm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# DANGER!!!! early work in progress for this PCB/target.
#
# The most basic operations work well enough that it is
diff --git a/tcl/board/ampere_emag8180.cfg b/tcl/board/ampere_emag8180.cfg
index a122e02..736be12 100644
--- a/tcl/board/ampere_emag8180.cfg
+++ b/tcl/board/ampere_emag8180.cfg
@@ -1,22 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# OpenOCD Board Configuration for eMAG Development Platform
#
# Copyright (c) 2019-2021, Ampere Computing LLC
#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program;
-#
-#
#
# Configure JTAG speed
diff --git a/tcl/board/ampere_qs_mq_1s.cfg b/tcl/board/ampere_qs_mq_1s.cfg
new file mode 100644
index 0000000..bc649ed
--- /dev/null
+++ b/tcl/board/ampere_qs_mq_1s.cfg
@@ -0,0 +1,100 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# OpenOCD Board Configuration for Ampere Altra ("Quicksilver") and
+# Ampere Altra Max ("Mystique") processors
+#
+# Copyright (c) 2019-2021, Ampere Computing LLC
+
+# Argument Description
+#
+# JTAGFREQ
+# Set the JTAG clock frequency
+# Syntax: -c "set JTAGFREQ {freq_in_khz}"
+#
+# SYSNAME
+# Set the system name
+# If not specified, defaults to "qs"
+# Syntax: -c "set SYSNAME {qs}"
+#
+# Life-Cycle State (LCS)
+# If not specified, defaults to "Secure LCS"
+# LCS=0, "Secure LCS"
+# LCS=1, "Chip Manufacturing LCS"
+# Syntax: -c "set LCS {0}"
+# Syntax: -c "set LCS {1}"
+#
+# CORELIST_S0
+# Specify available physical cores by number
+# Example syntax to connect to physical cores 16 and 17 for S0
+# Syntax: -c "set CORELIST_S0 {16 17}"
+#
+# COREMASK_S0_LO
+# Specify available physical cores 0-63 by mask
+# Example syntax to connect to physical cores 16 and 17 for S0
+# Syntax: -c "set COREMASK_S0_LO {0x0000000000030000}"
+#
+# COREMASK_S0_HI
+# Specify available physical cores 64 and above by mask
+# Example syntax to connect to physical cores 94 and 95 for S0
+# Syntax: -c "set COREMASK_S0_HI {0x00000000C0000000}"
+#
+# PHYS_IDX
+# Enable OpenOCD ARMv8 core target physical indexing
+# If not specified, defaults to OpenOCD ARMv8 core target logical indexing
+# Syntax: -c "set PHYS_IDX {}"
+
+#
+# Configure JTAG speed
+#
+
+if { [info exists JTAGFREQ] } {
+ adapter speed $JTAGFREQ
+} else {
+ adapter speed 100
+}
+
+#
+# Set the system name
+#
+
+if { [info exists SYSNAME] } {
+ set _SYSNAME $SYSNAME
+} else {
+ set _SYSNAME qs
+}
+
+#
+# Configure Resets
+#
+
+jtag_ntrst_delay 100
+reset_config trst_only
+
+#
+# Configure Targets
+#
+
+if { [info exists CORELIST_S0] || [info exists COREMASK_S0_LO] || [info exists COREMASK_S0_HI] } {
+ set CHIPNAME ${_SYSNAME}0
+ if { [info exists CORELIST_S0] } {
+ set CORELIST $CORELIST_S0
+ } else {
+ if { [info exists COREMASK_S0_LO] } {
+ set COREMASK_LO $COREMASK_S0_LO
+ } else {
+ set COREMASK_LO 0x0
+ }
+
+ if { [info exists COREMASK_S0_HI] } {
+ set COREMASK_HI $COREMASK_S0_HI
+ } else {
+ set COREMASK_HI 0x0
+ }
+ }
+} else {
+ set CHIPNAME ${_SYSNAME}0
+ set COREMASK_LO 0x1
+ set COREMASK_HI 0x0
+}
+
+source [find target/ampere_qs_mq.cfg]
diff --git a/tcl/board/ampere_qs_mq_2s.cfg b/tcl/board/ampere_qs_mq_2s.cfg
new file mode 100644
index 0000000..76d82d2
--- /dev/null
+++ b/tcl/board/ampere_qs_mq_2s.cfg
@@ -0,0 +1,164 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# OpenOCD Board Configuration for Ampere Altra ("Quicksilver") and
+# Ampere Altra Max ("Mystique") processors
+#
+# Copyright (c) 2019-2021, Ampere Computing LLC
+
+# Argument Description
+#
+# JTAGFREQ
+# Set the JTAG clock frequency
+# Syntax: -c "set JTAGFREQ {freq_in_khz}"
+#
+# SYSNAME
+# Set the system name
+# If not specified, defaults to "qs"
+# Syntax: -c "set SYSNAME {qs}"
+#
+# Life-Cycle State (LCS)
+# If not specified, defaults to "Secure LCS"
+# LCS=0, "Secure LCS"
+# LCS=1, "Chip Manufacturing LCS"
+# Syntax: -c "set LCS {0}"
+# Syntax: -c "set LCS {1}"
+#
+# CORELIST_S0, CORELIST_S1
+# Specify available physical cores by number
+# Example syntax to connect to physical cores 16 and 17 for S0 and S1
+# Syntax: -c "set CORELIST_S0 {16 17}"
+# Syntax: -c "set CORELIST_S1 {16 17}"
+#
+# COREMASK_S0_LO, COREMASK_S1_LO
+# Specify available physical cores 0-63 by mask
+# Example syntax to connect to physical cores 16 and 17 for S0 and S1
+# Syntax: -c "set COREMASK_S0_LO {0x0000000000030000}"
+# Syntax: -c "set COREMASK_S1_LO {0x0000000000030000}"
+#
+# COREMASK_S0_HI, COREMASK_S1_HI
+# Specify available physical cores 64 and above by mask
+# Example syntax to connect to physical cores 94 and 95 for S0 and S1
+# Syntax: -c "set COREMASK_S0_HI {0x00000000C0000000}"
+# Syntax: -c "set COREMASK_S1_HI {0x00000000C0000000}"
+#
+# SPLITSMP
+# Group all ARMv8 cores per socket into individual SMP sessions
+# If not specified, group ARMv8 cores from both sockets into one SMP session
+# Syntax: -c "set SPLITSMP {}"
+#
+# PHYS_IDX
+# Enable OpenOCD ARMv8 core target physical indexing
+# If not specified, defaults to OpenOCD ARMv8 core target logical indexing
+# Syntax: -c "set PHYS_IDX {}"
+
+#
+# Configure JTAG speed
+#
+
+if { [info exists JTAGFREQ] } {
+ adapter speed $JTAGFREQ
+} else {
+ adapter speed 100
+}
+
+#
+# Set the system name
+#
+
+if { [info exists SYSNAME] } {
+ set _SYSNAME $SYSNAME
+} else {
+ set _SYSNAME qs
+}
+
+#
+# Configure Board level SMP configuration if necessary
+#
+
+if { ![info exists SPLITSMP] } {
+ # Group dual chip into a single SMP configuration
+ set SMP_STR "target smp"
+ set CORE_INDEX_OFFSET 0
+ set DUAL_SOCKET_SMP_ENABLED ""
+}
+
+#
+# Configure Resets
+#
+
+jtag_ntrst_delay 100
+reset_config trst_only
+
+#
+# Configure Targets
+#
+
+if { [info exists CORELIST_S0] || [info exists COREMASK_S0_LO] || [info exists COREMASK_S0_HI] || \
+ [info exists CORELIST_S1] || [info exists COREMASK_S1_LO] || [info exists COREMASK_S1_HI] } {
+ set CHIPNAME ${_SYSNAME}1
+ if { [info exists CORELIST_S1] } {
+ set CORELIST $CORELIST_S1
+ } else {
+ if { [info exists COREMASK_S1_LO] } {
+ set COREMASK_LO $COREMASK_S1_LO
+ } else {
+ set COREMASK_LO 0x0
+ }
+
+ if { [info exists COREMASK_S1_HI] } {
+ set COREMASK_HI $COREMASK_S1_HI
+ } else {
+ set COREMASK_HI 0x0
+ }
+ }
+ source [find target/ampere_qs_mq.cfg]
+
+ if { [info exists DUAL_SOCKET_SMP_ENABLED] && [info exists PHYS_IDX]} {
+ if { [info exists MQ_ENABLE] } {
+ set CORE_INDEX_OFFSET 128
+ } else {
+ set CORE_INDEX_OFFSET 80
+ }
+ }
+
+ set CHIPNAME ${_SYSNAME}0
+ if { [info exists CORELIST_S0] } {
+ set CORELIST $CORELIST_S0
+ } else {
+ if { [info exists COREMASK_S0_LO] } {
+ set COREMASK_LO $COREMASK_S0_LO
+ } else {
+ set COREMASK_LO 0x0
+ }
+
+ if { [info exists COREMASK_S0_HI] } {
+ set COREMASK_HI $COREMASK_S0_HI
+ } else {
+ set COREMASK_HI 0x0
+ }
+ }
+ source [find target/ampere_qs_mq.cfg]
+} else {
+ set CHIPNAME ${_SYSNAME}1
+ set COREMASK_LO 0x0
+ set COREMASK_HI 0x0
+ source [find target/ampere_qs_mq.cfg]
+
+ if { [info exists DUAL_SOCKET_SMP_ENABLED] && [info exists PHYS_IDX]} {
+ if { [info exists MQ_ENABLE] } {
+ set CORE_INDEX_OFFSET 128
+ } else {
+ set CORE_INDEX_OFFSET 80
+ }
+ }
+
+ set CHIPNAME ${_SYSNAME}0
+ set COREMASK_LO 0x1
+ set COREMASK_HI 0x0
+ source [find target/ampere_qs_mq.cfg]
+}
+
+if { [info exists DUAL_SOCKET_SMP_ENABLED] } {
+ # For dual socket SMP configuration, evaluate the string
+ eval $SMP_STR
+}
diff --git a/tcl/board/arm_evaluator7t.cfg b/tcl/board/arm_evaluator7t.cfg
index ef4b782..0fb8778 100644
--- a/tcl/board/arm_evaluator7t.cfg
+++ b/tcl/board/arm_evaluator7t.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This board is from ARM and has an samsung s3c45101x01 chip
source [find target/samsung_s3c4510.cfg]
diff --git a/tcl/board/arm_musca_a.cfg b/tcl/board/arm_musca_a.cfg
index 25f8ce6..b4880d1 100644
--- a/tcl/board/arm_musca_a.cfg
+++ b/tcl/board/arm_musca_a.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Configuration script for ARM Musca-A development board
#
diff --git a/tcl/board/arty_s7.cfg b/tcl/board/arty_s7.cfg
index a5e26fc..eaa15ab 100644
--- a/tcl/board/arty_s7.cfg
+++ b/tcl/board/arty_s7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Arty S7: Spartan7 25/50 FPGA Board for Makers and Hobbyists
#
diff --git a/tcl/board/asus-rt-n16.cfg b/tcl/board/asus-rt-n16.cfg
index 78f111d..a02bab8 100644
--- a/tcl/board/asus-rt-n16.cfg
+++ b/tcl/board/asus-rt-n16.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# http://wikidevi.com/wiki/ASUS_RT-N16
#
diff --git a/tcl/board/asus-rt-n66u.cfg b/tcl/board/asus-rt-n66u.cfg
index 4b255cf..dda0f33 100644
--- a/tcl/board/asus-rt-n66u.cfg
+++ b/tcl/board/asus-rt-n66u.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# http://wikidevi.com/wiki/Asus_RT-N66U
#
diff --git a/tcl/board/at91cap7a-stk-sdram.cfg b/tcl/board/at91cap7a-stk-sdram.cfg
index 182a406..6da917a 100644
--- a/tcl/board/at91cap7a-stk-sdram.cfg
+++ b/tcl/board/at91cap7a-stk-sdram.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4394
#
# use combined on interfaces or targets that can't set TRST/SRST separately
diff --git a/tcl/board/at91eb40a.cfg b/tcl/board/at91eb40a.cfg
index d314e18..60c6c6e 100644
--- a/tcl/board/at91eb40a.cfg
+++ b/tcl/board/at91eb40a.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#Script for AT91EB40a
# FIXME use some standard target config, maybe create one from this
diff --git a/tcl/board/at91rm9200-dk.cfg b/tcl/board/at91rm9200-dk.cfg
index b8ec00e..3751103 100644
--- a/tcl/board/at91rm9200-dk.cfg
+++ b/tcl/board/at91rm9200-dk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This is for the "at91rm9200-DK" (not the EK) eval board.
#
diff --git a/tcl/board/at91rm9200-ek.cfg b/tcl/board/at91rm9200-ek.cfg
index 958bc9d..e38914e 100644
--- a/tcl/board/at91rm9200-ek.cfg
+++ b/tcl/board/at91rm9200-ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Copyright 2010 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
#
diff --git a/tcl/board/at91sam9261-ek.cfg b/tcl/board/at91sam9261-ek.cfg
index 1f3de48..c2d97b0 100644
--- a/tcl/board/at91sam9261-ek.cfg
+++ b/tcl/board/at91sam9261-ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Atmel AT91SAM9261-EK eval board
################################################################################
diff --git a/tcl/board/at91sam9263-ek.cfg b/tcl/board/at91sam9263-ek.cfg
index ab04228..328a792 100644
--- a/tcl/board/at91sam9263-ek.cfg
+++ b/tcl/board/at91sam9263-ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Atmel AT91SAM9263-EK eval board
################################################################################
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index 04d9a19..a5831cd 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#################################################################################################
# #
# Author: Gary Carlson (gcarlson@carlson-minot.com) #
diff --git a/tcl/board/atmel_at91sam7s-ek.cfg b/tcl/board/atmel_at91sam7s-ek.cfg
index 48edfc9..9cf85df 100644
--- a/tcl/board/atmel_at91sam7s-ek.cfg
+++ b/tcl/board/atmel_at91sam7s-ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Atmel AT91SAM7S-EK
# http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3784
diff --git a/tcl/board/atmel_at91sam9260-ek.cfg b/tcl/board/atmel_at91sam9260-ek.cfg
index a37f1f5..56fce3a 100644
--- a/tcl/board/atmel_at91sam9260-ek.cfg
+++ b/tcl/board/atmel_at91sam9260-ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Atmel AT91SAM9260-EK eval board
#
diff --git a/tcl/board/atmel_at91sam9rl-ek.cfg b/tcl/board/atmel_at91sam9rl-ek.cfg
index e18d1fd..cc3d974 100644
--- a/tcl/board/atmel_at91sam9rl-ek.cfg
+++ b/tcl/board/atmel_at91sam9rl-ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
#
# Generated for Atmel AT91SAM9RL-EK evaluation board using Atmel SAM-ICE (J-Link) V6
diff --git a/tcl/board/atmel_sam3n_ek.cfg b/tcl/board/atmel_sam3n_ek.cfg
index e43008f..af2fd95 100644
--- a/tcl/board/atmel_sam3n_ek.cfg
+++ b/tcl/board/atmel_sam3n_ek.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
#
# Board configuration for Atmel's SAM3N-EK
diff --git a/tcl/board/atmel_sam3s_ek.cfg b/tcl/board/atmel_sam3s_ek.cfg
index 6e8ffe4..136e31d 100644
--- a/tcl/board/atmel_sam3s_ek.cfg
+++ b/tcl/board/atmel_sam3s_ek.cfg
@@ -1 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/at91sam3sXX.cfg]
diff --git a/tcl/board/atmel_sam3u_ek.cfg b/tcl/board/atmel_sam3u_ek.cfg
index 1584879..c308003 100644
--- a/tcl/board/atmel_sam3u_ek.cfg
+++ b/tcl/board/atmel_sam3u_ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/at91sam3u4e.cfg]
reset_config srst_only
diff --git a/tcl/board/atmel_sam3x_ek.cfg b/tcl/board/atmel_sam3x_ek.cfg
index bb8cd17..c321cfb 100644
--- a/tcl/board/atmel_sam3x_ek.cfg
+++ b/tcl/board/atmel_sam3x_ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/at91sam3ax_8x.cfg]
reset_config srst_only
diff --git a/tcl/board/atmel_sam4e_ek.cfg b/tcl/board/atmel_sam4e_ek.cfg
index 75e67a9..61191a9 100644
--- a/tcl/board/atmel_sam4e_ek.cfg
+++ b/tcl/board/atmel_sam4e_ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an SAM4E-EK board with a single SAM4E16 chip.
# http://www.atmel.com/tools/sam4e-ek.aspx
diff --git a/tcl/board/atmel_sam4l8_xplained_pro.cfg b/tcl/board/atmel_sam4l8_xplained_pro.cfg
index 80ccc9f..d0c4516 100644
--- a/tcl/board/atmel_sam4l8_xplained_pro.cfg
+++ b/tcl/board/atmel_sam4l8_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAM4L8 Xplained Pro evaluation kit.
# http://www.atmel.com/tools/ATSAM4L8-XPRO.aspx
diff --git a/tcl/board/atmel_sam4s_ek.cfg b/tcl/board/atmel_sam4s_ek.cfg
index ca11e54..7e4bb83 100644
--- a/tcl/board/atmel_sam4s_ek.cfg
+++ b/tcl/board/atmel_sam4s_ek.cfg
@@ -1 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/at91sam4sXX.cfg]
diff --git a/tcl/board/atmel_sam4s_xplained_pro.cfg b/tcl/board/atmel_sam4s_xplained_pro.cfg
index d2acc48..92191c7 100644
--- a/tcl/board/atmel_sam4s_xplained_pro.cfg
+++ b/tcl/board/atmel_sam4s_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAM4S Xplained Pro evaluation kit.
# http://www.atmel.com/tools/ATSAM4S-XPRO.aspx
diff --git a/tcl/board/atmel_samc20_xplained_pro.cfg b/tcl/board/atmel_samc20_xplained_pro.cfg
index 1278eb7..3ac89a5 100644
--- a/tcl/board/atmel_samc20_xplained_pro.cfg
+++ b/tcl/board/atmel_samc20_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMC20 Xplained Pro evaluation kit.
#
diff --git a/tcl/board/atmel_samc21_xplained_pro.cfg b/tcl/board/atmel_samc21_xplained_pro.cfg
index ac26930..5ad6ccf 100644
--- a/tcl/board/atmel_samc21_xplained_pro.cfg
+++ b/tcl/board/atmel_samc21_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMC21 Xplained Pro evaluation kit.
# http://www.atmel.com/tools/ATSAMC21-XPRO.aspx
diff --git a/tcl/board/atmel_samd10_xplained_mini.cfg b/tcl/board/atmel_samd10_xplained_mini.cfg
index 64ae11e..f9f1d24 100644
--- a/tcl/board/atmel_samd10_xplained_mini.cfg
+++ b/tcl/board/atmel_samd10_xplained_mini.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMD10 Xplained mini evaluation kit.
# http://www.atmel.com/tools/atsamd10-xmini.aspx
diff --git a/tcl/board/atmel_samd11_xplained_pro.cfg b/tcl/board/atmel_samd11_xplained_pro.cfg
index 8ce9751..724c921 100644
--- a/tcl/board/atmel_samd11_xplained_pro.cfg
+++ b/tcl/board/atmel_samd11_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMD11 Xplained Pro evaluation kit.
#
diff --git a/tcl/board/atmel_samd20_xplained_pro.cfg b/tcl/board/atmel_samd20_xplained_pro.cfg
index 525aee0..1492958 100644
--- a/tcl/board/atmel_samd20_xplained_pro.cfg
+++ b/tcl/board/atmel_samd20_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMD20 Xplained Pro evaluation kit.
# http://www.atmel.com/tools/ATSAMD20-XPRO.aspx
diff --git a/tcl/board/atmel_samd21_xplained_pro.cfg b/tcl/board/atmel_samd21_xplained_pro.cfg
index 843b0ce..f55b6b9 100644
--- a/tcl/board/atmel_samd21_xplained_pro.cfg
+++ b/tcl/board/atmel_samd21_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMD21 Xplained Pro evaluation kit.
#
diff --git a/tcl/board/atmel_same70_xplained.cfg b/tcl/board/atmel_same70_xplained.cfg
index a22e801..f20e2a3 100644
--- a/tcl/board/atmel_same70_xplained.cfg
+++ b/tcl/board/atmel_same70_xplained.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAME70 Xplained evaluation kit.
# http://www.atmel.com/tools/ATSAME70-XPLD.aspx
diff --git a/tcl/board/atmel_samg53_xplained_pro.cfg b/tcl/board/atmel_samg53_xplained_pro.cfg
index 06638cf..060750c 100644
--- a/tcl/board/atmel_samg53_xplained_pro.cfg
+++ b/tcl/board/atmel_samg53_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMG53 Xplained Pro evaluation kit.
# http://www.atmel.com/tools/ATSAMG53-XPRO.aspx
diff --git a/tcl/board/atmel_samg55_xplained_pro.cfg b/tcl/board/atmel_samg55_xplained_pro.cfg
index 3797bf8..147dc73 100644
--- a/tcl/board/atmel_samg55_xplained_pro.cfg
+++ b/tcl/board/atmel_samg55_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMG55 Xplained Pro evaluation kit.
# http://www.atmel.com/tools/ATSAMG55-XPRO.aspx
diff --git a/tcl/board/atmel_saml21_xplained_pro.cfg b/tcl/board/atmel_saml21_xplained_pro.cfg
index 054bda4..8e62eb2 100644
--- a/tcl/board/atmel_saml21_xplained_pro.cfg
+++ b/tcl/board/atmel_saml21_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAML21 Xplained Pro evaluation kit.
#
diff --git a/tcl/board/atmel_samr21_xplained_pro.cfg b/tcl/board/atmel_samr21_xplained_pro.cfg
index 308e2bd..cd6d28e 100644
--- a/tcl/board/atmel_samr21_xplained_pro.cfg
+++ b/tcl/board/atmel_samr21_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMR21 Xplained Pro evaluation kit.
#
diff --git a/tcl/board/atmel_samv71_xplained_ultra.cfg b/tcl/board/atmel_samv71_xplained_ultra.cfg
index 4e0865d..9368f61 100644
--- a/tcl/board/atmel_samv71_xplained_ultra.cfg
+++ b/tcl/board/atmel_samv71_xplained_ultra.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Atmel SAMV71 Xplained Ultra evaluation kit.
# http://www.atmel.com/tools/ATSAMV71-XULT.aspx
diff --git a/tcl/board/avnet_ultrazed-eg.cfg b/tcl/board/avnet_ultrazed-eg.cfg
index 3e4a11a..6701fd1 100644
--- a/tcl/board/avnet_ultrazed-eg.cfg
+++ b/tcl/board/avnet_ultrazed-eg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# AVNET UltraZED EG StarterKit
# ZynqMP UlraScale-EG plus IO Carrier with on-board digilent smt2
diff --git a/tcl/board/balloon3-cpu.cfg b/tcl/board/balloon3-cpu.cfg
index 468b867..3ee840b 100644
--- a/tcl/board/balloon3-cpu.cfg
+++ b/tcl/board/balloon3-cpu.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Config for balloon3 board, cpu JTAG port. http://balloonboard.org/
# The board has separate JTAG ports for cpu and CPLD/FPGA devices
# Chaining is done on IO interfaces if desired.
diff --git a/tcl/board/bcm28155_ap.cfg b/tcl/board/bcm28155_ap.cfg
index 5d3d22a..99da948 100644
--- a/tcl/board/bcm28155_ap.cfg
+++ b/tcl/board/bcm28155_ap.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# BCM28155_AP
adapter speed 20000
diff --git a/tcl/board/bluefield.cfg b/tcl/board/bluefield.cfg
index 3058d48..e96a74e 100644
--- a/tcl/board/bluefield.cfg
+++ b/tcl/board/bluefield.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Board configuration for BlueField SoC.
#
diff --git a/tcl/board/bt-homehubv1.cfg b/tcl/board/bt-homehubv1.cfg
index c50c7d2..bbb6fa4 100644
--- a/tcl/board/bt-homehubv1.cfg
+++ b/tcl/board/bt-homehubv1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# BT HomeHub v1
#
diff --git a/tcl/board/colibri.cfg b/tcl/board/colibri.cfg
index 0f30afd..b44985d 100644
--- a/tcl/board/colibri.cfg
+++ b/tcl/board/colibri.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Toradex Colibri PXA270
source [find target/pxa270.cfg]
reset_config trst_and_srst srst_push_pull
diff --git a/tcl/board/crossbow_tech_imote2.cfg b/tcl/board/crossbow_tech_imote2.cfg
index 277c353..07ce8c7 100644
--- a/tcl/board/crossbow_tech_imote2.cfg
+++ b/tcl/board/crossbow_tech_imote2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Crossbow Technology iMote2
set CHIPNAME imote2
diff --git a/tcl/board/csb337.cfg b/tcl/board/csb337.cfg
index a9d0139..f75abbe 100644
--- a/tcl/board/csb337.cfg
+++ b/tcl/board/csb337.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Cogent CSB337
# http://cogcomp.com/csb_csb337.htm
diff --git a/tcl/board/csb732.cfg b/tcl/board/csb732.cfg
index 35e397f..6df1750 100644
--- a/tcl/board/csb732.cfg
+++ b/tcl/board/csb732.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The Cogent CSB732 board has a single i.MX35 chip
source [find target/imx35.cfg]
diff --git a/tcl/board/da850evm.cfg b/tcl/board/da850evm.cfg
index fbec609..12de3a7 100644
--- a/tcl/board/da850evm.cfg
+++ b/tcl/board/da850evm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#DA850 EVM board
# http://focus.ti.com/dsp/docs/thirdparty/catalog/devtoolsproductfolder.tsp?actionPerformed=productFolder&productId=5939
# http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development-kit
diff --git a/tcl/board/digi_connectcore_wi-9c.cfg b/tcl/board/digi_connectcore_wi-9c.cfg
index 43ad1c9..0ff4742 100644
--- a/tcl/board/digi_connectcore_wi-9c.cfg
+++ b/tcl/board/digi_connectcore_wi-9c.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: DIGI ConnectCore Wi-9C
######################################
diff --git a/tcl/board/digilent_analog_discovery.cfg b/tcl/board/digilent_analog_discovery.cfg
index 64cdacf..1bc239b 100644
--- a/tcl/board/digilent_analog_discovery.cfg
+++ b/tcl/board/digilent_analog_discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Digilent Analog Discovery
#
diff --git a/tcl/board/digilent_atlys.cfg b/tcl/board/digilent_atlys.cfg
index 3eb6219..568253b 100644
--- a/tcl/board/digilent_atlys.cfg
+++ b/tcl/board/digilent_atlys.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# http://digilentinc.com/atlys/
#
# The Digilent Atlys normally requires proprietary tools to program and will
diff --git a/tcl/board/digilent_zedboard.cfg b/tcl/board/digilent_zedboard.cfg
index 08d1a61..010e8c6 100644
--- a/tcl/board/digilent_zedboard.cfg
+++ b/tcl/board/digilent_zedboard.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Digilent Zedboard Rev.C, Rev.D with Xilinx Zynq chip
#
diff --git a/tcl/board/diolan_lpc4350-db1.cfg b/tcl/board/diolan_lpc4350-db1.cfg
index bd48d9b..c55621d 100644
--- a/tcl/board/diolan_lpc4350-db1.cfg
+++ b/tcl/board/diolan_lpc4350-db1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Diolan LPC-4350-DB1 development board
#
diff --git a/tcl/board/diolan_lpc4357-db1.cfg b/tcl/board/diolan_lpc4357-db1.cfg
index d24cfd0..155328a 100644
--- a/tcl/board/diolan_lpc4357-db1.cfg
+++ b/tcl/board/diolan_lpc4357-db1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Diolan LPC-4357-DB1 development board
#
diff --git a/tcl/board/dk-tm4c129.cfg b/tcl/board/dk-tm4c129.cfg
index 2c7de29..27bd432 100644
--- a/tcl/board/dk-tm4c129.cfg
+++ b/tcl/board/dk-tm4c129.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "WARNING: board/dk-tm4c129.cfg is deprecated, please switch to board/ti_dk-tm4c129.cfg"
source [find board/ti_dk-tm4c129.cfg]
diff --git a/tcl/board/dm355evm.cfg b/tcl/board/dm355evm.cfg
index bf5659c..0dbffa8 100644
--- a/tcl/board/dm355evm.cfg
+++ b/tcl/board/dm355evm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# DM355 EVM board
# http://focus.ti.com/docs/toolsw/folders/print/tmdsevm355.html
# http://c6000.spectrumdigital.com/evmdm355/
diff --git a/tcl/board/dm365evm.cfg b/tcl/board/dm365evm.cfg
index 8c7f8c0..15db24c 100644
--- a/tcl/board/dm365evm.cfg
+++ b/tcl/board/dm365evm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# DM365 EVM board -- Beta
# http://focus.ti.com/docs/toolsw/folders/print/tmdxevm365.html
# http://support.spectrumdigital.com/boards/evmdm365
diff --git a/tcl/board/dm6446evm.cfg b/tcl/board/dm6446evm.cfg
index 0d2f6a4..1236b86 100644
--- a/tcl/board/dm6446evm.cfg
+++ b/tcl/board/dm6446evm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# DM6446 EVM board
# http://focus.ti.com/docs/toolsw/folders/print/tmdsevm6446.html
# http://c6000.spectrumdigital.com/davincievm/
diff --git a/tcl/board/dp_busblaster_v3.cfg b/tcl/board/dp_busblaster_v3.cfg
index b94b43a..5599617 100644
--- a/tcl/board/dp_busblaster_v3.cfg
+++ b/tcl/board/dp_busblaster_v3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Dangerous Prototypes - Bus Blaster
#
diff --git a/tcl/board/dptechnics_dpt-board-v1.cfg b/tcl/board/dptechnics_dpt-board-v1.cfg
index 21470b0..3ab2c68 100644
--- a/tcl/board/dptechnics_dpt-board-v1.cfg
+++ b/tcl/board/dptechnics_dpt-board-v1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Product page:
# https://www.dptechnics.com/en/products/dpt-board-v1.html
#
diff --git a/tcl/board/efikamx.cfg b/tcl/board/efikamx.cfg
index 007b312..9083543 100644
--- a/tcl/board/efikamx.cfg
+++ b/tcl/board/efikamx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Genesi USA EfikaMX
# http://www.genesi-usa.com/products/efika
diff --git a/tcl/board/efm32.cfg b/tcl/board/efm32.cfg
index adbdda7..0ffab04 100644
--- a/tcl/board/efm32.cfg
+++ b/tcl/board/efm32.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Configuration for EFM32 boards with on-board SEGGER J-Link
#
# Tested with Tiny, Giant and Zero Gecko Starter Kit.
diff --git a/tcl/board/eir.cfg b/tcl/board/eir.cfg
index 67758b8..d634249 100644
--- a/tcl/board/eir.cfg
+++ b/tcl/board/eir.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Elector Internet Radio board
# http://www.ethernut.de/en/hardware/eir/index.html
diff --git a/tcl/board/ek-lm3s1968.cfg b/tcl/board/ek-lm3s1968.cfg
index bbb04ba..c794a17 100644
--- a/tcl/board/ek-lm3s1968.cfg
+++ b/tcl/board/ek-lm3s1968.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris LM3S1968 Evaluation Kits
#
diff --git a/tcl/board/ek-lm3s3748.cfg b/tcl/board/ek-lm3s3748.cfg
index 36ecfcd..705cb64 100644
--- a/tcl/board/ek-lm3s3748.cfg
+++ b/tcl/board/ek-lm3s3748.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris lm3s3748 Evaluation Kits
#
diff --git a/tcl/board/ek-lm3s6965.cfg b/tcl/board/ek-lm3s6965.cfg
index c769669..ee4e15f 100644
--- a/tcl/board/ek-lm3s6965.cfg
+++ b/tcl/board/ek-lm3s6965.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris LM3S6965 Evaluation Kits
#
diff --git a/tcl/board/ek-lm3s811-revb.cfg b/tcl/board/ek-lm3s811-revb.cfg
index 8729f15..f968eec 100644
--- a/tcl/board/ek-lm3s811-revb.cfg
+++ b/tcl/board/ek-lm3s811-revb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris LM3S811 Evaluation Kits (rev B and earlier)
#
diff --git a/tcl/board/ek-lm3s811.cfg b/tcl/board/ek-lm3s811.cfg
index d7fe243..0cf36c2 100644
--- a/tcl/board/ek-lm3s811.cfg
+++ b/tcl/board/ek-lm3s811.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris LM3S811 Evaluation Kits
#
diff --git a/tcl/board/ek-lm3s8962.cfg b/tcl/board/ek-lm3s8962.cfg
index d02ce44..71a1b10 100644
--- a/tcl/board/ek-lm3s8962.cfg
+++ b/tcl/board/ek-lm3s8962.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris LM3S8962 Evaluation Kits
#
diff --git a/tcl/board/ek-lm3s9b9x.cfg b/tcl/board/ek-lm3s9b9x.cfg
index 6dd7b31..289a2cc 100644
--- a/tcl/board/ek-lm3s9b9x.cfg
+++ b/tcl/board/ek-lm3s9b9x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris LM3S9B9x Evaluation Kits
#
diff --git a/tcl/board/ek-lm3s9d92.cfg b/tcl/board/ek-lm3s9d92.cfg
index a0253d6..08bbbdb 100644
--- a/tcl/board/ek-lm3s9d92.cfg
+++ b/tcl/board/ek-lm3s9d92.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI/Luminary Stellaris LM3S9D92 Evaluation Kits
#
diff --git a/tcl/board/ek-lm4f120xl.cfg b/tcl/board/ek-lm4f120xl.cfg
index b2ebfa8..db8b201 100644
--- a/tcl/board/ek-lm4f120xl.cfg
+++ b/tcl/board/ek-lm4f120xl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Stellaris Launchpad ek-lm4f120xl Evaluation Kits
#
diff --git a/tcl/board/ek-lm4f232.cfg b/tcl/board/ek-lm4f232.cfg
index 2e3fc7c..89b2c3c 100644
--- a/tcl/board/ek-lm4f232.cfg
+++ b/tcl/board/ek-lm4f232.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Stellaris LM4F232 Evaluation Kits
#
diff --git a/tcl/board/ek-tm4c123gxl.cfg b/tcl/board/ek-tm4c123gxl.cfg
index 3e497ba..d569e58 100644
--- a/tcl/board/ek-tm4c123gxl.cfg
+++ b/tcl/board/ek-tm4c123gxl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "WARNING: board/ek-tm4c123gxl.cfg is deprecated, please switch to board/ti_ek-tm4c123gxl.cfg"
source [find board/ti_ek-tm4c123gxl.cfg]
diff --git a/tcl/board/ek-tm4c1294xl.cfg b/tcl/board/ek-tm4c1294xl.cfg
index 6763866..5c11674 100644
--- a/tcl/board/ek-tm4c1294xl.cfg
+++ b/tcl/board/ek-tm4c1294xl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "WARNING: board/ek-tm4c1294xl.cfg is deprecated, please switch to board/ti_ek-tm4c1294xl.cfg"
source [find board/ti_ek-tm4c1294xl.cfg]
diff --git a/tcl/board/embedded-artists_lpc2478-32.cfg b/tcl/board/embedded-artists_lpc2478-32.cfg
index a73d832..ef61060 100644
--- a/tcl/board/embedded-artists_lpc2478-32.cfg
+++ b/tcl/board/embedded-artists_lpc2478-32.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Embedded Artists eval board for LPC2478
# http://www.embeddedartists.com/
diff --git a/tcl/board/emcraft_imx8m-som-bsb.cfg b/tcl/board/emcraft_imx8m-som-bsb.cfg
index 248c0d4..7b9f7b1 100644
--- a/tcl/board/emcraft_imx8m-som-bsb.cfg
+++ b/tcl/board/emcraft_imx8m-som-bsb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# configuration file for Emcraft IMX8M-SOM-BSB
#
diff --git a/tcl/board/emcraft_twr-vf6-som-bsb.cfg b/tcl/board/emcraft_twr-vf6-som-bsb.cfg
index 3818b67..57efa8f 100644
--- a/tcl/board/emcraft_twr-vf6-som-bsb.cfg
+++ b/tcl/board/emcraft_twr-vf6-som-bsb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# EmCraft Systems TWR-VF6-SOM-BSB
#
diff --git a/tcl/board/emcraft_vf6-som.cfg b/tcl/board/emcraft_vf6-som.cfg
index 5586516..0a6f0f8 100644
--- a/tcl/board/emcraft_vf6-som.cfg
+++ b/tcl/board/emcraft_vf6-som.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# EmCraft Systems Vybrid VF6 SOM
#
diff --git a/tcl/board/esp32-bridge.cfg b/tcl/board/esp32-bridge.cfg
new file mode 100644
index 0000000..17146e5
--- /dev/null
+++ b/tcl/board/esp32-bridge.cfg
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32 connected via ESP USB Bridge board
+#
+# For example, OpenOCD can be started for ESP32 debugging on
+#
+# openocd -f board/esp32-bridge.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/esp_usb_bridge.cfg]
+# ESP32 chip id defined in the idf esp_chip_model_t
+espusbjtag chip_id 1
+# Source the ESP32 configuration file
+source [find target/esp32.cfg]
diff --git a/tcl/board/esp32-ethernet-kit-3.3v.cfg b/tcl/board/esp32-ethernet-kit-3.3v.cfg
new file mode 100644
index 0000000..3bfe84b
--- /dev/null
+++ b/tcl/board/esp32-ethernet-kit-3.3v.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32-ETHERNET-KIT board.
+#
+# For example, OpenOCD can be started for ESP32 debugging on
+#
+# openocd -f board/esp32-ethernet-kit-3.3v.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/ftdi/esp32_devkitj_v1.cfg]
+set ESP32_FLASH_VOLTAGE 3.3
+# Source the ESP32 configuration file
+source [find target/esp32.cfg]
+
+# The speed of the JTAG interface, in kHz. If you get DSR/DIR errors (and they
+# do not relate to OpenOCD trying to read from a memory range without physical
+# memory being present there), you can try lowering this.
+#
+# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
+# if CPU frequency is 160MHz or 240MHz.
+adapter speed 20000
diff --git a/tcl/board/esp32-wrover-kit-1.8v.cfg b/tcl/board/esp32-wrover-kit-1.8v.cfg
new file mode 100644
index 0000000..9aa3954
--- /dev/null
+++ b/tcl/board/esp32-wrover-kit-1.8v.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32-WROVER-KIT board.
+#
+# For example, OpenOCD can be started for ESP32 debugging on
+#
+# openocd -f board/esp32-wrover-kit-1.8v.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/ftdi/esp32_devkitj_v1.cfg]
+set ESP32_FLASH_VOLTAGE 1.8
+# Source the ESP32 configuration file
+source [find target/esp32.cfg]
+
+# The speed of the JTAG interface, in kHz. If you get DSR/DIR errors (and they
+# do not relate to OpenOCD trying to read from a memory range without physical
+# memory being present there), you can try lowering this.
+#
+# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
+# if CPU frequency is 160MHz or 240MHz.
+adapter speed 20000
diff --git a/tcl/board/esp32-wrover-kit-3.3v.cfg b/tcl/board/esp32-wrover-kit-3.3v.cfg
new file mode 100644
index 0000000..ce62436
--- /dev/null
+++ b/tcl/board/esp32-wrover-kit-3.3v.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32-WROVER-KIT board.
+#
+# For example, OpenOCD can be started for ESP32 debugging on
+#
+# openocd -f board/esp32-wrover-kit-3.3v.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/ftdi/esp32_devkitj_v1.cfg]
+set ESP32_FLASH_VOLTAGE 3.3
+# Source the ESP32 configuration file
+source [find target/esp32.cfg]
+
+# The speed of the JTAG interface, in kHz. If you get DSR/DIR errors (and they
+# do not relate to OpenOCD trying to read from a memory range without physical
+# memory being present there), you can try lowering this.
+#
+# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
+# if CPU frequency is 160MHz or 240MHz.
+adapter speed 20000
diff --git a/tcl/board/esp32s2-bridge.cfg b/tcl/board/esp32s2-bridge.cfg
new file mode 100644
index 0000000..b87be8b
--- /dev/null
+++ b/tcl/board/esp32s2-bridge.cfg
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32-S2 connected via ESP USB Bridge board
+#
+# For example, OpenOCD can be started for ESP32-S2 debugging on
+#
+# openocd -f board/esp32s2-bridge.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/esp_usb_bridge.cfg]
+# ESP32S2 chip id defined in the idf esp_chip_model_t
+espusbjtag chip_id 2
+# Source the ESP32-S2 configuration file
+source [find target/esp32s2.cfg]
diff --git a/tcl/board/esp32s3-bridge.cfg b/tcl/board/esp32s3-bridge.cfg
new file mode 100644
index 0000000..a42e257
--- /dev/null
+++ b/tcl/board/esp32s3-bridge.cfg
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32-S3 connected via ESP USB Bridge board
+#
+# For example, OpenOCD can be started for ESP32-S3 debugging on
+#
+# openocd -f board/esp32s3-bridge.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/esp_usb_bridge.cfg]
+# ESP32S3 chip id defined in the idf esp_chip_model_t
+espusbjtag chip_id 9
+# Source the ESP32-S3 configuration file
+source [find target/esp32s3.cfg]
diff --git a/tcl/board/esp32s3-ftdi.cfg b/tcl/board/esp32s3-ftdi.cfg
new file mode 100644
index 0000000..6070664
--- /dev/null
+++ b/tcl/board/esp32s3-ftdi.cfg
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32-S3 connected via ESP-Prog.
+#
+# For example, OpenOCD can be started for ESP32-S3 debugging on
+#
+# openocd -f board/esp32s3-ftdi.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/ftdi/esp32_devkitj_v1.cfg]
+# Source the ESP32-S3 configuration file
+source [find target/esp32s3.cfg]
+
+# The speed of the JTAG interface, in kHz. If you get DSR/DIR errors (and they
+# do not relate to OpenOCD trying to read from a memory range without physical
+# memory being present there), you can try lowering this.
+#
+# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
+# if CPU frequency is 160MHz or 240MHz.
+adapter speed 20000
diff --git a/tcl/board/ethernut3.cfg b/tcl/board/ethernut3.cfg
index 72fc5ad..384db1d 100644
--- a/tcl/board/ethernut3.cfg
+++ b/tcl/board/ethernut3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Ethernut 3 board configuration file
#
diff --git a/tcl/board/frdm-kl25z.cfg b/tcl/board/frdm-kl25z.cfg
index 89ee32d..68dc48d 100644
--- a/tcl/board/frdm-kl25z.cfg
+++ b/tcl/board/frdm-kl25z.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an Freescale Freedom eval board with a single MKL25Z128VLK4 chip.
# http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=FRDM-KL25Z
#
diff --git a/tcl/board/frdm-kl46z.cfg b/tcl/board/frdm-kl46z.cfg
index eee4d8e..3fb7205 100644
--- a/tcl/board/frdm-kl46z.cfg
+++ b/tcl/board/frdm-kl46z.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an Freescale Freedom eval board with a single MKL46Z256VLL4 chip.
# http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=FRDM-KL46Z
#
diff --git a/tcl/board/fsl_imx6q_sabresd.cfg b/tcl/board/fsl_imx6q_sabresd.cfg
index cf34cd1..faeeafb 100644
--- a/tcl/board/fsl_imx6q_sabresd.cfg
+++ b/tcl/board/fsl_imx6q_sabresd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Board configuration file for the Freescale IMX6Q Sabre SD EVM
#
diff --git a/tcl/board/glyn_tonga2.cfg b/tcl/board/glyn_tonga2.cfg
index f48702c..d847bec 100644
--- a/tcl/board/glyn_tonga2.cfg
+++ b/tcl/board/glyn_tonga2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Glyn Tonga2 SO-DIMM CPU module (Toshiba TMPA900CMXBG, ARM9)
#
diff --git a/tcl/board/gti/espressobin.cfg b/tcl/board/gti/espressobin.cfg
index 20d0452..d1492df 100644
--- a/tcl/board/gti/espressobin.cfg
+++ b/tcl/board/gti/espressobin.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# config for ESPRESSObin from
# Globalscale Technologies Inc.
diff --git a/tcl/board/gumstix-aerocore.cfg b/tcl/board/gumstix-aerocore.cfg
index 565df4c..ddadc88 100644
--- a/tcl/board/gumstix-aerocore.cfg
+++ b/tcl/board/gumstix-aerocore.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# JTAG for the STM32F4x chip used on the Gumstix AeroCore is available on
# the first interface of a Quad FTDI chip. nTRST is bit 4.
adapter driver ftdi
diff --git a/tcl/board/hammer.cfg b/tcl/board/hammer.cfg
index ea3da81..79d58ae 100644
--- a/tcl/board/hammer.cfg
+++ b/tcl/board/hammer.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target Configuration for the TinCanTools S3C2410 Based Hammer Module
# http://www.tincantools.com
diff --git a/tcl/board/hilscher_nxdb500sys.cfg b/tcl/board/hilscher_nxdb500sys.cfg
index 20fa3ea..68e1cda 100644
--- a/tcl/board/hilscher_nxdb500sys.cfg
+++ b/tcl/board/hilscher_nxdb500sys.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/board/hilscher_nxeb500hmi.cfg b/tcl/board/hilscher_nxeb500hmi.cfg
index a51fa03..a814365 100644
--- a/tcl/board/hilscher_nxeb500hmi.cfg
+++ b/tcl/board/hilscher_nxeb500hmi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/board/hilscher_nxhx10.cfg b/tcl/board/hilscher_nxhx10.cfg
index 6e2eba7..e116a6c 100644
--- a/tcl/board/hilscher_nxhx10.cfg
+++ b/tcl/board/hilscher_nxhx10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/board/hilscher_nxhx50.cfg b/tcl/board/hilscher_nxhx50.cfg
index 0867f2e..8aef6ca 100644
--- a/tcl/board/hilscher_nxhx50.cfg
+++ b/tcl/board/hilscher_nxhx50.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/board/hilscher_nxhx500.cfg b/tcl/board/hilscher_nxhx500.cfg
index 2ba030e..9ddf657 100644
--- a/tcl/board/hilscher_nxhx500.cfg
+++ b/tcl/board/hilscher_nxhx500.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/board/hilscher_nxsb100.cfg b/tcl/board/hilscher_nxsb100.cfg
index c332bee..b59ea17 100644
--- a/tcl/board/hilscher_nxsb100.cfg
+++ b/tcl/board/hilscher_nxsb100.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/board/hitex_lpc1768stick.cfg b/tcl/board/hitex_lpc1768stick.cfg
index ac176ca..52cf370 100644
--- a/tcl/board/hitex_lpc1768stick.cfg
+++ b/tcl/board/hitex_lpc1768stick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hitex LPC1768 Stick
#
# http://www.hitex.com/?id=1602
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 8268306..35007c0 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hitex eval board for LPC2929/LPC2939
# http://www.hitex.com/
diff --git a/tcl/board/hitex_stm32-performancestick.cfg b/tcl/board/hitex_stm32-performancestick.cfg
index 74dc583..bab5964 100644
--- a/tcl/board/hitex_stm32-performancestick.cfg
+++ b/tcl/board/hitex_stm32-performancestick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hitex stm32 performance stick
reset_config trst_and_srst
diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg
index 3b92252..a508046 100644
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hitex STR9-comStick
# http://www.hitex.com/index.php?id=383
# This works for the STR9-comStick revisions STR912CS-A1 and STR912CS-A2.
diff --git a/tcl/board/iar_lpc1768.cfg b/tcl/board/iar_lpc1768.cfg
index 38ffc35..d8d669e 100644
--- a/tcl/board/iar_lpc1768.cfg
+++ b/tcl/board/iar_lpc1768.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Board from IAR KickStart Kit for LPC1768
# See www.iar.com and also
# http://www.olimex.com/dev/lpc-1766stk.html
diff --git a/tcl/board/iar_str912_sk.cfg b/tcl/board/iar_str912_sk.cfg
index 54f517b..d94c0ce 100644
--- a/tcl/board/iar_str912_sk.cfg
+++ b/tcl/board/iar_str912_sk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The IAR str912-sk evaluation kick start board has an str912
source [find target/str912.cfg]
diff --git a/tcl/board/icnova_imx53_sodimm.cfg b/tcl/board/icnova_imx53_sodimm.cfg
index 363d7b4..c4e8bde 100644
--- a/tcl/board/icnova_imx53_sodimm.cfg
+++ b/tcl/board/icnova_imx53_sodimm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#################################################################################################
# Author: Benjamin Tietz <benjamin.tietz@in-circuit.de> ;#
# based on work from: Wjatscheslaw Stoljarski (Slawa) <wjatscheslaw.stoljarski@kiwigrid.com> ;#
diff --git a/tcl/board/icnova_sam9g45_sodimm.cfg b/tcl/board/icnova_sam9g45_sodimm.cfg
index 91e0107..7efa8c2 100644
--- a/tcl/board/icnova_sam9g45_sodimm.cfg
+++ b/tcl/board/icnova_sam9g45_sodimm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#################################################################################################
# #
# Author: Lars Poeschel (larsi@wh2.tu-dresden.de) #
diff --git a/tcl/board/imx27ads.cfg b/tcl/board/imx27ads.cfg
index e705b1e..79d3c51 100644
--- a/tcl/board/imx27ads.cfg
+++ b/tcl/board/imx27ads.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The IMX27 ADS eval board has a single IMX27 chip
# Note: tested on IMX27ADS Board REV-2.6 and REV-2.8
source [find target/imx27.cfg]
diff --git a/tcl/board/imx27lnst.cfg b/tcl/board/imx27lnst.cfg
index ac5a9f3..24f6ed8 100644
--- a/tcl/board/imx27lnst.cfg
+++ b/tcl/board/imx27lnst.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The Linuxstamp-mx27 is board has a single IMX27 chip
# For further info see http://opencircuits.com/Linuxstamp_mx27#OpenOCD
source [find target/imx27.cfg]
diff --git a/tcl/board/imx28evk.cfg b/tcl/board/imx28evk.cfg
index a85c2ca..cc13c51 100644
--- a/tcl/board/imx28evk.cfg
+++ b/tcl/board/imx28evk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The IMX28EVK eval board has a IMX28 chip
# Tested on SCH-26241 Rev D board with Olimex ARM-USB-OCD
# Date: 201-02-01
diff --git a/tcl/board/imx31pdk.cfg b/tcl/board/imx31pdk.cfg
index 6c19654..65fa520 100644
--- a/tcl/board/imx31pdk.cfg
+++ b/tcl/board/imx31pdk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The IMX31PDK eval board has a single IMX31 chip
source [find target/imx31.cfg]
source [find target/imx.cfg]
diff --git a/tcl/board/imx35pdk.cfg b/tcl/board/imx35pdk.cfg
index 2a7efab..41206c6 100644
--- a/tcl/board/imx35pdk.cfg
+++ b/tcl/board/imx35pdk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The IMX35PDK eval board has a single IMX35 chip
source [find target/imx35.cfg]
source [find target/imx.cfg]
diff --git a/tcl/board/imx53-m53evk.cfg b/tcl/board/imx53-m53evk.cfg
index 04f0f9f..6f9210a 100644
--- a/tcl/board/imx53-m53evk.cfg
+++ b/tcl/board/imx53-m53evk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#######################################
# DENX M53EVK #
# http://www.denx-cs.de/?q=M53EVK #
diff --git a/tcl/board/imx53loco.cfg b/tcl/board/imx53loco.cfg
index c4d45f0..fcc2f4d 100644
--- a/tcl/board/imx53loco.cfg
+++ b/tcl/board/imx53loco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
##################################################################################
# Author: Wjatscheslaw Stoljarski (Slawa) <wjatscheslaw.stoljarski@kiwigrid.com> #
# Kiwigrid GmbH #
diff --git a/tcl/board/imx8mp-evk.cfg b/tcl/board/imx8mp-evk.cfg
index 97a303a..898f3b7 100644
--- a/tcl/board/imx8mp-evk.cfg
+++ b/tcl/board/imx8mp-evk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# configuration file for NXP MC-IMX8MP-EVK
#
diff --git a/tcl/board/insignal_arndale.cfg b/tcl/board/insignal_arndale.cfg
index 09a7223..c7c28b3 100644
--- a/tcl/board/insignal_arndale.cfg
+++ b/tcl/board/insignal_arndale.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# InSignal Arndale board
#
diff --git a/tcl/board/kasli.cfg b/tcl/board/kasli.cfg
index 7cfdcf2..d85e1ca 100644
--- a/tcl/board/kasli.cfg
+++ b/tcl/board/kasli.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter driver ftdi
ftdi device_desc "Quad RS232-HS"
ftdi vid_pid 0x0403 0x6011
diff --git a/tcl/board/kc100.cfg b/tcl/board/kc100.cfg
index 1d383be..2fd6965 100644
--- a/tcl/board/kc100.cfg
+++ b/tcl/board/kc100.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Knovative KC-100 cable modem
# TNETC4401PYP, 208-QFP U3
diff --git a/tcl/board/kc705.cfg b/tcl/board/kc705.cfg
index 51ea14d..fad9fff 100644
--- a/tcl/board/kc705.cfg
+++ b/tcl/board/kc705.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# http://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html
source [find interface/ftdi/digilent-hs1.cfg]
diff --git a/tcl/board/kcu105.cfg b/tcl/board/kcu105.cfg
index e2b68ca..1510a06 100644
--- a/tcl/board/kcu105.cfg
+++ b/tcl/board/kcu105.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# xilinx ultrascale
# http://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf
diff --git a/tcl/board/keil_mcb1700.cfg b/tcl/board/keil_mcb1700.cfg
index 05f12df..6efbd63 100644
--- a/tcl/board/keil_mcb1700.cfg
+++ b/tcl/board/keil_mcb1700.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Keil MCB1700 eval board
#
diff --git a/tcl/board/keil_mcb2140.cfg b/tcl/board/keil_mcb2140.cfg
index bb41a2a..bb1d10b 100644
--- a/tcl/board/keil_mcb2140.cfg
+++ b/tcl/board/keil_mcb2140.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Keil MCB2140 eval board
#
diff --git a/tcl/board/kindle2.cfg b/tcl/board/kindle2.cfg
index 71dca74..8c032cb 100644
--- a/tcl/board/kindle2.cfg
+++ b/tcl/board/kindle2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Board configuration file for Amazon Kindle Model No. D00701 and D00801
# AKA Kindle 2nd generation and Kindle DX
# using a Freescale MCIMX31LDVKN5D i.MX31 processor
diff --git a/tcl/board/kwikstik.cfg b/tcl/board/kwikstik.cfg
index f936d6e..ade0c91 100644
--- a/tcl/board/kwikstik.cfg
+++ b/tcl/board/kwikstik.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale KwikStik development board
#
diff --git a/tcl/board/la_fonera-fon2200.cfg b/tcl/board/la_fonera-fon2200.cfg
index f46b042..b0b2966 100644
--- a/tcl/board/la_fonera-fon2200.cfg
+++ b/tcl/board/la_fonera-fon2200.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/atheros_ar2315.cfg]
reset_config trst_and_srst
diff --git a/tcl/board/lemaker_hikey.cfg b/tcl/board/lemaker_hikey.cfg
index 325b6fd..fc04435 100644
--- a/tcl/board/lemaker_hikey.cfg
+++ b/tcl/board/lemaker_hikey.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# board configuration for LeMaker Hikey
#
diff --git a/tcl/board/linksys-wag200g.cfg b/tcl/board/linksys-wag200g.cfg
index aa4887f..26900a7 100644
--- a/tcl/board/linksys-wag200g.cfg
+++ b/tcl/board/linksys-wag200g.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Linksys WAG200G Router
#
diff --git a/tcl/board/linksys-wrt54gl.cfg b/tcl/board/linksys-wrt54gl.cfg
index ffe53ff..58dfec3 100644
--- a/tcl/board/linksys-wrt54gl.cfg
+++ b/tcl/board/linksys-wrt54gl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Linksys WRT54GL v1.1
#
diff --git a/tcl/board/linksys_nslu2.cfg b/tcl/board/linksys_nslu2.cfg
index 0b0f58b..536f97e 100644
--- a/tcl/board/linksys_nslu2.cfg
+++ b/tcl/board/linksys_nslu2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is for the LinkSys (CISCO) NSLU2 board
# It is an Intel XSCALE IXP420 CPU.
diff --git a/tcl/board/lisa-l.cfg b/tcl/board/lisa-l.cfg
index 73f51a2..1607fb8 100644
--- a/tcl/board/lisa-l.cfg
+++ b/tcl/board/lisa-l.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# the Lost Illusions Serendipitous Autopilot
# http://paparazzi.enac.fr/wiki/Lisa
diff --git a/tcl/board/logicpd_imx27.cfg b/tcl/board/logicpd_imx27.cfg
index da0b462..8365d4f 100644
--- a/tcl/board/logicpd_imx27.cfg
+++ b/tcl/board/logicpd_imx27.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The LogicPD Eval IMX27 eval board has a single IMX27 chip
source [find target/imx27.cfg]
diff --git a/tcl/board/lpc1850_spifi_generic.cfg b/tcl/board/lpc1850_spifi_generic.cfg
index bff4af6..167b624 100644
--- a/tcl/board/lpc1850_spifi_generic.cfg
+++ b/tcl/board/lpc1850_spifi_generic.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Generic LPC1850 board w/ SPIFI flash.
# This config file is intended as an example of how to
diff --git a/tcl/board/lpc4350_spifi_generic.cfg b/tcl/board/lpc4350_spifi_generic.cfg
index b363f1e..8a017ec 100644
--- a/tcl/board/lpc4350_spifi_generic.cfg
+++ b/tcl/board/lpc4350_spifi_generic.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Generic LPC4350 board w/ SPIFI flash.
# This config file is intended as an example of how to
diff --git a/tcl/board/lubbock.cfg b/tcl/board/lubbock.cfg
index d803e6f..e4de385 100644
--- a/tcl/board/lubbock.cfg
+++ b/tcl/board/lubbock.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Intel "Lubbock" Development Board with PXA255 (dbpxa255)
# Obsolete; this was Intel's original PXA255 development system
# Board also had CPU cards for SA1100, PXA210, PXA250, and more.
diff --git a/tcl/board/marsohod.cfg b/tcl/board/marsohod.cfg
index b1393a9..2be8391 100644
--- a/tcl/board/marsohod.cfg
+++ b/tcl/board/marsohod.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Marsohod CPLD Development and Education board
#
diff --git a/tcl/board/marsohod2.cfg b/tcl/board/marsohod2.cfg
index 31819a2..9575100 100644
--- a/tcl/board/marsohod2.cfg
+++ b/tcl/board/marsohod2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Marsohod2 FPGA Development and Education board
#
diff --git a/tcl/board/marsohod3.cfg b/tcl/board/marsohod3.cfg
index fa00706..b4f2d30 100644
--- a/tcl/board/marsohod3.cfg
+++ b/tcl/board/marsohod3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Marsohod3 FPGA Development and Education board
#
diff --git a/tcl/board/mbed-lpc11u24.cfg b/tcl/board/mbed-lpc11u24.cfg
index b1ec2a5..9f5be88 100644
--- a/tcl/board/mbed-lpc11u24.cfg
+++ b/tcl/board/mbed-lpc11u24.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an mbed eval board with a single NXP LPC11U24 chip.
# http://mbed.org/handbook/mbed-NXP-LPC11U24
#
diff --git a/tcl/board/mbed-lpc1768.cfg b/tcl/board/mbed-lpc1768.cfg
index 67f8340..62b0911 100644
--- a/tcl/board/mbed-lpc1768.cfg
+++ b/tcl/board/mbed-lpc1768.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an mbed eval board with a single NXP LPC1768 chip.
# http://mbed.org/handbook/mbed-NXP-LPC1768
#
diff --git a/tcl/board/mcb1700.cfg b/tcl/board/mcb1700.cfg
index a5e1902..8ab6e88 100644
--- a/tcl/board/mcb1700.cfg
+++ b/tcl/board/mcb1700.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Keil MCB1700 PCB with 1768
#
# Reset init script sets it to 100MHz
diff --git a/tcl/board/microchip_explorer16.cfg b/tcl/board/microchip_explorer16.cfg
index 7c036c6..6b528d6 100644
--- a/tcl/board/microchip_explorer16.cfg
+++ b/tcl/board/microchip_explorer16.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Microchip Explorer 16 with PIC32MX360F512L PIM module.
# http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en024858
diff --git a/tcl/board/microchip_same54_xplained_pro.cfg b/tcl/board/microchip_same54_xplained_pro.cfg
index 7482de4..3588165 100644
--- a/tcl/board/microchip_same54_xplained_pro.cfg
+++ b/tcl/board/microchip_same54_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Microchip (former Atmel) SAM E54 Xplained Pro evaluation kit.
# http://www.microchip.com/developmenttools/productdetails.aspx?partno=atsame54-xpro
diff --git a/tcl/board/microchip_saml11_xplained_pro.cfg b/tcl/board/microchip_saml11_xplained_pro.cfg
index 2ab6111..c2fcd65 100644
--- a/tcl/board/microchip_saml11_xplained_pro.cfg
+++ b/tcl/board/microchip_saml11_xplained_pro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Microchip (formerly Atmel) SAM L11 Xplained Pro Evaluation Kit.
# https://www.microchip.com/DevelopmentTools/ProductDetails/dm320205
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index 3d01b38..85d9a35 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#-------------------------------------------------------------------------
# Mini2440 Samsung s3c2440A Processor with 64MB DRAM, 64MB NAND, 2 MB N0R
# NOTE: Configured for NAND boot (switch S2 in NANDBOOT)
@@ -121,7 +123,6 @@ reset_config trst_and_srst
#-------------------------------------------------------------------------
adapter speed 12000
- jtag interface
#-------------------------------------------------------------------------
# GDB Setup
diff --git a/tcl/board/mini6410.cfg b/tcl/board/mini6410.cfg
index 2cee939..18f9e8d 100644
--- a/tcl/board/mini6410.cfg
+++ b/tcl/board/mini6410.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Samsung s3c6410 system on chip
# Tested on a tiny6410
# Processor : ARM1176
diff --git a/tcl/board/minispartan6.cfg b/tcl/board/minispartan6.cfg
index 3de9e99..011cc54 100644
--- a/tcl/board/minispartan6.cfg
+++ b/tcl/board/minispartan6.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# https://www.scarabhardware.com/minispartan6/
source [find interface/ftdi/minispartan6.cfg]
diff --git a/tcl/board/nds32_xc5.cfg b/tcl/board/nds32_xc5.cfg
index 7d86996..82a117e 100644
--- a/tcl/board/nds32_xc5.cfg
+++ b/tcl/board/nds32_xc5.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CPUTAPID 0x1000063d
set _CHIPNAME nds32
source [find target/nds32v3.cfg]
diff --git a/tcl/board/netgear-dg834v3.cfg b/tcl/board/netgear-dg834v3.cfg
index 48d23da..a993888 100644
--- a/tcl/board/netgear-dg834v3.cfg
+++ b/tcl/board/netgear-dg834v3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Netgear DG834v3 Router
# Internal 4Kb RAM (@0x80000000)
diff --git a/tcl/board/netgear-wg102.cfg b/tcl/board/netgear-wg102.cfg
index 232d2e4..15f9c11 100644
--- a/tcl/board/netgear-wg102.cfg
+++ b/tcl/board/netgear-wg102.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/atheros_ar2313.cfg]
reset_config trst_and_srst
diff --git a/tcl/board/nordic_nrf51822_mkit.cfg b/tcl/board/nordic_nrf51822_mkit.cfg
index aa6161f..266d710 100644
--- a/tcl/board/nordic_nrf51822_mkit.cfg
+++ b/tcl/board/nordic_nrf51822_mkit.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nordic Semiconductor PCA10024 board (aka nRF51822-mKIT)
#
diff --git a/tcl/board/nordic_nrf51_dk.cfg b/tcl/board/nordic_nrf51_dk.cfg
index 96f5471..7ddae2d 100644
--- a/tcl/board/nordic_nrf51_dk.cfg
+++ b/tcl/board/nordic_nrf51_dk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nordic Semiconductor NRF51 Development Kit (nRF6824)
#
diff --git a/tcl/board/nordic_nrf52_dk.cfg b/tcl/board/nordic_nrf52_dk.cfg
index 9f52866..7366bf9 100644
--- a/tcl/board/nordic_nrf52_dk.cfg
+++ b/tcl/board/nordic_nrf52_dk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nordic Semiconductor NRF52 Development Kit (nRF52832)
#
diff --git a/tcl/board/nordic_nrf52_ftx232.cfg b/tcl/board/nordic_nrf52_ftx232.cfg
index 938efed..c3c69a8 100644
--- a/tcl/board/nordic_nrf52_ftx232.cfg
+++ b/tcl/board/nordic_nrf52_ftx232.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# nordic module NRF52 (nRF52832/52840) attached to an adafruit ft232h module
# or any FT232H/FT2232H/FT4232H based board/module
diff --git a/tcl/board/novena-internal-fpga.cfg b/tcl/board/novena-internal-fpga.cfg
index 7805862..c36938c 100644
--- a/tcl/board/novena-internal-fpga.cfg
+++ b/tcl/board/novena-internal-fpga.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Novena open hardware and F/OSS-friendly computing platform
#
diff --git a/tcl/board/numato_mimas_a7.cfg b/tcl/board/numato_mimas_a7.cfg
index 12df891..82d6a56 100644
--- a/tcl/board/numato_mimas_a7.cfg
+++ b/tcl/board/numato_mimas_a7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Numato Mimas A7 - Artix 7 FPGA Board
#
diff --git a/tcl/board/numato_opsis.cfg b/tcl/board/numato_opsis.cfg
index e54a4ec..ea07ff3 100644
--- a/tcl/board/numato_opsis.cfg
+++ b/tcl/board/numato_opsis.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# http://opsis.hdmi2usb.tv
#
# The Numato Opsis is an FPGA based, open video platform.
diff --git a/tcl/board/nxp_frdm-ls1012a.cfg b/tcl/board/nxp_frdm-ls1012a.cfg
index 3973b3c..17a50c9 100644
--- a/tcl/board/nxp_frdm-ls1012a.cfg
+++ b/tcl/board/nxp_frdm-ls1012a.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP FRDM-LS1012A (Freedom)
#
diff --git a/tcl/board/nxp_imx7sabre.cfg b/tcl/board/nxp_imx7sabre.cfg
index 789fc5b..9b0c743 100644
--- a/tcl/board/nxp_imx7sabre.cfg
+++ b/tcl/board/nxp_imx7sabre.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP IMX7SABRE board
# use on-board JTAG header
transport select jtag
diff --git a/tcl/board/nxp_lpc-link2.cfg b/tcl/board/nxp_lpc-link2.cfg
index 593fa59..52f13fa 100644
--- a/tcl/board/nxp_lpc-link2.cfg
+++ b/tcl/board/nxp_lpc-link2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP LPC-Link2
#
diff --git a/tcl/board/nxp_mcimx8m-evk.cfg b/tcl/board/nxp_mcimx8m-evk.cfg
index dd9bd53..bcd0f67 100644
--- a/tcl/board/nxp_mcimx8m-evk.cfg
+++ b/tcl/board/nxp_mcimx8m-evk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# configuration file for NXP MC-IMX8M-EVK
#
diff --git a/tcl/board/olimex_LPC2378STK.cfg b/tcl/board/olimex_LPC2378STK.cfg
index 7e9e58e..23588ae 100644
--- a/tcl/board/olimex_LPC2378STK.cfg
+++ b/tcl/board/olimex_LPC2378STK.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#####################################################
# Olimex LPC2378STK eval board
#
diff --git a/tcl/board/olimex_lpc_h2148.cfg b/tcl/board/olimex_lpc_h2148.cfg
index d8fb5be..96ae405 100644
--- a/tcl/board/olimex_lpc_h2148.cfg
+++ b/tcl/board/olimex_lpc_h2148.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex LPC-H2148 eval board
#
diff --git a/tcl/board/olimex_sam7_ex256.cfg b/tcl/board/olimex_sam7_ex256.cfg
index 08ed4c1..9924f27 100644
--- a/tcl/board/olimex_sam7_ex256.cfg
+++ b/tcl/board/olimex_sam7_ex256.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Olimex SAM7-EX256 has a single Atmel at91sam7ex256 on it.
source [find target/at91sam7x256.cfg]
diff --git a/tcl/board/olimex_sam7_la2.cfg b/tcl/board/olimex_sam7_la2.cfg
index 038fe67..d91432b 100644
--- a/tcl/board/olimex_sam7_la2.cfg
+++ b/tcl/board/olimex_sam7_la2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/at91sam7a2.cfg]
# delays needed to get stable reads of cpu state
diff --git a/tcl/board/olimex_sam9_l9260.cfg b/tcl/board/olimex_sam9_l9260.cfg
index 72dce87..7491a0e 100644
--- a/tcl/board/olimex_sam9_l9260.cfg
+++ b/tcl/board/olimex_sam9_l9260.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Olimex SAM9-L9260 Development Board
#
diff --git a/tcl/board/olimex_stm32_h103.cfg b/tcl/board/olimex_stm32_h103.cfg
index ec03034..92ca7ae 100644
--- a/tcl/board/olimex_stm32_h103.cfg
+++ b/tcl/board/olimex_stm32_h103.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Olimex STM32-H103 eval board
# http://olimex.com/dev/stm32-h103.html
diff --git a/tcl/board/olimex_stm32_h107.cfg b/tcl/board/olimex_stm32_h107.cfg
index e54fb4e..c199cdc 100644
--- a/tcl/board/olimex_stm32_h107.cfg
+++ b/tcl/board/olimex_stm32_h107.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex STM32-H107
#
diff --git a/tcl/board/olimex_stm32_p107.cfg b/tcl/board/olimex_stm32_p107.cfg
index 98c72a6..9511030 100644
--- a/tcl/board/olimex_stm32_p107.cfg
+++ b/tcl/board/olimex_stm32_p107.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex STM32-P107
#
diff --git a/tcl/board/omap2420_h4.cfg b/tcl/board/omap2420_h4.cfg
index d789e25..ec16965 100644
--- a/tcl/board/omap2420_h4.cfg
+++ b/tcl/board/omap2420_h4.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# OMAP2420 SDP board ("H4")
source [find target/omap2420.cfg]
diff --git a/tcl/board/openrd.cfg b/tcl/board/openrd.cfg
index fda01d1..f6c8317 100644
--- a/tcl/board/openrd.cfg
+++ b/tcl/board/openrd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell OpenRD
source [find interface/ftdi/openrd.cfg]
diff --git a/tcl/board/or1k_generic.cfg b/tcl/board/or1k_generic.cfg
index 7c19565..915a0de 100644
--- a/tcl/board/or1k_generic.cfg
+++ b/tcl/board/or1k_generic.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# If you want to use the VJTAG TAP or the XILINX BSCAN,
# you must set your FPGA TAP ID here
diff --git a/tcl/board/osk5912.cfg b/tcl/board/osk5912.cfg
index f4378f8..0759a27 100644
--- a/tcl/board/osk5912.cfg
+++ b/tcl/board/osk5912.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# http://omap.spectrumdigital.com/osk5912/
source [find target/omap5912.cfg]
diff --git a/tcl/board/phone_se_j100i.cfg b/tcl/board/phone_se_j100i.cfg
index ec61425..70387ee 100644
--- a/tcl/board/phone_se_j100i.cfg
+++ b/tcl/board/phone_se_j100i.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Sony Ericsson J100I Phone
#
diff --git a/tcl/board/phytec_lpc3250.cfg b/tcl/board/phytec_lpc3250.cfg
index cee28cd..036b16f 100644
--- a/tcl/board/phytec_lpc3250.cfg
+++ b/tcl/board/phytec_lpc3250.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/lpc3250.cfg]
adapter srst delay 200
diff --git a/tcl/board/pic-p32mx.cfg b/tcl/board/pic-p32mx.cfg
index 661e3d6..0703220 100644
--- a/tcl/board/pic-p32mx.cfg
+++ b/tcl/board/pic-p32mx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The Olimex PIC-P32MX has a PIC32MX
set CPUTAPID 0x40916053
diff --git a/tcl/board/pipistrello.cfg b/tcl/board/pipistrello.cfg
index 87193b4..17584a0 100644
--- a/tcl/board/pipistrello.cfg
+++ b/tcl/board/pipistrello.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# http://pipistrello.saanlima.com/
source [find interface/ftdi/pipistrello.cfg]
diff --git a/tcl/board/propox_mmnet1001.cfg b/tcl/board/propox_mmnet1001.cfg
index 39ae5cb..0e12604 100644
--- a/tcl/board/propox_mmnet1001.cfg
+++ b/tcl/board/propox_mmnet1001.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
## Chip:
set CHIPNAME at91sam9260
diff --git a/tcl/board/pxa255_sst.cfg b/tcl/board/pxa255_sst.cfg
index 2b44a05..8d00dfe 100644
--- a/tcl/board/pxa255_sst.cfg
+++ b/tcl/board/pxa255_sst.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# A PXA255 test board with SST 39LF400A flash
#
# At reset the memory map is as follows. Note that
diff --git a/tcl/board/quark_d2000_refboard.cfg b/tcl/board/quark_d2000_refboard.cfg
index a89895d..3af5735 100644
--- a/tcl/board/quark_d2000_refboard.cfg
+++ b/tcl/board/quark_d2000_refboard.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Intel Quark microcontroller D2000 Reference Board (web search for doc num 333582)
# the board has an onboard FTDI FT232H chip
diff --git a/tcl/board/quark_x10xx_board.cfg b/tcl/board/quark_x10xx_board.cfg
index 4ecf30e..aa6adaf 100644
--- a/tcl/board/quark_x10xx_board.cfg
+++ b/tcl/board/quark_x10xx_board.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# There are many Quark boards that can host the quark_x10xx SoC
# Galileo is an example board
diff --git a/tcl/board/redbee.cfg b/tcl/board/redbee.cfg
index 046e7a4..714dfdc 100644
--- a/tcl/board/redbee.cfg
+++ b/tcl/board/redbee.cfg
@@ -1 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/mc13224v.cfg]
diff --git a/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg b/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg
index c9f8d36..2d98cc5 100644
--- a/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg
+++ b/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Achilles Instant-Development Kit Arria 10 SoC SoM
# https://www.reflexces.com/products-solutions/achilles-instant-development-kit-arria-10-soc-som
#
diff --git a/tcl/board/renesas_dk-s7g2.cfg b/tcl/board/renesas_dk-s7g2.cfg
index 3f29ec3..e310112 100644
--- a/tcl/board/renesas_dk-s7g2.cfg
+++ b/tcl/board/renesas_dk-s7g2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Renesas Synergy DK-S7G2
#
diff --git a/tcl/board/renesas_gr_peach.cfg b/tcl/board/renesas_gr_peach.cfg
index ee6efe0..b3823ca 100644
--- a/tcl/board/renesas_gr_peach.cfg
+++ b/tcl/board/renesas_gr_peach.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas RZ/A1H GR-Peach board
reset_config srst_only
diff --git a/tcl/board/renesas_porter.cfg b/tcl/board/renesas_porter.cfg
index 7f23fb6..134e9ba 100644
--- a/tcl/board/renesas_porter.cfg
+++ b/tcl/board/renesas_porter.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car M2 Evaluation Board
set SOC M2
diff --git a/tcl/board/renesas_salvator-xs.cfg b/tcl/board/renesas_salvator-xs.cfg
index 6d3096e..1323c13 100644
--- a/tcl/board/renesas_salvator-xs.cfg
+++ b/tcl/board/renesas_salvator-xs.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car Gen3 Salvator-X(S) Board Config
# The Salvator-X(S) boards come with either an H3, M3W, or M3N SOC.
diff --git a/tcl/board/renesas_silk.cfg b/tcl/board/renesas_silk.cfg
index 08bcb66..dd61e1d 100644
--- a/tcl/board/renesas_silk.cfg
+++ b/tcl/board/renesas_silk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car E2 Evaluation Board
set SOC E2
diff --git a/tcl/board/renesas_stout.cfg b/tcl/board/renesas_stout.cfg
index 51b53e1..69a524b 100644
--- a/tcl/board/renesas_stout.cfg
+++ b/tcl/board/renesas_stout.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car H2 Evaluation Board
set SOC H2
diff --git a/tcl/board/rigado_bmd300_ek.cfg b/tcl/board/rigado_bmd300_ek.cfg
index 8e1e65e..601041d 100644
--- a/tcl/board/rigado_bmd300_ek.cfg
+++ b/tcl/board/rigado_bmd300_ek.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Rigado BMD-300 Evaluation Kit
#
diff --git a/tcl/board/rsc-w910.cfg b/tcl/board/rsc-w910.cfg
index 574de0c..b07f940 100644
--- a/tcl/board/rsc-w910.cfg
+++ b/tcl/board/rsc-w910.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Avalue RSC-W8910 sbc
# http://www.avalue.com.tw/products/RSC-W910.cfm
# 2MB NOR Flash
diff --git a/tcl/board/sayma_amc.cfg b/tcl/board/sayma_amc.cfg
index 0bd76ba..b714609 100644
--- a/tcl/board/sayma_amc.cfg
+++ b/tcl/board/sayma_amc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Sayma AMC is an FPGA board for the µTCA AMC format
# The board is open hardware (CERN OHL) and the gateware and software
# running on it are open source (ARTIQ, LGPLv3+).
diff --git a/tcl/board/sheevaplug.cfg b/tcl/board/sheevaplug.cfg
index 4551637..734fab6 100644
--- a/tcl/board/sheevaplug.cfg
+++ b/tcl/board/sheevaplug.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell SheevaPlug
source [find interface/ftdi/sheevaplug.cfg]
diff --git a/tcl/board/sifive-e31arty.cfg b/tcl/board/sifive-e31arty.cfg
index 8e701f1..b3e980f 100644
--- a/tcl/board/sifive-e31arty.cfg
+++ b/tcl/board/sifive-e31arty.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Be sure you include the speed and interface before this file
# Example:
diff --git a/tcl/board/sifive-e51arty.cfg b/tcl/board/sifive-e51arty.cfg
index a543987..3133c39 100644
--- a/tcl/board/sifive-e51arty.cfg
+++ b/tcl/board/sifive-e51arty.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Be sure you include the speed and interface before this file
# Example:
diff --git a/tcl/board/sifive-hifive1-revb.cfg b/tcl/board/sifive-hifive1-revb.cfg
index 7f2a212..7fcab0c 100644
--- a/tcl/board/sifive-hifive1-revb.cfg
+++ b/tcl/board/sifive-hifive1-revb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter speed 4000
adapter driver jlink
diff --git a/tcl/board/sifive-hifive1.cfg b/tcl/board/sifive-hifive1.cfg
index c47485b..f69dc4f 100644
--- a/tcl/board/sifive-hifive1.cfg
+++ b/tcl/board/sifive-hifive1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter speed 10000
adapter driver ftdi
diff --git a/tcl/board/smdk6410.cfg b/tcl/board/smdk6410.cfg
index dd8bf87..be61ae9 100644
--- a/tcl/board/smdk6410.cfg
+++ b/tcl/board/smdk6410.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Samsung s3c6410 system on chip
# Tested on a SMDK6410
# Processor : ARM1176
diff --git a/tcl/board/snps_em_sk.cfg b/tcl/board/snps_em_sk.cfg
index 3d93407..56eed93 100644
--- a/tcl/board/snps_em_sk.cfg
+++ b/tcl/board/snps_em_sk.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2014-2016,2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Synopsys DesignWare ARC EM Starter Kit v2.x
diff --git a/tcl/board/snps_em_sk_v1.cfg b/tcl/board/snps_em_sk_v1.cfg
index 0c1539e..94aab14 100644
--- a/tcl/board/snps_em_sk_v1.cfg
+++ b/tcl/board/snps_em_sk_v1.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2014-2016,2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Synopsys DesignWare ARC EM Starter Kit v1.0 and v1.1
diff --git a/tcl/board/snps_em_sk_v2.1.cfg b/tcl/board/snps_em_sk_v2.1.cfg
index c1fb232..96391df 100644
--- a/tcl/board/snps_em_sk_v2.1.cfg
+++ b/tcl/board/snps_em_sk_v2.1.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2014-2016,2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Synopsys DesignWare ARC EM Starter Kit v2.1
diff --git a/tcl/board/snps_em_sk_v2.2.cfg b/tcl/board/snps_em_sk_v2.2.cfg
index 674d9f6..c1f6a72 100644
--- a/tcl/board/snps_em_sk_v2.2.cfg
+++ b/tcl/board/snps_em_sk_v2.2.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2016,2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Synopsys DesignWare ARC EM Starter Kit v2.2
diff --git a/tcl/board/snps_hsdk.cfg b/tcl/board/snps_hsdk.cfg
index a6228f4..24022e5 100644
--- a/tcl/board/snps_hsdk.cfg
+++ b/tcl/board/snps_hsdk.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2019, 2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Synopsys DesignWare ARC HSDK Software Development Platform (HS38 cores)
diff --git a/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg b/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg
index 2855c5d..c22ace8 100644
--- a/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg
+++ b/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion SK-FM4-176L-S6E2CC
#
diff --git a/tcl/board/spansion_sk-fm4-u120-9b560.cfg b/tcl/board/spansion_sk-fm4-u120-9b560.cfg
index 38ad4a8..15477a2 100644
--- a/tcl/board/spansion_sk-fm4-u120-9b560.cfg
+++ b/tcl/board/spansion_sk-fm4-u120-9b560.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion SK-FM4-U120-9B560
#
diff --git a/tcl/board/spear300evb.cfg b/tcl/board/spear300evb.cfg
index 9f95703..f2cf596 100644
--- a/tcl/board/spear300evb.cfg
+++ b/tcl/board/spear300evb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Configuration for the ST SPEAr300 Evaluation board
# EVALSPEAr300 Rev. 1.0
# http://www.st.com/spear
diff --git a/tcl/board/spear300evb_mod.cfg b/tcl/board/spear300evb_mod.cfg
index 91cad5f..4b1d578 100644
--- a/tcl/board/spear300evb_mod.cfg
+++ b/tcl/board/spear300evb_mod.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Configuration for the ST SPEAr300 Evaluation board
# EVALSPEAr300 Rev. 1.0, modified to enable SRST on JTAG connector
# http://www.st.com/spear
diff --git a/tcl/board/spear310evb20.cfg b/tcl/board/spear310evb20.cfg
index c45873c..c37bd1d 100644
--- a/tcl/board/spear310evb20.cfg
+++ b/tcl/board/spear310evb20.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Configuration for the ST SPEAr310 Evaluation board
# EVALSPEAr310 Rev. 2.0
# http://www.st.com/spear
diff --git a/tcl/board/spear310evb20_mod.cfg b/tcl/board/spear310evb20_mod.cfg
index a7bac55..2c56254 100644
--- a/tcl/board/spear310evb20_mod.cfg
+++ b/tcl/board/spear310evb20_mod.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Configuration for the ST SPEAr310 Evaluation board
# EVALSPEAr310 Rev. 2.0, modified to enable SRST on JTAG connector
# http://www.st.com/spear
diff --git a/tcl/board/spear320cpu.cfg b/tcl/board/spear320cpu.cfg
index e21db34..df713ea 100644
--- a/tcl/board/spear320cpu.cfg
+++ b/tcl/board/spear320cpu.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Configuration for the ST SPEAr320 CPU board
# EVAL_SPEAr320CPU Rev. 2.0
# http://www.st.com/spear
diff --git a/tcl/board/spear320cpu_mod.cfg b/tcl/board/spear320cpu_mod.cfg
index 1d62e3b..d12607d 100644
--- a/tcl/board/spear320cpu_mod.cfg
+++ b/tcl/board/spear320cpu_mod.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Configuration for the ST SPEAr320 Evaluation board
# EVAL_SPEAr320CPU Rev. 2.0, modified to enable SRST on JTAG connector
# http://www.st.com/spear
diff --git a/tcl/board/st_nucleo_8l152r8.cfg b/tcl/board/st_nucleo_8l152r8.cfg
index d337269..f06d749 100644
--- a/tcl/board/st_nucleo_8l152r8.cfg
+++ b/tcl/board/st_nucleo_8l152r8.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a ST NUCLEO 8L152R8 board with a single STM8L152R8T6 chip.
# http://www.st.com/en/evaluation-tools/nucleo-8l152r8.html
diff --git a/tcl/board/st_nucleo_f0.cfg b/tcl/board/st_nucleo_f0.cfg
index e6a03bb..31a95f5 100644
--- a/tcl/board/st_nucleo_f0.cfg
+++ b/tcl/board/st_nucleo_f0.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is for all ST NUCLEO with any STM32F0. Known boards at the moment:
# STM32F030R8
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF259997
diff --git a/tcl/board/st_nucleo_f103rb.cfg b/tcl/board/st_nucleo_f103rb.cfg
index e1990dc..9815d45 100644
--- a/tcl/board/st_nucleo_f103rb.cfg
+++ b/tcl/board/st_nucleo_f103rb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an ST NUCLEO F103RB board with a single STM32F103RBT6 chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF259875
diff --git a/tcl/board/st_nucleo_f3.cfg b/tcl/board/st_nucleo_f3.cfg
index fec612b..8833724 100644
--- a/tcl/board/st_nucleo_f3.cfg
+++ b/tcl/board/st_nucleo_f3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an ST NUCLEO F334R8 board with a single STM32F334R8T6 chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF260004
diff --git a/tcl/board/st_nucleo_f4.cfg b/tcl/board/st_nucleo_f4.cfg
index 11f6f87..a1908e4 100644
--- a/tcl/board/st_nucleo_f4.cfg
+++ b/tcl/board/st_nucleo_f4.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is for all ST NUCLEO with any STM32F4. Known boards at the moment:
# STM32F401RET6
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF260000
diff --git a/tcl/board/st_nucleo_f7.cfg b/tcl/board/st_nucleo_f7.cfg
index f94679b..9c5b36e 100644
--- a/tcl/board/st_nucleo_f7.cfg
+++ b/tcl/board/st_nucleo_f7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STMicroelectronics STM32F7 Nucleo development board
# Known boards: NUCLEO-F746ZG and NUCLEO-F767ZI
diff --git a/tcl/board/st_nucleo_h743zi.cfg b/tcl/board/st_nucleo_h743zi.cfg
index cfe2cda..b857b00 100644
--- a/tcl/board/st_nucleo_h743zi.cfg
+++ b/tcl/board/st_nucleo_h743zi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an ST NUCLEO-H743ZI board with single STM32H743ZI chip.
# http://www.st.com/en/evaluation-tools/nucleo-h743zi.html
diff --git a/tcl/board/st_nucleo_h745zi.cfg b/tcl/board/st_nucleo_h745zi.cfg
index 22d36f6..ad563b7 100644
--- a/tcl/board/st_nucleo_h745zi.cfg
+++ b/tcl/board/st_nucleo_h745zi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an ST NUCLEO-H745ZI-Q board with single STM32H745ZITx chip.
source [find interface/stlink-dap.cfg]
diff --git a/tcl/board/st_nucleo_l073rz.cfg b/tcl/board/st_nucleo_l073rz.cfg
index b32f8d5..10fac5e 100644
--- a/tcl/board/st_nucleo_l073rz.cfg
+++ b/tcl/board/st_nucleo_l073rz.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an ST NUCLEO-L073RZ board with single STM32L073RZ chip.
# http://www.st.com/en/evaluation-tools/nucleo-l073rz.html
source [find interface/stlink.cfg]
diff --git a/tcl/board/st_nucleo_l1.cfg b/tcl/board/st_nucleo_l1.cfg
index a508bb6..50688d2 100644
--- a/tcl/board/st_nucleo_l1.cfg
+++ b/tcl/board/st_nucleo_l1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an ST NUCLEO L152RE board with a single STM32L152RET6 chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF260002
diff --git a/tcl/board/st_nucleo_l4.cfg b/tcl/board/st_nucleo_l4.cfg
index 1ab9da9..8c63d8c 100644
--- a/tcl/board/st_nucleo_l4.cfg
+++ b/tcl/board/st_nucleo_l4.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Should work with all STM32L4 Nucleo Dev Boards.
# http://www.st.com/en/evaluation-tools/stm32-mcu-nucleo.html
diff --git a/tcl/board/st_nucleo_wb55.cfg b/tcl/board/st_nucleo_wb55.cfg
index 5b5b8f7..29b7ec9 100644
--- a/tcl/board/st_nucleo_wb55.cfg
+++ b/tcl/board/st_nucleo_wb55.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Configuration for STM32WB55 Nucleo board (STM32WB55RGV6)
#
diff --git a/tcl/board/steval-idb007v1.cfg b/tcl/board/steval-idb007v1.cfg
index 24dbd1e..69d4585 100644
--- a/tcl/board/steval-idb007v1.cfg
+++ b/tcl/board/steval-idb007v1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an evaluation board with a single BlueNRG-1 chip.
# http://www.st.com/content/st_com/en/products/evaluation-tools/solution-evaluation-tools/communication-and-connectivity-solution-eval-boards/steval-idb008v1.html
set CHIPNAME bluenrg-1
diff --git a/tcl/board/steval-idb008v1.cfg b/tcl/board/steval-idb008v1.cfg
index 3e9d0e5..057c0dd 100644
--- a/tcl/board/steval-idb008v1.cfg
+++ b/tcl/board/steval-idb008v1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an evaluation board with a single BlueNRG-2 chip.
# http://www.st.com/content/st_com/en/products/evaluation-tools/solution-evaluation-tools/communication-and-connectivity-solution-eval-boards/steval-idb007v1.html
set CHIPNAME bluenrg-2
diff --git a/tcl/board/steval-idb011v1.cfg b/tcl/board/steval-idb011v1.cfg
index 5988c63..1163508 100644
--- a/tcl/board/steval-idb011v1.cfg
+++ b/tcl/board/steval-idb011v1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an evaluation board with a single BlueNRG-LP chip.
set CHIPNAME bluenrg-lp
source [find target/bluenrg-x.cfg]
diff --git a/tcl/board/steval-idb012v1.cfg b/tcl/board/steval-idb012v1.cfg
index 25efc58..288cbb2 100644
--- a/tcl/board/steval-idb012v1.cfg
+++ b/tcl/board/steval-idb012v1.cfg
@@ -1,5 +1,6 @@
-# SPDX-License-Identifier: GPL-2.0-or-later.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an evaluation board with a single BlueNRG-LPS chip.
set CHIPNAME bluenrg-lps
source [find interface/cmsis-dap.cfg]
-source [find target/bluenrg-x.cfg] \ No newline at end of file
+source [find target/bluenrg-x.cfg]
diff --git a/tcl/board/steval_pcc010.cfg b/tcl/board/steval_pcc010.cfg
index 94108d1..6e006ba 100644
--- a/tcl/board/steval_pcc010.cfg
+++ b/tcl/board/steval_pcc010.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Use for the STM207VG plug-in board (1 MiB Flash and 112+16 KiB Ram
# coming with the STEVAL-PCC010 board
# http://www.st.com/internet/evalboard/product/251530.jsp
diff --git a/tcl/board/stm320518_eval.cfg b/tcl/board/stm320518_eval.cfg
index 6f1f322..04486fc 100644
--- a/tcl/board/stm320518_eval.cfg
+++ b/tcl/board/stm320518_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM320518-EVAL: This is an STM32F0 eval board with a single STM32F051R8T6
# (64KB) chip.
# http://www.st.com/internet/evalboard/product/252994.jsp
diff --git a/tcl/board/stm320518_eval_stlink.cfg b/tcl/board/stm320518_eval_stlink.cfg
index a7fef07..153f7e5 100644
--- a/tcl/board/stm320518_eval_stlink.cfg
+++ b/tcl/board/stm320518_eval_stlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM320518-EVAL: This is an STM32F0 eval board with a single STM32F051R8T6
# (64KB) chip.
# http://www.st.com/internet/evalboard/product/252994.jsp
diff --git a/tcl/board/stm32100b_eval.cfg b/tcl/board/stm32100b_eval.cfg
index 41153e5..ebb5681 100644
--- a/tcl/board/stm32100b_eval.cfg
+++ b/tcl/board/stm32100b_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32 eval board with a single STM32F100VBT6 chip.
# http://www.st.com/internet/evalboard/product/247099.jsp
diff --git a/tcl/board/stm3210b_eval.cfg b/tcl/board/stm3210b_eval.cfg
index ff3f777..072f542 100644
--- a/tcl/board/stm3210b_eval.cfg
+++ b/tcl/board/stm3210b_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32 eval board with a single STM32F10x (128KB) chip.
# http://www.st.com/internet/evalboard/product/176090.jsp
diff --git a/tcl/board/stm3210c_eval.cfg b/tcl/board/stm3210c_eval.cfg
index e069c04..ec56f63 100644
--- a/tcl/board/stm3210c_eval.cfg
+++ b/tcl/board/stm3210c_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32 eval board with a single STM32F107VCT chip.
# http://www.st.com/internet/evalboard/product/217965.jsp
diff --git a/tcl/board/stm3210e_eval.cfg b/tcl/board/stm3210e_eval.cfg
index f30253c..f08e04b 100644
--- a/tcl/board/stm3210e_eval.cfg
+++ b/tcl/board/stm3210e_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32 eval board with a single STM32F103ZET6 chip.
# http://www.st.com/internet/evalboard/product/204176.jsp
diff --git a/tcl/board/stm3220g_eval.cfg b/tcl/board/stm3220g_eval.cfg
index 4728432..9782a07 100644
--- a/tcl/board/stm3220g_eval.cfg
+++ b/tcl/board/stm3220g_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6
# (128KB) chip.
# http://www.st.com/internet/evalboard/product/250374.jsp
diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
index b58e42f..d529672 100644
--- a/tcl/board/stm3220g_eval_stlink.cfg
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6
# (128KB) chip.
# http://www.st.com/internet/evalboard/product/250374.jsp
diff --git a/tcl/board/stm3241g_eval.cfg b/tcl/board/stm3241g_eval.cfg
index 5f1c449..7df373f 100644
--- a/tcl/board/stm3241g_eval.cfg
+++ b/tcl/board/stm3241g_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM3241G-EVAL: This is an STM32F4 eval board with a single STM32F417IGH6
# (1024KB) chip.
# http://www.st.com/internet/evalboard/product/252216.jsp
diff --git a/tcl/board/stm3241g_eval_stlink.cfg b/tcl/board/stm3241g_eval_stlink.cfg
index b1c54a2..d2d5790 100644
--- a/tcl/board/stm3241g_eval_stlink.cfg
+++ b/tcl/board/stm3241g_eval_stlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM3241G-EVAL: This is an STM32F4 eval board with a single STM32F417IGH6
# (1024KB) chip.
# http://www.st.com/internet/evalboard/product/252216.jsp
diff --git a/tcl/board/stm32429i_eval.cfg b/tcl/board/stm32429i_eval.cfg
index a5d3f53..3304ef6 100644
--- a/tcl/board/stm32429i_eval.cfg
+++ b/tcl/board/stm32429i_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM32429I-EVAL: This is an STM32F4 eval board with a single STM32F429NIH6
# (2048KB) chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF259093
diff --git a/tcl/board/stm32429i_eval_stlink.cfg b/tcl/board/stm32429i_eval_stlink.cfg
index 010d371..be3c482 100644
--- a/tcl/board/stm32429i_eval_stlink.cfg
+++ b/tcl/board/stm32429i_eval_stlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM32429I-EVAL: This is an STM32F4 eval board with a single STM32F429NIH6
# (2048KB) chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF259093
diff --git a/tcl/board/stm32439i_eval.cfg b/tcl/board/stm32439i_eval.cfg
index 8ebdc82..c29d4de 100644
--- a/tcl/board/stm32439i_eval.cfg
+++ b/tcl/board/stm32439i_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM32439I-EVAL: This is an STM32F4 eval board with a single STM32F439NIH6
# (2048KB) chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF259094
diff --git a/tcl/board/stm32439i_eval_stlink.cfg b/tcl/board/stm32439i_eval_stlink.cfg
index b722ce6..7a1a396 100644
--- a/tcl/board/stm32439i_eval_stlink.cfg
+++ b/tcl/board/stm32439i_eval_stlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM32439I-EVAL: This is an STM32F4 eval board with a single STM32F439NIH6
# (2048KB) chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF259094
diff --git a/tcl/board/stm327x6g_eval.cfg b/tcl/board/stm327x6g_eval.cfg
index 3d522f5..03fe949 100644
--- a/tcl/board/stm327x6g_eval.cfg
+++ b/tcl/board/stm327x6g_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM327[4|5]6G-EVAL: This is for the STM32F7 eval boards.
# STM32746G-EVAL
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF261639
diff --git a/tcl/board/stm32f0discovery.cfg b/tcl/board/stm32f0discovery.cfg
index e2b5e38..60fb4a6 100644
--- a/tcl/board/stm32f0discovery.cfg
+++ b/tcl/board/stm32f0discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F0 discovery board with a single STM32F051R8T6 chip.
# http://www.st.com/internet/evalboard/product/253215.jsp
diff --git a/tcl/board/stm32f103c8_blue_pill.cfg b/tcl/board/stm32f103c8_blue_pill.cfg
index 2487f35..0b84f72 100644
--- a/tcl/board/stm32f103c8_blue_pill.cfg
+++ b/tcl/board/stm32f103c8_blue_pill.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM32F103C8 "Blue Pill"
# NOTE:
diff --git a/tcl/board/stm32f334discovery.cfg b/tcl/board/stm32f334discovery.cfg
index be817d7..3ff2968 100644
--- a/tcl/board/stm32f334discovery.cfg
+++ b/tcl/board/stm32f334discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F334 discovery board with a single STM32F334C8T6 chip.
# As it is one of the few boards with stlink V.2-1, we source the corresponding
# nucleo file.
diff --git a/tcl/board/stm32f3discovery.cfg b/tcl/board/stm32f3discovery.cfg
index 9bb62f5..f28e11f 100644
--- a/tcl/board/stm32f3discovery.cfg
+++ b/tcl/board/stm32f3discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F3 discovery board with a single STM32F303VCT6 chip.
# http://www.st.com/internet/evalboard/product/254044.jsp
diff --git a/tcl/board/stm32f412g-disco.cfg b/tcl/board/stm32f412g-disco.cfg
index b6bdb64..757b25d 100644
--- a/tcl/board/stm32f412g-disco.cfg
+++ b/tcl/board/stm32f412g-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F412G discovery board with a single STM32F412ZGT6 chip.
# http://www.st.com/en/evaluation-tools/32f412gdiscovery.html
diff --git a/tcl/board/stm32f413h-disco.cfg b/tcl/board/stm32f413h-disco.cfg
index 99f2a49..6abf495 100644
--- a/tcl/board/stm32f413h-disco.cfg
+++ b/tcl/board/stm32f413h-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F413H discovery board with a single STM32F413ZHT6 chip.
# http://www.st.com/en/evaluation-tools/32f413hdiscovery.html
diff --git a/tcl/board/stm32f429disc1.cfg b/tcl/board/stm32f429disc1.cfg
index c0bceba..657aa19 100644
--- a/tcl/board/stm32f429disc1.cfg
+++ b/tcl/board/stm32f429disc1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This is an STM32F429 discovery board with a single STM32F429ZI chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090
diff --git a/tcl/board/stm32f429discovery.cfg b/tcl/board/stm32f429discovery.cfg
index 7aef09d..d1b5f5a 100644
--- a/tcl/board/stm32f429discovery.cfg
+++ b/tcl/board/stm32f429discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This is an STM32F429 discovery board with a single STM32F429ZI chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090
diff --git a/tcl/board/stm32f469discovery.cfg b/tcl/board/stm32f469discovery.cfg
index a9559a7..cca25b7 100644
--- a/tcl/board/stm32f469discovery.cfg
+++ b/tcl/board/stm32f469discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This is an STM32F469 discovery board with a single STM32F469NI chip.
# http://www.st.com/web/catalog/tools/FM116/CL1620/SC959/SS1532/LN1848/PF262395
diff --git a/tcl/board/stm32f469i-disco.cfg b/tcl/board/stm32f469i-disco.cfg
index ab67512..7ce57f6 100644
--- a/tcl/board/stm32f469i-disco.cfg
+++ b/tcl/board/stm32f469i-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F469I discovery board with a single STM32F469NIH6 chip.
# http://www.st.com/en/evaluation-tools/32f469idiscovery.html
diff --git a/tcl/board/stm32f4discovery.cfg b/tcl/board/stm32f4discovery.cfg
index 60b7f42..714f1e9 100644
--- a/tcl/board/stm32f4discovery.cfg
+++ b/tcl/board/stm32f4discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F4 discovery board with a single STM32F407VGT6 chip.
# http://www.st.com/internet/evalboard/product/252419.jsp
diff --git a/tcl/board/stm32f723e-disco.cfg b/tcl/board/stm32f723e-disco.cfg
index b809c5e..2dee2f9 100644
--- a/tcl/board/stm32f723e-disco.cfg
+++ b/tcl/board/stm32f723e-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F723E discovery board with a single STM32F723IEK6 chip.
# http://www.st.com/en/evaluation-tools/32f723ediscovery.html
diff --git a/tcl/board/stm32f746g-disco.cfg b/tcl/board/stm32f746g-disco.cfg
index 5d2c1a4..fed1d8e 100644
--- a/tcl/board/stm32f746g-disco.cfg
+++ b/tcl/board/stm32f746g-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F746G discovery board with a single STM32F746NGH6 chip.
# http://www.st.com/en/evaluation-tools/32f746gdiscovery.html
diff --git a/tcl/board/stm32f769i-disco.cfg b/tcl/board/stm32f769i-disco.cfg
index 75dffd8..2969bb9 100644
--- a/tcl/board/stm32f769i-disco.cfg
+++ b/tcl/board/stm32f769i-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F769I discovery board with a single STM32F769NIH6 chip.
# http://www.st.com/en/evaluation-tools/32f769idiscovery.html
diff --git a/tcl/board/stm32f7discovery.cfg b/tcl/board/stm32f7discovery.cfg
index d6cbff4..4cc22ea 100644
--- a/tcl/board/stm32f7discovery.cfg
+++ b/tcl/board/stm32f7discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32F7 discovery board with a single STM32F756NGH6 chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1848/PF261641
diff --git a/tcl/board/stm32h735g-disco.cfg b/tcl/board/stm32h735g-disco.cfg
index cb5caa4..4097ae2 100644
--- a/tcl/board/stm32h735g-disco.cfg
+++ b/tcl/board/stm32h735g-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a stm32h735g-dk with a single STM32H735IGK6 chip.
# https://www.st.com/en/evaluation-tools/stm32h735g-dk.html
#
diff --git a/tcl/board/stm32h745i-disco.cfg b/tcl/board/stm32h745i-disco.cfg
index 5a587ae..1c0bc67 100644
--- a/tcl/board/stm32h745i-disco.cfg
+++ b/tcl/board/stm32h745i-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a stm32h745i-disco with a single STM32H745XIH6 chip.
# www.st.com/en/product/stm32h745i-disco.html
#
diff --git a/tcl/board/stm32h747i-disco.cfg b/tcl/board/stm32h747i-disco.cfg
index 698ef58..e0a348e 100644
--- a/tcl/board/stm32h747i-disco.cfg
+++ b/tcl/board/stm32h747i-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a stm32h747i-disco with a single STM32H747XIH6 chip.
# www.st.com/en/product/stm32h747i-disco.html
#
diff --git a/tcl/board/stm32h750b-disco.cfg b/tcl/board/stm32h750b-disco.cfg
index 609cf38..efb32b1 100644
--- a/tcl/board/stm32h750b-disco.cfg
+++ b/tcl/board/stm32h750b-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a stm32h750b-dk with a single STM32H750XBH6 chip.
# www.st.com/en/product/stm32h750b-dk.html
#
diff --git a/tcl/board/stm32h7b3i-disco.cfg b/tcl/board/stm32h7b3i-disco.cfg
index 0c4cc23..58ad9f7 100644
--- a/tcl/board/stm32h7b3i-disco.cfg
+++ b/tcl/board/stm32h7b3i-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a stm32h7b3i-dk with a single STM32H7B3LIH6Q chip.
# https://www.st.com/en/evaluation-tools/stm32h7b3i-dk.html
#
diff --git a/tcl/board/stm32h7x3i_eval.cfg b/tcl/board/stm32h7x3i_eval.cfg
index caf68b6..b9c4c74 100644
--- a/tcl/board/stm32h7x3i_eval.cfg
+++ b/tcl/board/stm32h7x3i_eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STM32H7[4|5]3I-EVAL: this is for the H7 eval boards.
# This is an ST EVAL-H743XI board with single STM32H743XI chip.
# http://www.st.com/en/evaluation-tools/stm32h743i-eval.html
diff --git a/tcl/board/stm32h7x_dual_qspi.cfg b/tcl/board/stm32h7x_dual_qspi.cfg
index bdff9c1..0349fad 100644
--- a/tcl/board/stm32h7x_dual_qspi.cfg
+++ b/tcl/board/stm32h7x_dual_qspi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# stm32h754i-disco and stm32h750b-dk dual quad qspi.
# QUADSPI initialization
diff --git a/tcl/board/stm32l0discovery.cfg b/tcl/board/stm32l0discovery.cfg
index aabbf81..c711d9c 100644
--- a/tcl/board/stm32l0discovery.cfg
+++ b/tcl/board/stm32l0discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32L053 discovery board with a single STM32L053 chip.
# http://www.st.com/web/en/catalog/tools/PF260319
diff --git a/tcl/board/stm32l476g-disco.cfg b/tcl/board/stm32l476g-disco.cfg
index dab2fe1..a32d20f 100644
--- a/tcl/board/stm32l476g-disco.cfg
+++ b/tcl/board/stm32l476g-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32L476G discovery board with a single STM32L476VGT6 chip.
# http://www.st.com/en/evaluation-tools/32l476gdiscovery.html
diff --git a/tcl/board/stm32l496g-disco.cfg b/tcl/board/stm32l496g-disco.cfg
index a93b07c..1ba2299 100644
--- a/tcl/board/stm32l496g-disco.cfg
+++ b/tcl/board/stm32l496g-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32L496G discovery board with a single STM32L496AGI6 chip.
# http://www.st.com/en/evaluation-tools/32l496gdiscovery.html
diff --git a/tcl/board/stm32l4discovery.cfg b/tcl/board/stm32l4discovery.cfg
index 8b79841..f089550 100644
--- a/tcl/board/stm32l4discovery.cfg
+++ b/tcl/board/stm32l4discovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Explicitly for the STM32L476 discovery board:
# http://www.st.com/web/en/catalog/tools/PF261635
# but perfectly functional for any other STM32L4 board connected via
diff --git a/tcl/board/stm32l4p5g-disco.cfg b/tcl/board/stm32l4p5g-disco.cfg
index d7420ed..20d781a 100644
--- a/tcl/board/stm32l4p5g-disco.cfg
+++ b/tcl/board/stm32l4p5g-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a STM32L4P5G discovery board with a single STM32L4R9AGI6 chip.
# http://www.st.com/en/evaluation-tools/stm32l4p5g-dk.html
diff --git a/tcl/board/stm32l4r9i-disco.cfg b/tcl/board/stm32l4r9i-disco.cfg
index 70ed199..f364ad3 100644
--- a/tcl/board/stm32l4r9i-disco.cfg
+++ b/tcl/board/stm32l4r9i-disco.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is a STM32L4R9I discovery board with a single STM32L4R9AII6 chip.
# http://www.st.com/en/evaluation-tools/32l4r9idiscovery.html
diff --git a/tcl/board/stm32ldiscovery.cfg b/tcl/board/stm32ldiscovery.cfg
index 3e397cb..d760eda 100644
--- a/tcl/board/stm32ldiscovery.cfg
+++ b/tcl/board/stm32ldiscovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32L discovery board with a single STM32L152RBT6 chip.
# http://www.st.com/internet/evalboard/product/250990.jsp
diff --git a/tcl/board/stm32mp13x_dk.cfg b/tcl/board/stm32mp13x_dk.cfg
index 6993b1b..6328ddb 100644
--- a/tcl/board/stm32mp13x_dk.cfg
+++ b/tcl/board/stm32mp13x_dk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# board MB1635x
# http://www.st.com/en/evaluation-tools/stm32mp135f-dk.html
diff --git a/tcl/board/stm32mp15x_dk2.cfg b/tcl/board/stm32mp15x_dk2.cfg
index 0233c6d..9503428 100644
--- a/tcl/board/stm32mp15x_dk2.cfg
+++ b/tcl/board/stm32mp15x_dk2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# board MB1272B
# http://www.st.com/en/evaluation-tools/stm32mp157a-dk1.html
# http://www.st.com/en/evaluation-tools/stm32mp157c-dk2.html
diff --git a/tcl/board/stm32vldiscovery.cfg b/tcl/board/stm32vldiscovery.cfg
index 60805b3..30e35b9 100644
--- a/tcl/board/stm32vldiscovery.cfg
+++ b/tcl/board/stm32vldiscovery.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is an STM32VL discovery board with a single STM32F100RB chip.
# http://www.st.com/internet/evalboard/product/250863.jsp
diff --git a/tcl/board/str910-eval.cfg b/tcl/board/str910-eval.cfg
index 5fe7a4e..b6e9837 100644
--- a/tcl/board/str910-eval.cfg
+++ b/tcl/board/str910-eval.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# str910-eval eval board
#
# Need reset scripts
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index 2c98ca3..721c019 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/c100.cfg]
# basic register definition for C100
source [find target/c100regs.tcl]
diff --git a/tcl/board/ti_am335xevm.cfg b/tcl/board/ti_am335xevm.cfg
index 3e2ee3f..af058ec 100644
--- a/tcl/board/ti_am335xevm.cfg
+++ b/tcl/board/ti_am335xevm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI AM335x Evaluation Module
#
diff --git a/tcl/board/ti_am437x_idk.cfg b/tcl/board/ti_am437x_idk.cfg
index fc2b81b..b427762 100644
--- a/tcl/board/ti_am437x_idk.cfg
+++ b/tcl/board/ti_am437x_idk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Texas Instruments AM437x Industrial Development Kit
# The JTAG interface is built directly on the board.
diff --git a/tcl/board/ti_am43xx_evm.cfg b/tcl/board/ti_am43xx_evm.cfg
index dbc37ae..005421f 100644
--- a/tcl/board/ti_am43xx_evm.cfg
+++ b/tcl/board/ti_am43xx_evm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Works on both AM437x GP EVM and AM438x ePOS EVM
transport select jtag
adapter speed 16000
diff --git a/tcl/board/ti_beagleboard.cfg b/tcl/board/ti_beagleboard.cfg
index 9b3b8b0..6767bd6 100644
--- a/tcl/board/ti_beagleboard.cfg
+++ b/tcl/board/ti_beagleboard.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# OMAP3 BeagleBoard
# http://beagleboard.org
diff --git a/tcl/board/ti_beagleboard_xm.cfg b/tcl/board/ti_beagleboard_xm.cfg
index 683f583..fd176a0 100644
--- a/tcl/board/ti_beagleboard_xm.cfg
+++ b/tcl/board/ti_beagleboard_xm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# BeagleBoard xM (DM37x)
# http://beagleboard.org
diff --git a/tcl/board/ti_beaglebone-base.cfg b/tcl/board/ti_beaglebone-base.cfg
index 82d3c31..566f0a4 100644
--- a/tcl/board/ti_beaglebone-base.cfg
+++ b/tcl/board/ti_beaglebone-base.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# AM335x Beaglebone family base configuration
# http://beagleboard.org/bone
diff --git a/tcl/board/ti_beaglebone.cfg b/tcl/board/ti_beaglebone.cfg
index 7ba8c50..d96e45f 100644
--- a/tcl/board/ti_beaglebone.cfg
+++ b/tcl/board/ti_beaglebone.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# AM335x Beaglebone
# http://beagleboard.org/bone
diff --git a/tcl/board/ti_beaglebone_black.cfg b/tcl/board/ti_beaglebone_black.cfg
index c730814..d72bf09 100644
--- a/tcl/board/ti_beaglebone_black.cfg
+++ b/tcl/board/ti_beaglebone_black.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# AM335x Beaglebone Black
# http://beagleboard.org/bone
diff --git a/tcl/board/ti_blaze.cfg b/tcl/board/ti_blaze.cfg
index 4881389..e28b05b 100644
--- a/tcl/board/ti_blaze.cfg
+++ b/tcl/board/ti_blaze.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
jtag_rclk 6000
source [find target/omap4430.cfg]
diff --git a/tcl/board/ti_cc13x0_launchpad.cfg b/tcl/board/ti_cc13x0_launchpad.cfg
index 4fbce41..f6dfbcd 100644
--- a/tcl/board/ti_cc13x0_launchpad.cfg
+++ b/tcl/board/ti_cc13x0_launchpad.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI CC13x0 LaunchPad Evaluation Kit
#
diff --git a/tcl/board/ti_cc13x2_launchpad.cfg b/tcl/board/ti_cc13x2_launchpad.cfg
index dc0c182..900842a 100644
--- a/tcl/board/ti_cc13x2_launchpad.cfg
+++ b/tcl/board/ti_cc13x2_launchpad.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI CC13x2 LaunchPad Evaluation Kit
#
diff --git a/tcl/board/ti_cc26x0_launchpad.cfg b/tcl/board/ti_cc26x0_launchpad.cfg
index 372e57c..431383d 100644
--- a/tcl/board/ti_cc26x0_launchpad.cfg
+++ b/tcl/board/ti_cc26x0_launchpad.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI CC26x0 LaunchPad Evaluation Kit
#
diff --git a/tcl/board/ti_cc26x2_launchpad.cfg b/tcl/board/ti_cc26x2_launchpad.cfg
index c8057ad..133f57e 100644
--- a/tcl/board/ti_cc26x2_launchpad.cfg
+++ b/tcl/board/ti_cc26x2_launchpad.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI CC26x2 LaunchPad Evaluation Kit
#
diff --git a/tcl/board/ti_cc3200_launchxl.cfg b/tcl/board/ti_cc3200_launchxl.cfg
index b37b406..5f39b8a 100644
--- a/tcl/board/ti_cc3200_launchxl.cfg
+++ b/tcl/board/ti_cc3200_launchxl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI SimpleLink Wi-Fi CC3200 LaunchPad
#
diff --git a/tcl/board/ti_cc3220sf_launchpad.cfg b/tcl/board/ti_cc3220sf_launchpad.cfg
index 7c8310a..fe34554 100644
--- a/tcl/board/ti_cc3220sf_launchpad.cfg
+++ b/tcl/board/ti_cc3220sf_launchpad.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI CC3220SF-LaunchXL LaunchPad Evaluation Kit
#
diff --git a/tcl/board/ti_cc32xx_launchpad.cfg b/tcl/board/ti_cc32xx_launchpad.cfg
index d0f2a83..343da48 100644
--- a/tcl/board/ti_cc32xx_launchpad.cfg
+++ b/tcl/board/ti_cc32xx_launchpad.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI CC32xx-LaunchXL LaunchPad Evaluation Kit
#
diff --git a/tcl/board/ti_dk-tm4c129.cfg b/tcl/board/ti_dk-tm4c129.cfg
index f1171af..d8210e3 100644
--- a/tcl/board/ti_dk-tm4c129.cfg
+++ b/tcl/board/ti_dk-tm4c129.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Tiva C DK-TM4C129X Connected Development Kit
#
diff --git a/tcl/board/ti_ek-tm4c123gxl.cfg b/tcl/board/ti_ek-tm4c123gxl.cfg
index 4fc1050..91390fa 100644
--- a/tcl/board/ti_ek-tm4c123gxl.cfg
+++ b/tcl/board/ti_ek-tm4c123gxl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Tiva C Series ek-tm4c123gxl Launchpad Evaluation Kit
#
diff --git a/tcl/board/ti_ek-tm4c1294xl.cfg b/tcl/board/ti_ek-tm4c1294xl.cfg
index b3f384c..63612c6 100644
--- a/tcl/board/ti_ek-tm4c1294xl.cfg
+++ b/tcl/board/ti_ek-tm4c1294xl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Tiva C Series ek-tm4c1294xl Launchpad Evaluation Kit
#
diff --git a/tcl/board/ti_msp432_launchpad.cfg b/tcl/board/ti_msp432_launchpad.cfg
index 6d2b15d..4832b83 100644
--- a/tcl/board/ti_msp432_launchpad.cfg
+++ b/tcl/board/ti_msp432_launchpad.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI MSP432 LaunchPad Evaluation Kit
#
diff --git a/tcl/board/ti_pandaboard.cfg b/tcl/board/ti_pandaboard.cfg
index bc92596..45092e0 100644
--- a/tcl/board/ti_pandaboard.cfg
+++ b/tcl/board/ti_pandaboard.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
jtag_rclk 6000
source [find target/omap4430.cfg]
diff --git a/tcl/board/ti_pandaboard_es.cfg b/tcl/board/ti_pandaboard_es.cfg
index 756fa33..f837358 100644
--- a/tcl/board/ti_pandaboard_es.cfg
+++ b/tcl/board/ti_pandaboard_es.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
jtag_rclk 6000
source [find target/omap4460.cfg]
diff --git a/tcl/board/ti_tmdx570ls20susb.cfg b/tcl/board/ti_tmdx570ls20susb.cfg
index e71136c..9c5ef74 100644
--- a/tcl/board/ti_tmdx570ls20susb.cfg
+++ b/tcl/board/ti_tmdx570ls20susb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TMS570 Microcontroller USB Kit
# http://www.ti.com/tool/TMDX570LS20SUSB
diff --git a/tcl/board/ti_tmdx570ls31usb.cfg b/tcl/board/ti_tmdx570ls31usb.cfg
index 6d73502..324f003 100644
--- a/tcl/board/ti_tmdx570ls31usb.cfg
+++ b/tcl/board/ti_tmdx570ls31usb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter speed 1500
source [find interface/ftdi/xds100v2.cfg]
diff --git a/tcl/board/tocoding_poplar.cfg b/tcl/board/tocoding_poplar.cfg
index 36d5aec..5f9dba4 100644
--- a/tcl/board/tocoding_poplar.cfg
+++ b/tcl/board/tocoding_poplar.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# board configuration for Tocoding Poplar
#
diff --git a/tcl/board/topas910.cfg b/tcl/board/topas910.cfg
index 9f994c8..f45f6e7 100644
--- a/tcl/board/topas910.cfg
+++ b/tcl/board/topas910.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Toshiba TOPAS910 -- TMPA910 Starterkit
#
diff --git a/tcl/board/topasa900.cfg b/tcl/board/topasa900.cfg
index 4fa6383..d6ddc44 100644
--- a/tcl/board/topasa900.cfg
+++ b/tcl/board/topasa900.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Thanks to Pieter Conradie for this script!
# Target: Toshiba TOPAS900 -- TMPA900 Starterkit
######################################
diff --git a/tcl/board/tp-link_tl-mr3020.cfg b/tcl/board/tp-link_tl-mr3020.cfg
index 366bec8..1d1d627 100644
--- a/tcl/board/tp-link_tl-mr3020.cfg
+++ b/tcl/board/tp-link_tl-mr3020.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/atheros_ar9331.cfg]
$_TARGETNAME configure -event reset-init {
diff --git a/tcl/board/tp-link_wdr4300.cfg b/tcl/board/tp-link_wdr4300.cfg
index 7aa79ab..9947366 100644
--- a/tcl/board/tp-link_wdr4300.cfg
+++ b/tcl/board/tp-link_wdr4300.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/atheros_ar9344.cfg]
reset_config trst_only separate
diff --git a/tcl/board/twr-k60f120m.cfg b/tcl/board/twr-k60f120m.cfg
index c4d87db..5914cf0 100644
--- a/tcl/board/twr-k60f120m.cfg
+++ b/tcl/board/twr-k60f120m.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale TWRK60F120M development board
#
diff --git a/tcl/board/twr-k60n512.cfg b/tcl/board/twr-k60n512.cfg
index 5babeb8..b7743a5 100644
--- a/tcl/board/twr-k60n512.cfg
+++ b/tcl/board/twr-k60n512.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale TWRK60N512 development board
#
diff --git a/tcl/board/twr-vf65gs10.cfg b/tcl/board/twr-vf65gs10.cfg
index 0d6d332..bfc7288 100644
--- a/tcl/board/twr-vf65gs10.cfg
+++ b/tcl/board/twr-vf65gs10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Board configuration file for the Freescale VF65GS10 tower board
#
diff --git a/tcl/board/twr-vf65gs10_cmsisdap.cfg b/tcl/board/twr-vf65gs10_cmsisdap.cfg
index ab4548f..86930c5 100644
--- a/tcl/board/twr-vf65gs10_cmsisdap.cfg
+++ b/tcl/board/twr-vf65gs10_cmsisdap.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Board configuration file for the Freescale VF65GS10 tower board
#
diff --git a/tcl/board/tx25_stk5.cfg b/tcl/board/tx25_stk5.cfg
index 9d77afd..5bf8fd0 100644
--- a/tcl/board/tx25_stk5.cfg
+++ b/tcl/board/tx25_stk5.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# -------------------------------------------------------------------------
# KaRo TX25 CPU Module on a StarterkitV base board
# http://www.karo-electronics.com/tx25.html
diff --git a/tcl/board/tx27_stk5.cfg b/tcl/board/tx27_stk5.cfg
index bb933e1..061f1f9 100644
--- a/tcl/board/tx27_stk5.cfg
+++ b/tcl/board/tx27_stk5.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# KaRo TX27 CPU Module on a StarterkitV base board
#
# http://www.karo-electronics.com/tx27.html
diff --git a/tcl/board/unknown_at91sam9260.cfg b/tcl/board/unknown_at91sam9260.cfg
index 5570ef0..cab18b6 100644
--- a/tcl/board/unknown_at91sam9260.cfg
+++ b/tcl/board/unknown_at91sam9260.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Thanks to Pieter Conradie for this script!
#
# Unknown vendor board contains:
diff --git a/tcl/board/uptech_2410.cfg b/tcl/board/uptech_2410.cfg
index 0a2c475..ba269f5 100644
--- a/tcl/board/uptech_2410.cfg
+++ b/tcl/board/uptech_2410.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target Configuration for the Uptech 2410 board.
# This configuration should also work on smdk2410, but I haven't tested it yet.
# Author: xionglingfeng@Gmail.com
diff --git a/tcl/board/vd_a53x2_dap.cfg b/tcl/board/vd_a53x2_dap.cfg
new file mode 100644
index 0000000..4cf5594
--- /dev/null
+++ b/tcl/board/vd_a53x2_dap.cfg
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# Arm Cortex A53x2 through DAP
+
+source [find interface/vdebug.cfg]
+
+set _CORES 2
+set _CHIPNAME a53
+set _MEMSTART 0x00000000
+set _MEMSIZE 0x1000000
+
+# vdebug select transport
+transport select dapdirect_swd
+
+# JTAG reset config, frequency and reset delay
+adapter speed 50000
+adapter srst delay 5
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path tbench.u_vd_swdp_bfm 10ns
+
+# DMA Memories to access backdoor (up to 4)
+vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE
+
+source [find target/swj-dp.tcl]
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
+
+source [find target/vd_aarch64.cfg]
diff --git a/tcl/board/vd_a53x2_jtag.cfg b/tcl/board/vd_a53x2_jtag.cfg
index 869bc4d..a5e8d24 100644
--- a/tcl/board/vd_a53x2_jtag.cfg
+++ b/tcl/board/vd_a53x2_jtag.cfg
@@ -11,7 +11,7 @@ set _MEMSIZE 0x1000000
set _CPUTAPID 0x5ba00477
# vdebug select transport
-#transport select jtag
+transport select jtag
# JTAG reset config, frequency and reset delay
reset_config trst_and_srst
diff --git a/tcl/board/vd_m4_dap.cfg b/tcl/board/vd_m4_dap.cfg
new file mode 100644
index 0000000..691b623
--- /dev/null
+++ b/tcl/board/vd_m4_dap.cfg
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# Arm Cortex m4 through DAP
+
+source [find interface/vdebug.cfg]
+
+set _CHIPNAME m4
+set _MEMSTART 0x00000000
+set _MEMSIZE 0x10000
+
+# vdebug select transport
+transport select dapdirect_swd
+adapter speed 25000
+adapter srst delay 5
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path tbench.u_vd_swdp_bfm 20ns
+
+# DMA Memories to access backdoor (up to 4)
+vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $_MEMSTART $_MEMSIZE
+
+source [find target/swj-dp.tcl]
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
+
+source [find target/vd_cortex_m.cfg]
diff --git a/tcl/board/vd_m4_jtag.cfg b/tcl/board/vd_m4_jtag.cfg
index ca21476..4c795eb 100644
--- a/tcl/board/vd_m4_jtag.cfg
+++ b/tcl/board/vd_m4_jtag.cfg
@@ -10,7 +10,7 @@ set _MEMSIZE 0x10000
set _CPUTAPID 0x4ba00477
# vdebug select transport
-#transport select jtag
+transport select jtag
# JTAG reset config, frequency and reset delay
reset_config trst_and_srst
diff --git a/tcl/board/vd_m7_jtag.cfg b/tcl/board/vd_m7_jtag.cfg
new file mode 100644
index 0000000..880ef9b
--- /dev/null
+++ b/tcl/board/vd_m7_jtag.cfg
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# Arm Cortex m7 through JTAG
+
+source [find interface/vdebug.cfg]
+
+set _CHIPNAME m7
+set _MEMSTART 0x00000000
+set _MEMSIZE 0x100000
+set _CPUTAPID 0x0ba02477
+
+# vdebug select JTAG transport
+transport select jtag
+
+# JTAG reset config, frequency and reset delay
+reset_config trst_and_srst
+adapter speed 50000
+adapter srst delay 5
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path tbench.u_vd_jtag_bfm 10ns
+
+# DMA Memories to access backdoor (up to 4)
+vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $_MEMSTART $_MEMSIZE
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+jtag arp_init-reset
+
+source [find target/vd_cortex_m.cfg]
diff --git a/tcl/board/vd_pulpissimo_jtag.cfg b/tcl/board/vd_pulpissimo_jtag.cfg
index 69dd9e6..a3f5a84 100644
--- a/tcl/board/vd_pulpissimo_jtag.cfg
+++ b/tcl/board/vd_pulpissimo_jtag.cfg
@@ -9,7 +9,7 @@ set _HARTID 0x20
set _CPUTAPID 0x249511c3
# vdebug select transport
-#transport select jtag
+transport select jtag
# JTAG reset config, frequency and reset delay
reset_config trst_and_srst
diff --git a/tcl/board/vd_swerv_jtag.cfg b/tcl/board/vd_swerv_jtag.cfg
index ff6c683..c5d33f2 100644
--- a/tcl/board/vd_swerv_jtag.cfg
+++ b/tcl/board/vd_swerv_jtag.cfg
@@ -11,7 +11,7 @@ set _MEMSTART 0x00000000
set _MEMSIZE 0x10000
# vdebug select transport
-#transport select jtag
+transport select jtag
# JTAG reset config, frequency and reset delay
reset_config trst_and_srst
diff --git a/tcl/board/verdex.cfg b/tcl/board/verdex.cfg
index dd267fc..8511120 100644
--- a/tcl/board/verdex.cfg
+++ b/tcl/board/verdex.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Config for Gumstix Verdex XM4 and XL6P (PXA270)
set CHIPNAME verdex
diff --git a/tcl/board/voipac.cfg b/tcl/board/voipac.cfg
index c59277e..74e651a 100644
--- a/tcl/board/voipac.cfg
+++ b/tcl/board/voipac.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Config for Voipac PXA270/PXA270M module.
set CHIPNAME voipac
diff --git a/tcl/board/voltcraft_dso-3062c.cfg b/tcl/board/voltcraft_dso-3062c.cfg
index f300cf2..fd56a81 100644
--- a/tcl/board/voltcraft_dso-3062c.cfg
+++ b/tcl/board/voltcraft_dso-3062c.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Voltcraft DSO-3062C digital oscilloscope (uses a Samsung S3C2440)
#
diff --git a/tcl/board/x300t.cfg b/tcl/board/x300t.cfg
index 9d9a320..c57c9d9 100644
--- a/tcl/board/x300t.cfg
+++ b/tcl/board/x300t.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is for the T-Home X300T / X301T IPTV box,
# which are based on IPTV reference designs from Kiss/Cisco KMM-3***
#
diff --git a/tcl/board/xmc-2go.cfg b/tcl/board/xmc-2go.cfg
index 90dbf43..dd78a12 100644
--- a/tcl/board/xmc-2go.cfg
+++ b/tcl/board/xmc-2go.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC 2Go
#
diff --git a/tcl/board/xmc1100-boot-kit.cfg b/tcl/board/xmc1100-boot-kit.cfg
index 5e7c607..12ee3e2 100644
--- a/tcl/board/xmc1100-boot-kit.cfg
+++ b/tcl/board/xmc1100-boot-kit.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC1100 Boot Kit
#
diff --git a/tcl/board/xmc4200-application-kit-actuator.cfg b/tcl/board/xmc4200-application-kit-actuator.cfg
index 4e3dde8..79befaa 100644
--- a/tcl/board/xmc4200-application-kit-actuator.cfg
+++ b/tcl/board/xmc4200-application-kit-actuator.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4200 Application Kit - Actuator
#
diff --git a/tcl/board/xmc4300-relax.cfg b/tcl/board/xmc4300-relax.cfg
index bb46ccf..b748793 100644
--- a/tcl/board/xmc4300-relax.cfg
+++ b/tcl/board/xmc4300-relax.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4300 Relax EtherCAT Kit
#
diff --git a/tcl/board/xmc4500-application-kit-general.cfg b/tcl/board/xmc4500-application-kit-general.cfg
index 47c8b99..dbb5325 100644
--- a/tcl/board/xmc4500-application-kit-general.cfg
+++ b/tcl/board/xmc4500-application-kit-general.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4500 Application Kit - General Purpose
#
diff --git a/tcl/board/xmc4500-application-kit-sdram.cfg b/tcl/board/xmc4500-application-kit-sdram.cfg
index fe44d01..580dfd8 100644
--- a/tcl/board/xmc4500-application-kit-sdram.cfg
+++ b/tcl/board/xmc4500-application-kit-sdram.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4500 Application Kit - SDRAM
#
diff --git a/tcl/board/xmc4500-relax.cfg b/tcl/board/xmc4500-relax.cfg
index 1753b24..1239f04 100644
--- a/tcl/board/xmc4500-relax.cfg
+++ b/tcl/board/xmc4500-relax.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4500 Relax Kit / Relax Lite Kit
#
diff --git a/tcl/board/xmc4700-relax.cfg b/tcl/board/xmc4700-relax.cfg
index 29953f6..ac8ce26 100644
--- a/tcl/board/xmc4700-relax.cfg
+++ b/tcl/board/xmc4700-relax.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4700 Relax Lite Kit / Relax Kit for 5V Shields / Relax Kit
#
diff --git a/tcl/board/xmc4800-relax.cfg b/tcl/board/xmc4800-relax.cfg
index fa3fc8f..d63159f 100644
--- a/tcl/board/xmc4800-relax.cfg
+++ b/tcl/board/xmc4800-relax.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4800 Relax EtherCAT Kit
#
diff --git a/tcl/board/xmos_xk-xac-xa8_arm.cfg b/tcl/board/xmos_xk-xac-xa8_arm.cfg
index 3d12afb..2e83977 100644
--- a/tcl/board/xmos_xk-xac-xa8_arm.cfg
+++ b/tcl/board/xmos_xk-xac-xa8_arm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# xCORE-XA Core Module
#
diff --git a/tcl/board/xtensa-kc705-ext-dap.cfg b/tcl/board/xtensa-kc705-ext-dap.cfg
new file mode 100644
index 0000000..ac92c70
--- /dev/null
+++ b/tcl/board/xtensa-kc705-ext-dap.cfg
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence KC705 FPGA Development Platform for Xtensa targets
+# Can be used with various external adapters that support DAP, e.g. JLink
+#
+
+adapter speed 5000
+
+# KC705 supports DAP/JTAG
+transport select jtag
+set XTENSA_DAP enable
+set XTENSA_DAP_BASE 0x10000
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
diff --git a/tcl/board/xtensa-kc705-ext.cfg b/tcl/board/xtensa-kc705-ext.cfg
new file mode 100644
index 0000000..6be0681
--- /dev/null
+++ b/tcl/board/xtensa-kc705-ext.cfg
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence KC705 FPGA Development Platform for Xtensa targets
+# Can be used with various external adapters, e.g. Flyswatter2 or JLink
+#
+
+adapter speed 10000
+
+# KC705 supports JTAG only
+transport select jtag
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
diff --git a/tcl/board/xtensa-kc705-onboard.cfg b/tcl/board/xtensa-kc705-onboard.cfg
new file mode 100644
index 0000000..f0a616c
--- /dev/null
+++ b/tcl/board/xtensa-kc705-onboard.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence KC705 FPGA Development Platform for Xtensa targets
+# Can be used with on-board (FTDI) adapter or various external adapters
+#
+
+source [find interface/ftdi/xt_kc705_ml605.cfg]
+adapter speed 10000
+
+# KC705 supports JTAG only
+transport select jtag
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
diff --git a/tcl/board/xtensa-palladium-vdebug.cfg b/tcl/board/xtensa-palladium-vdebug.cfg
new file mode 100644
index 0000000..d4a700e
--- /dev/null
+++ b/tcl/board/xtensa-palladium-vdebug.cfg
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# for Palladium emulation systems
+#
+
+source [find interface/vdebug.cfg]
+
+# vdebug select JTAG transport
+transport select jtag
+
+# JTAG reset config, frequency and reset delay
+reset_config trst_and_srst
+adapter speed 50000
+adapter srst delay 5
+
+source [find target/vd_xtensa_jtag.cfg]
diff --git a/tcl/board/xtensa-rt685-ext.cfg b/tcl/board/xtensa-rt685-ext.cfg
new file mode 100644
index 0000000..03edb8d
--- /dev/null
+++ b/tcl/board/xtensa-rt685-ext.cfg
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# NXP RT6XX Developemnt Platform with Xtensa HiFi DSP
+# Can be used with various external adapters that support DAP, e.g. JLink
+#
+
+adapter speed 10000
+
+# RT6XX supports SWD only
+transport select swd
+set XTENSA_DAP enable
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
+
+source [find target/xtensa-core-nxp_rt600.cfg]
diff --git a/tcl/chip/atmel/at91/aic.tcl b/tcl/chip/atmel/at91/aic.tcl
index 8b8a48f..6657b60 100644
--- a/tcl/chip/atmel/at91/aic.tcl
+++ b/tcl/chip/atmel/at91/aic.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AIC_SMR [expr {$AT91C_BASE_AIC + 0x00000000} ]
global AIC_SMR
set AIC_SVR [expr {$AT91C_BASE_AIC + 0x00000080} ]
diff --git a/tcl/chip/atmel/at91/at91_pio.cfg b/tcl/chip/atmel/at91/at91_pio.cfg
index 2373c19..10a1d48 100644
--- a/tcl/chip/atmel/at91/at91_pio.cfg
+++ b/tcl/chip/atmel/at91/at91_pio.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set PIO_PER 0x00 ;# Enable Register
set PIO_PDR 0x04 ;# Disable Register
set PIO_PSR 0x08 ;# Status Register
diff --git a/tcl/chip/atmel/at91/at91_pmc.cfg b/tcl/chip/atmel/at91/at91_pmc.cfg
index dd554ce..a75cecd 100644
--- a/tcl/chip/atmel/at91/at91_pmc.cfg
+++ b/tcl/chip/atmel/at91/at91_pmc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_PMC_SCER [expr {$AT91_PMC + 0x00}] ;# System Clock Enable Register
set AT91_PMC_SCDR [expr {$AT91_PMC + 0x04}] ;# System Clock Disable Register
diff --git a/tcl/chip/atmel/at91/at91_rstc.cfg b/tcl/chip/atmel/at91/at91_rstc.cfg
index 6673fe6..fd17438 100644
--- a/tcl/chip/atmel/at91/at91_rstc.cfg
+++ b/tcl/chip/atmel/at91/at91_rstc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_RSTC_CR [expr {$AT91_RSTC + 0x00}] ;# Reset Controller Control Register
set AT91_RSTC_PROCRST [expr {1 << 0}] ;# Processor Reset
set AT91_RSTC_PERRST [expr {1 << 2}] ;# Peripheral Reset
diff --git a/tcl/chip/atmel/at91/at91_wdt.cfg b/tcl/chip/atmel/at91/at91_wdt.cfg
index 9b4e817..8bba62e 100644
--- a/tcl/chip/atmel/at91/at91_wdt.cfg
+++ b/tcl/chip/atmel/at91/at91_wdt.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_WDT_CR [expr {$AT91_WDT + 0x00}] ;# Watchdog Control Register
set AT91_WDT_WDRSTT [expr {1 << 0}] ;# Restart
set AT91_WDT_KEY [expr {0xa5 << 24}] ;# KEY Password
diff --git a/tcl/chip/atmel/at91/at91sam7x128.tcl b/tcl/chip/atmel/at91/at91sam7x128.tcl
index ce33cf0..8f46827 100644
--- a/tcl/chip/atmel/at91/at91sam7x128.tcl
+++ b/tcl/chip/atmel/at91/at91sam7x128.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/arm7tdmi.tcl]
source [find memory.tcl]
diff --git a/tcl/chip/atmel/at91/at91sam7x256.tcl b/tcl/chip/atmel/at91/at91sam7x256.tcl
index dc4918a..49d5244 100644
--- a/tcl/chip/atmel/at91/at91sam7x256.tcl
+++ b/tcl/chip/atmel/at91/at91sam7x256.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/arm7tdmi.tcl]
source [find memory.tcl]
diff --git a/tcl/chip/atmel/at91/at91sam9261.cfg b/tcl/chip/atmel/at91/at91sam9261.cfg
index 61b0c0b..51e7101 100644
--- a/tcl/chip/atmel/at91/at91sam9261.cfg
+++ b/tcl/chip/atmel/at91/at91sam9261.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Peripheral identifiers/interrupts.
#
diff --git a/tcl/chip/atmel/at91/at91sam9261_matrix.cfg b/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
index 238e658..c3656bd 100644
--- a/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
+++ b/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
set AT91_MATRIX_MCFG [expr {$AT91_MATRIX + 0x00}] ;# Master Configuration Register #
set AT91_MATRIX_RCB0 [expr {1 << 0}] ;# Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master)
diff --git a/tcl/chip/atmel/at91/at91sam9263.cfg b/tcl/chip/atmel/at91/at91sam9263.cfg
index 8e22eb2..600c548 100644
--- a/tcl/chip/atmel/at91/at91sam9263.cfg
+++ b/tcl/chip/atmel/at91/at91sam9263.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Peripheral identifiers/interrupts.
#
diff --git a/tcl/chip/atmel/at91/at91sam9263_matrix.cfg b/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
index b4a07d3..20a3107 100644
--- a/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
+++ b/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_MATRIX_MCFG0 [expr {$AT91_MATRIX + 0x00}] ;# Master Configuration Register 0
set AT91_MATRIX_MCFG1 [expr {$AT91_MATRIX + 0x04}] ;# Master Configuration Register 1
set AT91_MATRIX_MCFG2 [expr {$AT91_MATRIX + 0x08}] ;# Master Configuration Register 2
diff --git a/tcl/chip/atmel/at91/at91sam9_init.cfg b/tcl/chip/atmel/at91/at91sam9_init.cfg
index 27611eb..a64d6ea 100644
--- a/tcl/chip/atmel/at91/at91sam9_init.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_init.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
uplevel #0 [list source [find chip/atmel/at91/at91sam9_sdramc.cfg]]
uplevel #0 [list source [find chip/atmel/at91/at91_pmc.cfg]]
uplevel #0 [list source [find chip/atmel/at91/at91_pio.cfg]]
diff --git a/tcl/chip/atmel/at91/at91sam9_sdramc.cfg b/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
index 7b09369..658b6c3 100644
--- a/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
# SDRAM Controller (SDRAMC) registers
set AT91_SDRAMC_MR [expr {$AT91_SDRAMC + 0x00}] ;# SDRAM Controller Mode Register
diff --git a/tcl/chip/atmel/at91/at91sam9_smc.cfg b/tcl/chip/atmel/at91/at91sam9_smc.cfg
index 3a76d14..c096c4a 100644
--- a/tcl/chip/atmel/at91/at91sam9_smc.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_smc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_SMC_READMODE [expr {1 << 0}] ;# Read Mode
set AT91_SMC_WRITEMODE [expr {1 << 1}] ;# Write Mode
set AT91_SMC_EXNWMODE [expr {3 << 4}] ;# NWAIT Mode
diff --git a/tcl/chip/atmel/at91/hardware.cfg b/tcl/chip/atmel/at91/hardware.cfg
index a25eab9..069d4b7 100644
--- a/tcl/chip/atmel/at91/hardware.cfg
+++ b/tcl/chip/atmel/at91/hardware.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# External Memory Map
set AT91_CHIPSELECT_0 0x10000000
set AT91_CHIPSELECT_1 0x20000000
diff --git a/tcl/chip/atmel/at91/pmc.tcl b/tcl/chip/atmel/at91/pmc.tcl
index 7cb1d09..0f997ca 100644
--- a/tcl/chip/atmel/at91/pmc.tcl
+++ b/tcl/chip/atmel/at91/pmc.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
if [info exists AT91C_MAINOSC_FREQ] {
# user set this... let it be.
diff --git a/tcl/chip/atmel/at91/rtt.tcl b/tcl/chip/atmel/at91/rtt.tcl
index d49ce71..1ef8373 100644
--- a/tcl/chip/atmel/at91/rtt.tcl
+++ b/tcl/chip/atmel/at91/rtt.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
set RTTC_RTMR [expr {$AT91C_BASE_RTTC + 0x00}]
set RTTC_RTAR [expr {$AT91C_BASE_RTTC + 0x04}]
diff --git a/tcl/chip/atmel/at91/sam9_smc.cfg b/tcl/chip/atmel/at91/sam9_smc.cfg
index 0628d4d..87880c7 100644
--- a/tcl/chip/atmel/at91/sam9_smc.cfg
+++ b/tcl/chip/atmel/at91/sam9_smc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Setup register
#
# ncs_read_setup
diff --git a/tcl/chip/atmel/at91/usarts.tcl b/tcl/chip/atmel/at91/usarts.tcl
index 253b7fb..62a651b 100644
--- a/tcl/chip/atmel/at91/usarts.tcl
+++ b/tcl/chip/atmel/at91/usarts.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# the DBGU and USARTs are 'almost' indentical'
set DBGU_CR [expr {$AT91C_BASE_DBGU + 0x00000000}]
set DBGU_MR [expr {$AT91C_BASE_DBGU + 0x00000004}]
diff --git a/tcl/chip/st/spear/quirk_no_srst.tcl b/tcl/chip/st/spear/quirk_no_srst.tcl
index 551df06..e8640f4 100644
--- a/tcl/chip/st/spear/quirk_no_srst.tcl
+++ b/tcl/chip/st/spear/quirk_no_srst.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Quirks to bypass missing SRST on JTAG connector
# EVALSPEAr310 Rev. 2.0
# http://www.st.com/spear
diff --git a/tcl/chip/st/spear/spear3xx.tcl b/tcl/chip/st/spear/spear3xx.tcl
index 86f2a1d..474ebe3 100644
--- a/tcl/chip/st/spear/spear3xx.tcl
+++ b/tcl/chip/st/spear/spear3xx.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Generic init scripts for all ST SPEAr3xx family
# http://www.st.com/spear
#
diff --git a/tcl/chip/st/spear/spear3xx_ddr.tcl b/tcl/chip/st/spear/spear3xx_ddr.tcl
index 22fe06e..5992567 100644
--- a/tcl/chip/st/spear/spear3xx_ddr.tcl
+++ b/tcl/chip/st/spear/spear3xx_ddr.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Init scripts to configure DDR controller of SPEAr3xx
# http://www.st.com/spear
# Original values taken from XLoader source code
diff --git a/tcl/chip/st/stm32/stm32.tcl b/tcl/chip/st/stm32/stm32.tcl
index 94b1935..3826a57 100644
--- a/tcl/chip/st/stm32/stm32.tcl
+++ b/tcl/chip/st/stm32/stm32.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/cortex_m3.tcl]
source [find memory.tcl]
diff --git a/tcl/chip/st/stm32/stm32_rcc.tcl b/tcl/chip/st/stm32/stm32_rcc.tcl
index fa652a2..afa4cbf 100644
--- a/tcl/chip/st/stm32/stm32_rcc.tcl
+++ b/tcl/chip/st/stm32/stm32_rcc.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
set RCC_CR [expr {$RCC_BASE + 0x00}]
set RCC_CFGR [expr {$RCC_BASE + 0x04}]
diff --git a/tcl/chip/st/stm32/stm32_regs.tcl b/tcl/chip/st/stm32/stm32_regs.tcl
index 6ae2f63..07ff1aa 100644
--- a/tcl/chip/st/stm32/stm32_regs.tcl
+++ b/tcl/chip/st/stm32/stm32_regs.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# /* Peripheral and SRAM base address in the alias region */
set PERIPH_BB_BASE 0x42000000
set SRAM_BB_BASE 0x22000000
diff --git a/tcl/chip/ti/lm3s/lm3s.tcl b/tcl/chip/ti/lm3s/lm3s.tcl
index 42da8c6..324aad0 100644
--- a/tcl/chip/ti/lm3s/lm3s.tcl
+++ b/tcl/chip/ti/lm3s/lm3s.tcl
@@ -1 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find chip/ti/lm3s/lm3s_regs.tcl]
diff --git a/tcl/chip/ti/lm3s/lm3s_regs.tcl b/tcl/chip/ti/lm3s/lm3s_regs.tcl
index cb20812..1e86e29 100644
--- a/tcl/chip/ti/lm3s/lm3s_regs.tcl
+++ b/tcl/chip/ti/lm3s/lm3s_regs.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#*****************************************************************************
#
# The following are defines for the System Control register addresses.
diff --git a/tcl/cpld/altera-5m570z-cpld.cfg b/tcl/cpld/altera-5m570z-cpld.cfg
index 22a422c..5dbd0de 100644
--- a/tcl/cpld/altera-5m570z-cpld.cfg
+++ b/tcl/cpld/altera-5m570z-cpld.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Altera MAXV 5M24OZ/5M570Z CPLD
# see MAX V Device Handbook
# Table 6-3: 32-Bit MAX V Device IDCODE
diff --git a/tcl/cpld/altera-epm240.cfg b/tcl/cpld/altera-epm240.cfg
index ece02bb..39c409b 100644
--- a/tcl/cpld/altera-epm240.cfg
+++ b/tcl/cpld/altera-epm240.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Altera MAXII EPM240T100C CPLD
if { [info exists CHIPNAME] } {
diff --git a/tcl/cpld/jtagspi.cfg b/tcl/cpld/jtagspi.cfg
index e720c39..7071e5e 100644
--- a/tcl/cpld/jtagspi.cfg
+++ b/tcl/cpld/jtagspi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _USER1 0x02
if { [info exists JTAGSPI_IR] } {
diff --git a/tcl/cpld/lattice-lc4032ze.cfg b/tcl/cpld/lattice-lc4032ze.cfg
index d4a85eb..479180f 100644
--- a/tcl/cpld/lattice-lc4032ze.cfg
+++ b/tcl/cpld/lattice-lc4032ze.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Lattice ispMACH 4000ZE family, device LC4032ZE
# just configure a tap
jtag newtap LC4032ZE tap -irlen 8 -expected-id 0x01806043
diff --git a/tcl/cpld/xilinx-xc6s.cfg b/tcl/cpld/xilinx-xc6s.cfg
index 9ce7ad4..82b87fb 100644
--- a/tcl/cpld/xilinx-xc6s.cfg
+++ b/tcl/cpld/xilinx-xc6s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# xilinx spartan6
# http://www.xilinx.com/support/documentation/user_guides/ug380.pdf
diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg
index 4c0502c..22e0aea 100644
--- a/tcl/cpld/xilinx-xc7.cfg
+++ b/tcl/cpld/xilinx-xc7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# xilinx series 7 (artix, kintex, virtex)
# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
diff --git a/tcl/cpld/xilinx-xcf-p.cfg b/tcl/cpld/xilinx-xcf-p.cfg
index 8e0a26c..7b6d384 100644
--- a/tcl/cpld/xilinx-xcf-p.cfg
+++ b/tcl/cpld/xilinx-xcf-p.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/cpld/xilinx-xcf-s.cfg b/tcl/cpld/xilinx-xcf-s.cfg
index a3c79a3..417ecff 100644
--- a/tcl/cpld/xilinx-xcf-s.cfg
+++ b/tcl/cpld/xilinx-xcf-s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/cpld/xilinx-xcr3256.cfg b/tcl/cpld/xilinx-xcr3256.cfg
index e5611f1..4668e54 100644
--- a/tcl/cpld/xilinx-xcr3256.cfg
+++ b/tcl/cpld/xilinx-xcr3256.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#xilinx coolrunner xcr3256
#simple device - just configure a tap
jtag newtap xcr tap -irlen 5 -ircapture 0x01 -irmask 0x1f -expected-id 0x0494c093
diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg
index 3270597..57a59f5 100644
--- a/tcl/cpld/xilinx-xcu.cfg
+++ b/tcl/cpld/xilinx-xcu.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Xilinx Ultrascale (Kintex, Virtex, Zynq)
# https://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf
diff --git a/tcl/cpu/arc/common.tcl b/tcl/cpu/arc/common.tcl
index b31e31a..e0de70b 100644
--- a/tcl/cpu/arc/common.tcl
+++ b/tcl/cpu/arc/common.tcl
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2015, 2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
# Things common to all ARCs
diff --git a/tcl/cpu/arc/em.tcl b/tcl/cpu/arc/em.tcl
index 595a351..13c5b43 100644
--- a/tcl/cpu/arc/em.tcl
+++ b/tcl/cpu/arc/em.tcl
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2015, 2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
source [find cpu/arc/v2.tcl]
diff --git a/tcl/cpu/arc/hs.tcl b/tcl/cpu/arc/hs.tcl
index 181f993..28e04f9 100644
--- a/tcl/cpu/arc/hs.tcl
+++ b/tcl/cpu/arc/hs.tcl
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2015, 2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
source [find cpu/arc/v2.tcl]
diff --git a/tcl/cpu/arc/v2.tcl b/tcl/cpu/arc/v2.tcl
index 364e8af..d28b9d9 100644
--- a/tcl/cpu/arc/v2.tcl
+++ b/tcl/cpu/arc/v2.tcl
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2015, 2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
source [find cpu/arc/common.tcl]
diff --git a/tcl/cpu/arm/arm7tdmi.tcl b/tcl/cpu/arm/arm7tdmi.tcl
index a1d4a1f..e407a23 100644
--- a/tcl/cpu/arm/arm7tdmi.tcl
+++ b/tcl/cpu/arm/arm7tdmi.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm7tdmi
set CPU_ARCH armv4t
diff --git a/tcl/cpu/arm/arm920.tcl b/tcl/cpu/arm/arm920.tcl
index c01f602..1c5a8ad 100644
--- a/tcl/cpu/arm/arm920.tcl
+++ b/tcl/cpu/arm/arm920.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm920
set CPU_ARCH armv4t
diff --git a/tcl/cpu/arm/arm946.tcl b/tcl/cpu/arm/arm946.tcl
index a6110a5..602d4d7 100644
--- a/tcl/cpu/arm/arm946.tcl
+++ b/tcl/cpu/arm/arm946.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm946
set CPU_ARCH armv5te
diff --git a/tcl/cpu/arm/arm966.tcl b/tcl/cpu/arm/arm966.tcl
index 1fffbc0..0e64312 100644
--- a/tcl/cpu/arm/arm966.tcl
+++ b/tcl/cpu/arm/arm966.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm966
set CPU_ARCH armv5te
diff --git a/tcl/cpu/arm/cortex_m3.tcl b/tcl/cpu/arm/cortex_m3.tcl
index c995026..0791664 100644
--- a/tcl/cpu/arm/cortex_m3.tcl
+++ b/tcl/cpu/arm/cortex_m3.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME cortex_m3
set CPU_ARCH armv7
diff --git a/tcl/fpga/altera-10m50.cfg b/tcl/fpga/altera-10m50.cfg
index d5af710..1937cb4 100644
--- a/tcl/fpga/altera-10m50.cfg
+++ b/tcl/fpga/altera-10m50.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# see MAX 10 FPGA Device Architecture
# Table 3-1: IDCODE Information for MAX 10 Devices
# Intel MAX 10M02 0x31810dd
diff --git a/tcl/fpga/altera-ep3c10.cfg b/tcl/fpga/altera-ep3c10.cfg
index 6e8962a..7c231f9 100644
--- a/tcl/fpga/altera-ep3c10.cfg
+++ b/tcl/fpga/altera-ep3c10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Altera Cyclone III EP3C10
# see Cyclone III Device Handbook, Volume 1;
# Table 14–5. 32-Bit Cyclone III Device IDCODE
diff --git a/tcl/fpga/lattice_machxo3.cfg b/tcl/fpga/lattice_machxo3.cfg
new file mode 100644
index 0000000..37fa054
--- /dev/null
+++ b/tcl/fpga/lattice_machxo3.cfg
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME machxo3
+}
+
+# Lattice MachXO3 family
+# TAP IDs are extracted from BSDL files found on this page:
+# https://www.latticesemi.com/Products/FPGAandCPLD/MachXO3
+#
+# 0x412b2043 - LCMXO3L_1300E_XXUWG36/XXMG121
+# 0x412b3043 - LCMXO3L_2100E_XXMG121/XXMG256/XXUWG49
+# 0x412b4043 - LCMXO3L_4300E_XXMG121/XXMG324/XXUWG81
+# 0x412b5043 - LCMXO3L_6900E_XXMG256/XXMG324
+# 0x412b6043 - LCMXO3L_9400E_XXBG256/XXMG256
+# 0x412bb043 - LCMXO3L_2100C_XXBG256
+# 0x412bc043 - LCMXO3L_4300C_XXBG256/XXBG324
+# 0x412bd043 - LCMXO3L_6900C_XXBG256/XXBG324/XXBG400
+# 0x412be043 - LCMXO3L_9400C_XXBG256/XXBG400/XXBG484
+# 0x612b2043 - LCMXO3LF_1300E_XXMG121/XXUWG36
+# 0x612b3043 - LCMXO3LF_2100E_XXMG121/XXMG256/XXUWG49
+# 0x612b4043 - LCMXO3LF_4300E_XXMG121/XXMG256/XXMG324/XXUWG81
+# 0x612b5043 - LCMXO3LF_6900E_XXMG256/XXMG324
+# 0x612b6043 - LCMXO3LF_9400E_XXBG256/XXMG256
+# 0x612bb043 - LCMXO3LF_2100C_XXBG256
+# 0x612bc043 - LCMXO3LF_4300C_XXBG256/XXBG324
+# 0x612bd043 - LCMXO3LF_6900C_XXBG256/XXBG324/XXBG400
+# 0x612be043 - LCMXO3LF_9400C_XXBG256/XXBG400/XXBG484
+# 0xc12b2043 - LCMXO3L_640E_XXMG121
+# 0xc12b4043 - LCMXO3L_2100E_XXMG324
+# 0xc12bb043 - LCMXO3L_1300C_XXBG256/XXMG256
+# 0xc12bc043 - LCMXO3L_2100C_XXBG324
+# 0xc12bd043 - LCMXO3L_4300C_XXBG400
+# 0xe12b2043 - LCMXO3LF_640E_XXMG121
+# 0xe12b3043 - LCMXO3LF_1300E_XXMG256
+# 0xe12b4043 - LCMXO3LF_2100E_XXMG324
+# 0xe12bb043 - LCMXO3LF_1300C_XXBG256
+# 0xe12bc043 - LCMXO3LF_2100C_XXBG324
+# 0xe12bd043 - LCMXO3LF_4300C_XXBG400
+
+jtag newtap $_CHIPNAME tap -irlen 8 -irmask 0x83 -ircapture 0x1 \
+ -expected-id 0x412b2043 -expected-id 0x412b3043 -expected-id 0x412b4043 \
+ -expected-id 0x412b5043 -expected-id 0x412b6043 -expected-id 0x412bb043 \
+ -expected-id 0x412bc043 -expected-id 0x412bd043 -expected-id 0x412be043 \
+ -expected-id 0x612b2043 -expected-id 0x612b3043 -expected-id 0x612b4043 \
+ -expected-id 0x612b5043 -expected-id 0x612b6043 -expected-id 0x612bb043 \
+ -expected-id 0x612bc043 -expected-id 0x612bd043 -expected-id 0x612be043 \
+ -expected-id 0xc12b2043 -expected-id 0xc12b4043 -expected-id 0xc12bb043 \
+ -expected-id 0xc12bc043 -expected-id 0xc12bd043 -expected-id 0xe12b2043 \
+ -expected-id 0xe12b3043 -expected-id 0xe12b4043 -expected-id 0xe12bb043 \
+ -expected-id 0xe12bc043 -expected-id 0xe12bd043
diff --git a/tcl/fpga/xilinx-dna.cfg b/tcl/fpga/xilinx-dna.cfg
index a805673..56f8c14 100644
--- a/tcl/fpga/xilinx-dna.cfg
+++ b/tcl/fpga/xilinx-dna.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
proc xilinx_dna_addr {chip} {
array set addrs {
Spartan6 0x30
diff --git a/tcl/fpga/xilinx-xadc.cfg b/tcl/fpga/xilinx-xadc.cfg
index 250879e..fdaf3a9 100644
--- a/tcl/fpga/xilinx-xadc.cfg
+++ b/tcl/fpga/xilinx-xadc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Xilinx XADC support for 7 Series FPGAs
#
# The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
diff --git a/tcl/interface/altera-usb-blaster.cfg b/tcl/interface/altera-usb-blaster.cfg
index cb4ca9a..cc6057b 100644
--- a/tcl/interface/altera-usb-blaster.cfg
+++ b/tcl/interface/altera-usb-blaster.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Altera USB-Blaster
#
diff --git a/tcl/interface/altera-usb-blaster2.cfg b/tcl/interface/altera-usb-blaster2.cfg
index 05b0519..93f9809 100644
--- a/tcl/interface/altera-usb-blaster2.cfg
+++ b/tcl/interface/altera-usb-blaster2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Altera USB-Blaster II
#
diff --git a/tcl/interface/arm-jtag-ew.cfg b/tcl/interface/arm-jtag-ew.cfg
index 797bb71..a064a42 100644
--- a/tcl/interface/arm-jtag-ew.cfg
+++ b/tcl/interface/arm-jtag-ew.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex ARM-JTAG-EW
#
diff --git a/tcl/interface/ast2600-gpiod.cfg b/tcl/interface/ast2600-gpiod.cfg
new file mode 100644
index 0000000..5cad02f
--- /dev/null
+++ b/tcl/interface/ast2600-gpiod.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Use AST2600 GPIO through linuxgpiod
+#
+# +-----------+-------------+-------------+
+# | signal | GPIO name | gpio offset |
+# +-----------+-------------+-------------+
+# | TCK/SWCLK | GPIOI2 | 66 |
+# | TMS/SWDIO | GPIOI3 | 67 |
+# | TDI | GPIOI1 | 65 |
+# | TDO | GPIOI4 | 68 |
+# | nTRST | GPIOI0 | 64 |
+# +-----------+-------------+-------------+
+
+adapter driver linuxgpiod
+
+adapter gpio trst 64 -chip 0
+adapter gpio tdi 65 -chip 0
+adapter gpio tck 66 -chip 0
+adapter gpio swclk 66 -chip 0
+adapter gpio tms 67 -chip 0
+adapter gpio swdio 67 -chip 0
+adapter gpio tdo 68 -chip 0
+
+reset_config trst_only separate trst_push_pull
diff --git a/tcl/interface/at91rm9200.cfg b/tcl/interface/at91rm9200.cfg
index b66e060..caef997 100644
--- a/tcl/interface/at91rm9200.cfg
+++ b/tcl/interface/at91rm9200.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Various Atmel AT91RM9200 boards
#
diff --git a/tcl/interface/beaglebone-jtag-native.cfg b/tcl/interface/beaglebone-jtag-native.cfg
index cd32ca4..0240e5d 100644
--- a/tcl/interface/beaglebone-jtag-native.cfg
+++ b/tcl/interface/beaglebone-jtag-native.cfg
@@ -16,13 +16,21 @@ adapter driver am335xgpio
# am335xgpio speed SPEED_COEFF SPEED_OFFSET
am335xgpio speed_coeffs 600000 575
-am335xgpio tdo_num 20
-am335xgpio tdi_num 60
-am335xgpio tms_num 4
-am335xgpio tck_num 2
+# BeagleBone pin P9_41
+adapter gpio tdo 20 -chip 0
-am335xgpio led_num 51
-am335xgpio led_on_state on
+# BeagleBone pin P9_12
+adapter gpio tdi 28 -chip 1
-am335xgpio srst_num 65
+# BeagleBone pin P9_18
+adapter gpio tms 4 -chip 0
+
+# BeagleBone pin P9_22
+adapter gpio tck 2 -chip 0
+
+# BeagleBone pin P9_16
+adapter gpio led 19 -chip 1
+
+# BeagleBone pin P8_18
+adapter gpio srst 1 -chip 2
reset_config srst_only srst_push_pull
diff --git a/tcl/interface/beaglebone-swd-native.cfg b/tcl/interface/beaglebone-swd-native.cfg
index f7bff6e..6c40849 100644
--- a/tcl/interface/beaglebone-swd-native.cfg
+++ b/tcl/interface/beaglebone-swd-native.cfg
@@ -16,14 +16,18 @@ adapter driver am335xgpio
# am335xgpio speed SPEED_COEFF SPEED_OFFSET
am335xgpio speed_coeffs 600000 575
-am335xgpio swclk_num 2
-am335xgpio swdio_num 4
-am335xgpio swdio_dir_num 60
-am335xgpio swdio_dir_output_state on
+# BeagleBone pin P9_22
+adapter gpio swclk 2 -chip 0
+
+# BeagleBone pin P9_18
+adapter gpio swdio 4 -chip 0
+
+# BeagleBone pin P9_12
+adapter gpio swdio_dir 28 -chip 1
# USR0 LED
-am335xgpio led_num 53
-am335xgpio led_on_state on
+adapter gpio led 21 -chip 1
-am335xgpio srst_num 65
+# BeagleBone pin P8_18
+adapter gpio srst 1 -chip 2
reset_config srst_only srst_push_pull
diff --git a/tcl/interface/buspirate.cfg b/tcl/interface/buspirate.cfg
index 20761d1..8f613a7 100644
--- a/tcl/interface/buspirate.cfg
+++ b/tcl/interface/buspirate.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Buspirate with OpenOCD support
#
diff --git a/tcl/interface/calao-usb-a9260.cfg b/tcl/interface/calao-usb-a9260.cfg
index 01b426b..ff652ef 100644
--- a/tcl/interface/calao-usb-a9260.cfg
+++ b/tcl/interface/calao-usb-a9260.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# CALAO Systems USB-A9260 common -C01 -C02 setup
#
diff --git a/tcl/interface/chameleon.cfg b/tcl/interface/chameleon.cfg
index 97bf98d..b73d129 100644
--- a/tcl/interface/chameleon.cfg
+++ b/tcl/interface/chameleon.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Amontec Chameleon POD
#
diff --git a/tcl/interface/cmsis-dap.cfg b/tcl/interface/cmsis-dap.cfg
index 1bc91a5..15efe80 100644
--- a/tcl/interface/cmsis-dap.cfg
+++ b/tcl/interface/cmsis-dap.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# ARM CMSIS-DAP compliant adapter
#
diff --git a/tcl/interface/dln-2-gpiod.cfg b/tcl/interface/dln-2-gpiod.cfg
index cd6061f..c9e3388 100644
--- a/tcl/interface/dln-2-gpiod.cfg
+++ b/tcl/interface/dln-2-gpiod.cfg
@@ -17,11 +17,14 @@
adapter driver linuxgpiod
-linuxgpiod gpiochip 0
-linuxgpiod jtag_nums 2 3 4 1
-linuxgpiod trst_num 5
-linuxgpiod swd_nums 2 3
-linuxgpiod srst_num 0
-linuxgpiod led_num 6
+adapter gpio srst 0 -chip 0
+adapter gpio tdo 1 -chip 0
+adapter gpio tck 2 -chip 0
+adapter gpio swclk 2 -chip 0
+adapter gpio tms 3 -chip 0
+adapter gpio swdio 3 -chip 0
+adapter gpio tdi 4 -chip 0
+adapter gpio trst 5 -chip 0
+adapter gpio led 6 -chip 0
reset_config trst_and_srst separate srst_push_pull
diff --git a/tcl/interface/dummy.cfg b/tcl/interface/dummy.cfg
index 154c872..34e6558 100644
--- a/tcl/interface/dummy.cfg
+++ b/tcl/interface/dummy.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Dummy interface (for testing purposes)
#
diff --git a/tcl/interface/esp_usb_bridge.cfg b/tcl/interface/esp_usb_bridge.cfg
new file mode 100644
index 0000000..9342239
--- /dev/null
+++ b/tcl/interface/esp_usb_bridge.cfg
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# ESP USB Bridge jtag adapter
+#
+
+adapter driver esp_usb_jtag
+
+espusbjtag vid_pid 0x303a 0x1002
+espusbjtag caps_descriptor 0x030A # string descriptor index:10
diff --git a/tcl/interface/estick.cfg b/tcl/interface/estick.cfg
index 75e6ea8..1daaf7c 100644
--- a/tcl/interface/estick.cfg
+++ b/tcl/interface/estick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# eStick
#
diff --git a/tcl/interface/flashlink.cfg b/tcl/interface/flashlink.cfg
index b7ec0bb..d552c50 100644
--- a/tcl/interface/flashlink.cfg
+++ b/tcl/interface/flashlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# ST FlashLINK JTAG parallel cable
#
diff --git a/tcl/interface/ft232r.cfg b/tcl/interface/ft232r.cfg
index 2c705c3..94eed02 100644
--- a/tcl/interface/ft232r.cfg
+++ b/tcl/interface/ft232r.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter driver ft232r
adapter speed 1000
diff --git a/tcl/interface/ft232r/radiona_ulx3s.cfg b/tcl/interface/ft232r/radiona_ulx3s.cfg
index 424777e..3fc3d71 100644
--- a/tcl/interface/ft232r/radiona_ulx3s.cfg
+++ b/tcl/interface/ft232r/radiona_ulx3s.cfg
@@ -7,10 +7,10 @@
adapter driver ft232r
adapter speed 1000
-ft232r_vid_pid 0x0403 0x6015
-ft232r_tck_num DSR
-ft232r_tms_num DCD
-ft232r_tdi_num RI
-ft232r_tdo_num CTS
-ft232r_trst_num RTS
-ft232r_srst_num DTR
+ft232r vid_pid 0x0403 0x6015
+ft232r tck_num DSR
+ft232r tms_num DCD
+ft232r tdi_num RI
+ft232r tdo_num CTS
+ft232r trst_num RTS
+ft232r srst_num DTR
diff --git a/tcl/interface/ftdi/100ask-openjtag.cfg b/tcl/interface/ftdi/100ask-openjtag.cfg
index a12df97..5ab9252 100644
--- a/tcl/interface/ftdi/100ask-openjtag.cfg
+++ b/tcl/interface/ftdi/100ask-openjtag.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# www.100ask.org OpenJTAG
#
diff --git a/tcl/interface/ftdi/axm0432.cfg b/tcl/interface/ftdi/axm0432.cfg
index 84b77a6..5008399 100644
--- a/tcl/interface/ftdi/axm0432.cfg
+++ b/tcl/interface/ftdi/axm0432.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Axiom axm0432
#
diff --git a/tcl/interface/ftdi/c232hm.cfg b/tcl/interface/ftdi/c232hm.cfg
index 25fcae1..23c8f3a 100644
--- a/tcl/interface/ftdi/c232hm.cfg
+++ b/tcl/interface/ftdi/c232hm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# FTDI USB Hi-Speed to MPSSE Cable
#
# http://www.ftdichip.com/Products/Cables/USBMPSSE.htm
diff --git a/tcl/interface/ftdi/calao-usb-a9260-c01.cfg b/tcl/interface/ftdi/calao-usb-a9260-c01.cfg
index 41e5973..c84e778 100644
--- a/tcl/interface/ftdi/calao-usb-a9260-c01.cfg
+++ b/tcl/interface/ftdi/calao-usb-a9260-c01.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# CALAO Systems USB-A9260-C01
#
diff --git a/tcl/interface/ftdi/calao-usb-a9260-c02.cfg b/tcl/interface/ftdi/calao-usb-a9260-c02.cfg
index 001aef5..9d79b26 100644
--- a/tcl/interface/ftdi/calao-usb-a9260-c02.cfg
+++ b/tcl/interface/ftdi/calao-usb-a9260-c02.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# CALAO Systems USB-A9260-C02
#
diff --git a/tcl/interface/ftdi/cortino.cfg b/tcl/interface/ftdi/cortino.cfg
index c0eae31..8bc8d6e 100644
--- a/tcl/interface/ftdi/cortino.cfg
+++ b/tcl/interface/ftdi/cortino.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hitex Cortino
#
diff --git a/tcl/interface/ftdi/digilent-hs1.cfg b/tcl/interface/ftdi/digilent-hs1.cfg
index 55391b9..6a632ed 100644
--- a/tcl/interface/ftdi/digilent-hs1.cfg
+++ b/tcl/interface/ftdi/digilent-hs1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# this supports JTAG-HS1 and JTAG-SMT1
# (the later being the OEM on-board version)
diff --git a/tcl/interface/ftdi/digilent-hs2.cfg b/tcl/interface/ftdi/digilent-hs2.cfg
index 269eca0..e9fe94e 100644
--- a/tcl/interface/ftdi/digilent-hs2.cfg
+++ b/tcl/interface/ftdi/digilent-hs2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# this supports JTAG-HS2 (and apparently Nexys4 as well)
adapter driver ftdi
diff --git a/tcl/interface/ftdi/digilent_jtag_hs3.cfg b/tcl/interface/ftdi/digilent_jtag_hs3.cfg
index ca2807f..78a233f 100644
--- a/tcl/interface/ftdi/digilent_jtag_hs3.cfg
+++ b/tcl/interface/ftdi/digilent_jtag_hs3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Digilent JTAG-HS3
#
diff --git a/tcl/interface/ftdi/digilent_jtag_smt2.cfg b/tcl/interface/ftdi/digilent_jtag_smt2.cfg
index f4ba27b..ac623a7 100644
--- a/tcl/interface/ftdi/digilent_jtag_smt2.cfg
+++ b/tcl/interface/ftdi/digilent_jtag_smt2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Digilent JTAG-SMT2
#
diff --git a/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg b/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg
index a143cd7..38236bc 100644
--- a/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg
+++ b/tcl/interface/ftdi/digilent_jtag_smt2_nc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Digilent JTAG-SMT2-NC
#
diff --git a/tcl/interface/ftdi/dlp-usb1232h.cfg b/tcl/interface/ftdi/dlp-usb1232h.cfg
index e9651dd..67fee6b 100644
--- a/tcl/interface/ftdi/dlp-usb1232h.cfg
+++ b/tcl/interface/ftdi/dlp-usb1232h.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# DLP Design DLP-USB1232H USB-to-UART/FIFO interface module
#
diff --git a/tcl/interface/ftdi/dp_busblaster.cfg b/tcl/interface/ftdi/dp_busblaster.cfg
index 420f788..373e122 100644
--- a/tcl/interface/ftdi/dp_busblaster.cfg
+++ b/tcl/interface/ftdi/dp_busblaster.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Dangerous Prototypes - Bus Blaster
#
diff --git a/tcl/interface/ftdi/dp_busblaster_kt-link.cfg b/tcl/interface/ftdi/dp_busblaster_kt-link.cfg
index 4924d26..222ca38 100644
--- a/tcl/interface/ftdi/dp_busblaster_kt-link.cfg
+++ b/tcl/interface/ftdi/dp_busblaster_kt-link.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Dangerous Prototypes - Bus Blaster (with KT-Link buffer)
#
diff --git a/tcl/interface/ftdi/esp32_devkitj_v1.cfg b/tcl/interface/ftdi/esp32_devkitj_v1.cfg
new file mode 100644
index 0000000..1b455a9
--- /dev/null
+++ b/tcl/interface/ftdi/esp32_devkitj_v1.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Driver for the FT2232H JTAG chip on the Espressif DevkitJ board
+# (and most other FT2232H and FT232H based boards)
+#
+
+adapter driver ftdi
+ftdi vid_pid 0x0403 0x6010 0x0403 0x6014
+
+# interface 1 is the uart
+ftdi channel 0
+
+# TCK, TDI, TDO, TMS: ADBUS0-3
+# LEDs: ACBUS4-7
+
+ftdi layout_init 0x0008 0xf00b
+ftdi layout_signal LED -data 0x1000
+ftdi layout_signal LED2 -data 0x2000
+ftdi layout_signal LED3 -data 0x4000
+ftdi layout_signal LED4 -data 0x8000
+
+# ESP32 series chips do not have a TRST input, and the SRST line is connected to the EN pin.
+# The target code doesn't handle SRST reset properly yet, so this is commented out:
+# ftdi layout_signal nSRST -oe 0x0020
+# reset_config srst_only
diff --git a/tcl/interface/ftdi/flossjtag-noeeprom.cfg b/tcl/interface/ftdi/flossjtag-noeeprom.cfg
index 7083e63..1008e1a 100644
--- a/tcl/interface/ftdi/flossjtag-noeeprom.cfg
+++ b/tcl/interface/ftdi/flossjtag-noeeprom.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# FlossJTAG
#
diff --git a/tcl/interface/ftdi/flossjtag.cfg b/tcl/interface/ftdi/flossjtag.cfg
index c1506a2..90ba63a 100644
--- a/tcl/interface/ftdi/flossjtag.cfg
+++ b/tcl/interface/ftdi/flossjtag.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# FlossJTAG
#
diff --git a/tcl/interface/ftdi/flyswatter.cfg b/tcl/interface/ftdi/flyswatter.cfg
index bfa015b..8bce00d 100644
--- a/tcl/interface/ftdi/flyswatter.cfg
+++ b/tcl/interface/ftdi/flyswatter.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TinCanTools Flyswatter
#
diff --git a/tcl/interface/ftdi/flyswatter2.cfg b/tcl/interface/ftdi/flyswatter2.cfg
index 0b4a8ef..ebc00fe 100644
--- a/tcl/interface/ftdi/flyswatter2.cfg
+++ b/tcl/interface/ftdi/flyswatter2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TinCanTools Flyswatter2
#
diff --git a/tcl/interface/ftdi/ft232h-module-swd.cfg b/tcl/interface/ftdi/ft232h-module-swd.cfg
index 7fa4283..d09ccf1 100644
--- a/tcl/interface/ftdi/ft232h-module-swd.cfg
+++ b/tcl/interface/ftdi/ft232h-module-swd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# ADAFRUIT FTDI FT232H as a SWD direct connect interface
# Any FT232H based board may work
diff --git a/tcl/interface/ftdi/gw16042.cfg b/tcl/interface/ftdi/gw16042.cfg
index ef31829..326a88f 100644
--- a/tcl/interface/ftdi/gw16042.cfg
+++ b/tcl/interface/ftdi/gw16042.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Gateworks GW16042 JTAG Dongle
#
diff --git a/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg b/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg
index d55f636..d5d24e5 100644
--- a/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg
+++ b/tcl/interface/ftdi/hilscher_nxhx10_etm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hilscher NXHX 10-ETM
#
diff --git a/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg b/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg
index 8c79815..003b9df 100644
--- a/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg
+++ b/tcl/interface/ftdi/hilscher_nxhx500_etm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hilscher NXHX 500-ETM
#
diff --git a/tcl/interface/ftdi/hilscher_nxhx500_re.cfg b/tcl/interface/ftdi/hilscher_nxhx500_re.cfg
index 9aa2cd5..97ad380 100644
--- a/tcl/interface/ftdi/hilscher_nxhx500_re.cfg
+++ b/tcl/interface/ftdi/hilscher_nxhx500_re.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hilscher NXHX 500-RE
#
diff --git a/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg b/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg
index a64d0e8..06280c1 100644
--- a/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg
+++ b/tcl/interface/ftdi/hilscher_nxhx50_etm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hilscher NXHX 50-ETM
#
diff --git a/tcl/interface/ftdi/hilscher_nxhx50_re.cfg b/tcl/interface/ftdi/hilscher_nxhx50_re.cfg
index 2778836..f14be62 100644
--- a/tcl/interface/ftdi/hilscher_nxhx50_re.cfg
+++ b/tcl/interface/ftdi/hilscher_nxhx50_re.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hilscher NXHX 50-RE
#
diff --git a/tcl/interface/ftdi/hitex_lpc1768stick.cfg b/tcl/interface/ftdi/hitex_lpc1768stick.cfg
index 87affe8..91bd5a8 100644
--- a/tcl/interface/ftdi/hitex_lpc1768stick.cfg
+++ b/tcl/interface/ftdi/hitex_lpc1768stick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hitex LPC1768-Stick
#
diff --git a/tcl/interface/ftdi/hitex_str9-comstick.cfg b/tcl/interface/ftdi/hitex_str9-comstick.cfg
index 6490d65..f698677 100644
--- a/tcl/interface/ftdi/hitex_str9-comstick.cfg
+++ b/tcl/interface/ftdi/hitex_str9-comstick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hitex STR9-comStick
#
diff --git a/tcl/interface/ftdi/icebear.cfg b/tcl/interface/ftdi/icebear.cfg
index 76b2102..4a76399 100644
--- a/tcl/interface/ftdi/icebear.cfg
+++ b/tcl/interface/ftdi/icebear.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Section5 ICEBear
#
diff --git a/tcl/interface/ftdi/imx8mp-evk.cfg b/tcl/interface/ftdi/imx8mp-evk.cfg
index 64f3f3d..02564dc 100644
--- a/tcl/interface/ftdi/imx8mp-evk.cfg
+++ b/tcl/interface/ftdi/imx8mp-evk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Configuration file for NXP MC-IMX8MP-EVK on-board internal JTAG
#
diff --git a/tcl/interface/ftdi/incircuit-icprog.cfg b/tcl/interface/ftdi/incircuit-icprog.cfg
index a200954..81f2872 100644
--- a/tcl/interface/ftdi/incircuit-icprog.cfg
+++ b/tcl/interface/ftdi/incircuit-icprog.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# In-Circuit's ICprog OpenOCD JTAG Adapter
# https://shop.in-circuit.de/product_info.php?products_id=112
diff --git a/tcl/interface/ftdi/iotlab-usb.cfg b/tcl/interface/ftdi/iotlab-usb.cfg
index 92ffa84..b7a004e 100644
--- a/tcl/interface/ftdi/iotlab-usb.cfg
+++ b/tcl/interface/ftdi/iotlab-usb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This is the integrated adapter as found on the IoT-LAB boards
# https://github.com/iot-lab/iot-lab/wiki
diff --git a/tcl/interface/ftdi/isodebug.cfg b/tcl/interface/ftdi/isodebug.cfg
index 0189989..0a6e080 100644
--- a/tcl/interface/ftdi/isodebug.cfg
+++ b/tcl/interface/ftdi/isodebug.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# isodebug v1
# 5 kV isolated JTAG/SWD + UART adapter by Unjo AB
diff --git a/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg b/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg
index 3eefecf..ea60dcf 100644
--- a/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg
+++ b/tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# DISTORTEC JTAG-lock-pick Tiny 2
#
diff --git a/tcl/interface/ftdi/jtagkey.cfg b/tcl/interface/ftdi/jtagkey.cfg
index 511244b..1c1c09d 100644
--- a/tcl/interface/ftdi/jtagkey.cfg
+++ b/tcl/interface/ftdi/jtagkey.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Amontec JTAGkey
#
diff --git a/tcl/interface/ftdi/jtagkey2.cfg b/tcl/interface/ftdi/jtagkey2.cfg
index aa33a75..80df347 100644
--- a/tcl/interface/ftdi/jtagkey2.cfg
+++ b/tcl/interface/ftdi/jtagkey2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Amontec JTAGkey2
#
diff --git a/tcl/interface/ftdi/jtagkey2p.cfg b/tcl/interface/ftdi/jtagkey2p.cfg
index dbfca66..3a76bd0 100644
--- a/tcl/interface/ftdi/jtagkey2p.cfg
+++ b/tcl/interface/ftdi/jtagkey2p.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Amontec JTAGkey2P
#
diff --git a/tcl/interface/ftdi/kt-link.cfg b/tcl/interface/ftdi/kt-link.cfg
index 112ecf1..61c6b83 100644
--- a/tcl/interface/ftdi/kt-link.cfg
+++ b/tcl/interface/ftdi/kt-link.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Kristech KT-Link
#
diff --git a/tcl/interface/ftdi/lisa-l.cfg b/tcl/interface/ftdi/lisa-l.cfg
index 3da64a0..75c5cbe 100644
--- a/tcl/interface/ftdi/lisa-l.cfg
+++ b/tcl/interface/ftdi/lisa-l.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Lisa/L
#
diff --git a/tcl/interface/ftdi/luminary-icdi.cfg b/tcl/interface/ftdi/luminary-icdi.cfg
index 08676a3..9142503 100644
--- a/tcl/interface/ftdi/luminary-icdi.cfg
+++ b/tcl/interface/ftdi/luminary-icdi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Luminary Micro Stellaris LM3S9B9x Evaluation Kits
# In-Circuit Debug Interface (ICDI) Board
diff --git a/tcl/interface/ftdi/luminary-lm3s811.cfg b/tcl/interface/ftdi/luminary-lm3s811.cfg
index 90f454e..98be166 100644
--- a/tcl/interface/ftdi/luminary-lm3s811.cfg
+++ b/tcl/interface/ftdi/luminary-lm3s811.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Luminary Micro Stellaris LM3S811 Evaluation Kit
#
diff --git a/tcl/interface/ftdi/luminary.cfg b/tcl/interface/ftdi/luminary.cfg
index 3258b21..27d9a9d 100644
--- a/tcl/interface/ftdi/luminary.cfg
+++ b/tcl/interface/ftdi/luminary.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Luminary Micro Stellaris Evaluation Kits
#
diff --git a/tcl/interface/ftdi/m53evk.cfg b/tcl/interface/ftdi/m53evk.cfg
index 2b7c434..2d9c304 100644
--- a/tcl/interface/ftdi/m53evk.cfg
+++ b/tcl/interface/ftdi/m53evk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# DENX M53EVK
#
diff --git a/tcl/interface/ftdi/mbftdi.cfg b/tcl/interface/ftdi/mbftdi.cfg
index a34390b..09cec9f 100644
--- a/tcl/interface/ftdi/mbftdi.cfg
+++ b/tcl/interface/ftdi/mbftdi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# MBFTDI
#
diff --git a/tcl/interface/ftdi/minimodule-swd.cfg b/tcl/interface/ftdi/minimodule-swd.cfg
index 15b007a..3eb2f53 100644
--- a/tcl/interface/ftdi/minimodule-swd.cfg
+++ b/tcl/interface/ftdi/minimodule-swd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Supports SWD using the FT2232H or FT4232H minimodule.
# Each can support 2 SWD interfaces.
diff --git a/tcl/interface/ftdi/minimodule.cfg b/tcl/interface/ftdi/minimodule.cfg
index 6b2d60c..825d7c1 100644
--- a/tcl/interface/ftdi/minimodule.cfg
+++ b/tcl/interface/ftdi/minimodule.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# FTDI MiniModule
#
diff --git a/tcl/interface/ftdi/minispartan6.cfg b/tcl/interface/ftdi/minispartan6.cfg
index faf820d..f12bae6 100644
--- a/tcl/interface/ftdi/minispartan6.cfg
+++ b/tcl/interface/ftdi/minispartan6.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# https://www.scarabhardware.com/minispartan6/
# https://github.com/scarabhardware/miniSpartan6-plus/raw/master/miniSpartan6%2B_Rev_B.pdf
adapter driver ftdi
diff --git a/tcl/interface/ftdi/neodb.cfg b/tcl/interface/ftdi/neodb.cfg
index 426f5c4..d3b3541 100644
--- a/tcl/interface/ftdi/neodb.cfg
+++ b/tcl/interface/ftdi/neodb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Openmoko USB JTAG/RS232 adapter
#
diff --git a/tcl/interface/ftdi/ngxtech.cfg b/tcl/interface/ftdi/ngxtech.cfg
index 962f25b..635333f 100644
--- a/tcl/interface/ftdi/ngxtech.cfg
+++ b/tcl/interface/ftdi/ngxtech.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NGX ARM USB JTAG
#
diff --git a/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg b/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg
index ace0df9..6aa13af 100644
--- a/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg
+++ b/tcl/interface/ftdi/olimex-arm-jtag-swd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex ARM JTAG SWD adapter
# https://www.olimex.com/Products/ARM/JTAG/ARM-JTAG-SWD/
diff --git a/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg b/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg
index ca014a4..cd11ad8 100644
--- a/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg
+++ b/tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex ARM-USB-OCD-H
#
diff --git a/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg b/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg
index 6b92575..d2261e2 100644
--- a/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg
+++ b/tcl/interface/ftdi/olimex-arm-usb-ocd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex ARM-USB-OCD
#
diff --git a/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg b/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg
index 98fe367..a2b3e3e 100644
--- a/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg
+++ b/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex ARM-USB-TINY-H
#
diff --git a/tcl/interface/ftdi/olimex-jtag-tiny.cfg b/tcl/interface/ftdi/olimex-jtag-tiny.cfg
index ebca496..7d8e81d 100644
--- a/tcl/interface/ftdi/olimex-jtag-tiny.cfg
+++ b/tcl/interface/ftdi/olimex-jtag-tiny.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Olimex ARM-USB-TINY
#
diff --git a/tcl/interface/ftdi/oocdlink.cfg b/tcl/interface/ftdi/oocdlink.cfg
index 367112a..0e99b67 100644
--- a/tcl/interface/ftdi/oocdlink.cfg
+++ b/tcl/interface/ftdi/oocdlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Joern Kaipf's OOCDLink
#
diff --git a/tcl/interface/ftdi/opendous_ftdi.cfg b/tcl/interface/ftdi/opendous_ftdi.cfg
index f212bf5..5d6f5ae 100644
--- a/tcl/interface/ftdi/opendous_ftdi.cfg
+++ b/tcl/interface/ftdi/opendous_ftdi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Opendous
#
diff --git a/tcl/interface/ftdi/openocd-usb-hs.cfg b/tcl/interface/ftdi/openocd-usb-hs.cfg
index d1a3ff0..af1f61c 100644
--- a/tcl/interface/ftdi/openocd-usb-hs.cfg
+++ b/tcl/interface/ftdi/openocd-usb-hs.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# embedded projects openocd usb adapter v3
#
diff --git a/tcl/interface/ftdi/openocd-usb.cfg b/tcl/interface/ftdi/openocd-usb.cfg
index 620d204..c333d65 100644
--- a/tcl/interface/ftdi/openocd-usb.cfg
+++ b/tcl/interface/ftdi/openocd-usb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hubert Hoegl's USB to JTAG
#
diff --git a/tcl/interface/ftdi/openrd.cfg b/tcl/interface/ftdi/openrd.cfg
index 88b2a6e..b6b2d1d 100644
--- a/tcl/interface/ftdi/openrd.cfg
+++ b/tcl/interface/ftdi/openrd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Marvell OpenRD
#
diff --git a/tcl/interface/ftdi/pipistrello.cfg b/tcl/interface/ftdi/pipistrello.cfg
index 11fcf07..29ecd12 100644
--- a/tcl/interface/ftdi/pipistrello.cfg
+++ b/tcl/interface/ftdi/pipistrello.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# http://pipistrello.saanlima.com/
# http://www.saanlima.com/download/pipistrello-v2.0/pipistrello_v2_schematic.pdf
adapter driver ftdi
diff --git a/tcl/interface/ftdi/redbee-econotag.cfg b/tcl/interface/ftdi/redbee-econotag.cfg
index 35bedfa..d0d3d83 100644
--- a/tcl/interface/ftdi/redbee-econotag.cfg
+++ b/tcl/interface/ftdi/redbee-econotag.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Redwire Redbee-Econotag
#
diff --git a/tcl/interface/ftdi/redbee-usb.cfg b/tcl/interface/ftdi/redbee-usb.cfg
index a571766..9880553 100644
--- a/tcl/interface/ftdi/redbee-usb.cfg
+++ b/tcl/interface/ftdi/redbee-usb.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Redwire Redbee-USB
#
diff --git a/tcl/interface/ftdi/rowley-cc-arm-swd.cfg b/tcl/interface/ftdi/rowley-cc-arm-swd.cfg
index fb416db..585d589 100644
--- a/tcl/interface/ftdi/rowley-cc-arm-swd.cfg
+++ b/tcl/interface/ftdi/rowley-cc-arm-swd.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Rowley ARM SWD Adapter
# http://sites.fastspring.com/rowley/product/armswdadapter
diff --git a/tcl/interface/ftdi/sheevaplug.cfg b/tcl/interface/ftdi/sheevaplug.cfg
index 5929453..29c8688 100644
--- a/tcl/interface/ftdi/sheevaplug.cfg
+++ b/tcl/interface/ftdi/sheevaplug.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Marvel SheevaPlug Development Kit
#
diff --git a/tcl/interface/ftdi/signalyzer-lite.cfg b/tcl/interface/ftdi/signalyzer-lite.cfg
index 9e010d3..e6c3839 100644
--- a/tcl/interface/ftdi/signalyzer-lite.cfg
+++ b/tcl/interface/ftdi/signalyzer-lite.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Xverve Signalyzer LITE (DT-USB-SLITE)
#
diff --git a/tcl/interface/ftdi/signalyzer.cfg b/tcl/interface/ftdi/signalyzer.cfg
index d94c6bc..fa7a7ed 100644
--- a/tcl/interface/ftdi/signalyzer.cfg
+++ b/tcl/interface/ftdi/signalyzer.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Xverve Signalyzer Tool (DT-USB-ST)
#
diff --git a/tcl/interface/ftdi/snps_sdp.cfg b/tcl/interface/ftdi/snps_sdp.cfg
index 7bd8387..eb2aecc 100644
--- a/tcl/interface/ftdi/snps_sdp.cfg
+++ b/tcl/interface/ftdi/snps_sdp.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Synopsys SDP Mainboard has embdded FT2232 chip, which is similar to Digilent
diff --git a/tcl/interface/ftdi/stm32-stick.cfg b/tcl/interface/ftdi/stm32-stick.cfg
index fd877ec..1d72d20 100644
--- a/tcl/interface/ftdi/stm32-stick.cfg
+++ b/tcl/interface/ftdi/stm32-stick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Hitex STM32-PerformanceStick
#
diff --git a/tcl/interface/ftdi/swd-resistor-hack.cfg b/tcl/interface/ftdi/swd-resistor-hack.cfg
index 5bdb87c..d9e7158 100644
--- a/tcl/interface/ftdi/swd-resistor-hack.cfg
+++ b/tcl/interface/ftdi/swd-resistor-hack.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Connect TDI to SWDIO via a suitable series resistor (220-470 Ohm or
# so depending on the drive capability of the target and adapter);
diff --git a/tcl/interface/ftdi/ti-icdi.cfg b/tcl/interface/ftdi/ti-icdi.cfg
index f6e16be..964de76 100644
--- a/tcl/interface/ftdi/ti-icdi.cfg
+++ b/tcl/interface/ftdi/ti-icdi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This is an FTDI-based debugging solution as found on some TI boards,
# e.g. CC3200 LaunchPad.
diff --git a/tcl/interface/ftdi/tumpa-lite.cfg b/tcl/interface/ftdi/tumpa-lite.cfg
index 625db16..e3f12e3 100644
--- a/tcl/interface/ftdi/tumpa-lite.cfg
+++ b/tcl/interface/ftdi/tumpa-lite.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TIAO USB Multi-Protocol Adapter (TUMPA) Lite
#
diff --git a/tcl/interface/ftdi/tumpa.cfg b/tcl/interface/ftdi/tumpa.cfg
index 4491c40..db4311b 100644
--- a/tcl/interface/ftdi/tumpa.cfg
+++ b/tcl/interface/ftdi/tumpa.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TIAO USB Multi-Protocol Adapter (TUMPA)
#
diff --git a/tcl/interface/ftdi/turtelizer2-revB.cfg b/tcl/interface/ftdi/turtelizer2-revB.cfg
index 593a545..f90fc58 100644
--- a/tcl/interface/ftdi/turtelizer2-revB.cfg
+++ b/tcl/interface/ftdi/turtelizer2-revB.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# egnite Turtelizer 2 rev B (with SRST only)
#
diff --git a/tcl/interface/ftdi/turtelizer2-revC.cfg b/tcl/interface/ftdi/turtelizer2-revC.cfg
index 6e19259..94617a1 100644
--- a/tcl/interface/ftdi/turtelizer2-revC.cfg
+++ b/tcl/interface/ftdi/turtelizer2-revC.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# egnite Turtelizer 2 revC (with TRST and SRST)
#
diff --git a/tcl/interface/ftdi/um232h.cfg b/tcl/interface/ftdi/um232h.cfg
index 10f267d..6be08b5 100644
--- a/tcl/interface/ftdi/um232h.cfg
+++ b/tcl/interface/ftdi/um232h.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# FTDI UM232H as a JTAG interface
#
diff --git a/tcl/interface/ftdi/vpaclink.cfg b/tcl/interface/ftdi/vpaclink.cfg
index 7e7f257..ff508f2 100644
--- a/tcl/interface/ftdi/vpaclink.cfg
+++ b/tcl/interface/ftdi/vpaclink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Voipac VPACLink
#
diff --git a/tcl/interface/ftdi/xds100v2.cfg b/tcl/interface/ftdi/xds100v2.cfg
index bda8781..373df4f 100644
--- a/tcl/interface/ftdi/xds100v2.cfg
+++ b/tcl/interface/ftdi/xds100v2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments XDS100v2
#
diff --git a/tcl/interface/ftdi/xds100v3.cfg b/tcl/interface/ftdi/xds100v3.cfg
index 43a11bd..dc72233 100644
--- a/tcl/interface/ftdi/xds100v3.cfg
+++ b/tcl/interface/ftdi/xds100v3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments XDS100 ver 3.0
#
diff --git a/tcl/interface/ftdi/xt_kc705_ml605.cfg b/tcl/interface/ftdi/xt_kc705_ml605.cfg
new file mode 100644
index 0000000..dda8c0a
--- /dev/null
+++ b/tcl/interface/ftdi/xt_kc705_ml605.cfg
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Xilinx KC705 / ML605 with Xtensa daughtercard; onboard USB/FT2232
+#
+
+adapter driver ftdi
+ftdi vid_pid 0x0403 0x6010
+# Specify "adapter serial <identifier>" here as needed
+
+ftdi layout_init 0x0010 0x007b
+ftdi layout_signal nTRST -data 0x0010
+ftdi layout_signal nSRST -ndata 0x0020
diff --git a/tcl/interface/imx-native.cfg b/tcl/interface/imx-native.cfg
index 9e1f38d..01e42e3 100644
--- a/tcl/interface/imx-native.cfg
+++ b/tcl/interface/imx-native.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Config for using NXP IMX CPU
#
diff --git a/tcl/interface/jlink.cfg b/tcl/interface/jlink.cfg
index f9a18b0..181c2cc 100644
--- a/tcl/interface/jlink.cfg
+++ b/tcl/interface/jlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# SEGGER J-Link
#
diff --git a/tcl/interface/jtag_dpi.cfg b/tcl/interface/jtag_dpi.cfg
index a92e131..225d4d5 100644
--- a/tcl/interface/jtag_dpi.cfg
+++ b/tcl/interface/jtag_dpi.cfg
@@ -1,22 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Provide support for the Cadence JTAG BFM
#
# Copyright (c) 2020, Ampere Computing LLC
#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program;
-#
-#
adapter driver jtag_dpi
diff --git a/tcl/interface/jtag_hat_rpi2.cfg b/tcl/interface/jtag_hat_rpi2.cfg
index 495ff0f..cd1cbfb 100644
--- a/tcl/interface/jtag_hat_rpi2.cfg
+++ b/tcl/interface/jtag_hat_rpi2.cfg
@@ -7,31 +7,35 @@
adapter driver bcm2835gpio
-bcm2835gpio_peripheral_base 0x3F000000
+bcm2835gpio peripheral_base 0x3F000000
# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
# These depend on system clock, calibrated for stock 700MHz
# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio_speed_coeffs 146203 36
+bcm2835gpio speed_coeffs 146203 36
# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
# Header pin numbers: 23 22 19 21
-bcm2835gpio_jtag_nums 11 25 10 9
+adapter gpio tck -chip 0 11
+adapter gpio tms -chip 0 25
+adapter gpio tdi -chip 0 10
+adapter gpio tdo -chip 0 9
# Each of the SWD lines need a gpio number set: swclk swdio
# Header pin numbers: 23 22
-bcm2835gpio_swd_nums 11 25
+adapter gpio swclk -chip 0 11
+adapter gpio swdio -chip 0 25
# Direction pin for SWDIO level shifting buffer
-bcm2835gpio_swdio_dir_num 6
+adapter gpio swdio_dir -chip 0 6
# If you define trst or srst, use appropriate reset_config
# Header pin numbers: TRST - 26, SRST - 18
-bcm2835gpio_trst_num 7
+adapter gpio trst -chip 0 7
#reset_config trst_only
-bcm2835gpio_srst_num 24
+adapter gpio srst -chip 0 24
#reset_config srst_only
# or if you have both connected
diff --git a/tcl/interface/jtag_vpi.cfg b/tcl/interface/jtag_vpi.cfg
index f2f90f7..e8164ab 100644
--- a/tcl/interface/jtag_vpi.cfg
+++ b/tcl/interface/jtag_vpi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter driver jtag_vpi
# Set the VPI JTAG server port
diff --git a/tcl/interface/kitprog.cfg b/tcl/interface/kitprog.cfg
index 933a054..eb9ad98 100644
--- a/tcl/interface/kitprog.cfg
+++ b/tcl/interface/kitprog.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Cypress Semiconductor KitProg
#
diff --git a/tcl/interface/nds32-aice.cfg b/tcl/interface/nds32-aice.cfg
index fcc33ec..1d9717c 100644
--- a/tcl/interface/nds32-aice.cfg
+++ b/tcl/interface/nds32-aice.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Andes AICE
#
diff --git a/tcl/interface/nulink.cfg b/tcl/interface/nulink.cfg
index e49b36c..2a4bc0b 100644
--- a/tcl/interface/nulink.cfg
+++ b/tcl/interface/nulink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nuvoton Nu-Link in-circuit debugger/programmer
#
diff --git a/tcl/interface/opendous.cfg b/tcl/interface/opendous.cfg
index 23fddc6..9c5a804 100644
--- a/tcl/interface/opendous.cfg
+++ b/tcl/interface/opendous.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# opendous-jtag
#
diff --git a/tcl/interface/openjtag.cfg b/tcl/interface/openjtag.cfg
index 8d015b7..1602352 100644
--- a/tcl/interface/openjtag.cfg
+++ b/tcl/interface/openjtag.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# OpenJTAG
#
diff --git a/tcl/interface/osbdm.cfg b/tcl/interface/osbdm.cfg
index 6e88c07..e21848d 100644
--- a/tcl/interface/osbdm.cfg
+++ b/tcl/interface/osbdm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# P&E Micro OSBDM (aka OSJTAG) interface
#
diff --git a/tcl/interface/parport.cfg b/tcl/interface/parport.cfg
index 05195f0..b9fceeb 100644
--- a/tcl/interface/parport.cfg
+++ b/tcl/interface/parport.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Parallel port wiggler (many clones available) on port 0x378
#
diff --git a/tcl/interface/parport_dlc5.cfg b/tcl/interface/parport_dlc5.cfg
index 19e21ff..24acea7 100644
--- a/tcl/interface/parport_dlc5.cfg
+++ b/tcl/interface/parport_dlc5.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Xilinx Parallel Cable III 'DLC 5' (and various clones)
#
diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-native.cfg
index 634b8c9..02a3563 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-native.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Config for using Raspberry Pi's expansion header
#
@@ -19,19 +21,23 @@ bcm2835gpio speed_coeffs 113714 28
# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
# Header pin numbers: 23 22 19 21
-bcm2835gpio jtag_nums 11 25 10 9
+adapter gpio tck -chip 0 11
+adapter gpio tms -chip 0 25
+adapter gpio tdi -chip 0 10
+adapter gpio tdo -chip 0 9
# Each of the SWD lines need a gpio number set: swclk swdio
# Header pin numbers: 23 22
-bcm2835gpio swd_nums 11 25
+adapter gpio swclk -chip 0 11
+adapter gpio swdio -chip 0 25
# If you define trst or srst, use appropriate reset_config
# Header pin numbers: TRST - 26, SRST - 18
-# bcm2835gpio trst_num 7
+# adapter gpio trst -chip 0 7
# reset_config trst_only
-# bcm2835gpio srst_num 24
+# adapter gpio srst -chip 0 24
# reset_config srst_only srst_push_pull
# or if you have both connected,
diff --git a/tcl/interface/raspberrypi2-native.cfg b/tcl/interface/raspberrypi2-native.cfg
index 14c5771..5faabed 100644
--- a/tcl/interface/raspberrypi2-native.cfg
+++ b/tcl/interface/raspberrypi2-native.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Config for using Raspberry Pi's expansion header
#
@@ -19,19 +21,23 @@ bcm2835gpio speed_coeffs 146203 36
# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
# Header pin numbers: 23 22 19 21
-bcm2835gpio jtag_nums 11 25 10 9
+adapter gpio tck -chip 0 11
+adapter gpio tms -chip 0 25
+adapter gpio tdi -chip 0 10
+adapter gpio tdo -chip 0 9
# Each of the SWD lines need a gpio number set: swclk swdio
# Header pin numbers: 23 22
-bcm2835gpio swd_nums 11 25
+adapter gpio swclk -chip 0 11
+adapter gpio swdio -chip 0 25
# If you define trst or srst, use appropriate reset_config
# Header pin numbers: TRST - 26, SRST - 18
-# bcm2835gpio trst_num 7
+# adapter gpio trst -chip 0 7
# reset_config trst_only
-# bcm2835gpio srst_num 24
+# adapter gpio srst -chip 0 24
# reset_config srst_only srst_push_pull
# or if you have both connected,
diff --git a/tcl/interface/rlink.cfg b/tcl/interface/rlink.cfg
index 29d3ce5..7671a3b 100644
--- a/tcl/interface/rlink.cfg
+++ b/tcl/interface/rlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Raisonance RLink
#
diff --git a/tcl/interface/rshim.cfg b/tcl/interface/rshim.cfg
index accabf5..1d5da59 100644
--- a/tcl/interface/rshim.cfg
+++ b/tcl/interface/rshim.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# BlueField SoC in-circuit debugger/programmer
#
diff --git a/tcl/interface/stlink-dap.cfg b/tcl/interface/stlink-dap.cfg
index 5a7d2e9..5c24cbd 100644
--- a/tcl/interface/stlink-dap.cfg
+++ b/tcl/interface/stlink-dap.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# STMicroelectronics ST-LINK/V1, ST-LINK/V2, ST-LINK/V2-1, STLINK-V3 in-circuit
# debugger/programmer
diff --git a/tcl/interface/stlink-v1.cfg b/tcl/interface/stlink-v1.cfg
index 0004227..96ed088 100644
--- a/tcl/interface/stlink-v1.cfg
+++ b/tcl/interface/stlink-v1.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "WARNING: interface/stlink-v1.cfg is deprecated, please switch to interface/stlink.cfg"
source [find interface/stlink.cfg]
diff --git a/tcl/interface/stlink-v2-1.cfg b/tcl/interface/stlink-v2-1.cfg
index 62f37dc..d2baad4 100644
--- a/tcl/interface/stlink-v2-1.cfg
+++ b/tcl/interface/stlink-v2-1.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "WARNING: interface/stlink-v2-1.cfg is deprecated, please switch to interface/stlink.cfg"
source [find interface/stlink.cfg]
diff --git a/tcl/interface/stlink-v2.cfg b/tcl/interface/stlink-v2.cfg
index 070e469..400411e 100644
--- a/tcl/interface/stlink-v2.cfg
+++ b/tcl/interface/stlink-v2.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "WARNING: interface/stlink-v2.cfg is deprecated, please switch to interface/stlink.cfg"
source [find interface/stlink.cfg]
diff --git a/tcl/interface/stlink.cfg b/tcl/interface/stlink.cfg
index 8ac9b57..e4906b7 100644
--- a/tcl/interface/stlink.cfg
+++ b/tcl/interface/stlink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# STMicroelectronics ST-LINK/V1, ST-LINK/V2, ST-LINK/V2-1, STLINK-V3 in-circuit
# debugger/programmer
diff --git a/tcl/interface/sysfsgpio-raspberrypi.cfg b/tcl/interface/sysfsgpio-raspberrypi.cfg
index 0030560..d2095a9 100644
--- a/tcl/interface/sysfsgpio-raspberrypi.cfg
+++ b/tcl/interface/sysfsgpio-raspberrypi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Config for using RaspberryPi's expansion header
#
diff --git a/tcl/interface/ti-icdi.cfg b/tcl/interface/ti-icdi.cfg
index 5cf6e37..db4e1e0 100644
--- a/tcl/interface/ti-icdi.cfg
+++ b/tcl/interface/ti-icdi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Stellaris In-Circuit Debug Interface (ICDI) Board
#
diff --git a/tcl/interface/ulink.cfg b/tcl/interface/ulink.cfg
index 164b990..89a02e9 100644
--- a/tcl/interface/ulink.cfg
+++ b/tcl/interface/ulink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Keil ULINK running OpenULINK firmware.
#
diff --git a/tcl/interface/usb-jtag.cfg b/tcl/interface/usb-jtag.cfg
index bbfb076..039c748 100644
--- a/tcl/interface/usb-jtag.cfg
+++ b/tcl/interface/usb-jtag.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ixo-usb-jtag - Emulation of a Altera Bus Blaster I on a Cypress FX2 IC.
#
# The ixo-usb-jtag firmware can be loaded onto a bunch of different hardware
diff --git a/tcl/interface/usbprog.cfg b/tcl/interface/usbprog.cfg
index f65c1d4..4f04b14 100644
--- a/tcl/interface/usbprog.cfg
+++ b/tcl/interface/usbprog.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Embedded Projects USBprog
#
diff --git a/tcl/interface/vdebug.cfg b/tcl/interface/vdebug.cfg
index 9cca6aa..7350bb9 100644
--- a/tcl/interface/vdebug.cfg
+++ b/tcl/interface/vdebug.cfg
@@ -30,4 +30,4 @@ tcl_port disabled
vdebug batching 1
# Polling values
-vdebug polling 100 1000 \ No newline at end of file
+vdebug polling 100 1000
diff --git a/tcl/interface/vsllink.cfg b/tcl/interface/vsllink.cfg
index d40dbb4..f780c89 100644
--- a/tcl/interface/vsllink.cfg
+++ b/tcl/interface/vsllink.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Versaloon Link -- VSLLink
#
diff --git a/tcl/interface/xds110.cfg b/tcl/interface/xds110.cfg
index 74122c3..aff0f38 100644
--- a/tcl/interface/xds110.cfg
+++ b/tcl/interface/xds110.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments XDS110
#
diff --git a/tcl/mem_helper.tcl b/tcl/mem_helper.tcl
index 1c86011..0229d54 100644
--- a/tcl/mem_helper.tcl
+++ b/tcl/mem_helper.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Helper for common memory read/modify/write procedures
# mrw: "memory read word", returns value of $reg
diff --git a/tcl/memory.tcl b/tcl/memory.tcl
index ac27345..b111749 100644
--- a/tcl/memory.tcl
+++ b/tcl/memory.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# MEMORY
#
# All Memory regions have two components.
diff --git a/tcl/mmr_helpers.tcl b/tcl/mmr_helpers.tcl
index d9b6e63..5c37fcf 100644
--- a/tcl/mmr_helpers.tcl
+++ b/tcl/mmr_helpers.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
proc proc_exists { NAME } {
set n [info commands $NAME]
@@ -70,3 +71,22 @@ proc show_mmr_bitfield { MSB LSB VAL FIELDNAME FIELDVALUES } {
}
echo [format "%-15s: %d (0x%0*x) %s" $FIELDNAME $nval $width $nval $sval ]
}
+
+# Give: ADDR - address of the register.
+# BIT - bit's number.
+
+proc get_mmr_bit { ADDR BIT } {
+ set val [memread32 $ADDR]
+ set bit_val [expr {$val & [expr {1 << $BIT}]}]
+ return $bit_val
+}
+
+
+# Give: ADDR - address of the register.
+# MSB - MSB bit's number.
+# LSB - LSB bit's number.
+
+proc get_mmr_bitfield { ADDR MSB LSB } {
+ set rval [memread32 $ADDR]
+ return normalize_bitfield $rval $MSB $LSB
+}
diff --git a/tcl/target/1986Be1T.cfg b/tcl/target/1986Be1T.cfg
index b7c9d63..a3172cc 100644
--- a/tcl/target/1986Be1T.cfg
+++ b/tcl/target/1986Be1T.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# 1986ВЕ1Т
# http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=236&cntnt01returnid=68
diff --git a/tcl/target/K1879x61R.cfg b/tcl/target/K1879x61R.cfg
index 0a8467f..8dd330d 100644
--- a/tcl/target/K1879x61R.cfg
+++ b/tcl/target/K1879x61R.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# СБИС К1879ХБ1Я
# http://www.module.ru/catalog/micro/mikroshema_dekodera_cifrovogo_televizionnogo_signala_sbis_k1879hb1ya/
diff --git a/tcl/target/adsp-sc58x.cfg b/tcl/target/adsp-sc58x.cfg
index 6073bb2..3dcfc91 100644
--- a/tcl/target/adsp-sc58x.cfg
+++ b/tcl/target/adsp-sc58x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
#
diff --git a/tcl/target/aduc702x.cfg b/tcl/target/aduc702x.cfg
index 9c756be..c903710 100644
--- a/tcl/target/aduc702x.cfg
+++ b/tcl/target/aduc702x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/target/aducm360.cfg b/tcl/target/aducm360.cfg
index b381728..5cfb483 100644
--- a/tcl/target/aducm360.cfg
+++ b/tcl/target/aducm360.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This file was created using as references the stm32f1x.cfg and aduc702x.cfg
#
diff --git a/tcl/target/allwinner_v3s.cfg b/tcl/target/allwinner_v3s.cfg
index d8d78bd..437bd95 100644
--- a/tcl/target/allwinner_v3s.cfg
+++ b/tcl/target/allwinner_v3s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is the config for an Allwinner V3/V3s (sun8iw8).
#
# Notes:
diff --git a/tcl/target/alphascale_asm9260t.cfg b/tcl/target/alphascale_asm9260t.cfg
index 7892ea2..735555e 100644
--- a/tcl/target/alphascale_asm9260t.cfg
+++ b/tcl/target/alphascale_asm9260t.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
diff --git a/tcl/target/altera_fpgasoc.cfg b/tcl/target/altera_fpgasoc.cfg
index 0fc8d67..a98b346 100644
--- a/tcl/target/altera_fpgasoc.cfg
+++ b/tcl/target/altera_fpgasoc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Altera cyclone V SoC family, 5Cxxx
#
diff --git a/tcl/target/altera_fpgasoc_arria10.cfg b/tcl/target/altera_fpgasoc_arria10.cfg
index c9c5ab6..fe58379 100644
--- a/tcl/target/altera_fpgasoc_arria10.cfg
+++ b/tcl/target/altera_fpgasoc_arria10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Intel (Altera) Arria10 FPGA SoC
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/am335x.cfg b/tcl/target/am335x.cfg
index cb3e06c..208ebf5 100644
--- a/tcl/target/am335x.cfg
+++ b/tcl/target/am335x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/icepick.cfg]
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/am437x.cfg b/tcl/target/am437x.cfg
index e954fd2..5350927 100644
--- a/tcl/target/am437x.cfg
+++ b/tcl/target/am437x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/icepick.cfg]
source [find mem_helper.tcl]
diff --git a/tcl/target/amdm37x.cfg b/tcl/target/amdm37x.cfg
index 3db24b4..d9adae9 100644
--- a/tcl/target/amdm37x.cfg
+++ b/tcl/target/amdm37x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Copyright (C) 2010-2011 by Karl Kurbjun
# Copyright (C) 2009-2011 by Øyvind Harboe
diff --git a/tcl/target/ampere_emag.cfg b/tcl/target/ampere_emag.cfg
index 2e828de..0b0bd9e 100644
--- a/tcl/target/ampere_emag.cfg
+++ b/tcl/target/ampere_emag.cfg
@@ -1,22 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# OpenOCD Target Configuration for eMAG ARMv8 Processor
#
# Copyright (c) 2019-2021, Ampere Computing LLC
#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program;
-#
-#
#
# Configure defaults for target
diff --git a/tcl/target/ampere_qs_mq.cfg b/tcl/target/ampere_qs_mq.cfg
new file mode 100644
index 0000000..0e83766
--- /dev/null
+++ b/tcl/target/ampere_qs_mq.cfg
@@ -0,0 +1,333 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# OpenOCD Target Configuration for Ampere Altra ("Quicksilver") and
+# Ampere Altra Max ("Mystique") processors
+#
+# Copyright (c) 2019-2022, Ampere Computing LLC
+
+# Command Line Argument Description
+#
+# SPLITSMP
+# Only used for dual socket systems. Do not use for a single socket setup.
+# Option pertains to the ARMv8 target core naming in a dual socket setup.
+# If specified, name all ARMv8 cores per socket as individual SMP sessions.
+# If not specified, name ARMv8 cores from both sockets as one SMP session.
+# This option is used in conjunction with the SMP_STR board file option.
+# Syntax: -c "set SPLITSMP {}"
+#
+# PHYS_IDX
+# Enable OpenOCD ARMv8 core target physical indexing.
+# If not specified, defaults to OpenOCD ARMv8 core target logical indexing.
+# Syntax: -c "set PHYS_IDX {}"
+#
+# CHIPNAME
+# Specifies the name of the chip.
+# Will typically be either qs, qs0, qs1, mq, mq0 or mq1.
+# If not specified, defaults to qs.
+# Syntax: -c "set CHIPNAME {qs}"
+#
+# SYSNAME
+# Specifies the name of the system.
+# Will typically be either qs or mq.
+# If not specified, defaults to qs.
+# Syntax: -c "set SYSNAME {qs}"
+#
+# Life-Cycle State (LCS)
+# If not specified, defaults to "Secure LCS".
+# LCS=0, "Secure LCS"
+# LCS=1, "Chip Manufacturing LCS"
+# Syntax: -c "set LCS {0}"
+# Syntax: -c "set LCS {1}"
+#
+# CORELIST
+# Specify available physical cores by number.
+# Example syntax to connect to physical cores 16 and 17.
+# Syntax: -c "set CORELIST {16 17}"
+#
+# COREMASK_LO
+# Specify available physical cores 0-63 by mask.
+# Example syntax to connect to physical cores 16 and 17.
+# Syntax: -c "set COREMASK_LO {0x0000000000030000}"
+#
+# COREMASK_HI
+# Specify available physical cores 64 and above by mask.
+# Example syntax to connect to physical cores 94 and 95.
+# Syntax: -c "set COREMASK_HI {0x00000000C0000000}"
+#
+# ARMV8_TAPID
+# Can override the ARMV8 TAPID default value if necessary.
+# Experimental Use. Most users will not use this option.
+# Syntax: -c "set ARMV8_TAPID {0x3BA06477}"
+#
+# SMPMPRO_TAPID
+# Can override the SMPMPRO TAPID default value if necessary.
+# Experimental Use. Most users will not use this option.
+# Syntax: -c "set SMPMPRO_TAPID {0x4BA00477}"
+#
+#
+# Board File Argument Description
+# These optional arguments are defined in the board file and
+# referenced by the target file. See the corresponding board
+# files for examples of their use.
+#
+# SMP_STR
+# This option is used primarily for a dual socket system and it is not
+# recommended for a single socket setup. This option configures whether
+# the SMP ARMv8 core grouping is maintained at the board or target cfg level.
+# Specify the option if the SMP core grouping is defined at the board level.
+# Do not specify if the SMP core grouping is defined at the chip level.
+# If not specified, defaults to SMP core grouping defined per socket.
+# If specified, "SMP_STR=target smp", the SMP core grouping is maintained
+# at the board cfg level.
+# Used in conjunction with the SPLITSMP option to group two chips into
+# a single SMP configuration or maintain as two separate SMP sessions.
+#
+# CORE_INDEX_OFFSET
+# Specifies the starting logical core index value.
+# Used for dual-socket systems.
+# For socket #0, set to 0.
+# For socket #1, set the starting logical core based from
+# the last logical core on socket #0.
+# If not specified, defaults to 0.
+#
+
+#
+# Configure defaults for target.
+# Can be overridden in board configuration file.
+#
+
+if { [info exists SMP_STR] } {
+ # SMP configured at the dual socket board level
+ set _SMP_STR $SMP_STR
+} else {
+ # SMP configured at the single socket target level
+ set _SMP_STR "target smp"
+}
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME qs
+}
+
+if { [info exists SYSNAME] } {
+ set _SYSNAME $SYSNAME
+} else {
+ set _SYSNAME qs
+}
+
+if { [info exists CORE_INDEX_OFFSET] } {
+ set _CORE_INDEX_OFFSET $CORE_INDEX_OFFSET
+} else {
+ set _CORE_INDEX_OFFSET 0
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists ARMV8_TAPID] } {
+ set _ARMV8_TAPID $ARMV8_TAPID
+} else {
+ if { [info exists MQ_ENABLE] } {
+ # Configure for Mystique
+ set _ARMV8_TAPID 0x3BA06477
+ set _MAX_CORE 128
+ } else {
+ # Configure for Quicksilver
+ set _ARMV8_TAPID 0x2BA06477
+ set _MAX_CORE 80
+ }
+}
+
+if { [info exists SMPMPRO_TAPID] } {
+ set _SMPMPRO_TAPID $SMPMPRO_TAPID
+} else {
+ set _SMPMPRO_TAPID 0x4BA00477
+}
+
+if { [info exists CORELIST] } {
+ set _CORELIST $CORELIST
+} else {
+ if { [info exists COREMASK_LO] } {
+ set _COREMASK_LO $COREMASK_LO
+ } else {
+ set _COREMASK_LO 0x0
+ }
+
+ if { [info exists COREMASK_HI] } {
+ set _COREMASK_HI $COREMASK_HI
+ } else {
+ set _COREMASK_HI 0x0
+ }
+
+ set _CORELIST {}
+
+ set _MASK 0x1
+ for {set i 0} {$i < 64} {incr i} {
+ if { [expr {$_COREMASK_LO & $_MASK}] != 0x0 } {
+ set _CORELIST "$_CORELIST $i"
+ }
+ set _MASK [expr {$_MASK << 0x1}]
+ }
+
+ set _MASK 0x1
+ for {} {$i < $_MAX_CORE} {incr i} {
+ if { [expr {$_COREMASK_HI & $_MASK}] != 0x0 } {
+ set _CORELIST "$_CORELIST $i"
+ }
+ set _MASK [expr {$_MASK << 0x1}]
+ }
+}
+
+#
+# Definition of target names
+#
+set _TARGETNAME_PMPRO pmpro
+set _TARGETNAME_SMPRO smpro
+set _TARGETNAME_ARMV8 armv8
+
+#
+# Configure JTAG TAPs - TAP chain declaration order is important
+#
+
+jtag newtap $_CHIPNAME pmpro.tap -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id $_SMPMPRO_TAPID
+set _TAPNAME_PMPRO $_CHIPNAME.$_TARGETNAME_PMPRO.tap
+
+jtag newtap $_CHIPNAME smpro.tap -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id $_SMPMPRO_TAPID
+set _TAPNAME_SMPRO $_CHIPNAME.$_TARGETNAME_SMPRO.tap
+
+jtag newtap $_CHIPNAME armv8.tap -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id $_ARMV8_TAPID
+set _TAPNAME_ARMV8 $_CHIPNAME.$_TARGETNAME_ARMV8.tap
+
+set _DAPNAME_PMPRO $_CHIPNAME.$_TARGETNAME_PMPRO.dap
+set _DAPNAME_SMPRO $_CHIPNAME.$_TARGETNAME_SMPRO.dap
+set _DAPNAME_ARMV8 $_CHIPNAME.$_TARGETNAME_ARMV8.dap
+
+set _AP_PMPRO_AHB 0
+set _AP_SMPRO_AHB 0
+set _AP_ARMV8_APB 0x00010000
+set _AP_ARMV8_AXI 0x00020000
+
+#
+# Configure JTAG DAPs
+#
+
+dap create $_DAPNAME_PMPRO -chain-position $_TAPNAME_PMPRO -adiv5
+dap create $_DAPNAME_SMPRO -chain-position $_TAPNAME_SMPRO -adiv5
+dap create $_DAPNAME_ARMV8 -chain-position $_TAPNAME_ARMV8 -adiv6
+
+if { [info exists LCS] && [expr {"$LCS"!="0"}] } {
+ #
+ # Create the DAP AHB-AP MEM-AP target for the PMPRO CPU
+ #
+
+ target create $_CHIPNAME.$_TARGETNAME_PMPRO.ahb mem_ap -endian $_ENDIAN -dap $_DAPNAME_PMPRO -ap-num $_AP_PMPRO_AHB
+
+ #
+ # Configure target PMPRO CPU
+ #
+
+ target create $_CHIPNAME.$_TARGETNAME_PMPRO cortex_m -endian $_ENDIAN -dap $_DAPNAME_PMPRO -ap-num $_AP_PMPRO_AHB
+
+ #
+ # Create the DAP AHB-AP MEM-AP target for the SMPRO CPU
+ #
+
+ target create $_CHIPNAME.$_TARGETNAME_SMPRO.ahb mem_ap -endian $_ENDIAN -dap $_DAPNAME_SMPRO -ap-num $_AP_SMPRO_AHB
+
+ #
+ # Configure target SMPRO CPU
+ #
+
+ target create $_CHIPNAME.$_TARGETNAME_SMPRO cortex_m -endian $_ENDIAN -dap $_DAPNAME_SMPRO -ap-num $_AP_SMPRO_AHB
+}
+
+# Create the DAP APB-AP MEM-AP target for the ARMV8 cores
+target create $_CHIPNAME.$_TARGETNAME_ARMV8.apb mem_ap -endian $_ENDIAN -dap $_DAPNAME_ARMV8 -ap-num $_AP_ARMV8_APB
+
+# Create the DAP AXI-AP MEM-AP target for the ARMV8 cores
+target create $_CHIPNAME.$_TARGETNAME_ARMV8.axi mem_ap -endian $_ENDIAN -dap $_DAPNAME_ARMV8 -ap-num $_AP_ARMV8_AXI
+
+# Set CSW register value default correctly for AXI accessible device memory:
+# Select the correct Access Port Number
+$_DAPNAME_ARMV8 apsel $_AP_ARMV8_AXI
+# First set the CSW to OpenOCD's internal default
+$_DAPNAME_ARMV8 apcsw default
+# Set Domain[1:0]=b'11 (CSW[14:13]=b'11)
+# Set Cache[3:0]=b'0000 (CSW[27:24]=b'0000)
+# Porter Cfg registers require secure access, AxPROT[1] (CSW[29]) must be b'0'.
+# Set AxPROT[2:0]=b'000 (CSW[30:28]=b'000) for an Unpriveleged, Secure, Data access.
+$_DAPNAME_ARMV8 apcsw 0x00006000 0x7F006000
+
+#
+# Configure target CPUs
+#
+
+set logical_index $_CORE_INDEX_OFFSET
+
+foreach physical_index $_CORELIST {
+ if { [info exists PHYS_IDX] } {
+ set logical_index [expr {$physical_index + $_CORE_INDEX_OFFSET}]
+ }
+
+ # Format a string to reference which CPU target to use
+ if { [info exists SPLITSMP] } {
+ eval "set _TARGETNAME $_CHIPNAME.${_TARGETNAME_ARMV8}_$logical_index"
+ } else {
+ eval "set _TARGETNAME $_SYSNAME.${_TARGETNAME_ARMV8}_$logical_index"
+ }
+
+ # Create and configure Cross Trigger Interface (CTI) - required for halt and resume
+ set _CTINAME $_TARGETNAME.cti
+ set _offset [expr {(0x00100000 * $physical_index) + (0x00200000 * ($physical_index>>1))}]
+ cti create $_CTINAME -dap $_DAPNAME_ARMV8 -ap-num $_AP_ARMV8_APB -baseaddr [expr {0xA0220000 + $_offset}]
+
+ # Create the target
+ target create $_TARGETNAME aarch64 -endian $_ENDIAN \
+ -dap $_DAPNAME_ARMV8 -ap-num $_AP_ARMV8_APB -dbgbase [expr {0xA0210000 + $_offset}] \
+ -rtos hwthread -cti $_CTINAME -coreid $logical_index
+
+ # Build string used to enable SMP mode for the ARMv8 CPU cores
+ set _SMP_STR "$_SMP_STR $_TARGETNAME"
+
+ # Clear CTI output/input enables that are not configured by OpenOCD for aarch64
+ $_TARGETNAME configure -event reset-init [subst {
+ $_CTINAME write INEN0 0x00000000
+ $_CTINAME write INEN1 0x00000000
+ $_CTINAME write INEN2 0x00000000
+ $_CTINAME write INEN3 0x00000000
+ $_CTINAME write INEN4 0x00000000
+ $_CTINAME write INEN5 0x00000000
+ $_CTINAME write INEN6 0x00000000
+ $_CTINAME write INEN7 0x00000000
+ $_CTINAME write INEN8 0x00000000
+
+ $_CTINAME write OUTEN0 0x00000000
+ $_CTINAME write OUTEN1 0x00000000
+ $_CTINAME write OUTEN2 0x00000000
+ $_CTINAME write OUTEN3 0x00000000
+ $_CTINAME write OUTEN4 0x00000000
+ $_CTINAME write OUTEN5 0x00000000
+ $_CTINAME write OUTEN6 0x00000000
+ $_CTINAME write OUTEN7 0x00000000
+ $_CTINAME write OUTEN8 0x00000000
+ }]
+
+ incr logical_index
+}
+
+if { [info exists SMP_STR] } {
+ # Return updated SMP configuration string back to board level
+ set SMP_STR $_SMP_STR
+} else {
+ # For single socket per SMP configuration, evaluate the string
+ eval $_SMP_STR
+}
+
+if { [info exists CORE_INDEX_OFFSET] } {
+ # For multi-socket, return total number of cores back to board level
+ set CORE_INDEX_OFFSET $logical_index
+}
diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg
index 57833f4..792b68f 100644
--- a/tcl/target/ar71xx.cfg
+++ b/tcl/target/ar71xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Atheros AR71xx MIPS 24Kc SoC.
# tested on PB44 refererence board
diff --git a/tcl/target/arm_corelink_sse200.cfg b/tcl/target/arm_corelink_sse200.cfg
index ca30649..7327d05 100644
--- a/tcl/target/arm_corelink_sse200.cfg
+++ b/tcl/target/arm_corelink_sse200.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Configuration script for Arm CoreLink SSE-200 Subsystem based IoT SoCs.
#
diff --git a/tcl/target/armada370.cfg b/tcl/target/armada370.cfg
index 7165274..ccf4b36 100644
--- a/tcl/target/armada370.cfg
+++ b/tcl/target/armada370.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# armada370 -- support for the Marvell Armada/370 CPU family
#
diff --git a/tcl/target/at32ap7000.cfg b/tcl/target/at32ap7000.cfg
index 8573aa1..bbae247 100644
--- a/tcl/target/at32ap7000.cfg
+++ b/tcl/target/at32ap7000.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Atmel AT32AP7000
#
# This is the only core in the now-inactive high end AVR32 product line,
diff --git a/tcl/target/at91r40008.cfg b/tcl/target/at91r40008.cfg
index 912bd0e..66d32ae 100644
--- a/tcl/target/at91r40008.cfg
+++ b/tcl/target/at91r40008.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# AT91R40008 target configuration file
# TRST is tied to SRST on the AT91X40 family.
diff --git a/tcl/target/at91rm9200.cfg b/tcl/target/at91rm9200.cfg
index 3d9a8d9..1bc1287 100644
--- a/tcl/target/at91rm9200.cfg
+++ b/tcl/target/at91rm9200.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Atmel AT91rm9200
# http://atmel.com/products/at91/
diff --git a/tcl/target/at91sam3XXX.cfg b/tcl/target/at91sam3XXX.cfg
index 7d01ccd..ba1c3c5 100644
--- a/tcl/target/at91sam3XXX.cfg
+++ b/tcl/target/at91sam3XXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3u4e
diff --git a/tcl/target/at91sam3ax_4x.cfg b/tcl/target/at91sam3ax_4x.cfg
index 78ca79f..4e0cf79 100644
--- a/tcl/target/at91sam3ax_4x.cfg
+++ b/tcl/target/at91sam3ax_4x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3ax_xx.cfg]
diff --git a/tcl/target/at91sam3ax_8x.cfg b/tcl/target/at91sam3ax_8x.cfg
index 2bb66fb..46d580d 100644
--- a/tcl/target/at91sam3ax_8x.cfg
+++ b/tcl/target/at91sam3ax_8x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3ax_xx.cfg]
diff --git a/tcl/target/at91sam3ax_xx.cfg b/tcl/target/at91sam3ax_xx.cfg
index 5e01d66..7837f69 100644
--- a/tcl/target/at91sam3ax_xx.cfg
+++ b/tcl/target/at91sam3ax_xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3A4C
diff --git a/tcl/target/at91sam3nXX.cfg b/tcl/target/at91sam3nXX.cfg
index 3450c26..9b20373 100644
--- a/tcl/target/at91sam3nXX.cfg
+++ b/tcl/target/at91sam3nXX.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
#
# Configuration for Atmel's SAM3N series
diff --git a/tcl/target/at91sam3sXX.cfg b/tcl/target/at91sam3sXX.cfg
index 09146bd..a2afda2 100644
--- a/tcl/target/at91sam3sXX.cfg
+++ b/tcl/target/at91sam3sXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3s4c
diff --git a/tcl/target/at91sam3u1c.cfg b/tcl/target/at91sam3u1c.cfg
index dc5c82c..b26662b 100644
--- a/tcl/target/at91sam3u1c.cfg
+++ b/tcl/target/at91sam3u1c.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
diff --git a/tcl/target/at91sam3u1e.cfg b/tcl/target/at91sam3u1e.cfg
index dc5c82c..b26662b 100644
--- a/tcl/target/at91sam3u1e.cfg
+++ b/tcl/target/at91sam3u1e.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
diff --git a/tcl/target/at91sam3u2c.cfg b/tcl/target/at91sam3u2c.cfg
index dc5c82c..b26662b 100644
--- a/tcl/target/at91sam3u2c.cfg
+++ b/tcl/target/at91sam3u2c.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
diff --git a/tcl/target/at91sam3u2e.cfg b/tcl/target/at91sam3u2e.cfg
index dc5c82c..b26662b 100644
--- a/tcl/target/at91sam3u2e.cfg
+++ b/tcl/target/at91sam3u2e.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
diff --git a/tcl/target/at91sam3u4c.cfg b/tcl/target/at91sam3u4c.cfg
index 14af008..fb1eeaa 100644
--- a/tcl/target/at91sam3u4c.cfg
+++ b/tcl/target/at91sam3u4c.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
diff --git a/tcl/target/at91sam3u4e.cfg b/tcl/target/at91sam3u4e.cfg
index fbe2dd9..1c75f82 100644
--- a/tcl/target/at91sam3u4e.cfg
+++ b/tcl/target/at91sam3u4e.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
diff --git a/tcl/target/at91sam3uxx.cfg b/tcl/target/at91sam3uxx.cfg
index 5b1748b..f084b9b 100644
--- a/tcl/target/at91sam3uxx.cfg
+++ b/tcl/target/at91sam3uxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3u4e
diff --git a/tcl/target/at91sam4XXX.cfg b/tcl/target/at91sam4XXX.cfg
index ebb7eed..9c30ddf 100644
--- a/tcl/target/at91sam4XXX.cfg
+++ b/tcl/target/at91sam4XXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# script for ATMEL sam4, a Cortex-M4 chip
#
diff --git a/tcl/target/at91sam4c32x.cfg b/tcl/target/at91sam4c32x.cfg
index 5344e0c..ddcdd12 100644
--- a/tcl/target/at91sam4c32x.cfg
+++ b/tcl/target/at91sam4c32x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4c32, a Cortex-M4 chip
#
diff --git a/tcl/target/at91sam4cXXX.cfg b/tcl/target/at91sam4cXXX.cfg
index 3f10c61..a0206ad 100644
--- a/tcl/target/at91sam4cXXX.cfg
+++ b/tcl/target/at91sam4cXXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4c, a Cortex-M4 chip
#
diff --git a/tcl/target/at91sam4lXX.cfg b/tcl/target/at91sam4lXX.cfg
index b73babc..0910e30 100644
--- a/tcl/target/at91sam4lXX.cfg
+++ b/tcl/target/at91sam4lXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4l, a Cortex-M4 chip
#
diff --git a/tcl/target/at91sam4sXX.cfg b/tcl/target/at91sam4sXX.cfg
index 8883e23..2ceca00 100644
--- a/tcl/target/at91sam4sXX.cfg
+++ b/tcl/target/at91sam4sXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4, a Cortex-M4 chip
#
diff --git a/tcl/target/at91sam4sd32x.cfg b/tcl/target/at91sam4sd32x.cfg
index 077b1f5..24e25e3 100644
--- a/tcl/target/at91sam4sd32x.cfg
+++ b/tcl/target/at91sam4sd32x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4sd32, a Cortex-M4 chip
#
diff --git a/tcl/target/at91sam7a2.cfg b/tcl/target/at91sam7a2.cfg
index f7a0de2..f8090c7 100644
--- a/tcl/target/at91sam7a2.cfg
+++ b/tcl/target/at91sam7a2.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
diff --git a/tcl/target/at91sam7se512.cfg b/tcl/target/at91sam7se512.cfg
index 61b4781..2972494 100644
--- a/tcl/target/at91sam7se512.cfg
+++ b/tcl/target/at91sam7se512.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ATMEL sam7se512
# Example: the "Elektor Internet Radio" - EIR
# http://www.ethernut.de/en/hardware/eir/index.html
diff --git a/tcl/target/at91sam7sx.cfg b/tcl/target/at91sam7sx.cfg
index a563ac0..fee4e9a 100644
--- a/tcl/target/at91sam7sx.cfg
+++ b/tcl/target/at91sam7sx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
diff --git a/tcl/target/at91sam7x256.cfg b/tcl/target/at91sam7x256.cfg
index e1a2435..2ebbf22 100644
--- a/tcl/target/at91sam7x256.cfg
+++ b/tcl/target/at91sam7x256.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
diff --git a/tcl/target/at91sam7x512.cfg b/tcl/target/at91sam7x512.cfg
index 6910e85..ccdcfa7 100644
--- a/tcl/target/at91sam7x512.cfg
+++ b/tcl/target/at91sam7x512.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
diff --git a/tcl/target/at91sam9.cfg b/tcl/target/at91sam9.cfg
index e0ea316..bc90d37 100644
--- a/tcl/target/at91sam9.cfg
+++ b/tcl/target/at91sam9.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9
######################################
diff --git a/tcl/target/at91sam9260.cfg b/tcl/target/at91sam9260.cfg
index c5a07fd..3f74d96 100644
--- a/tcl/target/at91sam9260.cfg
+++ b/tcl/target/at91sam9260.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9260
######################################
diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index 3e4b7d7..47117e9 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9260
######################################
diff --git a/tcl/target/at91sam9261.cfg b/tcl/target/at91sam9261.cfg
index 3ad1411..07456b2 100644
--- a/tcl/target/at91sam9261.cfg
+++ b/tcl/target/at91sam9261.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9261
######################################
diff --git a/tcl/target/at91sam9263.cfg b/tcl/target/at91sam9263.cfg
index d2ee113..3e2585c 100644
--- a/tcl/target/at91sam9263.cfg
+++ b/tcl/target/at91sam9263.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9263
######################################
diff --git a/tcl/target/at91sam9g10.cfg b/tcl/target/at91sam9g10.cfg
index b49f3d9..6836773 100644
--- a/tcl/target/at91sam9g10.cfg
+++ b/tcl/target/at91sam9g10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9G10
######################################
diff --git a/tcl/target/at91sam9g20.cfg b/tcl/target/at91sam9g20.cfg
index 6e45df2..4fc2048 100644
--- a/tcl/target/at91sam9g20.cfg
+++ b/tcl/target/at91sam9g20.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9G20
######################################
diff --git a/tcl/target/at91sam9g45.cfg b/tcl/target/at91sam9g45.cfg
index 7323679..5e6e818 100644
--- a/tcl/target/at91sam9g45.cfg
+++ b/tcl/target/at91sam9g45.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9G45
######################################
diff --git a/tcl/target/at91sam9rl.cfg b/tcl/target/at91sam9rl.cfg
index db05229..b253427 100644
--- a/tcl/target/at91sam9rl.cfg
+++ b/tcl/target/at91sam9rl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9RL
######################################
diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg
index 9a396fa..5132109 100644
--- a/tcl/target/at91samdXX.cfg
+++ b/tcl/target/at91samdXX.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# script for Atmel SAMD, SAMR, SAML or SAMC, a Cortex-M0 chip
#
diff --git a/tcl/target/at91samg5x.cfg b/tcl/target/at91samg5x.cfg
index 57274c0..cbe25f6 100644
--- a/tcl/target/at91samg5x.cfg
+++ b/tcl/target/at91samg5x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for the ATMEL samg5x Cortex-M4F chip family
#
diff --git a/tcl/target/atheros_ar2313.cfg b/tcl/target/atheros_ar2313.cfg
index 0966c6c..aa962b4 100644
--- a/tcl/target/atheros_ar2313.cfg
+++ b/tcl/target/atheros_ar2313.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
diff --git a/tcl/target/atheros_ar2315.cfg b/tcl/target/atheros_ar2315.cfg
index 92ad376..3836763 100644
--- a/tcl/target/atheros_ar2315.cfg
+++ b/tcl/target/atheros_ar2315.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
diff --git a/tcl/target/atheros_ar9331.cfg b/tcl/target/atheros_ar9331.cfg
index 6ab238c..931ac10 100644
--- a/tcl/target/atheros_ar9331.cfg
+++ b/tcl/target/atheros_ar9331.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The Atheros AR9331 is a highly integrated and cost effective
# IEEE 802.11n 1x1 2.4 GHz System- on-a-Chip (SoC) for wireless
# local area network (WLAN) AP and router platforms.
diff --git a/tcl/target/atheros_ar9344.cfg b/tcl/target/atheros_ar9344.cfg
index b698f25..d22bb5f 100644
--- a/tcl/target/atheros_ar9344.cfg
+++ b/tcl/target/atheros_ar9344.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
diff --git a/tcl/target/atmega128.cfg b/tcl/target/atmega128.cfg
index 07161d5..c946919 100644
--- a/tcl/target/atmega128.cfg
+++ b/tcl/target/atmega128.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# for avr
set _CHIPNAME avr
diff --git a/tcl/target/atmega128rfa1.cfg b/tcl/target/atmega128rfa1.cfg
index cda439d..96a83fe 100644
--- a/tcl/target/atmega128rfa1.cfg
+++ b/tcl/target/atmega128rfa1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME avr
set _ENDIAN little
diff --git a/tcl/target/atsame5x.cfg b/tcl/target/atsame5x.cfg
index 351a2ca..5093d41 100644
--- a/tcl/target/atsame5x.cfg
+++ b/tcl/target/atsame5x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Microchip (former Atmel) SAM E54, E53, E51 and D51 devices
# with a Cortex-M4 core
diff --git a/tcl/target/atsaml1x.cfg b/tcl/target/atsaml1x.cfg
index 3486746..5a1b8f8 100644
--- a/tcl/target/atsaml1x.cfg
+++ b/tcl/target/atsaml1x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Microchip (formerly Atmel) SAM L1x target
#
diff --git a/tcl/target/atsamv.cfg b/tcl/target/atsamv.cfg
index fdd8354..7e9f6c5 100644
--- a/tcl/target/atsamv.cfg
+++ b/tcl/target/atsamv.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ATMEL SAMV, SAMS, and SAME chips are Cortex-M7 parts
# The chips are very similar; the SAMV series just has
# more peripherals and seems like the "flagship" of the
diff --git a/tcl/target/avr32.cfg b/tcl/target/avr32.cfg
index 8295f5e..e16d114 100644
--- a/tcl/target/avr32.cfg
+++ b/tcl/target/avr32.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME avr32
set _ENDIAN big
diff --git a/tcl/target/bcm281xx.cfg b/tcl/target/bcm281xx.cfg
index 0715d82..a70a9c5 100644
--- a/tcl/target/bcm281xx.cfg
+++ b/tcl/target/bcm281xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# BCM281xx
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/bcm4706.cfg b/tcl/target/bcm4706.cfg
index 10b32c7..e5d8d19 100644
--- a/tcl/target/bcm4706.cfg
+++ b/tcl/target/bcm4706.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm4706
set _CPUID 0x1008c17f
diff --git a/tcl/target/bcm4718.cfg b/tcl/target/bcm4718.cfg
index 8193914..cc21a5e 100644
--- a/tcl/target/bcm4718.cfg
+++ b/tcl/target/bcm4718.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm4718
set _LVTAPID 0x1471617f
set _CPUID 0x0008c17f
diff --git a/tcl/target/bcm47xx.cfg b/tcl/target/bcm47xx.cfg
index 0132bb8..b5365e0 100644
--- a/tcl/target/bcm47xx.cfg
+++ b/tcl/target/bcm47xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "Forcing reset_config to none to prevent OpenOCD from pulling SRST after the switch from LV is already performed"
reset_config none
diff --git a/tcl/target/bcm5352e.cfg b/tcl/target/bcm5352e.cfg
index 3f0495a..084ce04 100644
--- a/tcl/target/bcm5352e.cfg
+++ b/tcl/target/bcm5352e.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm5352e
set _CPUID 0x0535217f
diff --git a/tcl/target/bcm6348.cfg b/tcl/target/bcm6348.cfg
index a9be559..b9d4448 100644
--- a/tcl/target/bcm6348.cfg
+++ b/tcl/target/bcm6348.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm6348
set _CPUID 0x0634817f
diff --git a/tcl/target/bluefield.cfg b/tcl/target/bluefield.cfg
index dcebb2f..30ed527 100644
--- a/tcl/target/bluefield.cfg
+++ b/tcl/target/bluefield.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# BlueField SoC Target
set _CHIPNAME bluefield
diff --git a/tcl/target/bluenrg-x.cfg b/tcl/target/bluenrg-x.cfg
index 1eba376..afa1b51 100644
--- a/tcl/target/bluenrg-x.cfg
+++ b/tcl/target/bluenrg-x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# bluenrg-1/2 and bluenrg-lp devices support only SWD transports.
#
diff --git a/tcl/target/c100.cfg b/tcl/target/c100.cfg
index 5b4354e..c268ba3 100644
--- a/tcl/target/c100.cfg
+++ b/tcl/target/c100.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# c100 config.
# This is ARM1136 dual core
# this script only configures one core (that is used to run Linux)
diff --git a/tcl/target/c100config.tcl b/tcl/target/c100config.tcl
index e937219..2545fa7 100644
--- a/tcl/target/c100config.tcl
+++ b/tcl/target/c100config.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
# board(-config) specific parameters file.
diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl
index ecd7edf..d1d3f25 100644
--- a/tcl/target/c100helper.tcl
+++ b/tcl/target/c100helper.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
proc helpC100 {} {
echo "List of useful functions for C100 processor:"
diff --git a/tcl/target/c100regs.tcl b/tcl/target/c100regs.tcl
index 9304808..7be8939 100644
--- a/tcl/target/c100regs.tcl
+++ b/tcl/target/c100regs.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Note that I basically converted
# u-boot/include/asm-arm/arch/comcerto_100.h
# defines
diff --git a/tcl/target/cc2538.cfg b/tcl/target/cc2538.cfg
index 8d232f4..e4fb02a 100644
--- a/tcl/target/cc2538.cfg
+++ b/tcl/target/cc2538.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Config for Texas Instruments low power RF SoC CC2538
# http://www.ti.com/lit/pdf/swru319
diff --git a/tcl/target/cs351x.cfg b/tcl/target/cs351x.cfg
index 8fabda6..e67540a 100644
--- a/tcl/target/cs351x.cfg
+++ b/tcl/target/cs351x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/target/davinci.cfg b/tcl/target/davinci.cfg
index 5ca54ae..54afb64 100644
--- a/tcl/target/davinci.cfg
+++ b/tcl/target/davinci.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Utility code for DaVinci-family chips
#
diff --git a/tcl/target/dragonite.cfg b/tcl/target/dragonite.cfg
index b9d73a2..249de25 100644
--- a/tcl/target/dragonite.cfg
+++ b/tcl/target/dragonite.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Marvell Dragonite CPU core
######################################
diff --git a/tcl/target/dsp56321.cfg b/tcl/target/dsp56321.cfg
index 78ecb3b..fac0ccc 100644
--- a/tcl/target/dsp56321.cfg
+++ b/tcl/target/dsp56321.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Script for freescale DSP56321
#
diff --git a/tcl/target/dsp568013.cfg b/tcl/target/dsp568013.cfg
index 67d4419..5cf5c02 100644
--- a/tcl/target/dsp568013.cfg
+++ b/tcl/target/dsp568013.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Script for freescale DSP568013
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/dsp568037.cfg b/tcl/target/dsp568037.cfg
index fc57bd4..5d86811 100644
--- a/tcl/target/dsp568037.cfg
+++ b/tcl/target/dsp568037.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Script for freescale DSP568037
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/efm32.cfg b/tcl/target/efm32.cfg
index d2e4eb3..2187c0a 100644
--- a/tcl/target/efm32.cfg
+++ b/tcl/target/efm32.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Silicon Labs (formerly Energy Micro) EFM32 target
#
diff --git a/tcl/target/em357.cfg b/tcl/target/em357.cfg
index f39f3f4..ddefa28 100644
--- a/tcl/target/em357.cfg
+++ b/tcl/target/em357.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Target configuration for the Silicon Labs EM357 chips
#
diff --git a/tcl/target/em358.cfg b/tcl/target/em358.cfg
index 92e65a4..63f4088 100644
--- a/tcl/target/em358.cfg
+++ b/tcl/target/em358.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Silicon Labs EM358 chips
#
diff --git a/tcl/target/epc9301.cfg b/tcl/target/epc9301.cfg
index 252bbab..41021d5 100644
--- a/tcl/target/epc9301.cfg
+++ b/tcl/target/epc9301.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/esi32xx.cfg b/tcl/target/esi32xx.cfg
index 6be84ab..a8b0823 100644
--- a/tcl/target/esi32xx.cfg
+++ b/tcl/target/esi32xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# EnSilica eSi-32xx SoC (eSi-RISC Family)
# http://www.ensilica.com/risc-ip/
diff --git a/tcl/target/esp32.cfg b/tcl/target/esp32.cfg
new file mode 100644
index 0000000..f4c13aa
--- /dev/null
+++ b/tcl/target/esp32.cfg
@@ -0,0 +1,99 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# The ESP32 only supports JTAG.
+transport select jtag
+
+# Source the ESP common configuration file
+source [find target/esp_common.cfg]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME esp32
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x120034e5
+}
+
+if { [info exists ESP32_ONLYCPU] } {
+ set _ONLYCPU $ESP32_ONLYCPU
+} else {
+ set _ONLYCPU 2
+}
+
+if { [info exists ESP32_FLASH_VOLTAGE] } {
+ set _FLASH_VOLTAGE $ESP32_FLASH_VOLTAGE
+} else {
+ set _FLASH_VOLTAGE 3.3
+}
+
+set _CPU0NAME cpu0
+set _CPU1NAME cpu1
+set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
+set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
+
+jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
+if { $_ONLYCPU != 1 } {
+ jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
+} else {
+ jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
+}
+
+# PRO-CPU
+target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
+# APP-CPU
+if { $_ONLYCPU != 1 } {
+ target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
+ target smp $_TARGETNAME_0 $_TARGETNAME_1
+}
+
+$_TARGETNAME_0 esp32 flashbootstrap $_FLASH_VOLTAGE
+$_TARGETNAME_0 xtensa maskisr on
+$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+$_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
+
+$_TARGETNAME_0 configure -event gdb-attach {
+ $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+ # necessary to auto-probe flash bank when GDB is connected
+ halt 1000
+}
+
+if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event gdb-attach {
+ $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
+ # necessary to auto-probe flash bank when GDB is connected
+ halt 1000
+ }
+ $_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
+}
+
+$_TARGETNAME_0 configure -event examine-end {
+ # Need to enable to set 'semihosting_basedir'
+ arm semihosting enable
+ arm semihosting_resexit enable
+ if { [info exists _SEMIHOST_BASEDIR] } {
+ if { $_SEMIHOST_BASEDIR != "" } {
+ arm semihosting_basedir $_SEMIHOST_BASEDIR
+ }
+ }
+}
+
+if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event examine-end {
+ # Need to enable to set 'semihosting_basedir'
+ arm semihosting enable
+ arm semihosting_resexit enable
+ if { [info exists _SEMIHOST_BASEDIR] } {
+ if { $_SEMIHOST_BASEDIR != "" } {
+ arm semihosting_basedir $_SEMIHOST_BASEDIR
+ }
+ }
+ }
+}
+
+gdb_breakpoint_override hard
+
+source [find target/xtensa-core-esp32.cfg]
diff --git a/tcl/target/esp32s2.cfg b/tcl/target/esp32s2.cfg
index ab64c31..e478a6d 100644
--- a/tcl/target/esp32s2.cfg
+++ b/tcl/target/esp32s2.cfg
@@ -3,6 +3,13 @@
# The ESP32-S2 only supports JTAG.
transport select jtag
+set CPU_MAX_ADDRESS 0xFFFFFFFF
+source [find bitsbytes.tcl]
+source [find memory.tcl]
+source [find mmr_helpers.tcl]
+# Source the ESP common configuration file
+source [find target/esp_common.cfg]
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
@@ -21,10 +28,53 @@ set _TAPNAME $_CHIPNAME.$_CPUNAME
jtag newtap $_CHIPNAME $_CPUNAME -irlen 5 -expected-id $_CPUTAPID
+proc esp32s2_memprot_is_enabled { } {
+ # IRAM0, DPORT_PMS_PRO_IRAM0_0_REG
+ if { [get_mmr_bit 0x3f4c1010 0] != 0 } {
+ return 1
+ }
+ # DRAM0, DPORT_PMS_PRO_DRAM0_0_REG
+ if { [get_mmr_bit 0x3f4c1028 0] != 0 } {
+ return 1
+ }
+ # PERI1, DPORT_PMS_PRO_DPORT_0_REG
+ if { [get_mmr_bit 0x3f4c103c 0] != 0 } {
+ return 1
+ }
+ # PERI2, DPORT_PMS_PRO_AHB_0_REG
+ if { [get_mmr_bit 0x3f4c105c 0] != 0 } {
+ return 1
+ }
+ return 0
+}
+
target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME
+$_TARGETNAME configure -event gdb-attach {
+ # necessary to auto-probe flash bank when GDB is connected and generate proper memory map
+ halt 1000
+ if { [esp32s2_memprot_is_enabled] } {
+ # 'reset halt' to disable memory protection and allow flasher to work correctly
+ echo "Memory protection is enabled. Reset target to disable it..."
+ reset halt
+ }
+}
+
xtensa maskisr on
+$_TARGETNAME configure -event examine-end {
+ # Need to enable to set 'semihosting_basedir'
+ arm semihosting enable
+ arm semihosting_resexit enable
+ if { [info exists _SEMIHOST_BASEDIR] } {
+ if { $_SEMIHOST_BASEDIR != "" } {
+ arm semihosting_basedir $_SEMIHOST_BASEDIR
+ }
+ }
+}
+
$_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
gdb_breakpoint_override hard
+
+source [find target/xtensa-core-esp32s2.cfg]
diff --git a/tcl/target/esp32s3.cfg b/tcl/target/esp32s3.cfg
new file mode 100644
index 0000000..42b2199
--- /dev/null
+++ b/tcl/target/esp32s3.cfg
@@ -0,0 +1,154 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# The ESP32-S3 only supports JTAG.
+transport select jtag
+
+set CPU_MAX_ADDRESS 0xFFFFFFFF
+source [find bitsbytes.tcl]
+source [find memory.tcl]
+source [find mmr_helpers.tcl]
+# Source the ESP common configuration file
+source [find target/esp_common.cfg]
+
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME esp32s3
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x120034e5
+}
+
+if { [info exists ESP32_S3_ONLYCPU] } {
+ set _ONLYCPU $ESP32_S3_ONLYCPU
+} else {
+ set _ONLYCPU 2
+}
+
+set _CPU0NAME cpu0
+set _CPU1NAME cpu1
+set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
+set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
+
+jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
+if { $_ONLYCPU != 1 } {
+ jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
+} else {
+ jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
+}
+
+proc esp32s3_memprot_is_enabled { } {
+ # SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_REG
+ if { [get_mmr_bit 0x600C10C0 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_0_PIF_PMS_CONSTRAIN_0_REG
+ if { [get_mmr_bit 0x600C1124 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_1_PIF_PMS_CONSTRAIN_0_REG
+ if { [get_mmr_bit 0x600C11D0 0] != 0 } {
+ return 1
+ }
+ # IRAM0, SENSITIVE_CORE_X_IRAM0_PMS_CONSTRAIN_0_REG
+ if { [get_mmr_bit 0x600C10D8 0] != 0 } {
+ return 1
+ }
+ # DRAM0, SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_0_REG
+ if { [get_mmr_bit 0x600C10FC 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_0_IRAM0_PMS_MONITOR_0_REG
+ if { [get_mmr_bit 0x600C10E4 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_1_IRAM0_PMS_MONITOR_0_REG
+ if { [get_mmr_bit 0x600C10F0 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_0_DRAM0_PMS_MONITOR_0_REG
+ if { [get_mmr_bit 0x600C1104 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_1_DRAM0_PMS_MONITOR_0_REG
+ if { [get_mmr_bit 0x600C1114 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_0_PIF_PMS_MONITOR_0_REG
+ if { [get_mmr_bit 0x600C119C 0] != 0 } {
+ return 1
+ }
+ # SENSITIVE_CORE_1_PIF_PMS_MONITOR_0_REG
+ if { [get_mmr_bit 0x600C1248 0] != 0 } {
+ return 1
+ }
+ return 0
+}
+
+# PRO-CPU
+target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
+# APP-CPU
+if { $_ONLYCPU != 1 } {
+ target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
+ target smp $_TARGETNAME_0 $_TARGETNAME_1
+}
+
+$_TARGETNAME_0 xtensa maskisr on
+$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+$_TARGETNAME_0 configure -event examine-end {
+ # Need to enable to set 'semihosting_basedir'
+ arm semihosting enable
+ arm semihosting_resexit enable
+ if { [info exists _SEMIHOST_BASEDIR] } {
+ if { $_SEMIHOST_BASEDIR != "" } {
+ arm semihosting_basedir $_SEMIHOST_BASEDIR
+ }
+ }
+}
+
+if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event examine-end {
+ # Need to enable to set 'semihosting_basedir'
+ arm semihosting enable
+ arm semihosting_resexit enable
+ if { [info exists _SEMIHOST_BASEDIR] } {
+ if { $_SEMIHOST_BASEDIR != "" } {
+ arm semihosting_basedir $_SEMIHOST_BASEDIR
+ }
+ }
+ }
+}
+
+$_TARGETNAME_0 configure -event gdb-attach {
+ $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+ # necessary to auto-probe flash bank when GDB is connected and generate proper memory map
+ halt 1000
+ if { [esp32s3_memprot_is_enabled] } {
+ # 'reset halt' to disable memory protection and allow flasher to work correctly
+ echo "Memory protection is enabled. Reset target to disable it..."
+ reset halt
+ }
+}
+$_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
+
+if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event gdb-attach {
+ $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
+ # necessary to auto-probe flash bank when GDB is connected
+ halt 1000
+ if { [esp32s3_memprot_is_enabled] } {
+ # 'reset halt' to disable memory protection and allow flasher to work correctly
+ echo "Memory protection is enabled. Reset target to disable it..."
+ reset halt
+ }
+ }
+ $_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
+}
+
+gdb_breakpoint_override hard
+
+source [find target/xtensa-core-esp32s3.cfg]
diff --git a/tcl/target/exynos5250.cfg b/tcl/target/exynos5250.cfg
index d3aaa98..a565022 100644
--- a/tcl/target/exynos5250.cfg
+++ b/tcl/target/exynos5250.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Samsung Exynos 5250 - dual-core ARM Cortex-A15
#
diff --git a/tcl/target/faux.cfg b/tcl/target/faux.cfg
index d3891cd..71cb8b7 100644
--- a/tcl/target/faux.cfg
+++ b/tcl/target/faux.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#Script for faux target - used for testing
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/feroceon.cfg b/tcl/target/feroceon.cfg
index d4f710e..593569d 100644
--- a/tcl/target/feroceon.cfg
+++ b/tcl/target/feroceon.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Marvell Feroceon CPU core
######################################
diff --git a/tcl/target/fm3.cfg b/tcl/target/fm3.cfg
index 544cff9..0caf629 100644
--- a/tcl/target/fm3.cfg
+++ b/tcl/target/fm3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# MB9BF506
# Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
diff --git a/tcl/target/fm4.cfg b/tcl/target/fm4.cfg
index bfe7115..4318f2e 100644
--- a/tcl/target/fm4.cfg
+++ b/tcl/target/fm4.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion FM4 (ARM Cortex-M4)
#
diff --git a/tcl/target/fm4_mb9bf.cfg b/tcl/target/fm4_mb9bf.cfg
index ca4e5f9..4bc579c 100644
--- a/tcl/target/fm4_mb9bf.cfg
+++ b/tcl/target/fm4_mb9bf.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion FM4 MB9BFxxx (ARM Cortex-M4)
#
diff --git a/tcl/target/fm4_s6e2cc.cfg b/tcl/target/fm4_s6e2cc.cfg
index c6f835d..7417d38 100644
--- a/tcl/target/fm4_s6e2cc.cfg
+++ b/tcl/target/fm4_s6e2cc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion FM4 S6E2CC (ARM Cortex-M4)
#
diff --git a/tcl/target/gd32vf103.cfg b/tcl/target/gd32vf103.cfg
index b00e5e9..6262697 100644
--- a/tcl/target/gd32vf103.cfg
+++ b/tcl/target/gd32vf103.cfg
@@ -1,4 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# GigaDevice GD32VF103 target
+#
+# https://www.gigadevice.com/products/microcontrollers/gd32/risc-v/
+#
+
adapter speed 1000
+source [find mem_helper.tcl]
+
transport select jtag
reset_config srst_nogate
diff --git a/tcl/target/gp326xxxa.cfg b/tcl/target/gp326xxxa.cfg
index df42c44..447460b 100644
--- a/tcl/target/gp326xxxa.cfg
+++ b/tcl/target/gp326xxxa.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Support for General Plus GP326XXXA chips
#
diff --git a/tcl/target/hi3798.cfg b/tcl/target/hi3798.cfg
index 7b19218..4373962 100644
--- a/tcl/target/hi3798.cfg
+++ b/tcl/target/hi3798.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hisilicon Hi3798 Target
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/hi6220.cfg b/tcl/target/hi6220.cfg
index ddeeaad..f5f7fc9 100644
--- a/tcl/target/hi6220.cfg
+++ b/tcl/target/hi6220.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hisilicon Hi6220 Target
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/hilscher_netx10.cfg b/tcl/target/hilscher_netx10.cfg
index 668de8f..054cac8 100644
--- a/tcl/target/hilscher_netx10.cfg
+++ b/tcl/target/hilscher_netx10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/target/hilscher_netx50.cfg b/tcl/target/hilscher_netx50.cfg
index c6510c6..e8ba015 100644
--- a/tcl/target/hilscher_netx50.cfg
+++ b/tcl/target/hilscher_netx50.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
diff --git a/tcl/target/hilscher_netx500.cfg b/tcl/target/hilscher_netx500.cfg
index 131bef2..d838a6b 100644
--- a/tcl/target/hilscher_netx500.cfg
+++ b/tcl/target/hilscher_netx500.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#Hilscher netX 500 CPU
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/icepick.cfg b/tcl/target/icepick.cfg
index cc824ad..5509532 100644
--- a/tcl/target/icepick.cfg
+++ b/tcl/target/icepick.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Copyright (C) 2011 by Karl Kurbjun
# Copyright (C) 2009 by David Brownell
diff --git a/tcl/target/imx.cfg b/tcl/target/imx.cfg
index e2bee7a..d76f60e 100644
--- a/tcl/target/imx.cfg
+++ b/tcl/target/imx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# utility fn's for Freescale i.MX series
global TARGETNAME
diff --git a/tcl/target/imx21.cfg b/tcl/target/imx21.cfg
index 2d9ce39..7c9cca3 100644
--- a/tcl/target/imx21.cfg
+++ b/tcl/target/imx21.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
#
# Hmmm.... should srst_pulls_trst be used here like i.MX27???
diff --git a/tcl/target/imx25.cfg b/tcl/target/imx25.cfg
index bc91278..ed94cc0 100644
--- a/tcl/target/imx25.cfg
+++ b/tcl/target/imx25.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# imx25 config
#
diff --git a/tcl/target/imx27.cfg b/tcl/target/imx27.cfg
index e5a5035..c79d85e 100644
--- a/tcl/target/imx27.cfg
+++ b/tcl/target/imx27.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3"
# SRST pulls TRST
#
diff --git a/tcl/target/imx28.cfg b/tcl/target/imx28.cfg
index 1fea3fa..d52fc4e 100644
--- a/tcl/target/imx28.cfg
+++ b/tcl/target/imx28.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# i.MX28 config file.
# based off of the imx21.cfg file.
diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg
index d850657..10e9fef 100644
--- a/tcl/target/imx31.cfg
+++ b/tcl/target/imx31.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# imx31 config
#
diff --git a/tcl/target/imx35.cfg b/tcl/target/imx35.cfg
index 21495c2..fa173bb 100644
--- a/tcl/target/imx35.cfg
+++ b/tcl/target/imx35.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# imx35 config
#
diff --git a/tcl/target/imx51.cfg b/tcl/target/imx51.cfg
index 22af284..fc3dfa9 100644
--- a/tcl/target/imx51.cfg
+++ b/tcl/target/imx51.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Freescale i.MX51
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/imx53.cfg b/tcl/target/imx53.cfg
index 84a85ba..855a6ae 100644
--- a/tcl/target/imx53.cfg
+++ b/tcl/target/imx53.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Freescale i.MX53
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/imx6.cfg b/tcl/target/imx6.cfg
index 2945334..c9b6acf 100644
--- a/tcl/target/imx6.cfg
+++ b/tcl/target/imx6.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale i.MX6 series
#
diff --git a/tcl/target/imx6sx.cfg b/tcl/target/imx6sx.cfg
index d3fae8a..3d4240a 100644
--- a/tcl/target/imx6sx.cfg
+++ b/tcl/target/imx6sx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale i.MX6SoloX
#
diff --git a/tcl/target/imx6ul.cfg b/tcl/target/imx6ul.cfg
index f42aa63..354745e 100644
--- a/tcl/target/imx6ul.cfg
+++ b/tcl/target/imx6ul.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale i.MX6UltraLite series: 6UL 6ULL 6ULZ
#
diff --git a/tcl/target/imx7.cfg b/tcl/target/imx7.cfg
index ea23deb..bd9e3dd 100644
--- a/tcl/target/imx7.cfg
+++ b/tcl/target/imx7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/target/imx7ulp.cfg b/tcl/target/imx7ulp.cfg
index 879fcf8..1467f7c 100644
--- a/tcl/target/imx7ulp.cfg
+++ b/tcl/target/imx7ulp.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP i.MX7ULP: Cortex-A7 + Cortex-M4
#
diff --git a/tcl/target/imx8m.cfg b/tcl/target/imx8m.cfg
index 9a8bfec..6938090 100644
--- a/tcl/target/imx8m.cfg
+++ b/tcl/target/imx8m.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# configuration file for NXP i.MX8M family of SoCs
#
@@ -38,13 +40,14 @@ for { set _core 0 } { $_core < $_cores } { incr _core } {
-baseaddr [lindex $CTIBASE $_core]
set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \
- -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core"
+ -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core -coreid $_core"
if { $_core != 0 } {
# non-boot core examination may fail
set _command "$_command -defer-examine"
set _smp_command "$_smp_command $_TARGETNAME.$_core"
} else {
+ set _command "$_command -rtos hwthread"
set _smp_command "target smp $_TARGETNAME.$_core"
}
diff --git a/tcl/target/imx8qm.cfg b/tcl/target/imx8qm.cfg
index 08cb813..33f9ca1 100644
--- a/tcl/target/imx8qm.cfg
+++ b/tcl/target/imx8qm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP i.MX8QuadMax
#
diff --git a/tcl/target/infineon/tle987x.cfg b/tcl/target/infineon/tle987x.cfg
index 84cc238..ac3db6c 100644
--- a/tcl/target/infineon/tle987x.cfg
+++ b/tcl/target/infineon/tle987x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon TLE987x family (Arm Cortex-M3 @ up to 40 MHz)
#
diff --git a/tcl/target/is5114.cfg b/tcl/target/is5114.cfg
index 1a06b09..d0b1d92 100644
--- a/tcl/target/is5114.cfg
+++ b/tcl/target/is5114.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Insilica IS-5114
# AKA: Atmel AT76C114 - an ARM946 chip
# ATMEL sold his product line to Insilica...
diff --git a/tcl/target/ixp42x.cfg b/tcl/target/ixp42x.cfg
index ee10b21..5c8e903 100644
--- a/tcl/target/ixp42x.cfg
+++ b/tcl/target/ixp42x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#xscale ixp42x CPU
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/k1921vk01t.cfg b/tcl/target/k1921vk01t.cfg
index 926f3c7..a9500ef 100644
--- a/tcl/target/k1921vk01t.cfg
+++ b/tcl/target/k1921vk01t.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# K1921VK01T
# http://niiet.ru/chips/nis?id=354
diff --git a/tcl/target/k40.cfg b/tcl/target/k40.cfg
index 9811611..33e8235 100644
--- a/tcl/target/k40.cfg
+++ b/tcl/target/k40.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis K40 devices
#
diff --git a/tcl/target/k60.cfg b/tcl/target/k60.cfg
index b9c5e3a..3b89102 100644
--- a/tcl/target/k60.cfg
+++ b/tcl/target/k60.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis K60 devices
#
diff --git a/tcl/target/ke0x.cfg b/tcl/target/ke0x.cfg
index b92721f..b357767 100644
--- a/tcl/target/ke0x.cfg
+++ b/tcl/target/ke0x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis KE0x and KEAx series devices
#
diff --git a/tcl/target/ke1xf.cfg b/tcl/target/ke1xf.cfg
index b1200ce..86a1f3b 100644
--- a/tcl/target/ke1xf.cfg
+++ b/tcl/target/ke1xf.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (Freescale) Kinetis KE1xF devices
#
diff --git a/tcl/target/ke1xz.cfg b/tcl/target/ke1xz.cfg
index 6a3f509..9e91542 100644
--- a/tcl/target/ke1xz.cfg
+++ b/tcl/target/ke1xz.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (Freescale) Kinetis KE1xZ devices
#
diff --git a/tcl/target/kl25.cfg b/tcl/target/kl25.cfg
index 0e716e3..916edf6 100644
--- a/tcl/target/kl25.cfg
+++ b/tcl/target/kl25.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis KL25 devices
#
diff --git a/tcl/target/kl46.cfg b/tcl/target/kl46.cfg
index 70ea273..bf6b244 100644
--- a/tcl/target/kl46.cfg
+++ b/tcl/target/kl46.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis KL46 devices
#
diff --git a/tcl/target/klx.cfg b/tcl/target/klx.cfg
index 84f6535..cd236b3 100644
--- a/tcl/target/klx.cfg
+++ b/tcl/target/klx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (former Freescale) Kinetis KL series devices
# Also used for Cortex-M0+ equipped members of KVx and KE1xZ series
diff --git a/tcl/target/ks869x.cfg b/tcl/target/ks869x.cfg
index 78cc402..06e710b 100644
--- a/tcl/target/ks869x.cfg
+++ b/tcl/target/ks869x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ARM920T CPU
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/kx.cfg b/tcl/target/kx.cfg
index 9fda4ed..c87116b 100644
--- a/tcl/target/kx.cfg
+++ b/tcl/target/kx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (former Freescale) Kinetis Kx series devices
# Also used for Cortex-M4 equipped members of KVx and KE1xF series
diff --git a/tcl/target/lpc11xx.cfg b/tcl/target/lpc11xx.cfg
index 7a65c1f..d288e2a 100644
--- a/tcl/target/lpc11xx.cfg
+++ b/tcl/target/lpc11xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC11xx Cortex-M0 with at least 1kB SRAM
set CHIPNAME lpc11xx
set CHIPSERIES lpc1100
diff --git a/tcl/target/lpc12xx.cfg b/tcl/target/lpc12xx.cfg
index a37c6fe..ace5e06 100644
--- a/tcl/target/lpc12xx.cfg
+++ b/tcl/target/lpc12xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC12xx Cortex-M0 with at least 4kB SRAM
set CHIPNAME lpc12xx
set CHIPSERIES lpc1200
diff --git a/tcl/target/lpc13xx.cfg b/tcl/target/lpc13xx.cfg
index 3d128c9..5ac29d3 100644
--- a/tcl/target/lpc13xx.cfg
+++ b/tcl/target/lpc13xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC13xx Cortex-M3 with at least 4kB SRAM
set CHIPNAME lpc13xx
set CHIPSERIES lpc1300
diff --git a/tcl/target/lpc17xx.cfg b/tcl/target/lpc17xx.cfg
index dccf880..35d8bad 100644
--- a/tcl/target/lpc17xx.cfg
+++ b/tcl/target/lpc17xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC17xx Cortex-M3 with at least 8kB SRAM
set CHIPNAME lpc17xx
set CHIPSERIES lpc1700
diff --git a/tcl/target/lpc1850.cfg b/tcl/target/lpc1850.cfg
index 481dc8a..6dd1ab7 100644
--- a/tcl/target/lpc1850.cfg
+++ b/tcl/target/lpc1850.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/swj-dp.tcl]
adapter speed 500
diff --git a/tcl/target/lpc1xxx.cfg b/tcl/target/lpc1xxx.cfg
index 946d1ce..70d26d2 100644
--- a/tcl/target/lpc1xxx.cfg
+++ b/tcl/target/lpc1xxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Main file for NXP LPC1xxx/LPC40xx series Cortex-M0/0+/3/4F parts
#
# !!!!!!
diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg
index 131b9ef..c49b0e5 100644
--- a/tcl/target/lpc2103.cfg
+++ b/tcl/target/lpc2103.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2103 ARM7TDMI-S with 32kB flash and 8kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg
index ddbde22..053ebeb 100644
--- a/tcl/target/lpc2124.cfg
+++ b/tcl/target/lpc2124.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2124 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2129.cfg b/tcl/target/lpc2129.cfg
index a1c3fe7..88ee20f 100644
--- a/tcl/target/lpc2129.cfg
+++ b/tcl/target/lpc2129.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2129 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg
index 503a682..fda622f 100644
--- a/tcl/target/lpc2148.cfg
+++ b/tcl/target/lpc2148.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2148 ARM7TDMI-S with 512kB flash (12kB used by bootloader) and 40kB SRAM (8kB for USB DMA), clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2294.cfg b/tcl/target/lpc2294.cfg
index 1320cda..7537a65 100644
--- a/tcl/target/lpc2294.cfg
+++ b/tcl/target/lpc2294.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2294 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index 235456a..59e41c9 100644
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2378 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 56kB SRAM (16kB for ETH, 8kB for DMA), clocked with 4MHz internal oscillator
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2460.cfg b/tcl/target/lpc2460.cfg
index c229f6d..59b6466 100644
--- a/tcl/target/lpc2460.cfg
+++ b/tcl/target/lpc2460.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2460 ARM7TDMI-S with 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg
index 36b5c46..e4fd49d 100644
--- a/tcl/target/lpc2478.cfg
+++ b/tcl/target/lpc2478.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2478 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator
source [find target/lpc2xxx.cfg]
diff --git a/tcl/target/lpc2900.cfg b/tcl/target/lpc2900.cfg
index 523bc21..67e3c92 100644
--- a/tcl/target/lpc2900.cfg
+++ b/tcl/target/lpc2900.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
diff --git a/tcl/target/lpc2xxx.cfg b/tcl/target/lpc2xxx.cfg
index f947c1b..bc5e600 100644
--- a/tcl/target/lpc2xxx.cfg
+++ b/tcl/target/lpc2xxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Common setup for the LPC2xxx parts
# parameters:
diff --git a/tcl/target/lpc3131.cfg b/tcl/target/lpc3131.cfg
index 89bbf02..09d698a 100644
--- a/tcl/target/lpc3131.cfg
+++ b/tcl/target/lpc3131.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: NXP lpc3131
######################################
diff --git a/tcl/target/lpc3250.cfg b/tcl/target/lpc3250.cfg
index 14bb0f6..244d981 100644
--- a/tcl/target/lpc3250.cfg
+++ b/tcl/target/lpc3250.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# lpc3250 config
#
diff --git a/tcl/target/lpc40xx.cfg b/tcl/target/lpc40xx.cfg
index 606cda5..f0be5a1 100644
--- a/tcl/target/lpc40xx.cfg
+++ b/tcl/target/lpc40xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC40xx Cortex-M4F with at least 16kB SRAM
set CHIPNAME lpc40xx
set CHIPSERIES lpc4000
diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg
index 0c6d0ff..453306a 100644
--- a/tcl/target/lpc4350.cfg
+++ b/tcl/target/lpc4350.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/swj-dp.tcl]
adapter speed 500
diff --git a/tcl/target/lpc4357.cfg b/tcl/target/lpc4357.cfg
index 1a15ad6..f783505 100644
--- a/tcl/target/lpc4357.cfg
+++ b/tcl/target/lpc4357.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP LPC4357
#
diff --git a/tcl/target/lpc4370.cfg b/tcl/target/lpc4370.cfg
index 9db2b9e..fe9e76b 100644
--- a/tcl/target/lpc4370.cfg
+++ b/tcl/target/lpc4370.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP LPC4370 - 1x ARM Cortex-M4 + 2x ARM Cortex-M0 @ up to 204 MHz each
#
diff --git a/tcl/target/lpc84x.cfg b/tcl/target/lpc84x.cfg
index cb36698..af26f27 100644
--- a/tcl/target/lpc84x.cfg
+++ b/tcl/target/lpc84x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC84x Cortex-M0+ with at least 8kB SRAM
if { ![info exists CHIPNAME] } {
set CHIPNAME lpc84x
diff --git a/tcl/target/lpc8nxx.cfg b/tcl/target/lpc8nxx.cfg
index 4db78cb..859e99b 100644
--- a/tcl/target/lpc8nxx.cfg
+++ b/tcl/target/lpc8nxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC8Nxx NHS31xx Cortex-M0+ with 8kB SRAM
# Copyright (C) 2018 by Jean-Christian de Rivaz
# Based on NXP proposal https://community.nxp.com/message/1011149
diff --git a/tcl/target/lpc8xx.cfg b/tcl/target/lpc8xx.cfg
index e0e210b..4c54a2a 100644
--- a/tcl/target/lpc8xx.cfg
+++ b/tcl/target/lpc8xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC8xx Cortex-M0+ with at least 1kB SRAM
if { ![info exists CHIPNAME] } {
set CHIPNAME lpc8xx
diff --git a/tcl/target/ls1012a.cfg b/tcl/target/ls1012a.cfg
index e1bd168..7333ea8 100644
--- a/tcl/target/ls1012a.cfg
+++ b/tcl/target/ls1012a.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP LS1012A
#
diff --git a/tcl/target/marvell/88f3710.cfg b/tcl/target/marvell/88f3710.cfg
index 6e35f29..dcc4516 100644
--- a/tcl/target/marvell/88f3710.cfg
+++ b/tcl/target/marvell/88f3710.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell Armada 3710
set CORES 1
diff --git a/tcl/target/marvell/88f3720.cfg b/tcl/target/marvell/88f3720.cfg
index 799d614..7c29378 100644
--- a/tcl/target/marvell/88f3720.cfg
+++ b/tcl/target/marvell/88f3720.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell Armada 3720
set CORES 2
diff --git a/tcl/target/marvell/88f37x0.cfg b/tcl/target/marvell/88f37x0.cfg
index 5c3dd73..d80f4ef 100644
--- a/tcl/target/marvell/88f37x0.cfg
+++ b/tcl/target/marvell/88f37x0.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Main file for Marvell Armada 3700 series targets
#
# !!!!!!
diff --git a/tcl/target/max32620.cfg b/tcl/target/max32620.cfg
index 6187bb9..9f0f492 100644
--- a/tcl/target/max32620.cfg
+++ b/tcl/target/max32620.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Maxim Integrated MAX32620 OpenOCD target configuration file
# www.maximintegrated.com
diff --git a/tcl/target/max32625.cfg b/tcl/target/max32625.cfg
index 159b360..35e1c3b 100644
--- a/tcl/target/max32625.cfg
+++ b/tcl/target/max32625.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Maxim Integrated MAX32625 OpenOCD target configuration file
# www.maximintegrated.com
diff --git a/tcl/target/max3263x.cfg b/tcl/target/max3263x.cfg
index fc7d11f..52a5a77 100644
--- a/tcl/target/max3263x.cfg
+++ b/tcl/target/max3263x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Maxim Integrated MAX3263X OpenOCD target configuration file
# www.maximintegrated.com
diff --git a/tcl/target/mc13224v.cfg b/tcl/target/mc13224v.cfg
index f756dd9..29e4d9d 100644
--- a/tcl/target/mc13224v.cfg
+++ b/tcl/target/mc13224v.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/arm7tdmi.tcl]
source [find memory.tcl]
diff --git a/tcl/target/mdr32f9q2i.cfg b/tcl/target/mdr32f9q2i.cfg
index 820d2dd..6e958c6 100644
--- a/tcl/target/mdr32f9q2i.cfg
+++ b/tcl/target/mdr32f9q2i.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# MDR32F9Q2I (1986ВЕ92У)
# http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=57&cntnt01returnid=68
diff --git a/tcl/target/nds32v2.cfg b/tcl/target/nds32v2.cfg
index bbf6b3a..07814b7 100644
--- a/tcl/target/nds32v2.cfg
+++ b/tcl/target/nds32v2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Andes Core
#
diff --git a/tcl/target/nds32v3.cfg b/tcl/target/nds32v3.cfg
index 0c267cd..0fd1369 100644
--- a/tcl/target/nds32v3.cfg
+++ b/tcl/target/nds32v3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Andes Core
#
diff --git a/tcl/target/nds32v3m.cfg b/tcl/target/nds32v3m.cfg
index 169e3d1..29a2478 100644
--- a/tcl/target/nds32v3m.cfg
+++ b/tcl/target/nds32v3m.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Andes Core
#
diff --git a/tcl/target/ngultra.cfg b/tcl/target/ngultra.cfg
new file mode 100644
index 0000000..956fdbb
--- /dev/null
+++ b/tcl/target/ngultra.cfg
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (C) 2022 by NanoXplore, France - all rights reserved
+#
+# configuration file for NG-Ultra SoC from NanoXplore.
+# NG-Ultra is a quad-core Cortex-R52 SoC + an FPGA.
+#
+transport select jtag
+adapter speed 10000
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME NGULTRA
+}
+
+if { [info exists CHIPCORES] } {
+ set _cores $CHIPCORES
+} else {
+ set _cores 4
+}
+
+set DBGBASE {0x88210000 0x88310000 0x88410000 0x88510000}
+set CTIBASE {0x88220000 0x88320000 0x88420000 0x88520000}
+
+# Coresight access to the SoC
+jtag newtap $_CHIPNAME.coresight cpu -irlen 4 -expected-id 0x6BA00477
+
+# Misc TAP devices
+jtag newtap $_CHIPNAME.soc cpu -irlen 7 -expected-id 0xFAAA0555
+jtag newtap $_CHIPNAME.pmb unknown1 -irlen 5 -expected-id 0xBA20A005
+jtag newtap $_CHIPNAME.fpga fpga -irlen 4 -ignore-version -ignore-bypass
+
+# Create the Coresight DAP
+dap create $_CHIPNAME.coresight.dap -chain-position $_CHIPNAME.coresight.cpu
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+ cti create cti.$_core -dap $_CHIPNAME.coresight.dap -ap-num 0 \
+ -baseaddr [lindex $CTIBASE $_core]
+# Cores are armv8-r but works with aarch64 (since armv8-r not directly supported by openocd yet).
+ if { $_core == 0} {
+ target create core.$_core aarch64 -dap $_CHIPNAME.coresight.dap \
+ -ap-num 0 -dbgbase [lindex $DBGBASE $_core] -cti cti.$_core
+ } else {
+ target create core.$_core aarch64 -dap $_CHIPNAME.coresight.dap \
+ -ap-num 0 -dbgbase [lindex $DBGBASE $_core] -cti cti.$_core -defer-examine
+ }
+}
+
+# Create direct APB and AXI interfaces
+target create APB mem_ap -dap $_CHIPNAME.coresight.dap -ap-num 0
+target create AXI mem_ap -dap $_CHIPNAME.coresight.dap -ap-num 1
diff --git a/tcl/target/nhs31xx.cfg b/tcl/target/nhs31xx.cfg
index 964be7b..7e4bc4c 100644
--- a/tcl/target/nhs31xx.cfg
+++ b/tcl/target/nhs31xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP NHS31xx Cortex-M0+ with 8kB SRAM
set CHIPNAME nhs31xx
diff --git a/tcl/target/nrf51.cfg b/tcl/target/nrf51.cfg
index d51a50e..48c2715 100644
--- a/tcl/target/nrf51.cfg
+++ b/tcl/target/nrf51.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# script for Nordic nRF51 series, a Cortex-M0 chip
#
diff --git a/tcl/target/nrf52.cfg b/tcl/target/nrf52.cfg
index d0c52fd..2539be0 100644
--- a/tcl/target/nrf52.cfg
+++ b/tcl/target/nrf52.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nordic nRF52 series: ARM Cortex-M4 @ 64 MHz
#
diff --git a/tcl/target/nuc910.cfg b/tcl/target/nuc910.cfg
index 29cd29f..31a3ac6 100644
--- a/tcl/target/nuc910.cfg
+++ b/tcl/target/nuc910.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nuvoton nuc910 (previously W90P910) based soc
#
diff --git a/tcl/target/numicro.cfg b/tcl/target/numicro.cfg
index 73022df..29077f3 100644
--- a/tcl/target/numicro.cfg
+++ b/tcl/target/numicro.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Nuvoton MuMicro Cortex-M0 Series
# Adapt based on what transport is active.
diff --git a/tcl/target/omap2420.cfg b/tcl/target/omap2420.cfg
index 7968ad1..3e31baf 100644
--- a/tcl/target/omap2420.cfg
+++ b/tcl/target/omap2420.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Texas Instruments OMAP 2420
# http://www.ti.com/omap
# as seen in Nokia N8x0 tablets
diff --git a/tcl/target/omap3530.cfg b/tcl/target/omap3530.cfg
index dcf7c51..bd8b111 100644
--- a/tcl/target/omap3530.cfg
+++ b/tcl/target/omap3530.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TI OMAP3530
# http://focus.ti.com/docs/prod/folders/print/omap3530.html
# Other OMAP3 chips remove DSP and/or the OpenGL support
diff --git a/tcl/target/omap4430.cfg b/tcl/target/omap4430.cfg
index 5b9e23c..a448550 100644
--- a/tcl/target/omap4430.cfg
+++ b/tcl/target/omap4430.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# OMAP4430
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/omap4460.cfg b/tcl/target/omap4460.cfg
index fb76e13..bbc824b 100644
--- a/tcl/target/omap4460.cfg
+++ b/tcl/target/omap4460.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# OMAP4460
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/omap5912.cfg b/tcl/target/omap5912.cfg
index 2f9338b..783f460 100644
--- a/tcl/target/omap5912.cfg
+++ b/tcl/target/omap5912.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TI OMAP5912 dual core processor
# http://focus.ti.com/docs/prod/folders/print/omap5912.html
diff --git a/tcl/target/omapl138.cfg b/tcl/target/omapl138.cfg
index 30cf23c..2d670b9 100644
--- a/tcl/target/omapl138.cfg
+++ b/tcl/target/omapl138.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: OMAPL138
#
diff --git a/tcl/target/or1k.cfg b/tcl/target/or1k.cfg
index f85c2ee..ddd4fa2 100644
--- a/tcl/target/or1k.cfg
+++ b/tcl/target/or1k.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _ENDIAN big
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index f15924f..df68e80 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/target/psoc4.cfg b/tcl/target/psoc4.cfg
index 40f2fca..baa2c83 100644
--- a/tcl/target/psoc4.cfg
+++ b/tcl/target/psoc4.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Cypress PSoC 4 devices
#
diff --git a/tcl/target/psoc5lp.cfg b/tcl/target/psoc5lp.cfg
index c90fd42..fe44174 100644
--- a/tcl/target/psoc5lp.cfg
+++ b/tcl/target/psoc5lp.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Cypress PSoC 5LP
#
diff --git a/tcl/target/psoc6.cfg b/tcl/target/psoc6.cfg
index bf63fd5..d69515c 100644
--- a/tcl/target/psoc6.cfg
+++ b/tcl/target/psoc6.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Configuration script for Cypress PSoC6 family of microcontrollers (CY8C6xxx)
# PSoC6 is a dual-core device with CM0+ and CM4 cores. Both cores share
diff --git a/tcl/target/pxa255.cfg b/tcl/target/pxa255.cfg
index 73518bf..14ee13c 100644
--- a/tcl/target/pxa255.cfg
+++ b/tcl/target/pxa255.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# PXA255 chip ... originally from Intel, PXA line was sold to Marvell.
# This chip is now at end-of-life. Final orders have been taken.
diff --git a/tcl/target/pxa270.cfg b/tcl/target/pxa270.cfg
index bd904b5..3121e96 100644
--- a/tcl/target/pxa270.cfg
+++ b/tcl/target/pxa270.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#Marvell/Intel PXA270 Script
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/pxa3xx.cfg b/tcl/target/pxa3xx.cfg
index 1a4539c..d670c84 100644
--- a/tcl/target/pxa3xx.cfg
+++ b/tcl/target/pxa3xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell PXA3xx
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/qualcomm_qca4531.cfg b/tcl/target/qualcomm_qca4531.cfg
index 0b046b8..be0c8fa 100644
--- a/tcl/target/qualcomm_qca4531.cfg
+++ b/tcl/target/qualcomm_qca4531.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The QCA4531 is a two stream (2x2) 802.11b/g/n single-band programmable
# Wi-Fi System-on-Chip (SoC) for the Internet of Things (IoT).
#
diff --git a/tcl/target/quark_d20xx.cfg b/tcl/target/quark_d20xx.cfg
index 7d718c2..ca8f440 100644
--- a/tcl/target/quark_d20xx.cfg
+++ b/tcl/target/quark_d20xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
diff --git a/tcl/target/quark_x10xx.cfg b/tcl/target/quark_x10xx.cfg
index a5bbfb4..6463f21 100644
--- a/tcl/target/quark_x10xx.cfg
+++ b/tcl/target/quark_x10xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/target/readme.txt b/tcl/target/readme.txt
index 91bb2d5..deec5b5 100644
--- a/tcl/target/readme.txt
+++ b/tcl/target/readme.txt
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
Prerequisites:
The users of OpenOCD as well as computer programs interacting with OpenOCD are expecting that certain commands
do the same thing across all the targets.
diff --git a/tcl/target/renesas_r7s72100.cfg b/tcl/target/renesas_r7s72100.cfg
index 5220b3c..dc9a1d8 100644
--- a/tcl/target/renesas_r7s72100.cfg
+++ b/tcl/target/renesas_r7s72100.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas RZ/A1H
# https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza1h.html
diff --git a/tcl/target/renesas_rcar_gen2.cfg b/tcl/target/renesas_rcar_gen2.cfg
index e51b372..31ba156 100644
--- a/tcl/target/renesas_rcar_gen2.cfg
+++ b/tcl/target/renesas_rcar_gen2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car Generation 2 SOCs
# - There are a combination of Cortex-A15s and Cortex-A7s for each Gen2 SOC
# - Each SOC can boot through any of the, up to 2, core types that it has
diff --git a/tcl/target/renesas_rcar_gen3.cfg b/tcl/target/renesas_rcar_gen3.cfg
index 334d255..3e44983 100644
--- a/tcl/target/renesas_rcar_gen3.cfg
+++ b/tcl/target/renesas_rcar_gen3.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car Generation 3 SOCs
# - There are a combination of Cortex-A57s, Cortex-A53s, and Cortex-R7 for each Gen3 SOC
# - Each SOC can boot through any of the, up to 3, core types that it has
diff --git a/tcl/target/renesas_rcar_reset_common.cfg b/tcl/target/renesas_rcar_reset_common.cfg
index 3e4579b..987f0c8 100644
--- a/tcl/target/renesas_rcar_reset_common.cfg
+++ b/tcl/target/renesas_rcar_reset_common.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car Gen2 Evaluation Board common settings
reset_config trst_and_srst srst_nogate
diff --git a/tcl/target/renesas_s7g2.cfg b/tcl/target/renesas_s7g2.cfg
index b4be88f..fa9c579 100644
--- a/tcl/target/renesas_s7g2.cfg
+++ b/tcl/target/renesas_s7g2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Renesas Synergy S7 G2 w/ ARM Cortex-M4 @ 240 MHz
#
diff --git a/tcl/target/rk3308.cfg b/tcl/target/rk3308.cfg
index 7f957da..b6086f1 100644
--- a/tcl/target/rk3308.cfg
+++ b/tcl/target/rk3308.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Rockchip RK3308 Target
# https://rockchip.fr/RK3308%20datasheet%20V1.5.pdf
# https://dl.radxa.com/rockpis/docs/hw/datasheets/Rockchip%20RK3308TRM%20V1.1%20Part1-20180810.pdf
diff --git a/tcl/target/rsl10.cfg b/tcl/target/rsl10.cfg
new file mode 100644
index 0000000..f4692cc
--- /dev/null
+++ b/tcl/target/rsl10.cfg
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# RSL10: ARM Cortex-M3
+#
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME rsl10
+}
+
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x8000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x2ba01477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x200000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# TODO: configure reset
+# reset_config srst_only srst_nogate connect_assert_srst
+
+$_TARGETNAME configure -event examine-fail rsl10_lock_warning
+
+proc rsl10_check_connection {} {
+ set target [target current]
+ set dap [$target cget -dap]
+
+ set IDR [$dap apreg 0 0xfc]
+ if {$IDR != 0x24770011} {
+ echo "Error: Cannot access RSL10 AP, maybe connection problem!"
+ return 1
+ }
+ return 0
+}
+
+proc rsl10_lock_warning {} {
+ if {[rsl10_check_connection]} {return}
+
+ poll off
+ echo "****** WARNING ******"
+ echo "RSL10 device probably has lock engaged."
+ echo "Debug access is denied."
+ echo "Use 'rsl10 unlock key1 key2 key3 key4' to erase and unlock the device."
+ echo "****** ....... ******"
+ echo ""
+}
+
+flash bank $_CHIPNAME.main rsl10 0x00100000 0x60000 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.nvr1 rsl10 0x00080000 0x800 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.nvr2 rsl10 0x00080800 0x800 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.nvr3 rsl10 0x00081000 0x800 0 0 $_TARGETNAME
+
+# TODO: implement flashing for nvr4
+# flash bank $_CHIPNAME.nvr4 rsl10 0x00081800 0x400 0 0 $_TARGETNAME
diff --git a/tcl/target/samsung_s3c2410.cfg b/tcl/target/samsung_s3c2410.cfg
index 017c104..5a04871 100644
--- a/tcl/target/samsung_s3c2410.cfg
+++ b/tcl/target/samsung_s3c2410.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Found on the 'TinCanTools' Hammer board.
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/samsung_s3c2440.cfg b/tcl/target/samsung_s3c2440.cfg
index a97659b..d976a8e 100644
--- a/tcl/target/samsung_s3c2440.cfg
+++ b/tcl/target/samsung_s3c2440.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Samsung 2440 system on chip
# Tested on a S3C2440 Evaluation board by keesj
# Processor : ARM920Tid(wb) rev 0 (v4l)
diff --git a/tcl/target/samsung_s3c2450.cfg b/tcl/target/samsung_s3c2450.cfg
index 2482557..801e1bc 100644
--- a/tcl/target/samsung_s3c2450.cfg
+++ b/tcl/target/samsung_s3c2450.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Samsung 2450 system on chip
# Processor : ARM926ejs (wb) rev 0 (v4l)
# Info: JTAG tap: s3c2450.cpu tap/device found: 0x07926F0F
diff --git a/tcl/target/samsung_s3c4510.cfg b/tcl/target/samsung_s3c4510.cfg
index 8bc5da5..45bed2f 100644
--- a/tcl/target/samsung_s3c4510.cfg
+++ b/tcl/target/samsung_s3c4510.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/target/samsung_s3c6410.cfg b/tcl/target/samsung_s3c6410.cfg
index 9f7c2cd..c157458 100644
--- a/tcl/target/samsung_s3c6410.cfg
+++ b/tcl/target/samsung_s3c6410.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# -*- tcl -*-
# Target configuration for the Samsung s3c6410 system on chip
# Tested on a SMDK6410
diff --git a/tcl/target/sharp_lh79532.cfg b/tcl/target/sharp_lh79532.cfg
index a464839..af6ceab 100644
--- a/tcl/target/sharp_lh79532.cfg
+++ b/tcl/target/sharp_lh79532.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
reset_config srst_only srst_pulls_trst
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/sim3x.cfg b/tcl/target/sim3x.cfg
index 3d3fc5c..e6bea70 100644
--- a/tcl/target/sim3x.cfg
+++ b/tcl/target/sim3x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Silicon Laboratories SiM3x Cortex-M3
#
diff --git a/tcl/target/smp8634.cfg b/tcl/target/smp8634.cfg
index e95f633..0e609d8 100644
--- a/tcl/target/smp8634.cfg
+++ b/tcl/target/smp8634.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Sigma Designs SMP8634 (eventually even SMP8635)
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/snps_em_sk_fpga.cfg b/tcl/target/snps_em_sk_fpga.cfg
index d09561f..62f4dec 100644
--- a/tcl/target/snps_em_sk_fpga.cfg
+++ b/tcl/target/snps_em_sk_fpga.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2014-2015,2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# Xilinx Spartan-6 XC6SLX45 FPGA on EM Starter Kit v1.
diff --git a/tcl/target/snps_hsdk.cfg b/tcl/target/snps_hsdk.cfg
index 372b406..b4f3684 100644
--- a/tcl/target/snps_hsdk.cfg
+++ b/tcl/target/snps_hsdk.cfg
@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) 2019,2020 Synopsys, Inc.
# Anton Kolesov <anton.kolesov@synopsys.com>
# Didin Evgeniy <didin@synopsys.com>
-#
-# SPDX-License-Identifier: GPL-2.0-or-later
#
# HS Development Kit SoC.
diff --git a/tcl/target/spear3xx.cfg b/tcl/target/spear3xx.cfg
index a86a3c4..1261cd4 100644
--- a/tcl/target/spear3xx.cfg
+++ b/tcl/target/spear3xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the ST SPEAr3xx family of system on chip
# Supported SPEAr300, SPEAr310, SPEAr320
# http://www.st.com/spear
diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg
index 4865e29..3cd91eb 100644
--- a/tcl/target/stellaris.cfg
+++ b/tcl/target/stellaris.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TI/Luminary Stellaris LM3S chip family
# Some devices have errata in returning their device class.
diff --git a/tcl/target/stm32f0x.cfg b/tcl/target/stm32f0x.cfg
index b20d036..5b8954e 100644
--- a/tcl/target/stm32f0x.cfg
+++ b/tcl/target/stm32f0x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f0x family
#
diff --git a/tcl/target/stm32f1x.cfg b/tcl/target/stm32f1x.cfg
index 3e85fb2..53e81a5 100644
--- a/tcl/target/stm32f1x.cfg
+++ b/tcl/target/stm32f1x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f1x family
#
@@ -81,9 +83,16 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042004 0x00000307 0
}
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/stm32f2x.cfg b/tcl/target/stm32f2x.cfg
index d790feb..f475826 100644
--- a/tcl/target/stm32f2x.cfg
+++ b/tcl/target/stm32f2x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f2x family
#
@@ -81,9 +83,16 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042008 0x00001800 0
}
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index e3f1a34..4ecc7ed 100644
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f3x family
#
@@ -101,9 +103,16 @@ $_TARGETNAME configure -event examine-end { stm32f3x_default_examine_end }
$_TARGETNAME configure -event reset-start { stm32f3x_default_reset_start }
$_TARGETNAME configure -event reset-init { stm32f3x_default_reset_init }
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xe0042004 0x00000020 0
}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index aa2816e..35d8275 100644
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f4x family
#
@@ -38,8 +40,6 @@ if { [info exists CPUTAPID] } {
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
-tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
-
if {[using_jtag]} {
jtag newtap $_CHIPNAME bs -irlen 5
}
@@ -91,24 +91,30 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042008 0x00001800 0
}
-proc proc_post_enable {_chipname} {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
targets $_chipname.cpu
if { [$_chipname.tpiu cget -protocol] eq "sync" } {
switch [$_chipname.tpiu cget -port-width] {
1 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 1 bit; GPIOE[2-3] to AF0
mmw 0xE0042004 0x00000060 0x000000c0
mmw 0x40021020 0x00000000 0x0000ff00
mmw 0x40021000 0x000000a0 0x000000f0
mmw 0x40021008 0x000000f0 0x00000000
}
2 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 2 bit; GPIOE[2-4] to AF0
mmw 0xE0042004 0x000000a0 0x000000c0
mmw 0x40021020 0x00000000 0x000fff00
mmw 0x40021000 0x000002a0 0x000003f0
mmw 0x40021008 0x000003f0 0x00000000
}
4 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 4 bit; GPIOE[2-6] to AF0
mmw 0xE0042004 0x000000e0 0x000000c0
mmw 0x40021020 0x00000000 0x0fffff00
mmw 0x40021000 0x00002aa0 0x00003ff0
@@ -116,11 +122,12 @@ proc proc_post_enable {_chipname} {
}
}
} else {
+ # Set TRACE_IOEN; TRACE_MODE to async
mmw 0xE0042004 0x00000020 0x000000c0
}
}
-$_CHIPNAME.tpiu configure -event post-enable "proc_post_enable $_CHIPNAME"
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_CHIPNAME"
$_TARGETNAME configure -event reset-init {
# Configure PLL to boost clock to HSI x 4 (64 MHz)
diff --git a/tcl/target/stm32f7x.cfg b/tcl/target/stm32f7x.cfg
index 91ab289..3782b9a 100644
--- a/tcl/target/stm32f7x.cfg
+++ b/tcl/target/stm32f7x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f7x family
#
@@ -107,13 +109,20 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042008 0x00001800 0
}
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
+
$_TARGETNAME configure -event reset-init {
# If the HSE was previously enabled and the external clock source
# disappeared, RCC_CR.HSERDY can get stuck at 1 and the PLL cannot be
diff --git a/tcl/target/stm32g0x.cfg b/tcl/target/stm32g0x.cfg
index 7df5306..b6d9a22 100644
--- a/tcl/target/stm32g0x.cfg
+++ b/tcl/target/stm32g0x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32g0x family
#
diff --git a/tcl/target/stm32g4x.cfg b/tcl/target/stm32g4x.cfg
index 360447b..39ed1e3 100644
--- a/tcl/target/stm32g4x.cfg
+++ b/tcl/target/stm32g4x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32g4x family
#
@@ -95,9 +97,16 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042008 0x00001800 0
}
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg
index ca685c2..5aae938 100644
--- a/tcl/target/stm32h7x.cfg
+++ b/tcl/target/stm32h7x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32h7x family
#
diff --git a/tcl/target/stm32h7x_dual_bank.cfg b/tcl/target/stm32h7x_dual_bank.cfg
index a88d70d..41a4773 100644
--- a/tcl/target/stm32h7x_dual_bank.cfg
+++ b/tcl/target/stm32h7x_dual_bank.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32h7x family (dual flash bank)
# STM32H7xxxI 2Mo have a dual bank flash.
diff --git a/tcl/target/stm32l0.cfg b/tcl/target/stm32l0.cfg
index 7653d13..b4bdb18 100644
--- a/tcl/target/stm32l0.cfg
+++ b/tcl/target/stm32l0.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# M0+ devices only have SW-DP, but swj-dp code works, just don't
# set any jtag related features
diff --git a/tcl/target/stm32l0_dual_bank.cfg b/tcl/target/stm32l0_dual_bank.cfg
index f9f1a4e..ff3cb90 100644
--- a/tcl/target/stm32l0_dual_bank.cfg
+++ b/tcl/target/stm32l0_dual_bank.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/stm32l0.cfg]
# Add the second flash bank.
diff --git a/tcl/target/stm32l1.cfg b/tcl/target/stm32l1.cfg
index a81d7c7..53d9076 100644
--- a/tcl/target/stm32l1.cfg
+++ b/tcl/target/stm32l1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# stm32l1 devices support both JTAG and SWD transports.
#
@@ -99,9 +101,16 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042008 0x00001800 0
}
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/stm32l1x_dual_bank.cfg b/tcl/target/stm32l1x_dual_bank.cfg
index a3f7413..deefdb4 100644
--- a/tcl/target/stm32l1x_dual_bank.cfg
+++ b/tcl/target/stm32l1x_dual_bank.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/stm32l1.cfg]
# The stm32l1x 384kb have a dual bank flash.
diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index 9bd7e37..9a69673 100644
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32l4x family
#
@@ -38,8 +40,6 @@ if { [info exists CPUTAPID] } {
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
-tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
-
if {[using_jtag]} {
jtag newtap $_CHIPNAME bs -irlen 5
}
@@ -101,24 +101,30 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042008 0x00001800 0
}
-proc proc_post_enable {_chipname} {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
targets $_chipname.cpu
if { [$_chipname.tpiu cget -protocol] eq "sync" } {
switch [$_chipname.tpiu cget -port-width] {
1 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 1 bit; GPIOE[2-3] to AF0
mmw 0xE0042004 0x00000060 0x000000c0
mmw 0x48001020 0x00000000 0x0000ff00
mmw 0x48001000 0x000000a0 0x000000f0
mmw 0x48001008 0x000000f0 0x00000000
}
2 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 2 bit; GPIOE[2-4] to AF0
mmw 0xE0042004 0x000000a0 0x000000c0
mmw 0x48001020 0x00000000 0x000fff00
mmw 0x48001000 0x000002a0 0x000003f0
mmw 0x48001008 0x000003f0 0x00000000
}
4 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 4 bit; GPIOE[2-6] to AF0
mmw 0xE0042004 0x000000e0 0x000000c0
mmw 0x48001020 0x00000000 0x0fffff00
mmw 0x48001000 0x00002aa0 0x00003ff0
@@ -126,11 +132,12 @@ proc proc_post_enable {_chipname} {
}
}
} else {
+ # Set TRACE_IOEN; TRACE_MODE to async
mmw 0xE0042004 0x00000020 0x000000c0
}
}
-$_CHIPNAME.tpiu configure -event post-enable "proc_post_enable $_CHIPNAME"
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_CHIPNAME"
$_TARGETNAME configure -event reset-init {
# CPU comes out of reset with MSI_ON | MSI_RDY | MSI Range 6 (4 MHz).
diff --git a/tcl/target/stm32mp13x.cfg b/tcl/target/stm32mp13x.cfg
index 0c464b4..bcf25c9 100644
--- a/tcl/target/stm32mp13x.cfg
+++ b/tcl/target/stm32mp13x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STMicroelectronics STM32MP13x (Single Cortex-A7)
# http://www.st.com/stm32mp1
diff --git a/tcl/target/stm32mp15x.cfg b/tcl/target/stm32mp15x.cfg
index afd5d24..bcdda73 100644
--- a/tcl/target/stm32mp15x.cfg
+++ b/tcl/target/stm32mp15x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STMicroelectronics STM32MP15x (Single/Dual Cortex-A7 plus Cortex-M4)
# http://www.st.com/stm32mp1
diff --git a/tcl/target/stm32w108xx.cfg b/tcl/target/stm32w108xx.cfg
index 0470bf6..e6a62e8 100644
--- a/tcl/target/stm32w108xx.cfg
+++ b/tcl/target/stm32w108xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Target configuration for the ST STM32W108xx chips
#
diff --git a/tcl/target/stm32wbx.cfg b/tcl/target/stm32wbx.cfg
index 6467667..737b144 100644
--- a/tcl/target/stm32wbx.cfg
+++ b/tcl/target/stm32wbx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32wbx family
#
@@ -95,9 +97,16 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE004203C 0x00001800 0
}
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/stm32wlx.cfg b/tcl/target/stm32wlx.cfg
index 75f6f02..39c897f 100644
--- a/tcl/target/stm32wlx.cfg
+++ b/tcl/target/stm32wlx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32wlx family
#
@@ -117,9 +119,7 @@ $_CHIPNAME.cpu0 configure -event examine-end {
}
}
-$_CHIPNAME.cpu0 configure -event trace-config {
- # nothing to do
-}
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
if {[set $_CHIPNAME.DUAL_CORE]} {
target create $_CHIPNAME.cpu1 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
diff --git a/tcl/target/stm32x5x_common.cfg b/tcl/target/stm32x5x_common.cfg
index 276d0cc..c506e22 100644
--- a/tcl/target/stm32x5x_common.cfg
+++ b/tcl/target/stm32x5x_common.cfg
@@ -146,9 +146,16 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
$_TARGETNAME configure -work-area-phys $workarea_addr
}
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0044004 0x00000020 0
}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
diff --git a/tcl/target/stm32xl.cfg b/tcl/target/stm32xl.cfg
index f72896d..ad68f3a 100644
--- a/tcl/target/stm32xl.cfg
+++ b/tcl/target/stm32xl.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32xl family (dual flash bank)
source [find target/stm32f1x.cfg]
diff --git a/tcl/target/stm8l.cfg b/tcl/target/stm8l.cfg
index a06c4cb..583a2a4 100644
--- a/tcl/target/stm8l.cfg
+++ b/tcl/target/stm8l.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm8l family
#
diff --git a/tcl/target/stm8l152.cfg b/tcl/target/stm8l152.cfg
index 8545a5a..b716ce1 100644
--- a/tcl/target/stm8l152.cfg
+++ b/tcl/target/stm8l152.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8L152
set EEPROMSTART 0x1000
diff --git a/tcl/target/stm8s.cfg b/tcl/target/stm8s.cfg
index 2dae655..01e50d0 100644
--- a/tcl/target/stm8s.cfg
+++ b/tcl/target/stm8s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm8s family
#
diff --git a/tcl/target/stm8s003.cfg b/tcl/target/stm8s003.cfg
index 34997be..60f5c3c 100644
--- a/tcl/target/stm8s003.cfg
+++ b/tcl/target/stm8s003.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8S003
set FLASHEND 0x9FFF
diff --git a/tcl/target/stm8s103.cfg b/tcl/target/stm8s103.cfg
index 714acf4..41350cb 100644
--- a/tcl/target/stm8s103.cfg
+++ b/tcl/target/stm8s103.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8S103
set FLASHEND 0x9FFF
diff --git a/tcl/target/stm8s105.cfg b/tcl/target/stm8s105.cfg
index 820bcf7..6af491e 100644
--- a/tcl/target/stm8s105.cfg
+++ b/tcl/target/stm8s105.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8S105
proc stm8_reset_rop {} {
diff --git a/tcl/target/str710.cfg b/tcl/target/str710.cfg
index 29faaaa..ff89717 100644
--- a/tcl/target/str710.cfg
+++ b/tcl/target/str710.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#start slow, speed up after reset
adapter speed 10
diff --git a/tcl/target/str730.cfg b/tcl/target/str730.cfg
index e9e2f26..57681f9 100644
--- a/tcl/target/str730.cfg
+++ b/tcl/target/str730.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#STR730 CPU
adapter speed 3000
diff --git a/tcl/target/str750.cfg b/tcl/target/str750.cfg
index 335d5ad..5af7b74 100644
--- a/tcl/target/str750.cfg
+++ b/tcl/target/str750.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#STR750 CPU
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg
index 7426276..3167b40 100644
--- a/tcl/target/str912.cfg
+++ b/tcl/target/str912.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for str9
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/swj-dp.tcl b/tcl/target/swj-dp.tcl
index 3fb0263..f2b233f 100644
--- a/tcl/target/swj-dp.tcl
+++ b/tcl/target/swj-dp.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ARM Debug Interface V5 (ADI_V5) utility
# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
# SW-DP and JTAG-DP targets don't need to switch based
diff --git a/tcl/target/swm050.cfg b/tcl/target/swm050.cfg
index e6f2ecb..6cc5f6d 100644
--- a/tcl/target/swm050.cfg
+++ b/tcl/target/swm050.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Synwit SWM050
source [find target/swj-dp.tcl]
diff --git a/tcl/target/test_reset_syntax_error.cfg b/tcl/target/test_reset_syntax_error.cfg
index cb4e46f..7ef5914 100644
--- a/tcl/target/test_reset_syntax_error.cfg
+++ b/tcl/target/test_reset_syntax_error.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Test script to check that syntax error in reset
# script is reported properly.
diff --git a/tcl/target/test_syntax_error.cfg b/tcl/target/test_syntax_error.cfg
index d4f92fa..2d5da7f 100644
--- a/tcl/target/test_syntax_error.cfg
+++ b/tcl/target/test_syntax_error.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This script tests a syntax error in the startup
# config script
diff --git a/tcl/target/ti-ar7.cfg b/tcl/target/ti-ar7.cfg
index 19d8c6f..28b6cf7 100644
--- a/tcl/target/ti-ar7.cfg
+++ b/tcl/target/ti-ar7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments AR7 SOC - used in many adsl modems.
# http://www.linux-mips.org/wiki/AR7
diff --git a/tcl/target/ti-cjtag.cfg b/tcl/target/ti-cjtag.cfg
index 7114b2a..d5e13e2 100644
--- a/tcl/target/ti-cjtag.cfg
+++ b/tcl/target/ti-cjtag.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# A start sequence to change from cJTAG to 4-pin JTAG
# This is needed for CC2538 and CC26xx to be able to communicate through JTAG
# Read section 6.3 in http://www.ti.com/lit/pdf/swru319 for more information.
diff --git a/tcl/target/ti_calypso.cfg b/tcl/target/ti_calypso.cfg
index 52a84fb..9083336 100644
--- a/tcl/target/ti_calypso.cfg
+++ b/tcl/target/ti_calypso.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Calypso (lite) G2 C035 Digital Base Band chip
#
diff --git a/tcl/target/ti_cc13x0.cfg b/tcl/target/ti_cc13x0.cfg
index 6ea9bd8..f1c43a6 100644
--- a/tcl/target/ti_cc13x0.cfg
+++ b/tcl/target/ti_cc13x0.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC13x0 - ARM Cortex-M3
#
diff --git a/tcl/target/ti_cc13x2.cfg b/tcl/target/ti_cc13x2.cfg
index 280eef4..c850816 100644
--- a/tcl/target/ti_cc13x2.cfg
+++ b/tcl/target/ti_cc13x2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC13x2 - ARM Cortex-M4
#
diff --git a/tcl/target/ti_cc26x0.cfg b/tcl/target/ti_cc26x0.cfg
index f95d7b2..b9ccf31 100644
--- a/tcl/target/ti_cc26x0.cfg
+++ b/tcl/target/ti_cc26x0.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC26x0 - ARM Cortex-M3
#
diff --git a/tcl/target/ti_cc26x2.cfg b/tcl/target/ti_cc26x2.cfg
index ecee3fa..62c91c3 100644
--- a/tcl/target/ti_cc26x2.cfg
+++ b/tcl/target/ti_cc26x2.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC26x2 - ARM Cortex-M4
#
diff --git a/tcl/target/ti_cc3220sf.cfg b/tcl/target/ti_cc3220sf.cfg
index c0a7b56..cf43363 100644
--- a/tcl/target/ti_cc3220sf.cfg
+++ b/tcl/target/ti_cc3220sf.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC3220SF - ARM Cortex-M4
#
diff --git a/tcl/target/ti_cc32xx.cfg b/tcl/target/ti_cc32xx.cfg
index e3e3ebc..9eb03eb 100644
--- a/tcl/target/ti_cc32xx.cfg
+++ b/tcl/target/ti_cc32xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC32xx - ARM Cortex-M4
#
diff --git a/tcl/target/ti_dm355.cfg b/tcl/target/ti_dm355.cfg
index 19fb0b6..4292373 100644
--- a/tcl/target/ti_dm355.cfg
+++ b/tcl/target/ti_dm355.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: TMS320DM355
#
diff --git a/tcl/target/ti_dm365.cfg b/tcl/target/ti_dm365.cfg
index f71a77a..e19efd7 100644
--- a/tcl/target/ti_dm365.cfg
+++ b/tcl/target/ti_dm365.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: TMS320DM365
#
diff --git a/tcl/target/ti_dm6446.cfg b/tcl/target/ti_dm6446.cfg
index ccc650a..8938234 100644
--- a/tcl/target/ti_dm6446.cfg
+++ b/tcl/target/ti_dm6446.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: TMS320DM6446
#
diff --git a/tcl/target/ti_msp432.cfg b/tcl/target/ti_msp432.cfg
index 77f81da..8a90b98 100644
--- a/tcl/target/ti_msp432.cfg
+++ b/tcl/target/ti_msp432.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments MSP432 - ARM Cortex-M4F @ up to 48 MHz
#
diff --git a/tcl/target/ti_rm4x.cfg b/tcl/target/ti_rm4x.cfg
index 85c3e81..715aa5b 100644
--- a/tcl/target/ti_rm4x.cfg
+++ b/tcl/target/ti_rm4x.cfg
@@ -1 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/ti_tms570.cfg]
diff --git a/tcl/target/ti_tms570.cfg b/tcl/target/ti_tms570.cfg
index d06ff97..213fb09 100644
--- a/tcl/target/ti_tms570.cfg
+++ b/tcl/target/ti_tms570.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter speed 1500
if { [info exists CHIPNAME] } {
diff --git a/tcl/target/ti_tms570ls20xxx.cfg b/tcl/target/ti_tms570ls20xxx.cfg
index ef45b7a..cc2bbd6 100644
--- a/tcl/target/ti_tms570ls20xxx.cfg
+++ b/tcl/target/ti_tms570ls20xxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TMS570LS20216, TMS570LS20206, TMS570LS10216
# TMS570LS10206, TMS570LS10116, TMS570LS10106
set DAP_TAPID 0x0B7B302F
diff --git a/tcl/target/ti_tms570ls3137.cfg b/tcl/target/ti_tms570ls3137.cfg
index f291803..ebe2cfc 100644
--- a/tcl/target/ti_tms570ls3137.cfg
+++ b/tcl/target/ti_tms570ls3137.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TMS570LS3137
set DAP_TAPID 0x0B8A002F
set JRC_TAPID 0x0B8A002F
diff --git a/tcl/target/tmpa900.cfg b/tcl/target/tmpa900.cfg
index 8e70700..b7ec689 100644
--- a/tcl/target/tmpa900.cfg
+++ b/tcl/target/tmpa900.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Toshiba TMPA900
######################################
diff --git a/tcl/target/tmpa910.cfg b/tcl/target/tmpa910.cfg
index d933c0b..276d1ad 100644
--- a/tcl/target/tmpa910.cfg
+++ b/tcl/target/tmpa910.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Toshiba TMPA910
######################################
diff --git a/tcl/target/tnetc4401.cfg b/tcl/target/tnetc4401.cfg
index 48f7545..6a24980 100644
--- a/tcl/target/tnetc4401.cfg
+++ b/tcl/target/tnetc4401.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Texas Instruments (TI) TNETC4401, MIPS32 DOCSIS-tailored SoC (4Kc-based)
# Used in Knovative KC-100 and Motorola Surfboard SB5120 cable modems.
# Datasheet: https://brezn.muc.ccc.de/~mazzoo/DOCSIS/tnetc4401.pdf
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index 5aee135..417fdd1 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) ST-Ericsson SA 2011
# Author : michel.jaouen@stericsson.com
# U8500 target
diff --git a/tcl/target/vd_riscv.cfg b/tcl/target/vd_riscv.cfg
index b42b25a..f08cb1a 100644
--- a/tcl/target/vd_riscv.cfg
+++ b/tcl/target/vd_riscv.cfg
@@ -14,5 +14,4 @@ target create $_TARGETNAME riscv -chain-position $_TARGETNAME -coreid $_HARTID
riscv set_reset_timeout_sec 120
riscv set_command_timeout_sec 120
-# prefer to use sba for system bus access
-riscv set_prefer_sba on
+riscv set_mem_access sysbus progbuf
diff --git a/tcl/target/vd_xtensa_jtag.cfg b/tcl/target/vd_xtensa_jtag.cfg
new file mode 100644
index 0000000..88f5bcc
--- /dev/null
+++ b/tcl/target/vd_xtensa_jtag.cfg
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# for Palladium emulation systems
+#
+
+# TODO: Enable backdoor memory access
+# set _MEMSTART 0x00000000
+# set _MEMSIZE 0x100000
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path dut_top.JTAG 10ns
+# DMA Memories to access backdoor (up to 4)
+# vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $_MEMSTART $_MEMSIZE
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
+
+# Configure Xtensa core parameters next
+# Generate [xtensa-core-XXX.cfg] via "xt-gdb --dump-oocd-config"
+
+# register target
+proc vdebug_examine_end {} {
+# vdebug register_target
+}
+
+# Default hooks
+$_TARGETNAME configure -event examine-end { vdebug_examine_end }
diff --git a/tcl/target/vybrid_vf6xx.cfg b/tcl/target/vybrid_vf6xx.cfg
index c888d25..776c16b 100644
--- a/tcl/target/vybrid_vf6xx.cfg
+++ b/tcl/target/vybrid_vf6xx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Vybrid VF610
#
diff --git a/tcl/target/xilinx_zynqmp.cfg b/tcl/target/xilinx_zynqmp.cfg
index 2df7a4f..8933729 100644
--- a/tcl/target/xilinx_zynqmp.cfg
+++ b/tcl/target/xilinx_zynqmp.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# target configuration for
# Xilinx ZynqMP (UltraScale+ / A53)
diff --git a/tcl/target/xmc1xxx.cfg b/tcl/target/xmc1xxx.cfg
index eb94d7b..cafd032 100644
--- a/tcl/target/xmc1xxx.cfg
+++ b/tcl/target/xmc1xxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC1100/XMC1200/XMC1300 family (ARM Cortex-M0 @ 32 MHz)
#
diff --git a/tcl/target/xmc4xxx.cfg b/tcl/target/xmc4xxx.cfg
index 3020b28..0e28494 100644
--- a/tcl/target/xmc4xxx.cfg
+++ b/tcl/target/xmc4xxx.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4100/XMC4200/XMC4400/XMC4500 family (ARM Cortex-M4 @ 80-120 MHz)
#
diff --git a/tcl/target/xmos_xs1-xau8a-10_arm.cfg b/tcl/target/xmos_xs1-xau8a-10_arm.cfg
index 3fc197a..60fe9ad 100644
--- a/tcl/target/xmos_xs1-xau8a-10_arm.cfg
+++ b/tcl/target/xmos_xs1-xau8a-10_arm.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# XMOS xCORE-XA XS1-XAU8A-10: ARM Cortex-M3 @ 48 MHz
#
diff --git a/tcl/target/xtensa-core-esp32.cfg b/tcl/target/xtensa-core-esp32.cfg
new file mode 100644
index 0000000..e7b5a20
--- /dev/null
+++ b/tcl/target/xtensa-core-esp32.cfg
@@ -0,0 +1,260 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# OpenOCD configuration file for Xtensa ESP32 target
+
+# Core definition and ABI
+xtensa xtdef LX
+xtensa xtopt arnum 64
+xtensa xtopt windowed 1
+
+# Exception/Interrupt Options
+xtensa xtopt exceptions 1
+xtensa xtopt hipriints 1
+xtensa xtopt intlevels 6
+xtensa xtopt excmlevel 3
+
+# Cache Options
+xtensa xtmem icache 4 0 1
+xtensa xtmem dcache 4 0 1 0
+
+# Memory Options
+xtensa xtmem irom 0x400D0000 0x330000
+xtensa xtmem irom 0x40000000 0x64F00
+xtensa xtmem iram 0x40070000 0x30000
+xtensa xtmem iram 0x400C0000 0x2000
+xtensa xtmem drom 0x3F400000 0x800000
+xtensa xtmem dram 0x3FFAE000 0x52000
+xtensa xtmem dram 0x3FF80000 0x2000
+xtensa xtmem dram 0x3F800000 0x400000
+xtensa xtmem dram 0x50000000 0x2000
+xtensa xtmem dram 0x3FF00000 0x71000
+xtensa xtmem dram 0x60000000 0x20000000
+
+# Memory Protection/Translation Options
+
+# Debug Options
+xtensa xtopt debuglevel 6
+xtensa xtopt ibreaknum 2
+xtensa xtopt dbreaknum 2
+xtensa xtopt tracemem 8192
+xtensa xtopt tracememrev 1
+xtensa xtopt perfcount 2
+
+# Core Registers
+# xtregfmt: Optionally specify "contiguous" vs. "sparse" GDB register map.
+# Default setting is "sparse" and is used with xt-gdb.
+# If contiguous, optional parameter specifies number of registers
+# in "Read General Registers" (g-packet) requests.
+# NOTE: For contiguous format, registers listed in GDB order.
+# xtregs: Total number of Xtensa registers in the system
+xtensa xtregs 205
+xtensa xtregfmt contiguous 105
+xtensa xtreg pc 0x0020
+xtensa xtreg ar0 0x0100
+xtensa xtreg ar1 0x0101
+xtensa xtreg ar2 0x0102
+xtensa xtreg ar3 0x0103
+xtensa xtreg ar4 0x0104
+xtensa xtreg ar5 0x0105
+xtensa xtreg ar6 0x0106
+xtensa xtreg ar7 0x0107
+xtensa xtreg ar8 0x0108
+xtensa xtreg ar9 0x0109
+xtensa xtreg ar10 0x010a
+xtensa xtreg ar11 0x010b
+xtensa xtreg ar12 0x010c
+xtensa xtreg ar13 0x010d
+xtensa xtreg ar14 0x010e
+xtensa xtreg ar15 0x010f
+xtensa xtreg ar16 0x0110
+xtensa xtreg ar17 0x0111
+xtensa xtreg ar18 0x0112
+xtensa xtreg ar19 0x0113
+xtensa xtreg ar20 0x0114
+xtensa xtreg ar21 0x0115
+xtensa xtreg ar22 0x0116
+xtensa xtreg ar23 0x0117
+xtensa xtreg ar24 0x0118
+xtensa xtreg ar25 0x0119
+xtensa xtreg ar26 0x011a
+xtensa xtreg ar27 0x011b
+xtensa xtreg ar28 0x011c
+xtensa xtreg ar29 0x011d
+xtensa xtreg ar30 0x011e
+xtensa xtreg ar31 0x011f
+xtensa xtreg ar32 0x0120
+xtensa xtreg ar33 0x0121
+xtensa xtreg ar34 0x0122
+xtensa xtreg ar35 0x0123
+xtensa xtreg ar36 0x0124
+xtensa xtreg ar37 0x0125
+xtensa xtreg ar38 0x0126
+xtensa xtreg ar39 0x0127
+xtensa xtreg ar40 0x0128
+xtensa xtreg ar41 0x0129
+xtensa xtreg ar42 0x012a
+xtensa xtreg ar43 0x012b
+xtensa xtreg ar44 0x012c
+xtensa xtreg ar45 0x012d
+xtensa xtreg ar46 0x012e
+xtensa xtreg ar47 0x012f
+xtensa xtreg ar48 0x0130
+xtensa xtreg ar49 0x0131
+xtensa xtreg ar50 0x0132
+xtensa xtreg ar51 0x0133
+xtensa xtreg ar52 0x0134
+xtensa xtreg ar53 0x0135
+xtensa xtreg ar54 0x0136
+xtensa xtreg ar55 0x0137
+xtensa xtreg ar56 0x0138
+xtensa xtreg ar57 0x0139
+xtensa xtreg ar58 0x013a
+xtensa xtreg ar59 0x013b
+xtensa xtreg ar60 0x013c
+xtensa xtreg ar61 0x013d
+xtensa xtreg ar62 0x013e
+xtensa xtreg ar63 0x013f
+xtensa xtreg lbeg 0x0200
+xtensa xtreg lend 0x0201
+xtensa xtreg lcount 0x0202
+xtensa xtreg sar 0x0203
+xtensa xtreg windowbase 0x0248
+xtensa xtreg windowstart 0x0249
+xtensa xtreg configid0 0x02b0
+xtensa xtreg configid1 0x02d0
+xtensa xtreg ps 0x02e6
+xtensa xtreg threadptr 0x03e7
+
+# added by hand for esp32
+xtensa xtreg br 0x0204
+xtensa xtreg scompare1 0x020c
+xtensa xtreg acclo 0x0210
+xtensa xtreg acchi 0x0211
+xtensa xtreg m0 0x0220
+xtensa xtreg m1 0x0221
+xtensa xtreg m2 0x0222
+xtensa xtreg m3 0x0223
+xtensa xtreg expstate 0x03e6
+xtensa xtreg f64r_lo 0x03ea
+xtensa xtreg f64r_hi 0x03eb
+xtensa xtreg f64s 0x03ec
+xtensa xtreg f0 0x0030
+xtensa xtreg f1 0x0031
+xtensa xtreg f2 0x0032
+xtensa xtreg f3 0x0033
+xtensa xtreg f4 0x0034
+xtensa xtreg f5 0x0035
+xtensa xtreg f6 0x0036
+xtensa xtreg f7 0x0037
+xtensa xtreg f8 0x0038
+xtensa xtreg f9 0x0039
+xtensa xtreg f10 0x003a
+xtensa xtreg f11 0x003b
+xtensa xtreg f12 0x003c
+xtensa xtreg f13 0x003d
+xtensa xtreg f14 0x003e
+xtensa xtreg f15 0x003f
+xtensa xtreg fcr 0x03e8
+xtensa xtreg fsr 0x03e9
+
+xtensa xtreg mmid 0x0259
+xtensa xtreg ibreakenable 0x0260
+
+xtensa xtreg memctl 0x0261
+xtensa xtreg atomctl 0x0263
+
+xtensa xtreg ddr 0x0268
+xtensa xtreg ibreaka0 0x0280
+xtensa xtreg ibreaka1 0x0281
+xtensa xtreg dbreaka0 0x0290
+xtensa xtreg dbreaka1 0x0291
+xtensa xtreg dbreakc0 0x02a0
+xtensa xtreg dbreakc1 0x02a1
+xtensa xtreg epc1 0x02b1
+xtensa xtreg epc2 0x02b2
+xtensa xtreg epc3 0x02b3
+xtensa xtreg epc4 0x02b4
+xtensa xtreg epc5 0x02b5
+xtensa xtreg epc6 0x02b6
+xtensa xtreg epc7 0x02b7
+xtensa xtreg depc 0x02c0
+xtensa xtreg eps2 0x02c2
+xtensa xtreg eps3 0x02c3
+xtensa xtreg eps4 0x02c4
+xtensa xtreg eps5 0x02c5
+xtensa xtreg eps6 0x02c6
+xtensa xtreg eps7 0x02c7
+xtensa xtreg excsave1 0x02d1
+xtensa xtreg excsave2 0x02d2
+xtensa xtreg excsave3 0x02d3
+xtensa xtreg excsave4 0x02d4
+xtensa xtreg excsave5 0x02d5
+xtensa xtreg excsave6 0x02d6
+xtensa xtreg excsave7 0x02d7
+xtensa xtreg cpenable 0x02e0
+xtensa xtreg interrupt 0x02e2
+xtensa xtreg intset 0x02e2
+xtensa xtreg intclear 0x02e3
+xtensa xtreg intenable 0x02e4
+xtensa xtreg vecbase 0x02e7
+xtensa xtreg exccause 0x02e8
+xtensa xtreg debugcause 0x02e9
+xtensa xtreg ccount 0x02ea
+xtensa xtreg prid 0x02eb
+xtensa xtreg icount 0x02ec
+xtensa xtreg icountlevel 0x02ed
+xtensa xtreg excvaddr 0x02ee
+xtensa xtreg ccompare0 0x02f0
+xtensa xtreg ccompare1 0x02f1
+xtensa xtreg ccompare2 0x02f2
+xtensa xtreg misc0 0x02f4
+xtensa xtreg misc1 0x02f5
+xtensa xtreg misc2 0x02f6
+xtensa xtreg misc3 0x02f7
+xtensa xtreg a0 0x0000
+xtensa xtreg a1 0x0001
+xtensa xtreg a2 0x0002
+xtensa xtreg a3 0x0003
+xtensa xtreg a4 0x0004
+xtensa xtreg a5 0x0005
+xtensa xtreg a6 0x0006
+xtensa xtreg a7 0x0007
+xtensa xtreg a8 0x0008
+xtensa xtreg a9 0x0009
+xtensa xtreg a10 0x000a
+xtensa xtreg a11 0x000b
+xtensa xtreg a12 0x000c
+xtensa xtreg a13 0x000d
+xtensa xtreg a14 0x000e
+xtensa xtreg a15 0x000f
+xtensa xtreg pwrctl 0x2028
+xtensa xtreg pwrstat 0x2029
+xtensa xtreg eristat 0x202a
+xtensa xtreg cs_itctrl 0x202b
+xtensa xtreg cs_claimset 0x202c
+xtensa xtreg cs_claimclr 0x202d
+xtensa xtreg cs_lockaccess 0x202e
+xtensa xtreg cs_lockstatus 0x202f
+xtensa xtreg cs_authstatus 0x2030
+xtensa xtreg fault_info 0x203f
+xtensa xtreg trax_id 0x2040
+xtensa xtreg trax_control 0x2041
+xtensa xtreg trax_status 0x2042
+xtensa xtreg trax_data 0x2043
+xtensa xtreg trax_address 0x2044
+xtensa xtreg trax_pctrigger 0x2045
+xtensa xtreg trax_pcmatch 0x2046
+xtensa xtreg trax_delay 0x2047
+xtensa xtreg trax_memstart 0x2048
+xtensa xtreg trax_memend 0x2049
+xtensa xtreg pmg 0x2057
+xtensa xtreg pmpc 0x2058
+xtensa xtreg pm0 0x2059
+xtensa xtreg pm1 0x205a
+xtensa xtreg pmctrl0 0x2061
+xtensa xtreg pmctrl1 0x2062
+xtensa xtreg pmstat0 0x2069
+xtensa xtreg pmstat1 0x206a
+xtensa xtreg ocdid 0x2071
+xtensa xtreg ocd_dcrclr 0x2072
+xtensa xtreg ocd_dcrset 0x2073
+xtensa xtreg ocd_dsr 0x2074
diff --git a/tcl/target/xtensa-core-esp32s2.cfg b/tcl/target/xtensa-core-esp32s2.cfg
new file mode 100644
index 0000000..e590e51
--- /dev/null
+++ b/tcl/target/xtensa-core-esp32s2.cfg
@@ -0,0 +1,223 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# OpenOCD configuration file for Xtensa ESP32S2 target
+
+# Core definition and ABI
+xtensa xtdef LX
+xtensa xtopt arnum 64
+xtensa xtopt windowed 1
+
+# Exception/Interrupt Options
+xtensa xtopt exceptions 1
+xtensa xtopt hipriints 1
+xtensa xtopt intlevels 6
+xtensa xtopt excmlevel 3
+
+# Cache Options
+xtensa xtmem icache 4 0 1
+xtensa xtmem dcache 4 0 1 0
+
+# Memory Options
+xtensa xtmem irom 0x40080000 0x780000
+xtensa xtmem irom 0x40000000 0x20000
+xtensa xtmem iram 0x40020000 0x50000
+xtensa xtmem iram 0x40070000 0x2000
+xtensa xtmem drom 0x3F000000 0x400000
+xtensa xtmem drom 0x3F4D3FFC 0xAAC004
+xtensa xtmem dram 0x3FFB0000 0x50000
+xtensa xtmem dram 0x3FF9E000 0x2000
+xtensa xtmem dram 0x50000000 0x2000
+xtensa xtmem dram 0x3F500000 0xA80000
+xtensa xtmem dram 0x3F400000 0xD3FFC
+xtensa xtmem dram 0x60000000 0x20000000
+
+# Memory Protection/Translation Options
+
+# Debug Options
+xtensa xtopt debuglevel 6
+xtensa xtopt ibreaknum 2
+xtensa xtopt dbreaknum 2
+xtensa xtopt tracemem 8192
+xtensa xtopt tracememrev 1
+xtensa xtopt perfcount 2
+
+# Core Registers
+# xtregfmt: Optionally specify "contiguous" vs. "sparse" GDB register map.
+# Default setting is "sparse" and is used with xt-gdb.
+# If contiguous, optional parameter specifies number of registers
+# in "Read General Registers" (g-packet) requests.
+# NOTE: For contiguous format, registers listed in GDB order.
+# xtregs: Total number of Xtensa registers in the system
+xtensa xtregs 171
+xtensa xtregfmt contiguous 72
+xtensa xtreg pc 0x0020
+xtensa xtreg ar0 0x0100
+xtensa xtreg ar1 0x0101
+xtensa xtreg ar2 0x0102
+xtensa xtreg ar3 0x0103
+xtensa xtreg ar4 0x0104
+xtensa xtreg ar5 0x0105
+xtensa xtreg ar6 0x0106
+xtensa xtreg ar7 0x0107
+xtensa xtreg ar8 0x0108
+xtensa xtreg ar9 0x0109
+xtensa xtreg ar10 0x010a
+xtensa xtreg ar11 0x010b
+xtensa xtreg ar12 0x010c
+xtensa xtreg ar13 0x010d
+xtensa xtreg ar14 0x010e
+xtensa xtreg ar15 0x010f
+xtensa xtreg ar16 0x0110
+xtensa xtreg ar17 0x0111
+xtensa xtreg ar18 0x0112
+xtensa xtreg ar19 0x0113
+xtensa xtreg ar20 0x0114
+xtensa xtreg ar21 0x0115
+xtensa xtreg ar22 0x0116
+xtensa xtreg ar23 0x0117
+xtensa xtreg ar24 0x0118
+xtensa xtreg ar25 0x0119
+xtensa xtreg ar26 0x011a
+xtensa xtreg ar27 0x011b
+xtensa xtreg ar28 0x011c
+xtensa xtreg ar29 0x011d
+xtensa xtreg ar30 0x011e
+xtensa xtreg ar31 0x011f
+xtensa xtreg ar32 0x0120
+xtensa xtreg ar33 0x0121
+xtensa xtreg ar34 0x0122
+xtensa xtreg ar35 0x0123
+xtensa xtreg ar36 0x0124
+xtensa xtreg ar37 0x0125
+xtensa xtreg ar38 0x0126
+xtensa xtreg ar39 0x0127
+xtensa xtreg ar40 0x0128
+xtensa xtreg ar41 0x0129
+xtensa xtreg ar42 0x012a
+xtensa xtreg ar43 0x012b
+xtensa xtreg ar44 0x012c
+xtensa xtreg ar45 0x012d
+xtensa xtreg ar46 0x012e
+xtensa xtreg ar47 0x012f
+xtensa xtreg ar48 0x0130
+xtensa xtreg ar49 0x0131
+xtensa xtreg ar50 0x0132
+xtensa xtreg ar51 0x0133
+xtensa xtreg ar52 0x0134
+xtensa xtreg ar53 0x0135
+xtensa xtreg ar54 0x0136
+xtensa xtreg ar55 0x0137
+xtensa xtreg ar56 0x0138
+xtensa xtreg ar57 0x0139
+xtensa xtreg ar58 0x013a
+xtensa xtreg ar59 0x013b
+xtensa xtreg ar60 0x013c
+xtensa xtreg ar61 0x013d
+xtensa xtreg ar62 0x013e
+xtensa xtreg ar63 0x013f
+xtensa xtreg sar 0x0203
+xtensa xtreg windowbase 0x0248
+xtensa xtreg windowstart 0x0249
+xtensa xtreg configid0 0x02b0
+xtensa xtreg configid1 0x02d0
+xtensa xtreg ps 0x02e6
+xtensa xtreg threadptr 0x03e7
+# gpio_out should be 0x0300? Hits an exception on wrover
+xtensa xtreg gpio_out 0x0268
+xtensa xtreg mmid 0x0259
+xtensa xtreg ibreakenable 0x0260
+xtensa xtreg ddr 0x0268
+xtensa xtreg ibreaka0 0x0280
+xtensa xtreg ibreaka1 0x0281
+xtensa xtreg dbreaka0 0x0290
+xtensa xtreg dbreaka1 0x0291
+xtensa xtreg dbreakc0 0x02a0
+xtensa xtreg dbreakc1 0x02a1
+xtensa xtreg epc1 0x02b1
+xtensa xtreg epc2 0x02b2
+xtensa xtreg epc3 0x02b3
+xtensa xtreg epc4 0x02b4
+xtensa xtreg epc5 0x02b5
+xtensa xtreg epc6 0x02b6
+xtensa xtreg epc7 0x02b7
+xtensa xtreg depc 0x02c0
+xtensa xtreg eps2 0x02c2
+xtensa xtreg eps3 0x02c3
+xtensa xtreg eps4 0x02c4
+xtensa xtreg eps5 0x02c5
+xtensa xtreg eps6 0x02c6
+xtensa xtreg eps7 0x02c7
+xtensa xtreg excsave1 0x02d1
+xtensa xtreg excsave2 0x02d2
+xtensa xtreg excsave3 0x02d3
+xtensa xtreg excsave4 0x02d4
+xtensa xtreg excsave5 0x02d5
+xtensa xtreg excsave6 0x02d6
+xtensa xtreg excsave7 0x02d7
+xtensa xtreg cpenable 0x02e0
+xtensa xtreg interrupt 0x02e2
+xtensa xtreg intset 0x02e2
+xtensa xtreg intclear 0x02e3
+xtensa xtreg intenable 0x02e4
+xtensa xtreg vecbase 0x02e7
+xtensa xtreg exccause 0x02e8
+xtensa xtreg debugcause 0x02e9
+xtensa xtreg ccount 0x02ea
+xtensa xtreg prid 0x02eb
+xtensa xtreg icount 0x02ec
+xtensa xtreg icountlevel 0x02ed
+xtensa xtreg excvaddr 0x02ee
+xtensa xtreg ccompare0 0x02f0
+xtensa xtreg ccompare1 0x02f1
+xtensa xtreg ccompare2 0x02f2
+xtensa xtreg misc0 0x02f4
+xtensa xtreg misc1 0x02f5
+xtensa xtreg misc2 0x02f6
+xtensa xtreg misc3 0x02f7
+xtensa xtreg a0 0x0000
+xtensa xtreg a1 0x0001
+xtensa xtreg a2 0x0002
+xtensa xtreg a3 0x0003
+xtensa xtreg a4 0x0004
+xtensa xtreg a5 0x0005
+xtensa xtreg a6 0x0006
+xtensa xtreg a7 0x0007
+xtensa xtreg a8 0x0008
+xtensa xtreg a9 0x0009
+xtensa xtreg a10 0x000a
+xtensa xtreg a11 0x000b
+xtensa xtreg a12 0x000c
+xtensa xtreg a13 0x000d
+xtensa xtreg a14 0x000e
+xtensa xtreg a15 0x000f
+xtensa xtreg pwrctl 0x2028
+xtensa xtreg pwrstat 0x2029
+xtensa xtreg eristat 0x202a
+xtensa xtreg cs_itctrl 0x202b
+xtensa xtreg cs_claimset 0x202c
+xtensa xtreg cs_claimclr 0x202d
+xtensa xtreg cs_lockaccess 0x202e
+xtensa xtreg cs_lockstatus 0x202f
+xtensa xtreg cs_authstatus 0x2030
+xtensa xtreg fault_info 0x203f
+xtensa xtreg trax_id 0x2040
+xtensa xtreg trax_control 0x2041
+xtensa xtreg trax_status 0x2042
+xtensa xtreg trax_data 0x2043
+xtensa xtreg trax_address 0x2044
+xtensa xtreg trax_pctrigger 0x2045
+xtensa xtreg trax_pcmatch 0x2046
+xtensa xtreg trax_delay 0x2047
+xtensa xtreg trax_memstart 0x2048
+xtensa xtreg trax_memend 0x2049
+xtensa xtreg pmg 0x2057
+xtensa xtreg pmpc 0x2058
+xtensa xtreg pm0 0x2059
+xtensa xtreg pm1 0x205a
+xtensa xtreg pmctrl0 0x2061
+xtensa xtreg pmctrl1 0x2062
+xtensa xtreg pmstat0 0x2069
+xtensa xtreg pmstat1 0x206a
+xtensa xtreg ocdid 0x2071
+xtensa xtreg ocd_dcrclr 0x2072
+xtensa xtreg ocd_dcrset 0x2073
+xtensa xtreg ocd_dsr 0x2074
diff --git a/tcl/target/xtensa-core-esp32s3.cfg b/tcl/target/xtensa-core-esp32s3.cfg
new file mode 100644
index 0000000..f5c1cb3
--- /dev/null
+++ b/tcl/target/xtensa-core-esp32s3.cfg
@@ -0,0 +1,297 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# OpenOCD configuration file for Xtensa ESP32S3 target
+
+# Core definition and ABI
+xtensa xtdef LX
+xtensa xtopt arnum 64
+xtensa xtopt windowed 1
+
+# Exception/Interrupt Options
+xtensa xtopt exceptions 1
+xtensa xtopt hipriints 1
+xtensa xtopt intlevels 6
+xtensa xtopt excmlevel 3
+
+# Cache Options
+
+# Memory Options
+xtensa xtmem irom 0x42000000 0x2000000
+xtensa xtmem irom 0x40000000 0x60000
+xtensa xtmem iram 0x40370000 0x70000
+xtensa xtmem iram 0x600FE000 0x2000
+xtensa xtmem drom 0x3C000000 0x1000000
+xtensa xtmem dram 0x3FC88000 0x78000
+xtensa xtmem dram 0x600FE000 0x2000
+xtensa xtmem dram 0x50000000 0x2000
+xtensa xtmem dram 0x60000000 0x10000000
+
+# Memory Protection/Translation Options
+
+# Debug Options
+xtensa xtopt debuglevel 6
+xtensa xtopt ibreaknum 2
+xtensa xtopt dbreaknum 2
+xtensa xtopt tracemem 16384
+xtensa xtopt tracememrev 1
+xtensa xtopt perfcount 2
+
+
+# Core Registers
+# xtregfmt: Optionally specify "contiguous" vs. "sparse" GDB register map.
+# Default setting is "sparse" and is used with xt-gdb.
+# If contiguous, optional parameter specifies number of registers
+# in "Read General Registers" (g-packet) requests.
+# NOTE: For contiguous format, registers listed in GDB order.
+# xtregs: Total number of Xtensa registers in the system
+xtensa xtregs 244
+xtensa xtregfmt contiguous 128
+xtensa xtreg pc 0x0020
+xtensa xtreg ar0 0x0100
+xtensa xtreg ar1 0x0101
+xtensa xtreg ar2 0x0102
+xtensa xtreg ar3 0x0103
+xtensa xtreg ar4 0x0104
+xtensa xtreg ar5 0x0105
+xtensa xtreg ar6 0x0106
+xtensa xtreg ar7 0x0107
+xtensa xtreg ar8 0x0108
+xtensa xtreg ar9 0x0109
+xtensa xtreg ar10 0x010a
+xtensa xtreg ar11 0x010b
+xtensa xtreg ar12 0x010c
+xtensa xtreg ar13 0x010d
+xtensa xtreg ar14 0x010e
+xtensa xtreg ar15 0x010f
+xtensa xtreg ar16 0x0110
+xtensa xtreg ar17 0x0111
+xtensa xtreg ar18 0x0112
+xtensa xtreg ar19 0x0113
+xtensa xtreg ar20 0x0114
+xtensa xtreg ar21 0x0115
+xtensa xtreg ar22 0x0116
+xtensa xtreg ar23 0x0117
+xtensa xtreg ar24 0x0118
+xtensa xtreg ar25 0x0119
+xtensa xtreg ar26 0x011a
+xtensa xtreg ar27 0x011b
+xtensa xtreg ar28 0x011c
+xtensa xtreg ar29 0x011d
+xtensa xtreg ar30 0x011e
+xtensa xtreg ar31 0x011f
+xtensa xtreg ar32 0x0120
+xtensa xtreg ar33 0x0121
+xtensa xtreg ar34 0x0122
+xtensa xtreg ar35 0x0123
+xtensa xtreg ar36 0x0124
+xtensa xtreg ar37 0x0125
+xtensa xtreg ar38 0x0126
+xtensa xtreg ar39 0x0127
+xtensa xtreg ar40 0x0128
+xtensa xtreg ar41 0x0129
+xtensa xtreg ar42 0x012a
+xtensa xtreg ar43 0x012b
+xtensa xtreg ar44 0x012c
+xtensa xtreg ar45 0x012d
+xtensa xtreg ar46 0x012e
+xtensa xtreg ar47 0x012f
+xtensa xtreg ar48 0x0130
+xtensa xtreg ar49 0x0131
+xtensa xtreg ar50 0x0132
+xtensa xtreg ar51 0x0133
+xtensa xtreg ar52 0x0134
+xtensa xtreg ar53 0x0135
+xtensa xtreg ar54 0x0136
+xtensa xtreg ar55 0x0137
+xtensa xtreg ar56 0x0138
+xtensa xtreg ar57 0x0139
+xtensa xtreg ar58 0x013a
+xtensa xtreg ar59 0x013b
+xtensa xtreg ar60 0x013c
+xtensa xtreg ar61 0x013d
+xtensa xtreg ar62 0x013e
+xtensa xtreg ar63 0x013f
+xtensa xtreg lbeg 0x0200
+xtensa xtreg lend 0x0201
+xtensa xtreg lcount 0x0202
+xtensa xtreg sar 0x0203
+xtensa xtreg windowbase 0x0248
+xtensa xtreg windowstart 0x0249
+xtensa xtreg configid0 0x02b0
+xtensa xtreg configid1 0x02d0
+xtensa xtreg ps 0x02e6
+xtensa xtreg threadptr 0x03e7
+xtensa xtreg br 0x0204
+xtensa xtreg scompare1 0x020c
+xtensa xtreg acclo 0x0210
+xtensa xtreg acchi 0x0211
+xtensa xtreg m0 0x0220
+xtensa xtreg m1 0x0221
+xtensa xtreg m2 0x0222
+xtensa xtreg m3 0x0223
+
+# TODO: update gpioout address while testing on S3 HW
+xtensa xtreg gpioout 0x02f4
+
+xtensa xtreg f0 0x0030
+xtensa xtreg f1 0x0031
+xtensa xtreg f2 0x0032
+xtensa xtreg f3 0x0033
+xtensa xtreg f4 0x0034
+xtensa xtreg f5 0x0035
+xtensa xtreg f6 0x0036
+xtensa xtreg f7 0x0037
+xtensa xtreg f8 0x0038
+xtensa xtreg f9 0x0039
+xtensa xtreg f10 0x003a
+xtensa xtreg f11 0x003b
+xtensa xtreg f12 0x003c
+xtensa xtreg f13 0x003d
+xtensa xtreg f14 0x003e
+xtensa xtreg f15 0x003f
+xtensa xtreg fcr 0x03e8
+xtensa xtreg fsr 0x03e9
+
+# TODO: update TIE state
+xtensa xtreg accx_0 0x02f4
+xtensa xtreg accx_1 0x02f4
+xtensa xtreg qacc_h_0 0x02f4
+xtensa xtreg qacc_h_1 0x02f4
+xtensa xtreg qacc_h_2 0x02f4
+xtensa xtreg qacc_h_3 0x02f4
+xtensa xtreg qacc_h_4 0x02f4
+xtensa xtreg qacc_l_0 0x02f4
+xtensa xtreg qacc_l_1 0x02f4
+xtensa xtreg qacc_l_2 0x02f4
+xtensa xtreg qacc_l_3 0x02f4
+xtensa xtreg qacc_l_4 0x02f4
+xtensa xtreg sar_byte 0x02f4
+xtensa xtreg fft_bit_width 0x02f4
+xtensa xtreg ua_state_0 0x02f4
+xtensa xtreg ua_state_1 0x02f4
+xtensa xtreg ua_state_2 0x02f4
+xtensa xtreg ua_state_3 0x02f4
+xtensa xtreg q0 0x02f4
+xtensa xtreg q1 0x02f4
+xtensa xtreg q2 0x02f4
+xtensa xtreg q3 0x02f4
+xtensa xtreg q4 0x02f4
+xtensa xtreg q5 0x02f4
+xtensa xtreg q6 0x02f4
+xtensa xtreg q7 0x02f4
+
+xtensa xtreg mmid 0x0259
+xtensa xtreg ibreakenable 0x0260
+xtensa xtreg memctl 0x0261
+xtensa xtreg atomctl 0x0263
+xtensa xtreg ddr 0x0268
+xtensa xtreg ibreaka0 0x0280
+xtensa xtreg ibreaka1 0x0281
+xtensa xtreg dbreaka0 0x0290
+xtensa xtreg dbreaka1 0x0291
+xtensa xtreg dbreakc0 0x02a0
+xtensa xtreg dbreakc1 0x02a1
+xtensa xtreg epc1 0x02b1
+xtensa xtreg epc2 0x02b2
+xtensa xtreg epc3 0x02b3
+xtensa xtreg epc4 0x02b4
+xtensa xtreg epc5 0x02b5
+xtensa xtreg epc6 0x02b6
+xtensa xtreg epc7 0x02b7
+xtensa xtreg depc 0x02c0
+xtensa xtreg eps2 0x02c2
+xtensa xtreg eps3 0x02c3
+xtensa xtreg eps4 0x02c4
+xtensa xtreg eps5 0x02c5
+xtensa xtreg eps6 0x02c6
+xtensa xtreg eps7 0x02c7
+xtensa xtreg excsave1 0x02d1
+xtensa xtreg excsave2 0x02d2
+xtensa xtreg excsave3 0x02d3
+xtensa xtreg excsave4 0x02d4
+xtensa xtreg excsave5 0x02d5
+xtensa xtreg excsave6 0x02d6
+xtensa xtreg excsave7 0x02d7
+xtensa xtreg cpenable 0x02e0
+xtensa xtreg interrupt 0x02e2
+xtensa xtreg intset 0x02e2
+xtensa xtreg intclear 0x02e3
+xtensa xtreg intenable 0x02e4
+xtensa xtreg vecbase 0x02e7
+xtensa xtreg exccause 0x02e8
+xtensa xtreg debugcause 0x02e9
+xtensa xtreg ccount 0x02ea
+xtensa xtreg prid 0x02eb
+xtensa xtreg icount 0x02ec
+xtensa xtreg icountlevel 0x02ed
+xtensa xtreg excvaddr 0x02ee
+xtensa xtreg ccompare0 0x02f0
+xtensa xtreg ccompare1 0x02f1
+xtensa xtreg ccompare2 0x02f2
+xtensa xtreg misc0 0x02f4
+xtensa xtreg misc1 0x02f5
+xtensa xtreg misc2 0x02f6
+xtensa xtreg misc3 0x02f7
+xtensa xtreg pwrctl 0x2025
+xtensa xtreg pwrstat 0x2026
+xtensa xtreg eristat 0x2027
+xtensa xtreg cs_itctrl 0x2028
+xtensa xtreg cs_claimset 0x2029
+xtensa xtreg cs_claimclr 0x202a
+xtensa xtreg cs_lockaccess 0x202b
+xtensa xtreg cs_lockstatus 0x202c
+xtensa xtreg cs_authstatus 0x202d
+xtensa xtreg fault_info 0x203c
+xtensa xtreg trax_id 0x203d
+xtensa xtreg trax_control 0x203e
+xtensa xtreg trax_status 0x203f
+xtensa xtreg trax_data 0x2040
+xtensa xtreg trax_address 0x2041
+xtensa xtreg trax_pctrigger 0x2042
+xtensa xtreg trax_pcmatch 0x2043
+xtensa xtreg trax_delay 0x2044
+xtensa xtreg trax_memstart 0x2045
+xtensa xtreg trax_memend 0x2046
+xtensa xtreg pmg 0x2054
+xtensa xtreg pmpc 0x2055
+xtensa xtreg pm0 0x2056
+xtensa xtreg pm1 0x2057
+xtensa xtreg pmctrl0 0x2058
+xtensa xtreg pmctrl1 0x2059
+xtensa xtreg pmstat0 0x205a
+xtensa xtreg pmstat1 0x205b
+xtensa xtreg ocdid 0x205c
+xtensa xtreg ocd_dcrclr 0x205d
+xtensa xtreg ocd_dcrset 0x205e
+xtensa xtreg ocd_dsr 0x205f
+xtensa xtreg a0 0x0000
+xtensa xtreg a1 0x0001
+xtensa xtreg a2 0x0002
+xtensa xtreg a3 0x0003
+xtensa xtreg a4 0x0004
+xtensa xtreg a5 0x0005
+xtensa xtreg a6 0x0006
+xtensa xtreg a7 0x0007
+xtensa xtreg a8 0x0008
+xtensa xtreg a9 0x0009
+xtensa xtreg a10 0x000a
+xtensa xtreg a11 0x000b
+xtensa xtreg a12 0x000c
+xtensa xtreg a13 0x000d
+xtensa xtreg a14 0x000e
+xtensa xtreg a15 0x000f
+xtensa xtreg b0 0x0010
+xtensa xtreg b1 0x0011
+xtensa xtreg b2 0x0012
+xtensa xtreg b3 0x0013
+xtensa xtreg b4 0x0014
+xtensa xtreg b5 0x0015
+xtensa xtreg b6 0x0016
+xtensa xtreg b7 0x0017
+xtensa xtreg b8 0x0018
+xtensa xtreg b9 0x0019
+xtensa xtreg b10 0x001a
+xtensa xtreg b11 0x001b
+xtensa xtreg b12 0x001c
+xtensa xtreg b13 0x001d
+xtensa xtreg b14 0x001e
+xtensa xtreg b15 0x001f
diff --git a/tcl/target/xtensa-core-nxp_rt600.cfg b/tcl/target/xtensa-core-nxp_rt600.cfg
new file mode 100644
index 0000000..abd961e
--- /dev/null
+++ b/tcl/target/xtensa-core-nxp_rt600.cfg
@@ -0,0 +1,247 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# OpenOCD configuration file for Xtensa HiFi DSP in NXP RT600 target
+
+
+# Core definition and ABI
+xtensa xtdef LX
+xtensa xtopt arnum 32
+xtensa xtopt windowed 1
+
+
+# Exception/Interrupt Options
+xtensa xtopt exceptions 1
+xtensa xtopt hipriints 1
+xtensa xtopt intlevels 4
+xtensa xtopt excmlevel 2
+
+
+# Cache Options
+xtensa xtmem icache 256 32768 4
+xtensa xtmem dcache 256 65536 4 1
+
+
+# Memory Options
+xtensa xtmem iram 0x24020000 65536
+xtensa xtmem dram 0x24000000 65536
+xtensa xtmem sram 0x00000000 603979776
+
+
+# Memory Protection/Translation Options
+
+
+# Debug Options
+xtensa xtopt debuglevel 4
+xtensa xtopt ibreaknum 2
+xtensa xtopt dbreaknum 2
+
+
+# Core Registers
+xtensa xtregs 208
+xtensa xtreg pc 0x0020
+xtensa xtreg ar0 0x0100
+xtensa xtreg ar1 0x0101
+xtensa xtreg ar2 0x0102
+xtensa xtreg ar3 0x0103
+xtensa xtreg ar4 0x0104
+xtensa xtreg ar5 0x0105
+xtensa xtreg ar6 0x0106
+xtensa xtreg ar7 0x0107
+xtensa xtreg ar8 0x0108
+xtensa xtreg ar9 0x0109
+xtensa xtreg ar10 0x010a
+xtensa xtreg ar11 0x010b
+xtensa xtreg ar12 0x010c
+xtensa xtreg ar13 0x010d
+xtensa xtreg ar14 0x010e
+xtensa xtreg ar15 0x010f
+xtensa xtreg ar16 0x0110
+xtensa xtreg ar17 0x0111
+xtensa xtreg ar18 0x0112
+xtensa xtreg ar19 0x0113
+xtensa xtreg ar20 0x0114
+xtensa xtreg ar21 0x0115
+xtensa xtreg ar22 0x0116
+xtensa xtreg ar23 0x0117
+xtensa xtreg ar24 0x0118
+xtensa xtreg ar25 0x0119
+xtensa xtreg ar26 0x011a
+xtensa xtreg ar27 0x011b
+xtensa xtreg ar28 0x011c
+xtensa xtreg ar29 0x011d
+xtensa xtreg ar30 0x011e
+xtensa xtreg ar31 0x011f
+xtensa xtreg lbeg 0x0200
+xtensa xtreg lend 0x0201
+xtensa xtreg lcount 0x0202
+xtensa xtreg sar 0x0203
+xtensa xtreg prefctl 0x0228
+xtensa xtreg windowbase 0x0248
+xtensa xtreg windowstart 0x0249
+xtensa xtreg configid0 0x02b0
+xtensa xtreg configid1 0x02d0
+xtensa xtreg ps 0x02e6
+xtensa xtreg threadptr 0x03e7
+xtensa xtreg br 0x0204
+xtensa xtreg scompare1 0x020c
+xtensa xtreg acclo 0x0210
+xtensa xtreg acchi 0x0211
+xtensa xtreg m0 0x0220
+xtensa xtreg m1 0x0221
+xtensa xtreg m2 0x0222
+xtensa xtreg m3 0x0223
+xtensa xtreg expstate 0x03e6
+xtensa xtreg f64r_lo 0x03ea
+xtensa xtreg f64r_hi 0x03eb
+xtensa xtreg f64s 0x03ec
+xtensa xtreg ae_ovf_sar 0x03f0
+xtensa xtreg ae_bithead 0x03f1
+xtensa xtreg ae_ts_fts_bu_bp 0x03f2
+xtensa xtreg ae_cw_sd_no 0x03f3
+xtensa xtreg ae_cbegin0 0x03f6
+xtensa xtreg ae_cend0 0x03f7
+xtensa xtreg ae_cbegin1 0x03f8
+xtensa xtreg ae_cend1 0x03f9
+xtensa xtreg aed0 0x1010
+xtensa xtreg aed1 0x1011
+xtensa xtreg aed2 0x1012
+xtensa xtreg aed3 0x1013
+xtensa xtreg aed4 0x1014
+xtensa xtreg aed5 0x1015
+xtensa xtreg aed6 0x1016
+xtensa xtreg aed7 0x1017
+xtensa xtreg aed8 0x1018
+xtensa xtreg aed9 0x1019
+xtensa xtreg aed10 0x101a
+xtensa xtreg aed11 0x101b
+xtensa xtreg aed12 0x101c
+xtensa xtreg aed13 0x101d
+xtensa xtreg aed14 0x101e
+xtensa xtreg aed15 0x101f
+xtensa xtreg u0 0x1020
+xtensa xtreg u1 0x1021
+xtensa xtreg u2 0x1022
+xtensa xtreg u3 0x1023
+xtensa xtreg aep0 0x1024
+xtensa xtreg aep1 0x1025
+xtensa xtreg aep2 0x1026
+xtensa xtreg aep3 0x1027
+xtensa xtreg fcr_fsr 0x1029
+xtensa xtreg mmid 0x0259
+xtensa xtreg ibreakenable 0x0260
+xtensa xtreg memctl 0x0261
+xtensa xtreg atomctl 0x0263
+xtensa xtreg ddr 0x0268
+xtensa xtreg ibreaka0 0x0280
+xtensa xtreg ibreaka1 0x0281
+xtensa xtreg dbreaka0 0x0290
+xtensa xtreg dbreaka1 0x0291
+xtensa xtreg dbreakc0 0x02a0
+xtensa xtreg dbreakc1 0x02a1
+xtensa xtreg epc1 0x02b1
+xtensa xtreg epc2 0x02b2
+xtensa xtreg epc3 0x02b3
+xtensa xtreg epc4 0x02b4
+xtensa xtreg epc5 0x02b5
+xtensa xtreg depc 0x02c0
+xtensa xtreg eps2 0x02c2
+xtensa xtreg eps3 0x02c3
+xtensa xtreg eps4 0x02c4
+xtensa xtreg eps5 0x02c5
+xtensa xtreg excsave1 0x02d1
+xtensa xtreg excsave2 0x02d2
+xtensa xtreg excsave3 0x02d3
+xtensa xtreg excsave4 0x02d4
+xtensa xtreg excsave5 0x02d5
+xtensa xtreg cpenable 0x02e0
+xtensa xtreg interrupt 0x02e2
+xtensa xtreg intset 0x02e2
+xtensa xtreg intclear 0x02e3
+xtensa xtreg intenable 0x02e4
+xtensa xtreg vecbase 0x02e7
+xtensa xtreg exccause 0x02e8
+xtensa xtreg debugcause 0x02e9
+xtensa xtreg ccount 0x02ea
+xtensa xtreg prid 0x02eb
+xtensa xtreg icount 0x02ec
+xtensa xtreg icountlevel 0x02ed
+xtensa xtreg excvaddr 0x02ee
+xtensa xtreg ccompare0 0x02f0
+xtensa xtreg ccompare1 0x02f1
+xtensa xtreg misc0 0x02f4
+xtensa xtreg misc1 0x02f5
+xtensa xtreg pwrctl 0x2024
+xtensa xtreg pwrstat 0x2025
+xtensa xtreg eristat 0x2026
+xtensa xtreg cs_itctrl 0x2027
+xtensa xtreg cs_claimset 0x2028
+xtensa xtreg cs_claimclr 0x2029
+xtensa xtreg cs_lockaccess 0x202a
+xtensa xtreg cs_lockstatus 0x202b
+xtensa xtreg cs_authstatus 0x202c
+xtensa xtreg pmg 0x203b
+xtensa xtreg pmpc 0x203c
+xtensa xtreg pm0 0x203d
+xtensa xtreg pm1 0x203e
+xtensa xtreg pmctrl0 0x203f
+xtensa xtreg pmctrl1 0x2040
+xtensa xtreg pmstat0 0x2041
+xtensa xtreg pmstat1 0x2042
+xtensa xtreg ocdid 0x2043
+xtensa xtreg ocd_dcrclr 0x2044
+xtensa xtreg ocd_dcrset 0x2045
+xtensa xtreg ocd_dsr 0x2046
+xtensa xtreg a0 0x0000
+xtensa xtreg a1 0x0001
+xtensa xtreg a2 0x0002
+xtensa xtreg a3 0x0003
+xtensa xtreg a4 0x0004
+xtensa xtreg a5 0x0005
+xtensa xtreg a6 0x0006
+xtensa xtreg a7 0x0007
+xtensa xtreg a8 0x0008
+xtensa xtreg a9 0x0009
+xtensa xtreg a10 0x000a
+xtensa xtreg a11 0x000b
+xtensa xtreg a12 0x000c
+xtensa xtreg a13 0x000d
+xtensa xtreg a14 0x000e
+xtensa xtreg a15 0x000f
+xtensa xtreg b0 0x0010
+xtensa xtreg b1 0x0011
+xtensa xtreg b2 0x0012
+xtensa xtreg b3 0x0013
+xtensa xtreg b4 0x0014
+xtensa xtreg b5 0x0015
+xtensa xtreg b6 0x0016
+xtensa xtreg b7 0x0017
+xtensa xtreg b8 0x0018
+xtensa xtreg b9 0x0019
+xtensa xtreg b10 0x001a
+xtensa xtreg b11 0x001b
+xtensa xtreg b12 0x001c
+xtensa xtreg b13 0x001d
+xtensa xtreg b14 0x001e
+xtensa xtreg b15 0x001f
+xtensa xtreg psintlevel 0x2006
+xtensa xtreg psum 0x2007
+xtensa xtreg pswoe 0x2008
+xtensa xtreg psexcm 0x2009
+xtensa xtreg pscallinc 0x200a
+xtensa xtreg psowb 0x200b
+xtensa xtreg acc 0x200c
+xtensa xtreg dbnum 0x2011
+xtensa xtreg ae_overflow 0x2014
+xtensa xtreg ae_sar 0x2015
+xtensa xtreg ae_cwrap 0x2016
+xtensa xtreg ae_bitptr 0x2017
+xtensa xtreg ae_bitsused 0x2018
+xtensa xtreg ae_tablesize 0x2019
+xtensa xtreg ae_first_ts 0x201a
+xtensa xtreg ae_nextoffset 0x201b
+xtensa xtreg ae_searchdone 0x201c
+xtensa xtreg roundmode 0x201d
+xtensa xtreg invalidflag 0x201e
+xtensa xtreg divzeroflag 0x201f
+xtensa xtreg overflowflag 0x2020
+xtensa xtreg underflowflag 0x2021
+xtensa xtreg inexactflag 0x2022
diff --git a/tcl/target/xtensa.cfg b/tcl/target/xtensa.cfg
new file mode 100644
index 0000000..101e135
--- /dev/null
+++ b/tcl/target/xtensa.cfg
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Target Support for Xtensa Processors
+#
+
+set xtensa_ids { 0x120034e5 0x120134e5
+ 0x209034e5 0x209134e5 0x209234e5 0x209334e5 0x209434e5 0x209534e5 0x209634e5 0x209734e5
+ 0x20a034e5 0x20a134e5 0x20a234e5 0x20a334e5 0x20a434e5 0x20a534e5 0x20a634e5 0x20a734e5 0x20a834e5
+ 0x20b034e5 }
+set expected_xtensa_ids {}
+foreach i $xtensa_ids {
+ lappend expected_xtensa_ids -expected-id $i
+}
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xtensa
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPARGLIST "-expected-id $CPUTAPID"
+} else {
+ set _CPUTAPARGLIST [join $expected_xtensa_ids]
+}
+
+set _TARGETNAME $_CHIPNAME
+set _CPU0NAME cpu
+set _TAPNAME $_CHIPNAME.$_CPU0NAME
+
+if { [info exists XTENSA_DAP] } {
+ source [find target/swj-dp.tcl]
+ # SWD mode ignores the -irlen parameter
+ eval swj_newdap $_CHIPNAME cpu -irlen 4 $_CPUTAPARGLIST
+ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+ set _TARGETNAME $_CHIPNAME.cpu
+ if { [info exists XTENSA_DAP_BASE] } {
+ # Specify fixed offset for accessing XDM via APB behind a DAP interface
+ target create $_TARGETNAME xtensa -dap $_CHIPNAME.dap -dbgbase $XTENSA_DAP_BASE
+ } else {
+ target create $_TARGETNAME xtensa -dap $_CHIPNAME.dap
+ }
+} else {
+ # JTAG direct (without DAP)
+ eval jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 $_CPUTAPARGLIST
+ target create $_TARGETNAME xtensa -chain-position $_TAPNAME
+}
+
+$_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
+
+gdb_report_register_access_error enable
diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index b4b6f9f..0272587 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Xilinx Zynq-7000 All Programmable SoC
#
diff --git a/tcl/test/selftest.cfg b/tcl/test/selftest.cfg
index 0331b48..10efb0c 100644
--- a/tcl/test/selftest.cfg
+++ b/tcl/test/selftest.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
add_help_text selftest "run selftest using working ram <tmpfile> <address> <size>"
diff --git a/tcl/test/syntax1.cfg b/tcl/test/syntax1.cfg
index 2e66188..7735ee9 100644
--- a/tcl/test/syntax1.cfg
+++ b/tcl/test/syntax1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter srst delay 200
jtag_ntrst_delay 200
diff --git a/tcl/tools/firmware-recovery.tcl b/tcl/tools/firmware-recovery.tcl
index 9d7e0fc..6a328cd 100644
--- a/tcl/tools/firmware-recovery.tcl
+++ b/tcl/tools/firmware-recovery.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "\n\nFirmware recovery helpers"
echo "Use -c firmware_help to get help\n"
diff --git a/tcl/tools/memtest.tcl b/tcl/tools/memtest.tcl
index c7fa591..f70f950 100644
--- a/tcl/tools/memtest.tcl
+++ b/tcl/tools/memtest.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Algorithms by Michael Barr, released into public domain
# Ported to OpenOCD by Shane Volpe, additional fixes by Paul Fertser
diff --git a/testing/test-am335xgpio-deprecated-commands.cfg b/testing/test-am335xgpio-deprecated-commands.cfg
new file mode 100644
index 0000000..09b2040
--- /dev/null
+++ b/testing/test-am335xgpio-deprecated-commands.cfg
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# OpenOCD script to test that the deprecated "am335xgpio *" commands produce the
+# expected results. Run this command as:
+#
+# openocd -f <path>/test-linuxgpiod-deprecated-commands.cfg
+
+# Raise an error if the "actual" value does not match the "expected" value. Trim
+# whitespace (including newlines) from strings before comparing.
+proc expected_value {expected actual} {
+ if {[string trim $expected] ne [string trim $actual]} {
+ error [puts "ERROR: '${actual}' != '${expected}'"]
+ }
+}
+
+adapter driver am335xgpio
+
+am335xgpio jtag_nums 1 2 3 4
+expected_value "adapter gpio tck (output): num 1, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+expected_value "adapter gpio tms (output): num 2, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+expected_value "adapter gpio tdi (output): num 3, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+expected_value "adapter gpio tdo (input): num 4, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+am335xgpio tck_num 5
+expected_value "adapter gpio tck (output): num 5, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+
+am335xgpio tms_num 6
+expected_value "adapter gpio tms (output): num 6, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+
+am335xgpio tdi_num 7
+expected_value "adapter gpio tdi (output): num 7, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+
+am335xgpio tdo_num 8
+expected_value "adapter gpio tdo (input): num 8, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+am335xgpio swd_nums 9 10
+expected_value "adapter gpio swclk (output): num 9, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+expected_value "adapter gpio swdio (bidirectional): num 10, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+am335xgpio swclk_num 11
+expected_value "adapter gpio swclk (output): num 11, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+
+am335xgpio swdio_num 12
+expected_value "adapter gpio swdio (bidirectional): num 12, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+am335xgpio swdio_dir_num 13
+expected_value "adapter gpio swdio_dir (output): num 13, chip 0, active-high, push-pull, pull-none" [eval adapter gpio swdio_dir]
+
+am335xgpio swdio_dir_output_state low
+expected_value "adapter gpio swdio_dir (output): num 13, chip 0, active-low, push-pull, pull-none" [eval adapter gpio swdio_dir]
+
+am335xgpio swdio_dir_output_state high
+expected_value "adapter gpio swdio_dir (output): num 13, chip 0, active-high, push-pull, pull-none" [eval adapter gpio swdio_dir]
+
+am335xgpio srst_num 14
+expected_value "adapter gpio srst (output): num 14, chip 0, active-low, pull-none, init-state inactive" [eval adapter gpio srst]
+
+am335xgpio trst_num 15
+expected_value "adapter gpio trst (output): num 15, chip 0, active-low, pull-none, init-state inactive" [eval adapter gpio trst]
+
+am335xgpio led_num 16
+expected_value "adapter gpio led (output): num 16, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio led]
+
+am335xgpio led_on_state low
+expected_value "adapter gpio led (output): num 16, chip 0, active-low, push-pull, pull-none, init-state inactive" [eval adapter gpio led]
+
+am335xgpio led_on_state high
+expected_value "adapter gpio led (output): num 16, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio led]
+
+puts "SUCCESS"
diff --git a/testing/test-bcm2835gpio-deprecated-commands.cfg b/testing/test-bcm2835gpio-deprecated-commands.cfg
new file mode 100644
index 0000000..b34eb36
--- /dev/null
+++ b/testing/test-bcm2835gpio-deprecated-commands.cfg
@@ -0,0 +1,105 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# OpenOCD script to test that the deprecated "bcm2835gpio *" and "bcm2835gpio_*"
+# commands produce the expected results. Run this command as:
+# openocd -f <path>/test-bcm2835gpio-deprecated-commands.cfg
+
+# Raise an error if the "actual" value does not match the "expected" value. Trim
+# whitespace (including newlines) from strings before comparing.
+proc expected_value {expected actual} {
+ if {[string trim $expected] ne [string trim $actual]} {
+ error [puts "ERROR: '${actual}' != '${expected}'"]
+ }
+}
+
+set supported_signals {tdo tdi tms tck trst swdio swdio_dir swclk srst}
+
+adapter speed 100
+adapter driver bcm2835gpio
+puts "Driver is '[adapter name]'"
+expected_value "bcm2835gpio" [adapter name]
+echo [adapter gpio]
+
+#####################################
+# Test the "bcm2835gpio *" commands
+
+# Change the GPIO chip for all signals. Don't check directly here, do so when
+# each signal command is tested.
+# bcm2835gpio gpiochip 0
+
+bcm2835gpio jtag_nums 1 2 3 4
+expected_value "adapter gpio tck (output): num 1, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+expected_value "adapter gpio tms (output): num 2, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+expected_value "adapter gpio tdi (output): num 3, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+expected_value "adapter gpio tdo (input): num 4, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+bcm2835gpio tck_num 5
+expected_value "adapter gpio tck (output): num 5, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+
+bcm2835gpio tms_num 6
+expected_value "adapter gpio tms (output): num 6, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+
+bcm2835gpio tdi_num 7
+expected_value "adapter gpio tdi (output): num 7, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+
+bcm2835gpio tdo_num 8
+expected_value "adapter gpio tdo (input): num 8, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+bcm2835gpio swd_nums 9 10
+expected_value "adapter gpio swclk (output): num 9, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+expected_value "adapter gpio swdio (bidirectional): num 10, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+bcm2835gpio swclk_num 11
+expected_value "adapter gpio swclk (output): num 11, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+
+bcm2835gpio swdio_num 12
+expected_value "adapter gpio swdio (bidirectional): num 12, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+bcm2835gpio swdio_dir_num 13
+expected_value "adapter gpio swdio_dir (output): num 13, chip 0, active-high, push-pull, pull-none" [eval adapter gpio swdio_dir]
+
+bcm2835gpio srst_num 14
+expected_value "adapter gpio srst (output): num 14, chip 0, active-low, pull-none, init-state inactive" [eval adapter gpio srst]
+
+bcm2835gpio trst_num 15
+expected_value "adapter gpio trst (output): num 15, chip 0, active-low, pull-none, init-state inactive" [eval adapter gpio trst]
+
+
+#####################################
+# Test the old bcm2835gpio_* commands
+
+# Reset the GPIO chip for all signals. Don't check directly here, do so when
+# each signal command is tested.
+foreach sig_name $supported_signals {
+ eval adapter gpio $sig_name -chip -1
+}
+
+bcm2835gpio_jtag_nums 17 18 19 20
+expected_value "adapter gpio tck (output): num 17, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+expected_value "adapter gpio tms (output): num 18, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+expected_value "adapter gpio tdi (output): num 19, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+expected_value "adapter gpio tdo (input): num 20, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+bcm2835gpio_tck_num 21
+expected_value "adapter gpio tck (output): num 21, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+
+bcm2835gpio_tms_num 22
+expected_value "adapter gpio tms (output): num 22, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+
+bcm2835gpio_tdi_num 23
+expected_value "adapter gpio tdi (output): num 23, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+
+bcm2835gpio_tdo_num 24
+expected_value "adapter gpio tdo (input): num 24, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+bcm2835gpio_swd_nums 25 26
+expected_value "adapter gpio swclk (output): num 25, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+expected_value "adapter gpio swdio (bidirectional): num 26, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+bcm2835gpio_swclk_num 27
+expected_value "adapter gpio swclk (output): num 27, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+
+bcm2835gpio_swdio_num 28
+expected_value "adapter gpio swdio (bidirectional): num 28, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+puts "SUCCESS"
diff --git a/testing/test-linuxgpiod-deprecated-commands.cfg b/testing/test-linuxgpiod-deprecated-commands.cfg
new file mode 100644
index 0000000..3d4f5cb
--- /dev/null
+++ b/testing/test-linuxgpiod-deprecated-commands.cfg
@@ -0,0 +1,105 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# OpenOCD script to test that the deprecated "linuxgpiod *" and "linuxgpiod_*"
+# commands produce the expected results. Run this command as:
+# openocd -f <path>/test-linuxgpiod-deprecated-commands.cfg
+
+# Raise an error if the "actual" value does not match the "expected" value. Trim
+# whitespace (including newlines) from strings before comparing.
+proc expected_value {expected actual} {
+ if {[string trim $expected] ne [string trim $actual]} {
+ error [puts "ERROR: '${actual}' != '${expected}'"]
+ }
+}
+
+adapter driver linuxgpiod
+puts "Driver is '[adapter name]'"
+expected_value "linuxgpiod" [adapter name]
+echo [adapter gpio]
+
+#####################################
+# Test the "linuxgpiod *" commands
+
+# Change the GPIO chip for all signals. Don't check directly here, do so when
+# each signal command is tested.
+linuxgpiod gpiochip 0
+
+linuxgpiod jtag_nums 1 2 3 4
+expected_value "adapter gpio tck (output): num 1, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+expected_value "adapter gpio tms (output): num 2, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+expected_value "adapter gpio tdi (output): num 3, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+expected_value "adapter gpio tdo (input): num 4, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+linuxgpiod tck_num 5
+expected_value "adapter gpio tck (output): num 5, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+
+linuxgpiod tms_num 6
+expected_value "adapter gpio tms (output): num 6, chip 0, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+
+linuxgpiod tdi_num 7
+expected_value "adapter gpio tdi (output): num 7, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+
+linuxgpiod tdo_num 8
+expected_value "adapter gpio tdo (input): num 8, chip 0, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+linuxgpiod swd_nums 9 10
+expected_value "adapter gpio swclk (output): num 9, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+expected_value "adapter gpio swdio (bidirectional): num 10, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+linuxgpiod swclk_num 11
+expected_value "adapter gpio swclk (output): num 11, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+
+linuxgpiod swdio_num 12
+expected_value "adapter gpio swdio (bidirectional): num 12, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+linuxgpiod swdio_dir_num 13
+expected_value "adapter gpio swdio_dir (output): num 13, chip 0, active-high, push-pull, pull-none" [eval adapter gpio swdio_dir]
+
+linuxgpiod srst_num 14
+expected_value "adapter gpio srst (output): num 14, chip 0, active-low, pull-none, init-state inactive" [eval adapter gpio srst]
+
+linuxgpiod trst_num 15
+expected_value "adapter gpio trst (output): num 15, chip 0, active-low, pull-none, init-state inactive" [eval adapter gpio trst]
+
+linuxgpiod led_num 16
+expected_value "adapter gpio led (output): num 16, chip 0, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio led]
+
+#####################################
+# Test the old linuxgpiod_* commands
+
+# Change the GPIO chip for all signals. Don't check directly here, do so when
+# each signal command is tested.
+linuxgpiod_gpiochip 1
+
+linuxgpiod_jtag_nums 17 18 19 20
+expected_value "adapter gpio tck (output): num 17, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+expected_value "adapter gpio tms (output): num 18, chip 1, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+expected_value "adapter gpio tdi (output): num 19, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+expected_value "adapter gpio tdo (input): num 20, chip 1, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+linuxgpiod_tck_num 21
+expected_value "adapter gpio tck (output): num 21, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tck]
+
+linuxgpiod_tms_num 22
+expected_value "adapter gpio tms (output): num 22, chip 1, active-high, push-pull, pull-none, init-state active" [eval adapter gpio tms]
+
+linuxgpiod_tdi_num 23
+expected_value "adapter gpio tdi (output): num 23, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio tdi]
+
+linuxgpiod_tdo_num 24
+expected_value "adapter gpio tdo (input): num 24, chip 1, active-high, pull-none, init-state input" [eval adapter gpio tdo]
+
+linuxgpiod_swd_nums 25 26
+expected_value "adapter gpio swclk (output): num 25, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+expected_value "adapter gpio swdio (bidirectional): num 26, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+linuxgpiod_swclk_num 27
+expected_value "adapter gpio swclk (output): num 27, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swclk]
+
+linuxgpiod_swdio_num 28
+expected_value "adapter gpio swdio (bidirectional): num 28, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio swdio]
+
+linuxgpiod_led_num 29
+expected_value "adapter gpio led (output): num 29, chip 1, active-high, push-pull, pull-none, init-state inactive" [eval adapter gpio led]
+
+puts "SUCCESS"
diff --git a/tools/checkpatch.sh b/tools/checkpatch.sh
index 0a630a2..7375fc2 100755
--- a/tools/checkpatch.sh
+++ b/tools/checkpatch.sh
@@ -1,5 +1,5 @@
#!/bin/sh
-#
+# SPDX-License-Identifier: GPL-2.0-or-later
since=${1:-HEAD^}
-git format-patch -M --stdout $since | tools/scripts/checkpatch.pl -
+tools/scripts/checkpatch.pl --git ${since}..
diff --git a/tools/scripts/camelcase.txt b/tools/scripts/camelcase.txt
new file mode 100644
index 0000000..59fe5ca
--- /dev/null
+++ b/tools/scripts/camelcase.txt
@@ -0,0 +1,217 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# The OpenOCD coding-style rules forbids CamelCase names for symbols,
+# either functions, variables, macros and enums.
+# The script checkpatch detects the CamelCase symbols.
+# This file contains the exceptions to the coding-style, mainly due
+# to external dependencies and libraries.
+
+# format types from inttypes.h (only some are already used)
+PRId8
+PRId16
+PRId32
+PRId64
+PRIi8
+PRIi16
+PRIi32
+PRIi64
+PRIo8
+PRIo16
+PRIo32
+PRIo64
+PRIu8
+PRIu16
+PRIu32
+PRIu64
+PRIx8
+PRIx16
+PRIx32
+PRIx64
+PRIX8
+PRIX16
+PRIX32
+PRIX64
+SCNd8
+SCNd16
+SCNd32
+SCNd64
+SCNi8
+SCNi16
+SCNi32
+SCNi64
+SCNo8
+SCNo16
+SCNo32
+SCNo64
+SCNu8
+SCNu16
+SCNu32
+SCNu64
+SCNx8
+SCNx16
+SCNx32
+SCNx64
+SCNX8
+SCNX16
+SCNX32
+SCNX64
+
+# OpenOCD format types
+TARGET_PRIdADDR
+TARGET_PRIoADDR
+TARGET_PRIuADDR
+TARGET_PRIxADDR
+
+# from libusb.h
+bcdDevice
+bConfigurationValue
+bEndpointAddress
+bInterfaceClass
+bInterfaceNumber
+bInterfaceProtocol
+bInterfaceSubClass
+bmAttributes
+bNumConfigurations
+bNumEndpoints
+bNumInterfaces
+idProduct
+idVendor
+iInterface
+iProduct
+iSerialNumber
+wMaxPacketSize
+
+# from jimtcl/jim.h and jimtcl/jim-eventloop.h
+Jim_AppendString
+Jim_AppendStrings
+Jim_Cmd
+Jim_CmdPrivData
+Jim_CmdProc
+Jim_CompareStringImmediate
+Jim_ConcatObj
+Jim_CreateCommand
+Jim_CreateInterp
+Jim_DecrRefCount
+Jim_DelCmdProc
+Jim_DeleteAssocData
+Jim_DeleteCommand
+Jim_DictAddElement
+Jim_DictPairs
+Jim_DuplicateObj
+Jim_Eval
+Jim_EvalExpression
+Jim_EvalObj
+Jim_EvalObjPrefix
+Jim_EvalSource
+Jim_Eval_Named
+Jim_FreeInterp
+Jim_FreeObj
+Jim_GetAssocData
+Jim_GetCommand
+Jim_GetDouble
+Jim_GetEnum
+Jim_GetExitCode
+Jim_GetGlobalVariableStr
+Jim_GetIntRepPtr
+Jim_GetLong
+Jim_GetResult
+Jim_GetString
+Jim_GetVariable
+Jim_GetWide
+Jim_IncrRefCount
+Jim_InitStaticExtensions
+Jim_Interp
+Jim_ListAppendElement
+Jim_ListGetIndex
+Jim_ListLength
+Jim_MakeErrorMessage
+Jim_NewDictObj
+Jim_NewEmptyStringObj
+Jim_NewIntObj
+Jim_NewListObj
+Jim_NewStringObj
+Jim_NewWideObj
+Jim_Obj
+Jim_ProcessEvents
+Jim_RegisterCoreCommands
+Jim_SetAssocData
+Jim_SetEmptyResult
+Jim_SetResult
+Jim_SetResultBool
+Jim_SetResultFormatted
+Jim_SetResultInt
+Jim_SetResultString
+Jim_SetVariable
+Jim_String
+Jim_WrongNumArgs
+cmdProc
+currentScriptObj
+delProc
+emptyObj
+privData
+returnCode
+typePtr
+
+# from elf.h
+Elf32_Addr
+Elf32_Ehdr
+Elf32_Half
+Elf32_Off
+Elf32_Phdr
+Elf32_Size
+Elf32_Word
+Elf64_Addr
+Elf64_Ehdr
+Elf64_Half
+Elf64_Off
+Elf64_Phdr
+Elf64_Word
+Elf64_Xword
+
+# for BSD's
+__FreeBSD__
+__FreeBSD_kernel__
+
+# for Windows
+CreateFile
+CloseHandle
+CreatePipe
+CreateProcess
+FormatMessage
+GetLastError
+GetModuleFileName
+GetSystemTimeAsFileTime
+GetTickCount
+GetVersionEx
+HighPart
+LowPart
+MsgWaitForMultipleObjects
+PeekMessage
+PeekNamedPipe
+QuadPart
+ReadFile
+SetConsoleCtrlHandler
+SetHandleInformation
+Sleep
+WaitForSingleObject
+WriteFile
+WSACleanup
+WSAGetLastError
+WSAStartup
+ZeroMemory
+bInheritHandle
+dwFlags
+dwHighDateTime
+dwLowDateTime
+dwPlatformId
+dwOSVersionInfoSize
+hProcess
+hThread
+hStdError
+hStdInput
+hStdOutput
+lpSecurityDescriptor
+nLength
+
+# OpenOCD exceptions that should be removed
+KiB
diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl
index f83ac77..6ea0241 100755
--- a/tools/scripts/checkpatch.pl
+++ b/tools/scripts/checkpatch.pl
@@ -1,38 +1,96 @@
-#!/usr/bin/perl -w
+#!/usr/bin/env perl
+# SPDX-License-Identifier: GPL-2.0
+#
# (c) 2001, Dave Jones. (the file handling bit)
# (c) 2005, Joel Schopp <jschopp@austin.ibm.com> (the ugly bit)
# (c) 2007,2008, Andy Whitcroft <apw@uk.ibm.com> (new conditions, test suite)
# (c) 2008-2010 Andy Whitcroft <apw@canonical.com>
-# Licensed under the terms of the GNU GPL License version 2
+# (c) 2010-2018 Joe Perches <joe@perches.com>
use strict;
+use warnings;
+use POSIX;
+use File::Basename;
+use Cwd 'abs_path';
+use Term::ANSIColor qw(:constants);
+use Encode qw(decode encode);
my $P = $0;
-$P =~ s@.*/@@g;
+my $D = dirname(abs_path($P));
my $V = '0.32';
use Getopt::Long qw(:config no_auto_abbrev);
+# ATTENTION: easily track modification to this script for OpenOCD.
+# When possible, don't modify the existing code, don't change its indentation,
+# but remove it enclosing it within:
+#
+# if (!$OpenOCD) {
+# original_code;
+# } # !$OpenOCD
+#
+# Mark every addition within comments
+# # OpenOCD specific: Begin[: additional comment]
+# # OpenOCD specific: End
+my $OpenOCD = 1;
+
my $quiet = 0;
+my $verbose = 0;
+my %verbose_messages = ();
+my %verbose_emitted = ();
my $tree = 1;
my $chk_signoff = 1;
my $chk_patch = 1;
my $tst_only;
my $emacs = 0;
my $terse = 0;
+my $showfile = 0;
my $file = 0;
+my $git = 0;
+my %git_commits = ();
my $check = 0;
+my $check_orig = 0;
my $summary = 1;
my $mailback = 0;
my $summary_file = 0;
my $show_types = 0;
+my $list_types = 0;
+my $fix = 0;
+my $fix_inplace = 0;
my $root;
+my $gitroot = $ENV{'GIT_DIR'};
+$gitroot = ".git" if !defined($gitroot);
my %debug;
+my %camelcase = ();
+my %use_type = ();
+my @use = ();
my %ignore_type = ();
my @ignore = ();
my $help = 0;
my $configuration_file = ".checkpatch.conf";
+my $max_line_length = 100;
+my $ignore_perl_version = 0;
+my $minimum_perl_version = 5.10.0;
+my $min_conf_desc_length = 4;
+my $spelling_file = "$D/spelling.txt";
+my $codespell = 0;
+my $codespellfile = "/usr/share/codespell/dictionary.txt";
+my $user_codespellfile = "";
+my $conststructsfile = "$D/const_structs.checkpatch";
+if (!$OpenOCD) {
+my $docsfile = "$D/../Documentation/dev-tools/checkpatch.rst";
+} # !$OpenOCD
+# OpenOCD Specific: Begin
+my $docsfile = "$D/../../doc/checkpatch.rst";
+# OpenOCD Specific: End
+my $typedefsfile;
+my $color = "auto";
+my $allow_c99_comments = 1; # Can be overridden by --ignore C99_COMMENT_TOLERANCE
+# git output parsing needs US English output, so first set backtick child process LANGUAGE
+my $git_command ='export LANGUAGE=en_US.UTF-8; git';
+my $tabsize = 8;
+my ${CONFIG_} = "CONFIG_";
sub help {
my ($exitcode) = @_;
@@ -43,16 +101,35 @@ Version: $V
Options:
-q, --quiet quiet
- --no-tree run without a openocd tree
+ -v, --verbose verbose mode
+ --no-tree run without an OpenOCD tree
--no-signoff do not check for 'Signed-off-by' line
--patch treat FILE as patchfile (default)
--emacs emacs compile window format
--terse one line per report
+ --showfile emit diffed file position, not input file position
+ -g, --git treat FILE as a single commit or git revision range
+ single git commit with:
+ <rev>
+ <rev>^
+ <rev>~n
+ multiple git commits with:
+ <rev1>..<rev2>
+ <rev1>...<rev2>
+ <rev>-<count>
+ git merges are ignored
-f, --file treat FILE as regular source file
--subjective, --strict enable more subjective tests
+ --list-types list the possible message types
+ --types TYPE(,TYPE2...) show only these comma separated message types
--ignore TYPE(,TYPE2...) ignore various comma separated message types
- --show-types show the message "types" in the output
- --root=PATH PATH to the openocd tree root
+ --show-types show the specific message type in the output
+ --max-line-length=n set the maximum line length, (default $max_line_length)
+ if exceeded, warn on patches
+ requires --strict for use with --file
+ --min-conf-desc-length=n set the min description length, if shorter, warn
+ --tab-size=n set the number of spaces for tab (default $tabsize)
+ --root=PATH PATH to the OpenOCD tree root
--no-summary suppress the per-file summary
--mailback only produce a report in case of warnings/errors
--summary-file include the filename in summary
@@ -61,6 +138,24 @@ Options:
is all off)
--test-only=WORD report only warnings/errors containing WORD
literally
+ --fix EXPERIMENTAL - may create horrible results
+ If correctable single-line errors exist, create
+ "<inputfile>.EXPERIMENTAL-checkpatch-fixes"
+ with potential errors corrected to the preferred
+ checkpatch style
+ --fix-inplace EXPERIMENTAL - may create horrible results
+ Is the same as --fix, but overwrites the input
+ file. It's your fault if there's no backup or git
+ --ignore-perl-version override checking of perl version. expect
+ runtime errors.
+ --codespell Use the codespell dictionary for spelling/typos
+ (default:$codespellfile)
+ --codespellfile Use this codespell dictionary
+ --typedefsfile Read additional types from this file
+ --color[=WHEN] Use colors 'always', 'never', or only when output
+ is a terminal ('auto'). Default is 'auto'.
+ --kconfig-prefix=WORD use WORD as a prefix for Kconfig symbols (default
+ ${CONFIG_})
-h, --help, --version display this help and exit
When FILE is - read standard input.
@@ -69,6 +164,74 @@ EOM
exit($exitcode);
}
+sub uniq {
+ my %seen;
+ return grep { !$seen{$_}++ } @_;
+}
+
+sub list_types {
+ my ($exitcode) = @_;
+
+ my $count = 0;
+
+ local $/ = undef;
+
+ open(my $script, '<', abs_path($P)) or
+ die "$P: Can't read '$P' $!\n";
+
+ my $text = <$script>;
+ close($script);
+
+ my %types = ();
+ # Also catch when type or level is passed through a variable
+ while ($text =~ /(?:(\bCHK|\bWARN|\bERROR|&\{\$msg_level})\s*\(|\$msg_type\s*=)\s*"([^"]+)"/g) {
+ if (defined($1)) {
+ if (exists($types{$2})) {
+ $types{$2} .= ",$1" if ($types{$2} ne $1);
+ } else {
+ $types{$2} = $1;
+ }
+ } else {
+ $types{$2} = "UNDETERMINED";
+ }
+ }
+
+ print("#\tMessage type\n\n");
+ if ($color) {
+ print(" ( Color coding: ");
+ print(RED . "ERROR" . RESET);
+ print(" | ");
+ print(YELLOW . "WARNING" . RESET);
+ print(" | ");
+ print(GREEN . "CHECK" . RESET);
+ print(" | ");
+ print("Multiple levels / Undetermined");
+ print(" )\n\n");
+ }
+
+ foreach my $type (sort keys %types) {
+ my $orig_type = $type;
+ if ($color) {
+ my $level = $types{$type};
+ if ($level eq "ERROR") {
+ $type = RED . $type . RESET;
+ } elsif ($level eq "WARN") {
+ $type = YELLOW . $type . RESET;
+ } elsif ($level eq "CHK") {
+ $type = GREEN . $type . RESET;
+ }
+ }
+ print(++$count . "\t" . $type . "\n");
+ if ($verbose && exists($verbose_messages{$orig_type})) {
+ my $message = $verbose_messages{$orig_type};
+ $message =~ s/\n/\n\t/g;
+ print("\t" . $message . "\n\n");
+ }
+ }
+
+ exit($exitcode);
+}
+
my $conf = which_conf($configuration_file);
if (-f $conf) {
my @conf_args;
@@ -95,51 +258,189 @@ if (-f $conf) {
unshift(@ARGV, @conf_args) if @conf_args;
}
+sub load_docs {
+ open(my $docs, '<', "$docsfile")
+ or warn "$P: Can't read the documentation file $docsfile $!\n";
+
+ my $type = '';
+ my $desc = '';
+ my $in_desc = 0;
+
+ while (<$docs>) {
+ chomp;
+ my $line = $_;
+ $line =~ s/\s+$//;
+
+ if ($line =~ /^\s*\*\*(.+)\*\*$/) {
+ if ($desc ne '') {
+ $verbose_messages{$type} = trim($desc);
+ }
+ $type = $1;
+ $desc = '';
+ $in_desc = 1;
+ } elsif ($in_desc) {
+ if ($line =~ /^(?:\s{4,}|$)/) {
+ $line =~ s/^\s{4}//;
+ $desc .= $line;
+ $desc .= "\n";
+ } else {
+ $verbose_messages{$type} = trim($desc);
+ $type = '';
+ $desc = '';
+ $in_desc = 0;
+ }
+ }
+ }
+
+ if ($desc ne '') {
+ $verbose_messages{$type} = trim($desc);
+ }
+ close($docs);
+}
+
+# Perl's Getopt::Long allows options to take optional arguments after a space.
+# Prevent --color by itself from consuming other arguments
+foreach (@ARGV) {
+ if ($_ eq "--color" || $_ eq "-color") {
+ $_ = "--color=$color";
+ }
+}
+
GetOptions(
'q|quiet+' => \$quiet,
+ 'v|verbose!' => \$verbose,
'tree!' => \$tree,
'signoff!' => \$chk_signoff,
'patch!' => \$chk_patch,
'emacs!' => \$emacs,
'terse!' => \$terse,
+ 'showfile!' => \$showfile,
'f|file!' => \$file,
+ 'g|git!' => \$git,
'subjective!' => \$check,
'strict!' => \$check,
'ignore=s' => \@ignore,
+ 'types=s' => \@use,
'show-types!' => \$show_types,
+ 'list-types!' => \$list_types,
+ 'max-line-length=i' => \$max_line_length,
+ 'min-conf-desc-length=i' => \$min_conf_desc_length,
+ 'tab-size=i' => \$tabsize,
'root=s' => \$root,
'summary!' => \$summary,
'mailback!' => \$mailback,
'summary-file!' => \$summary_file,
-
+ 'fix!' => \$fix,
+ 'fix-inplace!' => \$fix_inplace,
+ 'ignore-perl-version!' => \$ignore_perl_version,
'debug=s' => \%debug,
'test-only=s' => \$tst_only,
+ 'codespell!' => \$codespell,
+ 'codespellfile=s' => \$user_codespellfile,
+ 'typedefsfile=s' => \$typedefsfile,
+ 'color=s' => \$color,
+ 'no-color' => \$color, #keep old behaviors of -nocolor
+ 'nocolor' => \$color, #keep old behaviors of -nocolor
+ 'kconfig-prefix=s' => \${CONFIG_},
'h|help' => \$help,
'version' => \$help
-) or help(1);
+) or $help = 2;
+
+if ($user_codespellfile) {
+ # Use the user provided codespell file unconditionally
+ $codespellfile = $user_codespellfile;
+} elsif (!(-f $codespellfile)) {
+ # If /usr/share/codespell/dictionary.txt is not present, try to find it
+ # under codespell's install directory: <codespell_root>/data/dictionary.txt
+ if (($codespell || $help) && which("python3") ne "") {
+ my $python_codespell_dict = << "EOF";
+
+import os.path as op
+import codespell_lib
+codespell_dir = op.dirname(codespell_lib.__file__)
+codespell_file = op.join(codespell_dir, 'data', 'dictionary.txt')
+print(codespell_file, end='')
+EOF
+
+ my $codespell_dict = `python3 -c "$python_codespell_dict" 2> /dev/null`;
+ $codespellfile = $codespell_dict if (-f $codespell_dict);
+ }
+}
+
+# $help is 1 if either -h, --help or --version is passed as option - exitcode: 0
+# $help is 2 if invalid option is passed - exitcode: 1
+help($help - 1) if ($help);
+
+die "$P: --git cannot be used with --file or --fix\n" if ($git && ($file || $fix));
+die "$P: --verbose cannot be used with --terse\n" if ($verbose && $terse);
+
+if ($color =~ /^[01]$/) {
+ $color = !$color;
+} elsif ($color =~ /^always$/i) {
+ $color = 1;
+} elsif ($color =~ /^never$/i) {
+ $color = 0;
+} elsif ($color =~ /^auto$/i) {
+ $color = (-t STDOUT);
+} else {
+ die "$P: Invalid color mode: $color\n";
+}
+
+load_docs() if ($verbose);
+list_types(0) if ($list_types);
-help(0) if ($help);
+$fix = 1 if ($fix_inplace);
+$check_orig = $check;
my $exit = 0;
+my $perl_version_ok = 1;
+if ($^V && $^V lt $minimum_perl_version) {
+ $perl_version_ok = 0;
+ printf "$P: requires at least perl version %vd\n", $minimum_perl_version;
+ exit(1) if (!$ignore_perl_version);
+}
+
+#if no filenames are given, push '-' to read patch from stdin
if ($#ARGV < 0) {
- print "$P: no input files\n";
- exit(1);
+ push(@ARGV, '-');
}
-@ignore = split(/,/, join(',',@ignore));
-foreach my $word (@ignore) {
- $word =~ s/\s*\n?$//g;
- $word =~ s/^\s*//g;
- $word =~ s/\s+/ /g;
- $word =~ tr/[a-z]/[A-Z]/;
+# skip TAB size 1 to avoid additional checks on $tabsize - 1
+die "$P: Invalid TAB size: $tabsize\n" if ($tabsize < 2);
+
+sub hash_save_array_words {
+ my ($hashRef, $arrayRef) = @_;
- next if ($word =~ m/^\s*#/);
- next if ($word =~ m/^\s*$/);
+ my @array = split(/,/, join(',', @$arrayRef));
+ foreach my $word (@array) {
+ $word =~ s/\s*\n?$//g;
+ $word =~ s/^\s*//g;
+ $word =~ s/\s+/ /g;
+ $word =~ tr/[a-z]/[A-Z]/;
- $ignore_type{$word}++;
+ next if ($word =~ m/^\s*#/);
+ next if ($word =~ m/^\s*$/);
+
+ $hashRef->{$word}++;
+ }
}
+sub hash_show_words {
+ my ($hashRef, $prefix) = @_;
+
+ if (keys %$hashRef) {
+ print "\nNOTE: $prefix message types:";
+ foreach my $word (sort keys %$hashRef) {
+ print " $word";
+ }
+ print "\n";
+ }
+}
+
+hash_save_array_words(\%ignore_type, \@ignore);
+hash_save_array_words(\%use_type, \@use);
+
my $dbg_values = 0;
my $dbg_possible = 0;
my $dbg_type = 0;
@@ -165,14 +466,16 @@ if ($tree) {
} else {
if (top_of_kernel_tree('.')) {
$root = '.';
+ # OpenOCD specific: Begin: replace s"/scripts/"/tools/scripts/"
} elsif ($0 =~ m@(.*)/tools/scripts/[^/]*$@ &&
top_of_kernel_tree($1)) {
$root = $1;
}
+ # OpenOCD specific: End
}
if (!defined $root) {
- print "Must be run from the top-level dir. of a openocd tree\n";
+ print "Must be run from the top-level dir. of an OpenOCD tree\n";
exit(2);
}
}
@@ -190,20 +493,28 @@ our $Sparse = qr{
__force|
__iomem|
__must_check|
- __init_refok|
__kprobes|
__ref|
- __rcu
+ __refconst|
+ __refdata|
+ __rcu|
+ __private
}x;
+our $InitAttributePrefix = qr{__(?:mem|cpu|dev|net_|)};
+our $InitAttributeData = qr{$InitAttributePrefix(?:initdata\b)};
+our $InitAttributeConst = qr{$InitAttributePrefix(?:initconst\b)};
+our $InitAttributeInit = qr{$InitAttributePrefix(?:init\b)};
+our $InitAttribute = qr{$InitAttributeData|$InitAttributeConst|$InitAttributeInit};
# Notes to $Attribute:
# We need \b after 'init' otherwise 'initconst' will cause a false positive in a check
our $Attribute = qr{
const|
+ volatile|
__percpu|
__nocast|
__safe|
- __bitwise__|
+ __bitwise|
__packed__|
__packed2__|
__naked|
@@ -212,37 +523,57 @@ our $Attribute = qr{
__noreturn|
__used|
__cold|
+ __pure|
__noclone|
__deprecated|
__read_mostly|
+ __ro_after_init|
__kprobes|
- __(?:mem|cpu|dev|)(?:initdata|initconst|init\b)|
+ $InitAttribute|
____cacheline_aligned|
____cacheline_aligned_in_smp|
____cacheline_internodealigned_in_smp|
- __weak
+ __weak|
+ __alloc_size\s*\(\s*\d+\s*(?:,\s*\d+\s*)?\)
}x;
our $Modifier;
-our $Inline = qr{inline|__always_inline|noinline};
+our $Inline = qr{inline|__always_inline|noinline|__inline|__inline__};
our $Member = qr{->$Ident|\.$Ident|\[[^]]*\]};
our $Lval = qr{$Ident(?:$Member)*};
-our $Constant = qr{(?:[0-9]+|0x[0-9a-fA-F]+)[UL]*};
-our $Assignment = qr{(?:\*\=|/=|%=|\+=|-=|<<=|>>=|&=|\^=|\|=|=)};
-our $Compare = qr{<=|>=|==|!=|<|>};
+our $Int_type = qr{(?i)llu|ull|ll|lu|ul|l|u};
+our $Binary = qr{(?i)0b[01]+$Int_type?};
+our $Hex = qr{(?i)0x[0-9a-f]+$Int_type?};
+our $Int = qr{[0-9]+$Int_type?};
+our $Octal = qr{0[0-7]+$Int_type?};
+our $String = qr{(?:\b[Lu])?"[X\t]*"};
+our $Float_hex = qr{(?i)0x[0-9a-f]+p-?[0-9]+[fl]?};
+our $Float_dec = qr{(?i)(?:[0-9]+\.[0-9]*|[0-9]*\.[0-9]+)(?:e-?[0-9]+)?[fl]?};
+our $Float_int = qr{(?i)[0-9]+e-?[0-9]+[fl]?};
+our $Float = qr{$Float_hex|$Float_dec|$Float_int};
+our $Constant = qr{$Float|$Binary|$Octal|$Hex|$Int};
+our $Assignment = qr{\*\=|/=|%=|\+=|-=|<<=|>>=|&=|\^=|\|=|=};
+our $Compare = qr{<=|>=|==|!=|<|(?<!-)>};
+our $Arithmetic = qr{\+|-|\*|\/|%};
our $Operators = qr{
<=|>=|==|!=|
=>|->|<<|>>|<|>|!|~|
- &&|\|\||,|\^|\+\+|--|&|\||\+|-|\*|\/|%
+ &&|\|\||,|\^|\+\+|--|&|\||$Arithmetic
}x;
+our $c90_Keywords = qr{do|for|while|if|else|return|goto|continue|switch|default|case|break}x;
+
+our $BasicType;
our $NonptrType;
+our $NonptrTypeMisordered;
+our $NonptrTypeWithAttr;
our $Type;
+our $TypeMisordered;
our $Declare;
+our $DeclareMisordered;
-our $UTF8 = qr {
- [\x09\x0A\x0D\x20-\x7E] # ASCII
- | [\xC2-\xDF][\x80-\xBF] # non-overlong 2-byte
+our $NON_ASCII_UTF8 = qr{
+ [\xC2-\xDF][\x80-\xBF] # non-overlong 2-byte
| \xE0[\xA0-\xBF][\x80-\xBF] # excluding overlongs
| [\xE1-\xEC\xEE\xEF][\x80-\xBF]{2} # straight 3-byte
| \xED[\x80-\x9F][\x80-\xBF] # excluding surrogates
@@ -251,40 +582,179 @@ our $UTF8 = qr {
| \xF4[\x80-\x8F][\x80-\xBF]{2} # plane 16
}x;
-our $typeTypedefs = qr{(?x:
+our $UTF8 = qr{
+ [\x09\x0A\x0D\x20-\x7E] # ASCII
+ | $NON_ASCII_UTF8
+}x;
+
+our $typeC99Typedefs = qr{(?:__)?(?:[us]_?)?int_?(?:8|16|32|64)_t};
+our $typeOtherOSTypedefs = qr{(?x:
+ u_(?:char|short|int|long) | # bsd
+ u(?:nchar|short|int|long) # sysv
+)};
+our $typeKernelTypedefs = qr{(?x:
(?:__)?(?:u|s|be|le)(?:8|16|32|64)|
atomic_t
)};
+our $typeTypedefs = qr{(?x:
+ $typeC99Typedefs\b|
+ $typeOtherOSTypedefs\b|
+ $typeKernelTypedefs\b
+)};
+
+our $zero_initializer = qr{(?:(?:0[xX])?0+$Int_type?|NULL|false)\b};
+if (!$OpenOCD) {
our $logFunctions = qr{(?x:
- printk(?:_ratelimited|_once|)|
- [a-z0-9]+_(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)|
+ printk(?:_ratelimited|_once|_deferred_once|_deferred|)|
+ (?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)|
+ TP_printk|
WARN(?:_RATELIMIT|_ONCE|)|
panic|
MODULE_[A-Z_]+|
- LOG_(?:DEBUG|INFO|WARNING|ERROR|USER|USER_N|OUTPUT)+
+ seq_vprintf|seq_printf|seq_puts
+)};
+} # !$OpenOCD
+# OpenOCD specific: Begin: list log functions
+our $logFunctions = qr{(?x:
+ LOG_(?:TARGET_|)(?:DEBUG_IO|DEBUG|INFO|WARNING|ERROR|USER|USER_N|OUTPUT)
+)};
+# OpenOCD specific: End
+
+our $allocFunctions = qr{(?x:
+ (?:(?:devm_)?
+ (?:kv|k|v)[czm]alloc(?:_array)?(?:_node)? |
+ kstrdup(?:_const)? |
+ kmemdup(?:_nul)?) |
+ (?:\w+)?alloc_skb(?:_ip_align)? |
+ # dev_alloc_skb/netdev_alloc_skb, et al
+ dma_alloc_coherent
)};
our $signature_tags = qr{(?xi:
Signed-off-by:|
+ Co-developed-by:|
Acked-by:|
Tested-by:|
Reviewed-by:|
Reported-by:|
+ Suggested-by:|
To:|
Cc:
)};
+our $tracing_logging_tags = qr{(?xi:
+ [=-]*> |
+ <[=-]* |
+ \[ |
+ \] |
+ start |
+ called |
+ entered |
+ entry |
+ enter |
+ in |
+ inside |
+ here |
+ begin |
+ exit |
+ end |
+ done |
+ leave |
+ completed |
+ out |
+ return |
+ [\.\!:\s]*
+)};
+
+sub edit_distance_min {
+ my (@arr) = @_;
+ my $len = scalar @arr;
+ if ((scalar @arr) < 1) {
+ # if underflow, return
+ return;
+ }
+ my $min = $arr[0];
+ for my $i (0 .. ($len-1)) {
+ if ($arr[$i] < $min) {
+ $min = $arr[$i];
+ }
+ }
+ return $min;
+}
+
+sub get_edit_distance {
+ my ($str1, $str2) = @_;
+ $str1 = lc($str1);
+ $str2 = lc($str2);
+ $str1 =~ s/-//g;
+ $str2 =~ s/-//g;
+ my $len1 = length($str1);
+ my $len2 = length($str2);
+ # two dimensional array storing minimum edit distance
+ my @distance;
+ for my $i (0 .. $len1) {
+ for my $j (0 .. $len2) {
+ if ($i == 0) {
+ $distance[$i][$j] = $j;
+ } elsif ($j == 0) {
+ $distance[$i][$j] = $i;
+ } elsif (substr($str1, $i-1, 1) eq substr($str2, $j-1, 1)) {
+ $distance[$i][$j] = $distance[$i - 1][$j - 1];
+ } else {
+ my $dist1 = $distance[$i][$j - 1]; #insert distance
+ my $dist2 = $distance[$i - 1][$j]; # remove
+ my $dist3 = $distance[$i - 1][$j - 1]; #replace
+ $distance[$i][$j] = 1 + edit_distance_min($dist1, $dist2, $dist3);
+ }
+ }
+ }
+ return $distance[$len1][$len2];
+}
+
+sub find_standard_signature {
+ my ($sign_off) = @_;
+ my @standard_signature_tags = (
+ 'Signed-off-by:', 'Co-developed-by:', 'Acked-by:', 'Tested-by:',
+ 'Reviewed-by:', 'Reported-by:', 'Suggested-by:'
+ );
+ foreach my $signature (@standard_signature_tags) {
+ return $signature if (get_edit_distance($sign_off, $signature) <= 2);
+ }
+
+ return "";
+}
+
+our @typeListMisordered = (
+ qr{char\s+(?:un)?signed},
+ qr{int\s+(?:(?:un)?signed\s+)?short\s},
+ qr{int\s+short(?:\s+(?:un)?signed)},
+ qr{short\s+int(?:\s+(?:un)?signed)},
+ qr{(?:un)?signed\s+int\s+short},
+ qr{short\s+(?:un)?signed},
+ qr{long\s+int\s+(?:un)?signed},
+ qr{int\s+long\s+(?:un)?signed},
+ qr{long\s+(?:un)?signed\s+int},
+ qr{int\s+(?:un)?signed\s+long},
+ qr{int\s+(?:un)?signed},
+ qr{int\s+long\s+long\s+(?:un)?signed},
+ qr{long\s+long\s+int\s+(?:un)?signed},
+ qr{long\s+long\s+(?:un)?signed\s+int},
+ qr{long\s+long\s+(?:un)?signed},
+ qr{long\s+(?:un)?signed},
+);
+
our @typeList = (
qr{void},
- qr{(?:unsigned\s+)?char},
- qr{(?:unsigned\s+)?short},
- qr{(?:unsigned\s+)?int},
- qr{(?:unsigned\s+)?long},
- qr{(?:unsigned\s+)?long\s+int},
- qr{(?:unsigned\s+)?long\s+long},
- qr{(?:unsigned\s+)?long\s+long\s+int},
- qr{unsigned},
+ qr{(?:(?:un)?signed\s+)?char},
+ qr{(?:(?:un)?signed\s+)?short\s+int},
+ qr{(?:(?:un)?signed\s+)?short},
+ qr{(?:(?:un)?signed\s+)?int},
+ qr{(?:(?:un)?signed\s+)?long\s+int},
+ qr{(?:(?:un)?signed\s+)?long\s+long\s+int},
+ qr{(?:(?:un)?signed\s+)?long\s+long},
+ qr{(?:(?:un)?signed\s+)?long},
+ qr{(?:un)?signed},
qr{float},
qr{double},
qr{bool},
@@ -294,82 +764,578 @@ our @typeList = (
qr{${Ident}_t},
qr{${Ident}_handler},
qr{${Ident}_handler_fn},
+ @typeListMisordered,
);
+
+our $C90_int_types = qr{(?x:
+ long\s+long\s+int\s+(?:un)?signed|
+ long\s+long\s+(?:un)?signed\s+int|
+ long\s+long\s+(?:un)?signed|
+ (?:(?:un)?signed\s+)?long\s+long\s+int|
+ (?:(?:un)?signed\s+)?long\s+long|
+ int\s+long\s+long\s+(?:un)?signed|
+ int\s+(?:(?:un)?signed\s+)?long\s+long|
+
+ long\s+int\s+(?:un)?signed|
+ long\s+(?:un)?signed\s+int|
+ long\s+(?:un)?signed|
+ (?:(?:un)?signed\s+)?long\s+int|
+ (?:(?:un)?signed\s+)?long|
+ int\s+long\s+(?:un)?signed|
+ int\s+(?:(?:un)?signed\s+)?long|
+
+ int\s+(?:un)?signed|
+ (?:(?:un)?signed\s+)?int
+)};
+
+our @typeListFile = ();
+our @typeListWithAttr = (
+ @typeList,
+ qr{struct\s+$InitAttribute\s+$Ident},
+ qr{union\s+$InitAttribute\s+$Ident},
+);
+
our @modifierList = (
qr{fastcall},
);
+our @modifierListFile = ();
+
+our @mode_permission_funcs = (
+ ["module_param", 3],
+ ["module_param_(?:array|named|string)", 4],
+ ["module_param_array_named", 5],
+ ["debugfs_create_(?:file|u8|u16|u32|u64|x8|x16|x32|x64|size_t|atomic_t|bool|blob|regset32|u32_array)", 2],
+ ["proc_create(?:_data|)", 2],
+ ["(?:CLASS|DEVICE|SENSOR|SENSOR_DEVICE|IIO_DEVICE)_ATTR", 2],
+ ["IIO_DEV_ATTR_[A-Z_]+", 1],
+ ["SENSOR_(?:DEVICE_|)ATTR_2", 2],
+ ["SENSOR_TEMPLATE(?:_2|)", 3],
+ ["__ATTR", 2],
+);
+
+my $word_pattern = '\b[A-Z]?[a-z]{2,}\b';
+
+#Create a search pattern for all these functions to speed up a loop below
+our $mode_perms_search = "";
+foreach my $entry (@mode_permission_funcs) {
+ $mode_perms_search .= '|' if ($mode_perms_search ne "");
+ $mode_perms_search .= $entry->[0];
+}
+$mode_perms_search = "(?:${mode_perms_search})";
+
+our %deprecated_apis = (
+ "synchronize_rcu_bh" => "synchronize_rcu",
+ "synchronize_rcu_bh_expedited" => "synchronize_rcu_expedited",
+ "call_rcu_bh" => "call_rcu",
+ "rcu_barrier_bh" => "rcu_barrier",
+ "synchronize_sched" => "synchronize_rcu",
+ "synchronize_sched_expedited" => "synchronize_rcu_expedited",
+ "call_rcu_sched" => "call_rcu",
+ "rcu_barrier_sched" => "rcu_barrier",
+ "get_state_synchronize_sched" => "get_state_synchronize_rcu",
+ "cond_synchronize_sched" => "cond_synchronize_rcu",
+);
+
+#Create a search pattern for all these strings to speed up a loop below
+our $deprecated_apis_search = "";
+foreach my $entry (keys %deprecated_apis) {
+ $deprecated_apis_search .= '|' if ($deprecated_apis_search ne "");
+ $deprecated_apis_search .= $entry;
+}
+$deprecated_apis_search = "(?:${deprecated_apis_search})";
+
+our $mode_perms_world_writable = qr{
+ S_IWUGO |
+ S_IWOTH |
+ S_IRWXUGO |
+ S_IALLUGO |
+ 0[0-7][0-7][2367]
+}x;
+
+our %mode_permission_string_types = (
+ "S_IRWXU" => 0700,
+ "S_IRUSR" => 0400,
+ "S_IWUSR" => 0200,
+ "S_IXUSR" => 0100,
+ "S_IRWXG" => 0070,
+ "S_IRGRP" => 0040,
+ "S_IWGRP" => 0020,
+ "S_IXGRP" => 0010,
+ "S_IRWXO" => 0007,
+ "S_IROTH" => 0004,
+ "S_IWOTH" => 0002,
+ "S_IXOTH" => 0001,
+ "S_IRWXUGO" => 0777,
+ "S_IRUGO" => 0444,
+ "S_IWUGO" => 0222,
+ "S_IXUGO" => 0111,
+);
+
+#Create a search pattern for all these strings to speed up a loop below
+our $mode_perms_string_search = "";
+foreach my $entry (keys %mode_permission_string_types) {
+ $mode_perms_string_search .= '|' if ($mode_perms_string_search ne "");
+ $mode_perms_string_search .= $entry;
+}
+our $single_mode_perms_string_search = "(?:${mode_perms_string_search})";
+our $multi_mode_perms_string_search = qr{
+ ${single_mode_perms_string_search}
+ (?:\s*\|\s*${single_mode_perms_string_search})*
+}x;
+
+sub perms_to_octal {
+ my ($string) = @_;
+
+ return trim($string) if ($string =~ /^\s*0[0-7]{3,3}\s*$/);
+
+ my $val = "";
+ my $oval = "";
+ my $to = 0;
+ my $curpos = 0;
+ my $lastpos = 0;
+ while ($string =~ /\b(($single_mode_perms_string_search)\b(?:\s*\|\s*)?\s*)/g) {
+ $curpos = pos($string);
+ my $match = $2;
+ my $omatch = $1;
+ last if ($lastpos > 0 && ($curpos - length($omatch) != $lastpos));
+ $lastpos = $curpos;
+ $to |= $mode_permission_string_types{$match};
+ $val .= '\s*\|\s*' if ($val ne "");
+ $val .= $match;
+ $oval .= $omatch;
+ }
+ $oval =~ s/^\s*\|\s*//;
+ $oval =~ s/\s*\|\s*$//;
+ return sprintf("%04o", $to);
+}
our $allowed_asm_includes = qr{(?x:
irq|
- memory
+ memory|
+ time|
+ reboot
)};
# memory.h: ARM has a custom one
+# Load common spelling mistakes and build regular expression list.
+my $misspellings;
+my %spelling_fix;
+
+if (open(my $spelling, '<', $spelling_file)) {
+ while (<$spelling>) {
+ my $line = $_;
+
+ $line =~ s/\s*\n?$//g;
+ $line =~ s/^\s*//g;
+
+ next if ($line =~ m/^\s*#/);
+ next if ($line =~ m/^\s*$/);
+
+ my ($suspect, $fix) = split(/\|\|/, $line);
+
+ $spelling_fix{$suspect} = $fix;
+ }
+ close($spelling);
+} else {
+ warn "No typos will be found - file '$spelling_file': $!\n";
+}
+
+if ($codespell) {
+ if (open(my $spelling, '<', $codespellfile)) {
+ while (<$spelling>) {
+ my $line = $_;
+
+ $line =~ s/\s*\n?$//g;
+ $line =~ s/^\s*//g;
+
+ next if ($line =~ m/^\s*#/);
+ next if ($line =~ m/^\s*$/);
+ next if ($line =~ m/, disabled/i);
+
+ $line =~ s/,.*$//;
+
+ my ($suspect, $fix) = split(/->/, $line);
+
+ $spelling_fix{$suspect} = $fix;
+ }
+ close($spelling);
+ } else {
+ warn "No codespell typos will be found - file '$codespellfile': $!\n";
+ }
+}
+
+$misspellings = join("|", sort keys %spelling_fix) if keys %spelling_fix;
+
+sub read_words {
+ my ($wordsRef, $file) = @_;
+
+ if (open(my $words, '<', $file)) {
+ while (<$words>) {
+ my $line = $_;
+
+ $line =~ s/\s*\n?$//g;
+ $line =~ s/^\s*//g;
+
+ next if ($line =~ m/^\s*#/);
+ next if ($line =~ m/^\s*$/);
+ if ($line =~ /\s/) {
+ print("$file: '$line' invalid - ignored\n");
+ next;
+ }
+
+ $$wordsRef .= '|' if (defined $$wordsRef);
+ $$wordsRef .= $line;
+ }
+ close($file);
+ return 1;
+ }
+
+ return 0;
+}
+
+# OpenOCD specific: Begin: Load list of allowed CamelCase symbols
+if (show_type("CAMELCASE")) {
+ my $allowed_camelcase_file = "tools/scripts/camelcase.txt";
+ if (!$root) {
+ warn "Ignore list of allowed camelcase symbols.\n";
+ } elsif (open(my $words, '<', "$root/$allowed_camelcase_file")) {
+ while (<$words>) {
+ my $line = $_;
+
+ $line =~ s/\s*\n?$//g;
+ $line =~ s/^\s*//g;
+
+ next if ($line =~ m/^\s*#/);
+ next if ($line =~ m/^\s*$/);
+ if ($line =~ /\s/) {
+ print("$allowed_camelcase_file: '$line' invalid - ignored\n");
+ next;
+ }
+
+ $camelcase{$line} = 1;
+ }
+ close("$root/$allowed_camelcase_file");
+ } else {
+ warn "Failed opening file '$root/$allowed_camelcase_file': $!\n";
+ }
+}
+# OpenOCD specific: End
+
+my $const_structs;
+if (show_type("CONST_STRUCT")) {
+ read_words(\$const_structs, $conststructsfile)
+ or warn "No structs that should be const will be found - file '$conststructsfile': $!\n";
+}
+
+if (defined($typedefsfile)) {
+ my $typeOtherTypedefs;
+ read_words(\$typeOtherTypedefs, $typedefsfile)
+ or warn "No additional types will be considered - file '$typedefsfile': $!\n";
+ $typeTypedefs .= '|' . $typeOtherTypedefs if (defined $typeOtherTypedefs);
+}
+
sub build_types {
- my $mods = "(?x: \n" . join("|\n ", @modifierList) . "\n)";
- my $all = "(?x: \n" . join("|\n ", @typeList) . "\n)";
+ my $mods = "(?x: \n" . join("|\n ", (@modifierList, @modifierListFile)) . "\n)";
+ my $all = "(?x: \n" . join("|\n ", (@typeList, @typeListFile)) . "\n)";
+ my $Misordered = "(?x: \n" . join("|\n ", @typeListMisordered) . "\n)";
+ my $allWithAttr = "(?x: \n" . join("|\n ", @typeListWithAttr) . "\n)";
$Modifier = qr{(?:$Attribute|$Sparse|$mods)};
+ $BasicType = qr{
+ (?:$typeTypedefs\b)|
+ (?:${all}\b)
+ }x;
$NonptrType = qr{
(?:$Modifier\s+|const\s+)*
(?:
- (?:typeof|__typeof__)\s*\(\s*\**\s*$Ident\s*\)|
+ (?:typeof|__typeof__)\s*\([^\)]*\)|
(?:$typeTypedefs\b)|
(?:${all}\b)
)
(?:\s+$Modifier|\s+const)*
}x;
+ $NonptrTypeMisordered = qr{
+ (?:$Modifier\s+|const\s+)*
+ (?:
+ (?:${Misordered}\b)
+ )
+ (?:\s+$Modifier|\s+const)*
+ }x;
+ $NonptrTypeWithAttr = qr{
+ (?:$Modifier\s+|const\s+)*
+ (?:
+ (?:typeof|__typeof__)\s*\([^\)]*\)|
+ (?:$typeTypedefs\b)|
+ (?:${allWithAttr}\b)
+ )
+ (?:\s+$Modifier|\s+const)*
+ }x;
$Type = qr{
$NonptrType
- (?:[\s\*]+\s*const|[\s\*]+|(?:\s*\[\s*\])+)?
+ (?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+){0,4}
+ (?:\s+$Inline|\s+$Modifier)*
+ }x;
+ $TypeMisordered = qr{
+ $NonptrTypeMisordered
+ (?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+){0,4}
(?:\s+$Inline|\s+$Modifier)*
}x;
- $Declare = qr{(?:$Storage\s+)?$Type};
+ $Declare = qr{(?:$Storage\s+(?:$Inline\s+)?)?$Type};
+ $DeclareMisordered = qr{(?:$Storage\s+(?:$Inline\s+)?)?$TypeMisordered};
}
build_types();
-our $match_balanced_parentheses = qr/(\((?:[^\(\)]+|(-1))*\))/;
-
our $Typecast = qr{\s*(\(\s*$NonptrType\s*\)){0,1}\s*};
-our $LvalOrFunc = qr{($Lval)\s*($match_balanced_parentheses{0,1})\s*};
+
+# Using $balanced_parens, $LvalOrFunc, or $FuncArg
+# requires at least perl version v5.10.0
+# Any use must be runtime checked with $^V
+
+our $balanced_parens = qr/(\((?:[^\(\)]++|(?-1))*\))/;
+our $LvalOrFunc = qr{((?:[\&\*]\s*)?$Lval)\s*($balanced_parens{0,1})\s*};
+our $FuncArg = qr{$Typecast{0,1}($LvalOrFunc|$Constant|$String)};
+
+our $declaration_macros = qr{(?x:
+ (?:$Storage\s+)?(?:[A-Z_][A-Z0-9]*_){0,2}(?:DEFINE|DECLARE)(?:_[A-Z0-9]+){1,6}\s*\(|
+ (?:$Storage\s+)?[HLP]?LIST_HEAD\s*\(|
+ (?:SKCIPHER_REQUEST|SHASH_DESC|AHASH_REQUEST)_ON_STACK\s*\(|
+ (?:$Storage\s+)?(?:XA_STATE|XA_STATE_ORDER)\s*\(
+)};
+
+our %allow_repeated_words = (
+ add => '',
+ added => '',
+ bad => '',
+ be => '',
+);
sub deparenthesize {
my ($string) = @_;
return "" if (!defined($string));
- $string =~ s@^\s*\(\s*@@g;
- $string =~ s@\s*\)\s*$@@g;
+
+ while ($string =~ /^\s*\(.*\)\s*$/) {
+ $string =~ s@^\s*\(\s*@@;
+ $string =~ s@\s*\)\s*$@@;
+ }
+
$string =~ s@\s+@ @g;
+
return $string;
}
-$chk_signoff = 0 if ($file);
+sub seed_camelcase_file {
+ my ($file) = @_;
-my @dep_includes = ();
-my @dep_functions = ();
-my $removal = "Documentation/feature-removal-schedule.txt";
-if ($tree && -f "$root/$removal") {
- open(my $REMOVE, '<', "$root/$removal") ||
- die "$P: $removal: open failed - $!\n";
- while (<$REMOVE>) {
- if (/^Check:\s+(.*\S)/) {
- for my $entry (split(/[, ]+/, $1)) {
- if ($entry =~ m@include/(.*)@) {
- push(@dep_includes, $1);
+ return if (!(-f $file));
- } elsif ($entry !~ m@/@) {
- push(@dep_functions, $entry);
- }
- }
+ local $/;
+
+ open(my $include_file, '<', "$file")
+ or warn "$P: Can't read '$file' $!\n";
+ my $text = <$include_file>;
+ close($include_file);
+
+ my @lines = split('\n', $text);
+
+ foreach my $line (@lines) {
+ if (!$OpenOCD) {
+ next if ($line !~ /(?:[A-Z][a-z]|[a-z][A-Z])/);
+ if ($line =~ /^[ \t]*(?:#[ \t]*define|typedef\s+$Type)\s+(\w*(?:[A-Z][a-z]|[a-z][A-Z])\w*)/) {
+ $camelcase{$1} = 1;
+ } elsif ($line =~ /^\s*$Declare\s+(\w*(?:[A-Z][a-z]|[a-z][A-Z])\w*)\s*[\(\[,;]/) {
+ $camelcase{$1} = 1;
+ } elsif ($line =~ /^\s*(?:union|struct|enum)\s+(\w*(?:[A-Z][a-z]|[a-z][A-Z])\w*)\s*[;\{]/) {
+ $camelcase{$1} = 1;
+ }
+ } # !$OpenOCD
+ # OpenOCD Specific: Begin: extend to camel[0-9_]*CASE
+ next if ($line !~ /(?:[A-Z][0-9_]*[a-z]|[a-z][0-9_]*[A-Z])/);
+ if ($line =~ /^[ \t]*(?:#[ \t]*define|typedef\s+$Type)\s+(\w*(?:[A-Z][0-9_]*[a-z]|[a-z][0-9_]*[A-Z])\w*)/) {
+ $camelcase{$1} = 1;
+ } elsif ($line =~ /^\s*$Declare\s+(\w*(?:[A-Z][0-9_]*[a-z]|[a-z][0-9_]*[A-Z])\w*)\s*[\(\[,;]/) {
+ $camelcase{$1} = 1;
+ } elsif ($line =~ /^\s*(?:union|struct|enum)\s+(\w*(?:[A-Z][0-9_]*[a-z]|[a-z][0-9_]*[A-Z])\w*)\s*[;\{]/) {
+ $camelcase{$1} = 1;
+ }
+ # OpenOCD Specific: End
+ }
+}
+
+our %maintained_status = ();
+
+sub is_maintained_obsolete {
+ my ($filename) = @_;
+
+ return 0 if (!$tree || !(-e "$root/scripts/get_maintainer.pl"));
+
+ if (!exists($maintained_status{$filename})) {
+ $maintained_status{$filename} = `perl $root/scripts/get_maintainer.pl --status --nom --nol --nogit --nogit-fallback -f $filename 2>&1`;
+ }
+
+ return $maintained_status{$filename} =~ /obsolete/i;
+}
+
+sub is_SPDX_License_valid {
+ my ($license) = @_;
+
+ # OpenOCD specific: Begin: replace s"scripts"tools/scripts"
+ return 1 if (!$tree || which("python3") eq "" || !(-x "$root/tools/scripts/spdxcheck.py") || !(-e "$gitroot"));
+
+ my $root_path = abs_path($root);
+ my $status = `cd "$root_path"; echo "$license" | tools/scripts/spdxcheck.py -`;
+ # OpenOCD specific: End
+ return 0 if ($status ne "");
+ return 1;
+}
+
+my $camelcase_seeded = 0;
+sub seed_camelcase_includes {
+ return if ($camelcase_seeded);
+
+ my $files;
+ my $camelcase_cache = "";
+ my @include_files = ();
+
+ $camelcase_seeded = 1;
+
+ if (-e "$gitroot") {
+ my $git_last_include_commit = `${git_command} log --no-merges --pretty=format:"%h%n" -1 -- include`;
+ chomp $git_last_include_commit;
+ $camelcase_cache = ".checkpatch-camelcase.git.$git_last_include_commit";
+ } else {
+ my $last_mod_date = 0;
+ $files = `find $root/include -name "*.h"`;
+ @include_files = split('\n', $files);
+ foreach my $file (@include_files) {
+ my $date = POSIX::strftime("%Y%m%d%H%M",
+ localtime((stat $file)[9]));
+ $last_mod_date = $date if ($last_mod_date < $date);
+ }
+ $camelcase_cache = ".checkpatch-camelcase.date.$last_mod_date";
+ }
+
+ if ($camelcase_cache ne "" && -f $camelcase_cache) {
+ open(my $camelcase_file, '<', "$camelcase_cache")
+ or warn "$P: Can't read '$camelcase_cache' $!\n";
+ while (<$camelcase_file>) {
+ chomp;
+ $camelcase{$_} = 1;
}
+ close($camelcase_file);
+
+ return;
+ }
+
+ if (-e "$gitroot") {
+ $files = `${git_command} ls-files "include/*.h"`;
+ @include_files = split('\n', $files);
+ }
+
+ foreach my $file (@include_files) {
+ seed_camelcase_file($file);
+ }
+
+ if ($camelcase_cache ne "") {
+ unlink glob ".checkpatch-camelcase.*";
+ open(my $camelcase_file, '>', "$camelcase_cache")
+ or warn "$P: Can't write '$camelcase_cache' $!\n";
+ foreach (sort { lc($a) cmp lc($b) } keys(%camelcase)) {
+ print $camelcase_file ("$_\n");
+ }
+ close($camelcase_file);
+ }
+}
+
+sub git_is_single_file {
+ my ($filename) = @_;
+
+ return 0 if ((which("git") eq "") || !(-e "$gitroot"));
+
+ my $output = `${git_command} ls-files -- $filename 2>/dev/null`;
+ my $count = $output =~ tr/\n//;
+ return $count eq 1 && $output =~ m{^${filename}$};
+}
+
+sub git_commit_info {
+ my ($commit, $id, $desc) = @_;
+
+ return ($id, $desc) if ((which("git") eq "") || !(-e "$gitroot"));
+
+ my $output = `${git_command} log --no-color --format='%H %s' -1 $commit 2>&1`;
+ $output =~ s/^\s*//gm;
+ my @lines = split("\n", $output);
+
+ return ($id, $desc) if ($#lines < 0);
+
+ if ($lines[0] =~ /^error: short SHA1 $commit is ambiguous/) {
+# Maybe one day convert this block of bash into something that returns
+# all matching commit ids, but it's very slow...
+#
+# echo "checking commits $1..."
+# git rev-list --remotes | grep -i "^$1" |
+# while read line ; do
+# git log --format='%H %s' -1 $line |
+# echo "commit $(cut -c 1-12,41-)"
+# done
+ } elsif ($lines[0] =~ /^fatal: ambiguous argument '$commit': unknown revision or path not in the working tree\./ ||
+ $lines[0] =~ /^fatal: bad object $commit/) {
+ $id = undef;
+ } else {
+ $id = substr($lines[0], 0, 12);
+ $desc = substr($lines[0], 41);
}
- close($REMOVE);
+
+ return ($id, $desc);
}
+$chk_signoff = 0 if ($file);
+
my @rawlines = ();
my @lines = ();
+my @fixed = ();
+my @fixed_inserted = ();
+my @fixed_deleted = ();
+my $fixlinenr = -1;
+
+# If input is git commits, extract all commits from the commit expressions.
+# For example, HEAD-3 means we need check 'HEAD, HEAD~1, HEAD~2'.
+die "$P: No git repository found\n" if ($git && !-e "$gitroot");
+
+if ($git) {
+ my @commits = ();
+ foreach my $commit_expr (@ARGV) {
+ my $git_range;
+ if ($commit_expr =~ m/^(.*)-(\d+)$/) {
+ $git_range = "-$2 $1";
+ } elsif ($commit_expr =~ m/\.\./) {
+ $git_range = "$commit_expr";
+ } else {
+ $git_range = "-1 $commit_expr";
+ }
+ my $lines = `${git_command} log --no-color --no-merges --pretty=format:'%H %s' $git_range`;
+ foreach my $line (split(/\n/, $lines)) {
+ $line =~ /^([0-9a-fA-F]{40,40}) (.*)$/;
+ next if (!defined($1) || !defined($2));
+ my $sha1 = $1;
+ my $subject = $2;
+ unshift(@commits, $sha1);
+ $git_commits{$sha1} = $subject;
+ }
+ }
+ die "$P: no git commits after extraction!\n" if (@commits == 0);
+ @ARGV = @commits;
+}
+
my $vname;
+$allow_c99_comments = !defined $ignore_type{"C99_COMMENT_TOLERANCE"};
for my $filename (@ARGV) {
my $FILE;
- if ($file) {
+ my $is_git_file = git_is_single_file($filename);
+ my $oldfile = $file;
+ $file = 1 if ($is_git_file);
+ if ($git) {
+ open($FILE, '-|', "git format-patch -M --stdout -1 $filename") ||
+ die "$P: $filename: git format-patch failed - $!\n";
+ } elsif ($file) {
open($FILE, '-|', "diff -u /dev/null $filename") ||
die "$P: $filename: diff failed - $!\n";
} elsif ($filename eq '-') {
@@ -380,19 +1346,67 @@ for my $filename (@ARGV) {
}
if ($filename eq '-') {
$vname = 'Your patch';
+ } elsif ($git) {
+ $vname = "Commit " . substr($filename, 0, 12) . ' ("' . $git_commits{$filename} . '")';
} else {
$vname = $filename;
}
while (<$FILE>) {
chomp;
push(@rawlines, $_);
+ $vname = qq("$1") if ($filename eq '-' && $_ =~ m/^Subject:\s+(.+)/i);
}
close($FILE);
+
+ if ($#ARGV > 0 && $quiet == 0) {
+ print '-' x length($vname) . "\n";
+ print "$vname\n";
+ print '-' x length($vname) . "\n";
+ }
+
if (!process($filename)) {
$exit = 1;
}
@rawlines = ();
@lines = ();
+ @fixed = ();
+ @fixed_inserted = ();
+ @fixed_deleted = ();
+ $fixlinenr = -1;
+ @modifierListFile = ();
+ @typeListFile = ();
+ build_types();
+ $file = $oldfile if ($is_git_file);
+}
+
+if (!$quiet) {
+ hash_show_words(\%use_type, "Used");
+ hash_show_words(\%ignore_type, "Ignored");
+
+ if (!$perl_version_ok) {
+ print << "EOM"
+
+NOTE: perl $^V is not modern enough to detect all possible issues.
+ An upgrade to at least perl $minimum_perl_version is suggested.
+EOM
+ }
+ if ($exit) {
+ if (!$OpenOCD) {
+ print << "EOM"
+
+NOTE: If any of the errors are false positives, please report
+ them to the maintainer, see CHECKPATCH in MAINTAINERS.
+EOM
+ } # !$OpenOCD
+ # OpenOCD specific: Begin
+ print << "EOM"
+
+NOTE: If any of the errors are false positives, please report
+ them to the openocd-devel mailing list or prepare a patch
+ and send it to Gerrit for review.
+EOM
+ # OpenOCD specific: End
+ }
}
exit($exit);
@@ -400,10 +1414,19 @@ exit($exit);
sub top_of_kernel_tree {
my ($root) = @_;
+ if (!$OpenOCD) {
+ my @tree_check = (
+ "COPYING", "CREDITS", "Kbuild", "MAINTAINERS", "Makefile",
+ "README", "Documentation", "arch", "include", "drivers",
+ "fs", "init", "ipc", "kernel", "lib", "scripts",
+ );
+ } # !$OpenOCD
+ # OpenOCD specific: Begin
my @tree_check = (
"AUTHORS", "BUGS", "COPYING", "HACKING", "Makefile.am",
"README", "contrib", "doc", "src", "tcl", "testing", "tools",
);
+ # OpenOCD specific: End
foreach my $check (@tree_check) {
if (! -e $root . '/' . $check) {
@@ -411,12 +1434,14 @@ sub top_of_kernel_tree {
}
}
return 1;
- }
+}
sub parse_email {
my ($formatted_email) = @_;
my $name = "";
+ my $quoted = "";
+ my $name_comment = "";
my $address = "";
my $comment = "";
@@ -430,9 +1455,9 @@ sub parse_email {
} elsif ($formatted_email =~ /(\S+\@\S+)(.*)$/) {
$address = $1;
$comment = $2 if defined $2;
- $formatted_email =~ s/$address.*$//;
+ $formatted_email =~ s/\Q$address\E.*$//;
$name = $formatted_email;
- $name =~ s/^\s+|\s+$//g;
+ $name = trim($name);
$name =~ s/^\"|\"$//g;
# If there's a name left after stripping spaces and
# leading quotes, and the address doesn't have both
@@ -445,46 +1470,94 @@ sub parse_email {
$address = "";
$comment = "";
}
+ # OpenOCD specific: Begin: handle jenkins as valid email
} elsif ($formatted_email eq "jenkins") {
- $address = "jenkins"
+ $address = "jenkins";
+ # OpenOCD specific: End
}
- $name =~ s/^\s+|\s+$//g;
- $name =~ s/^\"|\"$//g;
- $address =~ s/^\s+|\s+$//g;
+ # Extract comments from names excluding quoted parts
+ # "John D. (Doe)" - Do not extract
+ if ($name =~ s/\"(.+)\"//) {
+ $quoted = $1;
+ }
+ while ($name =~ s/\s*($balanced_parens)\s*/ /) {
+ $name_comment .= trim($1);
+ }
+ $name =~ s/^[ \"]+|[ \"]+$//g;
+ $name = trim("$quoted $name");
+
+ $address = trim($address);
$address =~ s/^\<|\>$//g;
+ $comment = trim($comment);
if ($name =~ /[^\w \-]/i) { ##has "must quote" chars
$name =~ s/(?<!\\)"/\\"/g; ##escape quotes
$name = "\"$name\"";
}
- return ($name, $address, $comment);
+ return ($name, $name_comment, $address, $comment);
}
sub format_email {
- my ($name, $address) = @_;
+ my ($name, $name_comment, $address, $comment) = @_;
my $formatted_email;
- $name =~ s/^\s+|\s+$//g;
- $name =~ s/^\"|\"$//g;
- $address =~ s/^\s+|\s+$//g;
+ $name =~ s/^[ \"]+|[ \"]+$//g;
+ $address = trim($address);
+ $address =~ s/(?:\.|\,|\")+$//; ##trailing commas, dots or quotes
if ($name =~ /[^\w \-]/i) { ##has "must quote" chars
$name =~ s/(?<!\\)"/\\"/g; ##escape quotes
$name = "\"$name\"";
}
+ $name_comment = trim($name_comment);
+ $name_comment = " $name_comment" if ($name_comment ne "");
+ $comment = trim($comment);
+ $comment = " $comment" if ($comment ne "");
+
if ("$name" eq "") {
$formatted_email = "$address";
} else {
- $formatted_email = "$name <$address>";
+ $formatted_email = "$name$name_comment <$address>";
}
-
+ $formatted_email .= "$comment";
return $formatted_email;
}
+sub reformat_email {
+ my ($email) = @_;
+
+ my ($email_name, $name_comment, $email_address, $comment) = parse_email($email);
+ return format_email($email_name, $name_comment, $email_address, $comment);
+}
+
+sub same_email_addresses {
+ my ($email1, $email2) = @_;
+
+ my ($email1_name, $name1_comment, $email1_address, $comment1) = parse_email($email1);
+ my ($email2_name, $name2_comment, $email2_address, $comment2) = parse_email($email2);
+
+ return $email1_name eq $email2_name &&
+ $email1_address eq $email2_address &&
+ $name1_comment eq $name2_comment &&
+ $comment1 eq $comment2;
+}
+
+sub which {
+ my ($bin) = @_;
+
+ foreach my $path (split(/:/, $ENV{PATH})) {
+ if (-e "$path/$bin") {
+ return "$path/$bin";
+ }
+ }
+
+ return "";
+}
+
sub which_conf {
my ($conf) = @_;
@@ -506,7 +1579,7 @@ sub expand_tabs {
if ($c eq "\t") {
$res .= ' ';
$n++;
- for (; ($n % 4) != 0; $n++) {
+ for (; ($n % $tabsize) != 0; $n++) {
$res .= ' ';
}
next;
@@ -562,7 +1635,7 @@ sub sanitise_line {
for ($off = 1; $off < length($line); $off++) {
$c = substr($line, $off, 1);
- # Comments we are wacking completly including the begin
+ # Comments we are whacking completely including the begin
# and end, all to $;.
if ($sanitise_quote eq '' && substr($line, $off, 2) eq '/*') {
$sanitise_quote = '*/';
@@ -631,9 +1704,22 @@ sub sanitise_line {
$res =~ s@(\#\s*(?:error|warning)\s+).*@$1$clean@;
}
+ if ($allow_c99_comments && $res =~ m@(//.*$)@) {
+ my $match = $1;
+ $res =~ s/\Q$match\E/"$;" x length($match)/e;
+ }
+
return $res;
}
+sub get_quoted_string {
+ my ($line, $rawline) = @_;
+
+ return "" if (!defined($line) || !defined($rawline));
+ return "" if ($line !~ m/($String)/g);
+ return substr($rawline, $-[0], $+[0] - $-[0]);
+}
+
sub ctx_statement_block {
my ($linenr, $remain, $off) = @_;
my $line = $linenr - 1;
@@ -674,6 +1760,10 @@ sub ctx_statement_block {
if ($off >= $len) {
last;
}
+ if ($level == 0 && substr($blk, $off) =~ /^.\s*#\s*define/) {
+ $level++;
+ $type = '#';
+ }
}
$p = $c;
$c = substr($blk, $off, 1);
@@ -699,7 +1789,7 @@ sub ctx_statement_block {
# An else is really a conditional as long as its not else if
if ($level == 0 && $coff_set == 0 &&
(!defined($p) || $p =~ /(?:\s|\}|\+)/) &&
- $remainder =~ /^(else)(?:\s|\{)/ &&
+ $remainder =~ /^(else)(?:\s|{)/ &&
$remainder !~ /^else\s+if\b/) {
$coff = $off + length($1) - 1;
$coff_set = 1;
@@ -736,6 +1826,13 @@ sub ctx_statement_block {
last;
}
}
+ # Preprocessor commands end at the newline unless escaped.
+ if ($type eq '#' && $c eq "\n" && $p ne "\\") {
+ $level--;
+ $type = '';
+ $off++;
+ last;
+ }
$off++;
}
# We are truly at the end, so shuffle to the next line.
@@ -782,7 +1879,7 @@ sub statement_block_size {
my ($stmt) = @_;
$stmt =~ s/(^|\n)./$1/g;
- $stmt =~ s/^\s*\{//;
+ $stmt =~ s/^\s*{//;
$stmt =~ s/}\s*$//;
$stmt =~ s/^\s*//;
$stmt =~ s/\s*$//;
@@ -911,8 +2008,16 @@ sub ctx_statement_level {
sub ctx_locate_comment {
my ($first_line, $end_line) = @_;
+ # If c99 comment on the current line, or the line before or after
+ my ($current_comment) = ($rawlines[$end_line - 1] =~ m@^\+.*(//.*$)@);
+ return $current_comment if (defined $current_comment);
+ ($current_comment) = ($rawlines[$end_line - 2] =~ m@^[\+ ].*(//.*$)@);
+ return $current_comment if (defined $current_comment);
+ ($current_comment) = ($rawlines[$end_line] =~ m@^[\+ ].*(//.*$)@);
+ return $current_comment if (defined $current_comment);
+
# Catch a comment on the end of the line itself.
- my ($current_comment) = ($rawlines[$end_line - 1] =~ m@.*(/\*.*\*/)\s*(?:\\\s*)?$@);
+ ($current_comment) = ($rawlines[$end_line - 1] =~ m@.*(/\*.*\*/)\s*(?:\\\s*)?$@);
return $current_comment if (defined $current_comment);
# Look through the context and try and figure out if there is a
@@ -966,6 +2071,28 @@ sub raw_line {
return $line;
}
+sub get_stat_real {
+ my ($linenr, $lc) = @_;
+
+ my $stat_real = raw_line($linenr, 0);
+ for (my $count = $linenr + 1; $count <= $lc; $count++) {
+ $stat_real = $stat_real . "\n" . raw_line($count, 0);
+ }
+
+ return $stat_real;
+}
+
+sub get_stat_here {
+ my ($linenr, $cnt, $here) = @_;
+
+ my $herectx = $here . "\n";
+ for (my $n = 0; $n < $cnt; $n++) {
+ $herectx .= raw_line($linenr, $n) . "\n";
+ }
+
+ return $herectx;
+}
+
sub cat_vet {
my ($vet) = @_;
my ($res, $coded);
@@ -1018,7 +2145,7 @@ sub annotate_values {
} elsif ($cur =~ /^(\(\s*$Type\s*)\)/ && $av_pending eq '_') {
print "CAST($1)\n" if ($dbg_values > 1);
push(@av_paren_type, $type);
- $type = 'C';
+ $type = 'c';
} elsif ($cur =~ /^($Type)\s*(?:$Ident|,|\)|\(|\s*$)/) {
print "DECLARE($1)\n" if ($dbg_values > 1);
@@ -1136,7 +2263,7 @@ sub annotate_values {
print "ASSIGN($1)\n" if ($dbg_values > 1);
$type = 'N';
- } elsif ($cur =~/^(;|\{|})/) {
+ } elsif ($cur =~/^(;|{|})/) {
print "END($1)\n" if ($dbg_values > 1);
$type = 'E';
$av_pend_colon = 'O';
@@ -1210,7 +2337,9 @@ sub possible {
case|
else|
asm|__asm__|
- do
+ do|
+ \#|
+ \#\#|
)(?:\s|$)|
^(?:typedef|struct|enum)\b
)}x;
@@ -1226,13 +2355,13 @@ sub possible {
for my $modifier (split(' ', $possible)) {
if ($modifier !~ $notPermitted) {
warn "MODIFIER: $modifier ($possible) ($line)\n" if ($dbg_possible);
- push(@modifierList, $modifier);
+ push(@modifierListFile, $modifier);
}
}
} else {
warn "POSSIBLE: $possible ($line)\n" if ($dbg_possible);
- push(@typeList, $possible);
+ push(@typeListFile, $possible);
}
build_types();
} else {
@@ -1243,47 +2372,178 @@ sub possible {
my $prefix = '';
sub show_type {
- return !defined $ignore_type{$_[0]};
+ my ($type) = @_;
+
+ $type =~ tr/[a-z]/[A-Z]/;
+
+ return defined $use_type{$type} if (scalar keys %use_type > 0);
+
+ return !defined $ignore_type{$type};
}
sub report {
- if (!show_type($_[1]) ||
- (defined $tst_only && $_[2] !~ /\Q$tst_only\E/)) {
+ my ($level, $type, $msg) = @_;
+
+ if (!show_type($type) ||
+ (defined $tst_only && $msg !~ /\Q$tst_only\E/)) {
return 0;
}
- my $line;
+ my $output = '';
+ if ($color) {
+ if ($level eq 'ERROR') {
+ $output .= RED;
+ } elsif ($level eq 'WARNING') {
+ $output .= YELLOW;
+ } else {
+ $output .= GREEN;
+ }
+ }
+ $output .= $prefix . $level . ':';
if ($show_types) {
- $line = "$prefix$_[0]:$_[1]: $_[2]\n";
- } else {
- $line = "$prefix$_[0]: $_[2]\n";
+ $output .= BLUE if ($color);
+ $output .= "$type:";
}
- $line = (split('\n', $line))[0] . "\n" if ($terse);
+ $output .= RESET if ($color);
+ $output .= ' ' . $msg . "\n";
- push(our @report, $line);
+ if ($showfile) {
+ my @lines = split("\n", $output, -1);
+ splice(@lines, 1, 1);
+ $output = join("\n", @lines);
+ }
+
+ if ($terse) {
+ $output = (split('\n', $output))[0] . "\n";
+ }
+
+ if ($verbose && exists($verbose_messages{$type}) &&
+ !exists($verbose_emitted{$type})) {
+ $output .= $verbose_messages{$type} . "\n\n";
+ $verbose_emitted{$type} = 1;
+ }
+
+ push(our @report, $output);
return 1;
}
+
sub report_dump {
our @report;
}
+sub fixup_current_range {
+ my ($lineRef, $offset, $length) = @_;
+
+ if ($$lineRef =~ /^\@\@ -\d+,\d+ \+(\d+),(\d+) \@\@/) {
+ my $o = $1;
+ my $l = $2;
+ my $no = $o + $offset;
+ my $nl = $l + $length;
+ $$lineRef =~ s/\+$o,$l \@\@/\+$no,$nl \@\@/;
+ }
+}
+
+sub fix_inserted_deleted_lines {
+ my ($linesRef, $insertedRef, $deletedRef) = @_;
+
+ my $range_last_linenr = 0;
+ my $delta_offset = 0;
+
+ my $old_linenr = 0;
+ my $new_linenr = 0;
+
+ my $next_insert = 0;
+ my $next_delete = 0;
+
+ my @lines = ();
+
+ my $inserted = @{$insertedRef}[$next_insert++];
+ my $deleted = @{$deletedRef}[$next_delete++];
+
+ foreach my $old_line (@{$linesRef}) {
+ my $save_line = 1;
+ my $line = $old_line; #don't modify the array
+ if ($line =~ /^(?:\+\+\+|\-\-\-)\s+\S+/) { #new filename
+ $delta_offset = 0;
+ } elsif ($line =~ /^\@\@ -\d+,\d+ \+\d+,\d+ \@\@/) { #new hunk
+ $range_last_linenr = $new_linenr;
+ fixup_current_range(\$line, $delta_offset, 0);
+ }
+
+ while (defined($deleted) && ${$deleted}{'LINENR'} == $old_linenr) {
+ $deleted = @{$deletedRef}[$next_delete++];
+ $save_line = 0;
+ fixup_current_range(\$lines[$range_last_linenr], $delta_offset--, -1);
+ }
+
+ while (defined($inserted) && ${$inserted}{'LINENR'} == $old_linenr) {
+ push(@lines, ${$inserted}{'LINE'});
+ $inserted = @{$insertedRef}[$next_insert++];
+ $new_linenr++;
+ fixup_current_range(\$lines[$range_last_linenr], $delta_offset++, 1);
+ }
+
+ if ($save_line) {
+ push(@lines, $line);
+ $new_linenr++;
+ }
+
+ $old_linenr++;
+ }
+
+ return @lines;
+}
+
+sub fix_insert_line {
+ my ($linenr, $line) = @_;
+
+ my $inserted = {
+ LINENR => $linenr,
+ LINE => $line,
+ };
+ push(@fixed_inserted, $inserted);
+}
+
+sub fix_delete_line {
+ my ($linenr, $line) = @_;
+
+ my $deleted = {
+ LINENR => $linenr,
+ LINE => $line,
+ };
+
+ push(@fixed_deleted, $deleted);
+}
+
sub ERROR {
- if (report("ERROR", $_[0], $_[1])) {
+ my ($type, $msg) = @_;
+
+ if (report("ERROR", $type, $msg)) {
our $clean = 0;
our $cnt_error++;
+ return 1;
}
+ return 0;
}
sub WARN {
- if (report("WARNING", $_[0], $_[1])) {
+ my ($type, $msg) = @_;
+
+ if (report("WARNING", $type, $msg)) {
our $clean = 0;
our $cnt_warn++;
+ return 1;
}
+ return 0;
}
sub CHK {
- if ($check && report("CHECK", $_[0], $_[1])) {
+ my ($type, $msg) = @_;
+
+ if ($check && report("CHECK", $type, $msg)) {
our $clean = 0;
our $cnt_chk++;
+ return 1;
}
+ return 0;
}
sub check_absolute_file {
@@ -1314,6 +2574,105 @@ sub check_absolute_file {
}
}
+sub trim {
+ my ($string) = @_;
+
+ $string =~ s/^\s+|\s+$//g;
+
+ return $string;
+}
+
+sub ltrim {
+ my ($string) = @_;
+
+ $string =~ s/^\s+//;
+
+ return $string;
+}
+
+sub rtrim {
+ my ($string) = @_;
+
+ $string =~ s/\s+$//;
+
+ return $string;
+}
+
+sub string_find_replace {
+ my ($string, $find, $replace) = @_;
+
+ $string =~ s/$find/$replace/g;
+
+ return $string;
+}
+
+sub tabify {
+ my ($leading) = @_;
+
+ my $source_indent = $tabsize;
+ my $max_spaces_before_tab = $source_indent - 1;
+ my $spaces_to_tab = " " x $source_indent;
+
+ #convert leading spaces to tabs
+ 1 while $leading =~ s@^([\t]*)$spaces_to_tab@$1\t@g;
+ #Remove spaces before a tab
+ 1 while $leading =~ s@^([\t]*)( {1,$max_spaces_before_tab})\t@$1\t@g;
+
+ return "$leading";
+}
+
+sub pos_last_openparen {
+ my ($line) = @_;
+
+ my $pos = 0;
+
+ my $opens = $line =~ tr/\(/\(/;
+ my $closes = $line =~ tr/\)/\)/;
+
+ my $last_openparen = 0;
+
+ if (($opens == 0) || ($closes >= $opens)) {
+ return -1;
+ }
+
+ my $len = length($line);
+
+ for ($pos = 0; $pos < $len; $pos++) {
+ my $string = substr($line, $pos);
+ if ($string =~ /^($FuncArg|$balanced_parens)/) {
+ $pos += length($1) - 1;
+ } elsif (substr($line, $pos, 1) eq '(') {
+ $last_openparen = $pos;
+ } elsif (index($string, '(') == -1) {
+ last;
+ }
+ }
+
+ return length(expand_tabs(substr($line, 0, $last_openparen))) + 1;
+}
+
+sub get_raw_comment {
+ my ($line, $rawline) = @_;
+ my $comment = '';
+
+ for my $i (0 .. (length($line) - 1)) {
+ if (substr($line, $i, 1) eq "$;") {
+ $comment .= substr($rawline, $i, 1);
+ }
+ }
+
+ return $comment;
+}
+
+sub exclude_global_initialisers {
+ my ($realfile) = @_;
+
+ # Do not check for BPF programs (tools/testing/selftests/bpf/progs/*.c, samples/bpf/*_kern.c, *.bpf.c).
+ return $realfile =~ m@^tools/testing/selftests/bpf/progs/.*\.c$@ ||
+ $realfile =~ m@^samples/bpf/.*_kern\.c$@ ||
+ $realfile =~ m@/bpf/.*\.bpf\.c$@;
+}
+
sub process {
my $filename = shift;
@@ -1330,7 +2689,26 @@ sub process {
our $clean = 1;
my $signoff = 0;
+ my $author = '';
+ my $authorsignoff = 0;
+ my $author_sob = '';
my $is_patch = 0;
+ my $is_binding_patch = -1;
+ my $in_header_lines = $file ? 0 : 1;
+ my $in_commit_log = 0; #Scanning lines before patch
+ my $has_patch_separator = 0; #Found a --- line
+ my $has_commit_log = 0; #Encountered lines before patch
+ my $commit_log_lines = 0; #Number of commit log lines
+ my $commit_log_possible_stack_dump = 0;
+ my $commit_log_long_line = 0;
+ my $commit_log_has_diff = 0;
+ my $reported_maintainer_file = 0;
+ my $non_utf8_charset = 0;
+
+ my $last_git_commit_id_linenr = -1;
+
+ my $last_blank_line = 0;
+ my $last_coalesced_string_linenr = -1;
our @report = ();
our $cnt_lines = 0;
@@ -1343,6 +2721,7 @@ sub process {
my $realline = 0;
my $realcnt = 0;
my $here = '';
+ my $context_function; #undef'd unless there's a known function
my $in_comment = 0;
my $comment_edge = 0;
my $first_line = 0;
@@ -1354,6 +2733,9 @@ sub process {
my %suppress_ifbraces;
my %suppress_whiletrailers;
my %suppress_export;
+ my $suppress_statement = 0;
+
+ my %signatures = ();
# Pre-scan the patch sanitizing the lines.
# Pre-scan the patch looking for any __setup documentation.
@@ -1361,20 +2743,26 @@ sub process {
my @setup_docs = ();
my $setup_docs = 0;
+ my $camelcase_file_seeded = 0;
+
+ my $checklicenseline = 1;
+
sanitise_line_reset();
my $line;
foreach my $rawline (@rawlines) {
$linenr++;
$line = $rawline;
+ push(@fixed, $rawline) if ($fix);
+
if ($rawline=~/^\+\+\+\s+(\S+)/) {
$setup_docs = 0;
- if ($1 =~ m@Documentation/kernel-parameters.txt$@) {
+ if ($1 =~ m@Documentation/admin-guide/kernel-parameters.txt$@) {
$setup_docs = 1;
}
#next;
}
- if ($rawline=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
+ if ($rawline =~ /^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
$realline=$1-1;
if (defined $2) {
$realcnt=$3+1;
@@ -1442,13 +2830,28 @@ sub process {
$realcnt = 0;
$linenr = 0;
+ $fixlinenr = -1;
foreach my $line (@lines) {
$linenr++;
+ $fixlinenr++;
+ my $sline = $line; #copy of $line
+ $sline =~ s/$;/ /g; #with comments as spaces
my $rawline = $rawlines[$linenr - 1];
+ my $raw_comment = get_raw_comment($line, $rawline);
+
+# check if it's a mode change, rename or start of a patch
+ if (!$in_commit_log &&
+ ($line =~ /^ mode change [0-7]+ => [0-7]+ \S+\s*$/ ||
+ ($line =~ /^rename (?:from|to) \S+\s*$/ ||
+ $line =~ /^diff --git a\/[\w\/\.\_\-]+ b\/\S+\s*$/))) {
+ $is_patch = 1;
+ }
#extract the line range in the file after the patch is applied
- if ($line=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
+ if (!$in_commit_log &&
+ $line =~ /^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@(.*)/) {
+ my $context = $4;
$is_patch = 1;
$first_line = $linenr + 1;
$realline=$1-1;
@@ -1463,6 +2866,12 @@ sub process {
%suppress_ifbraces = ();
%suppress_whiletrailers = ();
%suppress_export = ();
+ $suppress_statement = 0;
+ if ($context =~ /\b(\w+)\s*\(/) {
+ $context_function = $1;
+ } else {
+ undef $context_function;
+ }
next;
# track the line number as we move through the hunk, note that
@@ -1488,21 +2897,20 @@ sub process {
my $hunk_line = ($realcnt != 0);
-#make up the handle for any error we report on this line
- $prefix = "$filename:$realline: " if ($emacs && $file);
- $prefix = "$filename:$linenr: " if ($emacs && !$file);
-
$here = "#$linenr: " if (!$file);
$here = "#$realline: " if ($file);
+ my $found_file = 0;
# extract the filename as it passes
if ($line =~ /^diff --git.*?(\S+)$/) {
$realfile = $1;
- $realfile =~ s@^([^/]*)/@@;
-
+ $realfile =~ s@^([^/]*)/@@ if (!$file);
+ $in_commit_log = 0;
+ $found_file = 1;
} elsif ($line =~ /^\+\+\+\s+(\S+)/) {
$realfile = $1;
- $realfile =~ s@^([^/]*)/@@;
+ $realfile =~ s@^([^/]*)/@@ if (!$file);
+ $in_commit_log = 0;
$p1_prefix = $1;
if (!$file && $tree && $p1_prefix ne '' &&
@@ -1515,6 +2923,44 @@ sub process {
ERROR("MODIFIED_INCLUDE_ASM",
"do not modify files in include/asm, change architecture specific files in include/asm-<architecture>\n" . "$here$rawline\n");
}
+ $found_file = 1;
+ }
+
+#make up the handle for any error we report on this line
+ if ($showfile) {
+ $prefix = "$realfile:$realline: "
+ } elsif ($emacs) {
+ if ($file) {
+ $prefix = "$filename:$realline: ";
+ } else {
+ $prefix = "$filename:$linenr: ";
+ }
+ }
+
+ if ($found_file) {
+ if (is_maintained_obsolete($realfile)) {
+ WARN("OBSOLETE",
+ "$realfile is marked as 'obsolete' in the MAINTAINERS hierarchy. No unnecessary modifications please.\n");
+ }
+ if ($realfile =~ m@^(?:drivers/net/|net/|drivers/staging/)@) {
+ $check = 1;
+ } else {
+ $check = $check_orig;
+ }
+ $checklicenseline = 1;
+
+ if ($realfile !~ /^MAINTAINERS/) {
+ my $last_binding_patch = $is_binding_patch;
+
+ $is_binding_patch = () = $realfile =~ m@^(?:Documentation/devicetree/|include/dt-bindings/)@;
+
+ if (($last_binding_patch != -1) &&
+ ($last_binding_patch ^ $is_binding_patch)) {
+ WARN("DT_SPLIT_BINDING_PATCH",
+ "DT binding docs and includes should be a separate patch. See: Documentation/devicetree/bindings/submitting-patches.rst\n");
+ }
+ }
+
next;
}
@@ -1526,43 +2972,159 @@ sub process {
$cnt_lines++ if ($realcnt != 0);
+# Verify the existence of a commit log if appropriate
+# 2 is used because a $signature is counted in $commit_log_lines
+ if ($in_commit_log) {
+ if ($line !~ /^\s*$/) {
+ $commit_log_lines++; #could be a $signature
+ }
+ } elsif ($has_commit_log && $commit_log_lines < 2) {
+ WARN("COMMIT_MESSAGE",
+ "Missing commit description - Add an appropriate one\n");
+ $commit_log_lines = 2; #warn only once
+ }
+
+# Check if the commit log has what seems like a diff which can confuse patch
+ if ($in_commit_log && !$commit_log_has_diff &&
+ (($line =~ m@^\s+diff\b.*a/([\w/]+)@ &&
+ $line =~ m@^\s+diff\b.*a/[\w/]+\s+b/$1\b@) ||
+ $line =~ m@^\s*(?:\-\-\-\s+a/|\+\+\+\s+b/)@ ||
+ $line =~ m/^\s*\@\@ \-\d+,\d+ \+\d+,\d+ \@\@/)) {
+ ERROR("DIFF_IN_COMMIT_MSG",
+ "Avoid using diff content in the commit message - patch(1) might not work\n" . $herecurr);
+ $commit_log_has_diff = 1;
+ }
+
# Check for incorrect file permissions
if ($line =~ /^new (file )?mode.*[7531]\d{0,2}$/) {
my $permhere = $here . "FILE: $realfile\n";
- if ($realfile =~ /(Makefile|Kconfig|\.c|\.h|\.S|\.tmpl)$/) {
+ if ($realfile !~ m@scripts/@ &&
+ $realfile !~ /\.(py|pl|awk|sh)$/) {
ERROR("EXECUTE_PERMISSIONS",
"do not set execute permissions for source files\n" . $permhere);
}
}
+# Check the patch for a From:
+ if (decode("MIME-Header", $line) =~ /^From:\s*(.*)/) {
+ $author = $1;
+ my $curline = $linenr;
+ while(defined($rawlines[$curline]) && ($rawlines[$curline++] =~ /^[ \t]\s*(.*)/)) {
+ $author .= $1;
+ }
+ $author = encode("utf8", $author) if ($line =~ /=\?utf-8\?/i);
+ $author =~ s/"//g;
+ $author = reformat_email($author);
+ }
+
# Check the patch for a signoff:
- if ($line =~ /^\s*signed-off-by:/i) {
+ if ($line =~ /^\s*signed-off-by:\s*(.*)/i) {
$signoff++;
+ $in_commit_log = 0;
+ if ($author ne '' && $authorsignoff != 1) {
+ if (same_email_addresses($1, $author)) {
+ $authorsignoff = 1;
+ } else {
+ my $ctx = $1;
+ my ($email_name, $email_comment, $email_address, $comment1) = parse_email($ctx);
+ my ($author_name, $author_comment, $author_address, $comment2) = parse_email($author);
+
+ if (lc $email_address eq lc $author_address && $email_name eq $author_name) {
+ $author_sob = $ctx;
+ $authorsignoff = 2;
+ } elsif (lc $email_address eq lc $author_address) {
+ $author_sob = $ctx;
+ $authorsignoff = 3;
+ } elsif ($email_name eq $author_name) {
+ $author_sob = $ctx;
+ $authorsignoff = 4;
+
+ my $address1 = $email_address;
+ my $address2 = $author_address;
+
+ if ($address1 =~ /(\S+)\+\S+(\@.*)/) {
+ $address1 = "$1$2";
+ }
+ if ($address2 =~ /(\S+)\+\S+(\@.*)/) {
+ $address2 = "$1$2";
+ }
+ if ($address1 eq $address2) {
+ $authorsignoff = 5;
+ }
+ }
+ }
+ }
+ }
+
+# OpenOCD specific: Begin: Extend list of checkpatch tests to ignore
+ if ($in_commit_log && $line =~ /^\s*Checkpatch-ignore:\s*(.*)/) {
+ my @array = split(/[\s,]+/, $1);
+ hash_save_array_words(\%ignore_type, \@array);
+ }
+# OpenOCD specific: End
+
+# Check for patch separator
+ if ($line =~ /^---$/) {
+ $has_patch_separator = 1;
+ $in_commit_log = 0;
+ }
+
+# Check if MAINTAINERS is being updated. If so, there's probably no need to
+# emit the "does MAINTAINERS need updating?" message on file add/move/delete
+ if ($line =~ /^\s*MAINTAINERS\s*\|/) {
+ $reported_maintainer_file = 1;
}
# Check signature styles
- if ($line =~ /^(\s*)($signature_tags)(\s*)(.*)/) {
+ if (!$in_header_lines &&
+ $line =~ /^(\s*)([a-z0-9_-]+by:|$signature_tags)(\s*)(.*)/i) {
my $space_before = $1;
my $sign_off = $2;
my $space_after = $3;
my $email = $4;
my $ucfirst_sign_off = ucfirst(lc($sign_off));
+ if ($sign_off !~ /$signature_tags/) {
+ my $suggested_signature = find_standard_signature($sign_off);
+ if ($suggested_signature eq "") {
+ WARN("BAD_SIGN_OFF",
+ "Non-standard signature: $sign_off\n" . $herecurr);
+ } else {
+ if (WARN("BAD_SIGN_OFF",
+ "Non-standard signature: '$sign_off' - perhaps '$suggested_signature'?\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/$sign_off/$suggested_signature/;
+ }
+ }
+ }
if (defined $space_before && $space_before ne "") {
- WARN("BAD_SIGN_OFF",
- "Do not use whitespace before $ucfirst_sign_off\n" . $herecurr);
+ if (WARN("BAD_SIGN_OFF",
+ "Do not use whitespace before $ucfirst_sign_off\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =
+ "$ucfirst_sign_off $email";
+ }
}
if ($sign_off =~ /-by:$/i && $sign_off ne $ucfirst_sign_off) {
- WARN("BAD_SIGN_OFF",
- "'$ucfirst_sign_off' is the preferred signature form\n" . $herecurr);
+ if (WARN("BAD_SIGN_OFF",
+ "'$ucfirst_sign_off' is the preferred signature form\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =
+ "$ucfirst_sign_off $email";
+ }
+
}
if (!defined $space_after || $space_after ne " ") {
- WARN("BAD_SIGN_OFF",
- "Use a single space after $ucfirst_sign_off\n" . $herecurr);
+ if (WARN("BAD_SIGN_OFF",
+ "Use a single space after $ucfirst_sign_off\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =
+ "$ucfirst_sign_off $email";
+ }
}
- my ($email_name, $email_address, $comment) = parse_email($email);
- my $suggested_email = format_email(($email_name, $email_address));
+ my ($email_name, $name_comment, $email_address, $comment) = parse_email($email);
+ my $suggested_email = format_email(($email_name, $name_comment, $email_address, $comment));
if ($suggested_email eq "") {
ERROR("BAD_SIGN_OFF",
"Unrecognized email address: '$email'\n" . $herecurr);
@@ -1572,13 +3134,262 @@ sub process {
$dequoted =~ s/" </ </;
# Don't force email to have quotes
# Allow just an angle bracketed address
- if ("$dequoted$comment" ne $email &&
- "<$email_address>$comment" ne $email &&
- "$suggested_email$comment" ne $email) {
+ if (!same_email_addresses($email, $suggested_email)) {
+ if (WARN("BAD_SIGN_OFF",
+ "email address '$email' might be better as '$suggested_email'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email\E/$suggested_email/;
+ }
+ }
+
+ # Address part shouldn't have comments
+ my $stripped_address = $email_address;
+ $stripped_address =~ s/\([^\(\)]*\)//g;
+ if ($email_address ne $stripped_address) {
+ if (WARN("BAD_SIGN_OFF",
+ "address part of email should not have comments: '$email_address'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email_address\E/$stripped_address/;
+ }
+ }
+
+ # Only one name comment should be allowed
+ my $comment_count = () = $name_comment =~ /\([^\)]+\)/g;
+ if ($comment_count > 1) {
WARN("BAD_SIGN_OFF",
- "email address '$email' might be better as '$suggested_email$comment'\n" . $herecurr);
+ "Use a single name comment in email: '$email'\n" . $herecurr);
+ }
+
+
+ # stable@vger.kernel.org or stable@kernel.org shouldn't
+ # have an email name. In addition comments should strictly
+ # begin with a #
+ if ($email =~ /^.*stable\@(?:vger\.)?kernel\.org/i) {
+ if (($comment ne "" && $comment !~ /^#.+/) ||
+ ($email_name ne "")) {
+ my $cur_name = $email_name;
+ my $new_comment = $comment;
+ $cur_name =~ s/[a-zA-Z\s\-\"]+//g;
+
+ # Remove brackets enclosing comment text
+ # and # from start of comments to get comment text
+ $new_comment =~ s/^\((.*)\)$/$1/;
+ $new_comment =~ s/^\[(.*)\]$/$1/;
+ $new_comment =~ s/^[\s\#]+|\s+$//g;
+
+ $new_comment = trim("$new_comment $cur_name") if ($cur_name ne $new_comment);
+ $new_comment = " # $new_comment" if ($new_comment ne "");
+ my $new_email = "$email_address$new_comment";
+
+ if (WARN("BAD_STABLE_ADDRESS_STYLE",
+ "Invalid email format for stable: '$email', prefer '$new_email'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email\E/$new_email/;
+ }
+ }
+ } elsif ($comment ne "" && $comment !~ /^(?:#.+|\(.+\))$/) {
+ my $new_comment = $comment;
+
+ # Extract comment text from within brackets or
+ # c89 style /*...*/ comments
+ $new_comment =~ s/^\[(.*)\]$/$1/;
+ $new_comment =~ s/^\/\*(.*)\*\/$/$1/;
+
+ $new_comment = trim($new_comment);
+ $new_comment =~ s/^[^\w]$//; # Single lettered comment with non word character is usually a typo
+ $new_comment = "($new_comment)" if ($new_comment ne "");
+ my $new_email = format_email($email_name, $name_comment, $email_address, $new_comment);
+
+ if (WARN("BAD_SIGN_OFF",
+ "Unexpected content after email: '$email', should be: '$new_email'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email\E/$new_email/;
+ }
+ }
+ }
+
+# Check for duplicate signatures
+ my $sig_nospace = $line;
+ $sig_nospace =~ s/\s//g;
+ $sig_nospace = lc($sig_nospace);
+ if (defined $signatures{$sig_nospace}) {
+ WARN("BAD_SIGN_OFF",
+ "Duplicate signature\n" . $herecurr);
+ } else {
+ $signatures{$sig_nospace} = 1;
+ }
+
+# Check Co-developed-by: immediately followed by Signed-off-by: with same name and email
+ if ($sign_off =~ /^co-developed-by:$/i) {
+ if ($email eq $author) {
+ WARN("BAD_SIGN_OFF",
+ "Co-developed-by: should not be used to attribute nominal patch author '$author'\n" . "$here\n" . $rawline);
+ }
+ if (!defined $lines[$linenr]) {
+ WARN("BAD_SIGN_OFF",
+ "Co-developed-by: must be immediately followed by Signed-off-by:\n" . "$here\n" . $rawline);
+ } elsif ($rawlines[$linenr] !~ /^\s*signed-off-by:\s*(.*)/i) {
+ WARN("BAD_SIGN_OFF",
+ "Co-developed-by: must be immediately followed by Signed-off-by:\n" . "$here\n" . $rawline . "\n" .$rawlines[$linenr]);
+ } elsif ($1 ne $email) {
+ WARN("BAD_SIGN_OFF",
+ "Co-developed-by and Signed-off-by: name/email do not match \n" . "$here\n" . $rawline . "\n" .$rawlines[$linenr]);
+ }
+ }
+ }
+
+# Check email subject for common tools that don't need to be mentioned
+ if ($in_header_lines &&
+ $line =~ /^Subject:.*\b(?:checkpatch|sparse|smatch)\b[^:]/i) {
+ WARN("EMAIL_SUBJECT",
+ "A patch subject line should describe the change not the tool that found it\n" . $herecurr);
+ }
+
+# Check for Gerrit Change-Ids not in any patch context
+ if ($realfile eq '' && !$has_patch_separator && $line =~ /^\s*change-id:/i) {
+ if (ERROR("GERRIT_CHANGE_ID",
+ "Remove Gerrit Change-Id's before submitting upstream\n" . $herecurr) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ }
+ }
+
+# Check if the commit log is in a possible stack dump
+ if ($in_commit_log && !$commit_log_possible_stack_dump &&
+ ($line =~ /^\s*(?:WARNING:|BUG:)/ ||
+ $line =~ /^\s*\[\s*\d+\.\d{6,6}\s*\]/ ||
+ # timestamp
+ $line =~ /^\s*\[\<[0-9a-fA-F]{8,}\>\]/) ||
+ $line =~ /^(?:\s+\w+:\s+[0-9a-fA-F]+){3,3}/ ||
+ $line =~ /^\s*\#\d+\s*\[[0-9a-fA-F]+\]\s*\w+ at [0-9a-fA-F]+/) {
+ # stack dump address styles
+ $commit_log_possible_stack_dump = 1;
+ }
+
+# Check for line lengths > 75 in commit log, warn once
+ if ($in_commit_log && !$commit_log_long_line &&
+ length($line) > 75 &&
+ !($line =~ /^\s*[a-zA-Z0-9_\/\.]+\s+\|\s+\d+/ ||
+ # file delta changes
+ $line =~ /^\s*(?:[\w\.\-\+]*\/)++[\w\.\-\+]+:/ ||
+ # filename then :
+ $line =~ /^\s*(?:Fixes:|Link:|$signature_tags)/i ||
+ # A Fixes: or Link: line or signature tag line
+ $commit_log_possible_stack_dump)) {
+ WARN("COMMIT_LOG_LONG_LINE",
+ "Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr);
+ $commit_log_long_line = 1;
+ }
+
+# Reset possible stack dump if a blank line is found
+ if ($in_commit_log && $commit_log_possible_stack_dump &&
+ $line =~ /^\s*$/) {
+ $commit_log_possible_stack_dump = 0;
+ }
+
+# Check for lines starting with a #
+ if ($in_commit_log && $line =~ /^#/) {
+ if (WARN("COMMIT_COMMENT_SYMBOL",
+ "Commit log lines starting with '#' are dropped by git as comments\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^/ /;
+ }
+ }
+
+# Check for git id commit length and improperly formed commit descriptions
+# A correctly formed commit description is:
+# commit <SHA-1 hash length 12+ chars> ("Complete commit subject")
+# with the commit subject '("' prefix and '")' suffix
+# This is a fairly compilicated block as it tests for what appears to be
+# bare SHA-1 hash with minimum length of 5. It also avoids several types of
+# possible SHA-1 matches.
+# A commit match can span multiple lines so this block attempts to find a
+# complete typical commit on a maximum of 3 lines
+ if ($perl_version_ok &&
+ $in_commit_log && !$commit_log_possible_stack_dump &&
+ $line !~ /^\s*(?:Link|Patchwork|http|https|BugLink|base-commit):/i &&
+ $line !~ /^This reverts commit [0-9a-f]{7,40}/ &&
+ (($line =~ /\bcommit\s+[0-9a-f]{5,}\b/i ||
+ ($line =~ /\bcommit\s*$/i && defined($rawlines[$linenr]) && $rawlines[$linenr] =~ /^\s*[0-9a-f]{5,}\b/i)) ||
+ ($line =~ /(?:\s|^)[0-9a-f]{12,40}(?:[\s"'\(\[]|$)/i &&
+ $line !~ /[\<\[][0-9a-f]{12,40}[\>\]]/i &&
+ $line !~ /\bfixes:\s*[0-9a-f]{12,40}/i))) {
+ my $init_char = "c";
+ my $orig_commit = "";
+ my $short = 1;
+ my $long = 0;
+ my $case = 1;
+ my $space = 1;
+ my $id = '0123456789ab';
+ my $orig_desc = "commit description";
+ my $description = "";
+ my $herectx = $herecurr;
+ my $has_parens = 0;
+ my $has_quotes = 0;
+
+ my $input = $line;
+ if ($line =~ /(?:\bcommit\s+[0-9a-f]{5,}|\bcommit\s*$)/i) {
+ for (my $n = 0; $n < 2; $n++) {
+ if ($input =~ /\bcommit\s+[0-9a-f]{5,}\s*($balanced_parens)/i) {
+ $orig_desc = $1;
+ $has_parens = 1;
+ # Always strip leading/trailing parens then double quotes if existing
+ $orig_desc = substr($orig_desc, 1, -1);
+ if ($orig_desc =~ /^".*"$/) {
+ $orig_desc = substr($orig_desc, 1, -1);
+ $has_quotes = 1;
+ }
+ last;
+ }
+ last if ($#lines < $linenr + $n);
+ $input .= " " . trim($rawlines[$linenr + $n]);
+ $herectx .= "$rawlines[$linenr + $n]\n";
}
+ $herectx = $herecurr if (!$has_parens);
}
+
+ if ($input =~ /\b(c)ommit\s+([0-9a-f]{5,})\b/i) {
+ $init_char = $1;
+ $orig_commit = lc($2);
+ $short = 0 if ($input =~ /\bcommit\s+[0-9a-f]{12,40}/i);
+ $long = 1 if ($input =~ /\bcommit\s+[0-9a-f]{41,}/i);
+ $space = 0 if ($input =~ /\bcommit [0-9a-f]/i);
+ $case = 0 if ($input =~ /\b[Cc]ommit\s+[0-9a-f]{5,40}[^A-F]/);
+ } elsif ($input =~ /\b([0-9a-f]{12,40})\b/i) {
+ $orig_commit = lc($1);
+ }
+
+ ($id, $description) = git_commit_info($orig_commit,
+ $id, $orig_desc);
+
+ if (defined($id) &&
+ ($short || $long || $space || $case || ($orig_desc ne $description) || !$has_quotes) &&
+ $last_git_commit_id_linenr != $linenr - 1) {
+ ERROR("GIT_COMMIT_ID",
+ "Please use git commit description style 'commit <12+ chars of sha1> (\"<title line>\")' - ie: '${init_char}ommit $id (\"$description\")'\n" . $herectx);
+ }
+ #don't report the next line if this line ends in commit and the sha1 hash is the next line
+ $last_git_commit_id_linenr = $linenr if ($line =~ /\bcommit\s*$/i);
+ }
+
+# Check for added, moved or deleted files
+ if (!$reported_maintainer_file && !$in_commit_log &&
+ ($line =~ /^(?:new|deleted) file mode\s*\d+\s*$/ ||
+ $line =~ /^rename (?:from|to) [\w\/\.\-]+\s*$/ ||
+ ($line =~ /\{\s*([\w\/\.\-]*)\s*\=\>\s*([\w\/\.\-]*)\s*\}/ &&
+ (defined($1) || defined($2))))) {
+ $is_patch = 1;
+ $reported_maintainer_file = 1;
+ WARN("FILE_PATH_CHANGES",
+ "added, moved or deleted file(s), does MAINTAINERS need updating?\n" . $herecurr);
+ }
+
+# Check for adding new DT bindings not in schema format
+ if (!$in_commit_log &&
+ ($line =~ /^new file mode\s*\d+\s*$/) &&
+ ($realfile =~ m@^Documentation/devicetree/bindings/.*\.txt$@)) {
+ WARN("DT_SCHEMA_BINDING_PATCH",
+ "DT bindings should be in DT schema format. See: Documentation/devicetree/bindings/writing-schema.rst\n");
}
# Check for wrappage within a valid hunk of the file
@@ -1588,8 +3399,45 @@ sub process {
$herecurr) if (!$emitted_corrupt++);
}
-# Check for absolute kernel paths.
- if ($tree && $line =~ /^[^-]/) {
+# UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php
+ if (($realfile =~ /^$/ || $line =~ /^\+/) &&
+ $rawline !~ m/^$UTF8*$/) {
+ my ($utf8_prefix) = ($rawline =~ /^($UTF8*)/);
+
+ my $blank = copy_spacing($rawline);
+ my $ptr = substr($blank, 0, length($utf8_prefix)) . "^";
+ my $hereptr = "$hereline$ptr\n";
+
+ CHK("INVALID_UTF8",
+ "Invalid UTF-8, patch and commit message should be encoded in UTF-8\n" . $hereptr);
+ }
+
+# Check if it's the start of a commit log
+# (not a header line and we haven't seen the patch filename)
+ if ($in_header_lines && $realfile =~ /^$/ &&
+ !($rawline =~ /^\s+(?:\S|$)/ ||
+ $rawline =~ /^(?:commit\b|from\b|[\w-]+:)/i)) {
+ $in_header_lines = 0;
+ $in_commit_log = 1;
+ $has_commit_log = 1;
+ }
+
+# Check if there is UTF-8 in a commit log when a mail header has explicitly
+# declined it, i.e defined some charset where it is missing.
+ if ($in_header_lines &&
+ $rawline =~ /^Content-Type:.+charset="(.+)".*$/ &&
+ $1 !~ /utf-8/i) {
+ $non_utf8_charset = 1;
+ }
+
+ if ($in_commit_log && $non_utf8_charset && $realfile =~ /^$/ &&
+ $rawline =~ /$NON_ASCII_UTF8/) {
+ WARN("UTF8_BEFORE_PATCH",
+ "8-bit UTF-8 used in possible commit log\n" . $herecurr);
+ }
+
+# Check for absolute kernel paths in commit message
+ if ($tree && $in_commit_log) {
while ($line =~ m{(?:^|\s)(/\S*)}g) {
my $file = $1;
@@ -1602,17 +3450,93 @@ sub process {
}
}
-# UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php
- if (($realfile =~ /^$/ || $line =~ /^\+/) &&
- $rawline !~ m/^$UTF8*$/) {
- my ($utf8_prefix) = ($rawline =~ /^($UTF8*)/);
+# Check for various typo / spelling mistakes
+ if (defined($misspellings) &&
+ # OpenOCD specific: Begin: don't check spelling on spelling_file
+ index($spelling_file, $realfile) + length($realfile) != length($spelling_file) &&
+ # OpenOCD specific: End
+ ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
+ while ($rawline =~ /(?:^|[^\w\-'`])($misspellings)(?:[^\w\-'`]|$)/gi) {
+ my $typo = $1;
+ my $blank = copy_spacing($rawline);
+ my $ptr = substr($blank, 0, $-[1]) . "^" x length($typo);
+ my $hereptr = "$hereline$ptr\n";
+ my $typo_fix = $spelling_fix{lc($typo)};
+ $typo_fix = ucfirst($typo_fix) if ($typo =~ /^[A-Z]/);
+ $typo_fix = uc($typo_fix) if ($typo =~ /^[A-Z]+$/);
+ my $msg_level = \&WARN;
+ $msg_level = \&CHK if ($file);
+ if (&{$msg_level}("TYPO_SPELLING",
+ "'$typo' may be misspelled - perhaps '$typo_fix'?\n" . $hereptr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(^|[^A-Za-z@])($typo)($|[^A-Za-z@])/$1$typo_fix$3/;
+ }
+ }
+ }
- my $blank = copy_spacing($rawline);
- my $ptr = substr($blank, 0, length($utf8_prefix)) . "^";
- my $hereptr = "$hereline$ptr\n";
+# check for invalid commit id
+ if ($in_commit_log && $line =~ /(^fixes:|\bcommit)\s+([0-9a-f]{6,40})\b/i) {
+ my $id;
+ my $description;
+ ($id, $description) = git_commit_info($2, undef, undef);
+ if (!defined($id)) {
+ WARN("UNKNOWN_COMMIT_ID",
+ "Unknown commit id '$2', maybe rebased or not pulled?\n" . $herecurr);
+ }
+ }
- CHK("INVALID_UTF8",
- "Invalid UTF-8, patch and commit message should be encoded in UTF-8\n" . $hereptr);
+# check for repeated words separated by a single space
+# avoid false positive from list command eg, '-rw-r--r-- 1 root root'
+ if (($rawline =~ /^\+/ || $in_commit_log) &&
+ $rawline !~ /[bcCdDlMnpPs\?-][rwxsStT-]{9}/) {
+ pos($rawline) = 1 if (!$in_commit_log);
+ while ($rawline =~ /\b($word_pattern) (?=($word_pattern))/g) {
+
+ my $first = $1;
+ my $second = $2;
+ my $start_pos = $-[1];
+ my $end_pos = $+[2];
+ if ($first =~ /(?:struct|union|enum)/) {
+ pos($rawline) += length($first) + length($second) + 1;
+ next;
+ }
+
+ next if (lc($first) ne lc($second));
+ next if ($first eq 'long');
+
+ # check for character before and after the word matches
+ my $start_char = '';
+ my $end_char = '';
+ $start_char = substr($rawline, $start_pos - 1, 1) if ($start_pos > ($in_commit_log ? 0 : 1));
+ $end_char = substr($rawline, $end_pos, 1) if ($end_pos < length($rawline));
+
+ next if ($start_char =~ /^\S$/);
+ next if (index(" \t.,;?!", $end_char) == -1);
+
+ # avoid repeating hex occurrences like 'ff ff fe 09 ...'
+ if ($first =~ /\b[0-9a-f]{2,}\b/i) {
+ next if (!exists($allow_repeated_words{lc($first)}));
+ }
+
+ if (WARN("REPEATED_WORD",
+ "Possible repeated word: '$first'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b$first $second\b/$first/;
+ }
+ }
+
+ # if it's a repeated word on consecutive lines in a comment block
+ if ($prevline =~ /$;+\s*$/ &&
+ $prevrawline =~ /($word_pattern)\s*$/) {
+ my $last_word = $1;
+ if ($rawline =~ /^\+\s*\*\s*$last_word /) {
+ if (WARN("REPEATED_WORD",
+ "Possible repeated word: '$last_word'\n" . $hereprev) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(\+\s*\*\s*)$last_word /$1/;
+ }
+ }
+ }
}
# ignore non-hunk lines and lines being removed
@@ -1621,131 +3545,628 @@ sub process {
#trailing whitespace
if ($line =~ /^\+.*\015/) {
my $herevet = "$here\n" . cat_vet($rawline) . "\n";
- ERROR("DOS_LINE_ENDINGS",
- "DOS line endings\n" . $herevet);
-
+ if (ERROR("DOS_LINE_ENDINGS",
+ "DOS line endings\n" . $herevet) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/[\s\015]+$//;
+ }
} elsif ($rawline =~ /^\+.*\S\s+$/ || $rawline =~ /^\+\s+$/) {
my $herevet = "$here\n" . cat_vet($rawline) . "\n";
- ERROR("TRAILING_WHITESPACE",
- "trailing whitespace\n" . $herevet);
+ if (ERROR("TRAILING_WHITESPACE",
+ "trailing whitespace\n" . $herevet) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\s+$//;
+ }
+
$rpt_cleaners = 1;
}
+# Check for FSF mailing addresses.
# Don't care in this branch. This always messes up when we merge changes down.
#if ($rawline =~ /\bwrite to the Free/i ||
+ # $rawline =~ /\b675\s+Mass\s+Ave/i ||
# $rawline =~ /\b59\s+Temple\s+Pl/i ||
# $rawline =~ /\b51\s+Franklin\s+St/i) {
# my $herevet = "$here\n" . cat_vet($rawline) . "\n";
- # ERROR("FSF_MAILING_ADDRESS",
- # "Do not include the paragraph about writing to the Free Software Foundation's mailing address " .
- # "from the sample GPL notice. The FSF has changed addresses in the past, and may do so again. " .
- # "OpenOCD already includes a copy of the GPL.\n" . $herevet)
+ # my $msg_level = \&ERROR;
+ # $msg_level = \&CHK if ($file);
+ # &{$msg_level}("FSF_MAILING_ADDRESS",
+ # "Do not include the paragraph about writing to the Free Software Foundation's mailing address from the sample GPL notice. The FSF has changed addresses in the past, and may do so again. OpenOCD already includes a copy of the GPL.\n" . $herevet)
#}
# check for Kconfig help text having a real description
# Only applies when adding the entry originally, after that we do not have
# sufficient context to determine whether it is indeed long enough.
if ($realfile =~ /Kconfig/ &&
- $line =~ /\+\s*(?:---)?help(?:---)?$/) {
- my $length = 0;
- my $cnt = $realcnt;
- my $ln = $linenr + 1;
- my $f;
- my $is_end = 0;
- while ($cnt > 0 && defined $lines[$ln - 1]) {
- $f = $lines[$ln - 1];
- $cnt-- if ($lines[$ln - 1] !~ /^-/);
- $is_end = $lines[$ln - 1] =~ /^\+/;
- $ln++;
+ # 'choice' is usually the last thing on the line (though
+ # Kconfig supports named choices), so use a word boundary
+ # (\b) rather than a whitespace character (\s)
+ $line =~ /^\+\s*(?:config|menuconfig|choice)\b/) {
+ my $ln = $linenr;
+ my $needs_help = 0;
+ my $has_help = 0;
+ my $help_length = 0;
+ while (defined $lines[$ln]) {
+ my $f = $lines[$ln++];
next if ($f =~ /^-/);
- $f =~ s/^.//;
- $f =~ s/#.*//;
- $f =~ s/^\s+//;
- next if ($f =~ /^$/);
- if ($f =~ /^\s*config\s/) {
- $is_end = 1;
+ last if ($f !~ /^[\+ ]/); # !patch context
+
+ if ($f =~ /^\+\s*(?:bool|tristate|prompt)\s*["']/) {
+ $needs_help = 1;
+ next;
+ }
+ if ($f =~ /^\+\s*help\s*$/) {
+ $has_help = 1;
+ next;
+ }
+
+ $f =~ s/^.//; # strip patch context [+ ]
+ $f =~ s/#.*//; # strip # directives
+ $f =~ s/^\s+//; # strip leading blanks
+ next if ($f =~ /^$/); # skip blank lines
+
+ # At the end of this Kconfig block:
+ # This only checks context lines in the patch
+ # and so hopefully shouldn't trigger false
+ # positives, even though some of these are
+ # common words in help texts
+ if ($f =~ /^(?:config|menuconfig|choice|endchoice|
+ if|endif|menu|endmenu|source)\b/x) {
last;
}
- $length++;
+ $help_length++ if ($has_help);
+ }
+ if ($needs_help &&
+ $help_length < $min_conf_desc_length) {
+ my $stat_real = get_stat_real($linenr, $ln - 1);
+ WARN("CONFIG_DESCRIPTION",
+ "please write a help paragraph that fully describes the config symbol\n" . "$here\n$stat_real\n");
+ }
+ }
+
+# check MAINTAINERS entries
+ if ($realfile =~ /^MAINTAINERS$/) {
+# check MAINTAINERS entries for the right form
+ if ($rawline =~ /^\+[A-Z]:/ &&
+ $rawline !~ /^\+[A-Z]:\t\S/) {
+ if (WARN("MAINTAINERS_STYLE",
+ "MAINTAINERS entries use one tab after TYPE:\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^(\+[A-Z]):\s*/$1:\t/;
+ }
+ }
+# check MAINTAINERS entries for the right ordering too
+ my $preferred_order = 'MRLSWQBCPTFXNK';
+ if ($rawline =~ /^\+[A-Z]:/ &&
+ $prevrawline =~ /^[\+ ][A-Z]:/) {
+ $rawline =~ /^\+([A-Z]):\s*(.*)/;
+ my $cur = $1;
+ my $curval = $2;
+ $prevrawline =~ /^[\+ ]([A-Z]):\s*(.*)/;
+ my $prev = $1;
+ my $prevval = $2;
+ my $curindex = index($preferred_order, $cur);
+ my $previndex = index($preferred_order, $prev);
+ if ($curindex < 0) {
+ WARN("MAINTAINERS_STYLE",
+ "Unknown MAINTAINERS entry type: '$cur'\n" . $herecurr);
+ } else {
+ if ($previndex >= 0 && $curindex < $previndex) {
+ WARN("MAINTAINERS_STYLE",
+ "Misordered MAINTAINERS entry - list '$cur:' before '$prev:'\n" . $hereprev);
+ } elsif ((($prev eq 'F' && $cur eq 'F') ||
+ ($prev eq 'X' && $cur eq 'X')) &&
+ ($prevval cmp $curval) > 0) {
+ WARN("MAINTAINERS_STYLE",
+ "Misordered MAINTAINERS entry - list file patterns in alphabetic order\n" . $hereprev);
+ }
+ }
+ }
+ }
+
+ if (($realfile =~ /Makefile.*/ || $realfile =~ /Kbuild.*/) &&
+ ($line =~ /\+(EXTRA_[A-Z]+FLAGS).*/)) {
+ my $flag = $1;
+ my $replacement = {
+ 'EXTRA_AFLAGS' => 'asflags-y',
+ 'EXTRA_CFLAGS' => 'ccflags-y',
+ 'EXTRA_CPPFLAGS' => 'cppflags-y',
+ 'EXTRA_LDFLAGS' => 'ldflags-y',
+ };
+
+ WARN("DEPRECATED_VARIABLE",
+ "Use of $flag is deprecated, please use \`$replacement->{$flag} instead.\n" . $herecurr) if ($replacement->{$flag});
+ }
+
+# check for DT compatible documentation
+ if (defined $root &&
+ (($realfile =~ /\.dtsi?$/ && $line =~ /^\+\s*compatible\s*=\s*\"/) ||
+ ($realfile =~ /\.[ch]$/ && $line =~ /^\+.*\.compatible\s*=\s*\"/))) {
+
+ my @compats = $rawline =~ /\"([a-zA-Z0-9\-\,\.\+_]+)\"/g;
+
+ my $dt_path = $root . "/Documentation/devicetree/bindings/";
+ my $vp_file = $dt_path . "vendor-prefixes.yaml";
+
+ foreach my $compat (@compats) {
+ my $compat2 = $compat;
+ $compat2 =~ s/\,[a-zA-Z0-9]*\-/\,<\.\*>\-/;
+ my $compat3 = $compat;
+ $compat3 =~ s/\,([a-z]*)[0-9]*\-/\,$1<\.\*>\-/;
+ `grep -Erq "$compat|$compat2|$compat3" $dt_path`;
+ if ( $? >> 8 ) {
+ WARN("UNDOCUMENTED_DT_STRING",
+ "DT compatible string \"$compat\" appears un-documented -- check $dt_path\n" . $herecurr);
+ }
+
+ next if $compat !~ /^([a-zA-Z0-9\-]+)\,/;
+ my $vendor = $1;
+ `grep -Eq "\\"\\^\Q$vendor\E,\\.\\*\\":" $vp_file`;
+ if ( $? >> 8 ) {
+ WARN("UNDOCUMENTED_DT_STRING",
+ "DT compatible string vendor \"$vendor\" appears un-documented -- check $vp_file\n" . $herecurr);
+ }
+ }
+ }
+
+# check for using SPDX license tag at beginning of files
+ if ($realline == $checklicenseline) {
+ if ($rawline =~ /^[ \+]\s*\#\!\s*\//) {
+ $checklicenseline = 2;
+ } elsif ($rawline =~ /^\+/) {
+ my $comment = "";
+ if ($realfile =~ /\.(h|s|S)$/) {
+ $comment = '/*';
+ } elsif ($realfile =~ /\.(c|dts|dtsi)$/) {
+ $comment = '//';
+ } elsif (($checklicenseline == 2) || $realfile =~ /\.(sh|pl|py|awk|tc|yaml)$/) {
+ $comment = '#';
+ } elsif ($realfile =~ /\.rst$/) {
+ $comment = '..';
+ # OpenOCD specific: Begin
+ } elsif ($realfile =~ /\.(am|cfg|tcl)$/) {
+ $comment = '#';
+ # OpenOCD specific: End
+ }
+
+# check SPDX comment style for .[chsS] files
+ if ($realfile =~ /\.[chsS]$/ &&
+ $rawline =~ /SPDX-License-Identifier:/ &&
+ $rawline !~ m@^\+\s*\Q$comment\E\s*@) {
+ WARN("SPDX_LICENSE_TAG",
+ "Improper SPDX comment style for '$realfile', please use '$comment' instead\n" . $herecurr);
+ }
+
+ if ($comment !~ /^$/ &&
+ $rawline !~ m@^\+\Q$comment\E SPDX-License-Identifier: @) {
+ WARN("SPDX_LICENSE_TAG",
+ "Missing or malformed SPDX-License-Identifier tag in line $checklicenseline\n" . $herecurr);
+ } elsif ($rawline =~ /(SPDX-License-Identifier: .*)/) {
+ my $spdx_license = $1;
+ if (!is_SPDX_License_valid($spdx_license)) {
+ WARN("SPDX_LICENSE_TAG",
+ "'$spdx_license' is not supported in LICENSES/...\n" . $herecurr);
+ }
+ if ($realfile =~ m@^Documentation/devicetree/bindings/@ &&
+ not $spdx_license =~ /GPL-2\.0.*BSD-2-Clause/) {
+ my $msg_level = \&WARN;
+ $msg_level = \&CHK if ($file);
+ if (&{$msg_level}("SPDX_LICENSE_TAG",
+
+ "DT binding documents should be licensed (GPL-2.0-only OR BSD-2-Clause)\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/SPDX-License-Identifier: .*/SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)/;
+ }
+ }
+ }
}
- WARN("CONFIG_DESCRIPTION",
- "please write a paragraph that describes the config symbol fully\n" . $herecurr) if ($is_end && $length < 4);
- #print "is_end<$is_end> length<$length>\n";
+ }
+
+# check for embedded filenames
+ if ($rawline =~ /^\+.*\Q$realfile\E/) {
+ WARN("EMBEDDED_FILENAME",
+ "It's generally not useful to have the filename in the file\n" . $herecurr);
}
# check we are in a valid source file if not then ignore this hunk
- next if ($realfile !~ /\.(h|c|s|S|pl|sh)$/);
-
-#120 column limit
- if ($line =~ /^\+/ && $prevrawline !~ /\/\*\*/ &&
- $rawline !~ /^.\s*\*\s*\@$Ident\s/ &&
- !($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(KERN_\S+\s*|[^"]*))?"[X\t]*"\s*(?:|,|\)\s*;)\s*$/ ||
- $line =~ /^\+\s*"[^"]*"\s*(?:\s*|,|\)\s*;)\s*$/) &&
- $length > 120)
- {
- WARN("LONG_LINE",
- "line over 120 characters\n" . $herecurr);
+ next if ($realfile !~ /\.(h|c|s|S|sh|dtsi|dts)$/);
+
+# check for using SPDX-License-Identifier on the wrong line number
+ if ($realline != $checklicenseline &&
+ $rawline =~ /\bSPDX-License-Identifier:/ &&
+ substr($line, @-, @+ - @-) eq "$;" x (@+ - @-)) {
+ WARN("SPDX_LICENSE_TAG",
+ "Misplaced SPDX-License-Identifier tag - use line $checklicenseline instead\n" . $herecurr);
}
-# check for spaces before a quoted newline
- if ($rawline =~ /^.*\".*\s\\n/) {
- WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE",
- "unnecessary whitespace before a quoted newline\n" . $herecurr);
+# line length limit (with some exclusions)
+#
+# There are a few types of lines that may extend beyond $max_line_length:
+# logging functions like pr_info that end in a string
+# lines with a single string
+# #defines that are a single string
+# lines with an RFC3986 like URL
+#
+# There are 3 different line length message types:
+# LONG_LINE_COMMENT a comment starts before but extends beyond $max_line_length
+# LONG_LINE_STRING a string starts before but extends beyond $max_line_length
+# LONG_LINE all other lines longer than $max_line_length
+#
+# if LONG_LINE is ignored, the other 2 types are also ignored
+#
+
+ if ($line =~ /^\+/ && $length > $max_line_length) {
+ my $msg_type = "LONG_LINE";
+
+ # Check the allowed long line types first
+
+ # logging functions that end in a string that starts
+ # before $max_line_length
+ if ($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(?:KERN_\S+\s*|[^"]*))?($String\s*(?:|,|\)\s*;)\s*)$/ &&
+ length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+ $msg_type = "";
+
+ # lines with only strings (w/ possible termination)
+ # #defines with only strings
+ } elsif ($line =~ /^\+\s*$String\s*(?:\s*|,|\)\s*;)\s*$/ ||
+ $line =~ /^\+\s*#\s*define\s+\w+\s+$String$/) {
+ $msg_type = "";
+
+ # More special cases
+ } elsif ($line =~ /^\+.*\bEFI_GUID\s*\(/ ||
+ $line =~ /^\+\s*(?:\w+)?\s*DEFINE_PER_CPU/) {
+ $msg_type = "";
+
+ # URL ($rawline is used in case the URL is in a comment)
+ } elsif ($rawline =~ /^\+.*\b[a-z][\w\.\+\-]*:\/\/\S+/i) {
+ $msg_type = "";
+
+ # Otherwise set the alternate message types
+
+ # a comment starts before $max_line_length
+ } elsif ($line =~ /($;[\s$;]*)$/ &&
+ length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+ $msg_type = "LONG_LINE_COMMENT"
+
+ # a quoted string starts before $max_line_length
+ } elsif ($sline =~ /\s*($String(?:\s*(?:\\|,\s*|\)\s*;\s*))?)$/ &&
+ length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+ $msg_type = "LONG_LINE_STRING"
+ }
+
+ if ($msg_type ne "" &&
+ (show_type("LONG_LINE") || show_type($msg_type))) {
+ my $msg_level = \&WARN;
+ $msg_level = \&CHK if ($file);
+ &{$msg_level}($msg_type,
+ "line length of $length exceeds $max_line_length columns\n" . $herecurr);
+ }
}
# check for adding lines without a newline.
if ($line =~ /^\+/ && defined $lines[$linenr] && $lines[$linenr] =~ /^\\ No newline at end of file/) {
- WARN("MISSING_EOF_NEWLINE",
- "adding a line without newline at end of file\n" . $herecurr);
+ if (WARN("MISSING_EOF_NEWLINE",
+ "adding a line without newline at end of file\n" . $herecurr) &&
+ $fix) {
+ fix_delete_line($fixlinenr+1, "No newline at end of file");
+ }
}
-# Blackfin: use hi/lo macros
- if ($realfile =~ m@arch/blackfin/.*\.S$@) {
- if ($line =~ /\.[lL][[:space:]]*=.*&[[:space:]]*0x[fF][fF][fF][fF]/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("LO_MACRO",
- "use the LO() macro, not (... & 0xFFFF)\n" . $herevet);
- }
- if ($line =~ /\.[hH][[:space:]]*=.*>>[[:space:]]*16/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("HI_MACRO",
- "use the HI() macro, not (... >> 16)\n" . $herevet);
- }
+# check for .L prefix local symbols in .S files
+ if ($realfile =~ /\.S$/ &&
+ $line =~ /^\+\s*(?:[A-Z]+_)?SYM_[A-Z]+_(?:START|END)(?:_[A-Z_]+)?\s*\(\s*\.L/) {
+ WARN("AVOID_L_PREFIX",
+ "Avoid using '.L' prefixed local symbol names for denoting a range of code via 'SYM_*_START/END' annotations; see Documentation/asm-annotations.rst\n" . $herecurr);
}
# check we are in a valid source file C or perl if not then ignore this hunk
- next if ($realfile !~ /\.(h|c|pl)$/);
+ next if ($realfile !~ /\.(h|c|pl|dtsi|dts)$/);
# at the beginning of a line any tabs must come first and anything
-# more than 8 must use tabs.
+# more than $tabsize must use tabs.
if ($rawline =~ /^\+\s* \t\s*\S/ ||
$rawline =~ /^\+\s* \s*/) {
my $herevet = "$here\n" . cat_vet($rawline) . "\n";
- ERROR("CODE_INDENT",
- "code indent should use tabs where possible\n" . $herevet);
$rpt_cleaners = 1;
+ if (ERROR("CODE_INDENT",
+ "code indent should use tabs where possible\n" . $herevet) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
+ }
}
# check for space before tabs.
if ($rawline =~ /^\+/ && $rawline =~ / \t/) {
my $herevet = "$here\n" . cat_vet($rawline) . "\n";
- WARN("SPACE_BEFORE_TAB",
- "please, no space before tabs\n" . $herevet);
+ if (WARN("SPACE_BEFORE_TAB",
+ "please, no space before tabs\n" . $herevet) &&
+ $fix) {
+ while ($fixed[$fixlinenr] =~
+ s/(^\+.*) {$tabsize,$tabsize}\t/$1\t\t/) {}
+ while ($fixed[$fixlinenr] =~
+ s/(^\+.*) +\t/$1\t/) {}
+ }
}
-# check we are in a valid C source file if not then ignore this hunk
- next if ($realfile !~ /\.(h|c)$/);
+# check for assignments on the start of a line
+ if ($sline =~ /^\+\s+($Assignment)[^=]/) {
+ my $operator = $1;
+ if (CHK("ASSIGNMENT_CONTINUATIONS",
+ "Assignment operator '$1' should be on the previous line\n" . $hereprev) &&
+ $fix && $prevrawline =~ /^\+/) {
+ # add assignment operator to the previous line, remove from current line
+ $fixed[$fixlinenr - 1] .= " $operator";
+ $fixed[$fixlinenr] =~ s/\Q$operator\E\s*//;
+ }
+ }
+
+# check for && or || at the start of a line
+ if ($rawline =~ /^\+\s*(&&|\|\|)/) {
+ my $operator = $1;
+ if (CHK("LOGICAL_CONTINUATIONS",
+ "Logical continuations should be on the previous line\n" . $hereprev) &&
+ $fix && $prevrawline =~ /^\+/) {
+ # insert logical operator at last non-comment, non-whitepsace char on previous line
+ $prevline =~ /[\s$;]*$/;
+ my $line_end = substr($prevrawline, $-[0]);
+ $fixed[$fixlinenr - 1] =~ s/\Q$line_end\E$/ $operator$line_end/;
+ $fixed[$fixlinenr] =~ s/\Q$operator\E\s*//;
+ }
+ }
+
+# check indentation starts on a tab stop
+ if ($perl_version_ok &&
+ $sline =~ /^\+\t+( +)(?:$c90_Keywords\b|\{\s*$|\}\s*(?:else\b|while\b|\s*$)|$Declare\s*$Ident\s*[;=])/) {
+ my $indent = length($1);
+ if ($indent % $tabsize) {
+ if (WARN("TABSTOP",
+ "Statements should start on a tabstop\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s@(^\+\t+) +@$1 . "\t" x ($indent/$tabsize)@e;
+ }
+ }
+ }
+
+# check multi-line statement indentation matches previous line
+ if ($perl_version_ok &&
+ $prevline =~ /^\+([ \t]*)((?:$c90_Keywords(?:\s+if)\s*)|(?:$Declare\s*)?(?:$Ident|\(\s*\*\s*$Ident\s*\))\s*|(?:\*\s*)*$Lval\s*=\s*$Ident\s*)\(.*(\&\&|\|\||,)\s*$/) {
+ $prevline =~ /^\+(\t*)(.*)$/;
+ my $oldindent = $1;
+ my $rest = $2;
+
+ my $pos = pos_last_openparen($rest);
+ if ($pos >= 0) {
+ $line =~ /^(\+| )([ \t]*)/;
+ my $newindent = $2;
+
+ my $goodtabindent = $oldindent .
+ "\t" x ($pos / $tabsize) .
+ " " x ($pos % $tabsize);
+ my $goodspaceindent = $oldindent . " " x $pos;
+
+ if ($newindent ne $goodtabindent &&
+ $newindent ne $goodspaceindent) {
+
+ if (CHK("PARENTHESIS_ALIGNMENT",
+ "Alignment should match open parenthesis\n" . $hereprev) &&
+ $fix && $line =~ /^\+/) {
+ $fixed[$fixlinenr] =~
+ s/^\+[ \t]*/\+$goodtabindent/;
+ }
+ }
+ }
+ }
+
+# check for space after cast like "(int) foo" or "(struct foo) bar"
+# avoid checking a few false positives:
+# "sizeof(<type>)" or "__alignof__(<type>)"
+# function pointer declarations like "(*foo)(int) = bar;"
+# structure definitions like "(struct foo) { 0 };"
+# multiline macros that define functions
+# known attributes or the __attribute__ keyword
+ if ($line =~ /^\+(.*)\(\s*$Type\s*\)([ \t]++)((?![={]|\\$|$Attribute|__attribute__))/ &&
+ (!defined($1) || $1 !~ /\b(?:sizeof|__alignof__)\s*$/)) {
+ if (CHK("SPACING",
+ "No space is necessary after a cast\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/(\(\s*$Type\s*\))[ \t]+/$1/;
+ }
+ }
+
+# Block comment styles
+# Networking with an initial /*
+ if ($realfile =~ m@^(drivers/net/|net/)@ &&
+ $prevrawline =~ /^\+[ \t]*\/\*[ \t]*$/ &&
+ $rawline =~ /^\+[ \t]*\*/ &&
+ $realline > 3) { # Do not warn about the initial copyright comment block after SPDX-License-Identifier
+ WARN("NETWORKING_BLOCK_COMMENT_STYLE",
+ "networking block comments don't use an empty /* line, use /* Comment...\n" . $hereprev);
+ }
+
+# Block comments use * on subsequent lines
+ if ($prevline =~ /$;[ \t]*$/ && #ends in comment
+ $prevrawline =~ /^\+.*?\/\*/ && #starting /*
+ $prevrawline !~ /\*\/[ \t]*$/ && #no trailing */
+ $rawline =~ /^\+/ && #line is new
+ $rawline !~ /^\+[ \t]*\*/) { #no leading *
+ WARN("BLOCK_COMMENT_STYLE",
+ "Block comments use * on subsequent lines\n" . $hereprev);
+ }
+
+# Block comments use */ on trailing lines
+ if ($rawline !~ m@^\+[ \t]*\*/[ \t]*$@ && #trailing */
+ $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ && #inline /*...*/
+ $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ && #trailing **/
+ $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) { #non blank */
+ WARN("BLOCK_COMMENT_STYLE",
+ "Block comments use a trailing */ on a separate line\n" . $herecurr);
+ }
+
+# Block comment * alignment
+ if ($prevline =~ /$;[ \t]*$/ && #ends in comment
+ $line =~ /^\+[ \t]*$;/ && #leading comment
+ $rawline =~ /^\+[ \t]*\*/ && #leading *
+ (($prevrawline =~ /^\+.*?\/\*/ && #leading /*
+ $prevrawline !~ /\*\/[ \t]*$/) || #no trailing */
+ $prevrawline =~ /^\+[ \t]*\*/)) { #leading *
+ my $oldindent;
+ $prevrawline =~ m@^\+([ \t]*/?)\*@;
+ if (defined($1)) {
+ $oldindent = expand_tabs($1);
+ } else {
+ $prevrawline =~ m@^\+(.*/?)\*@;
+ $oldindent = expand_tabs($1);
+ }
+ $rawline =~ m@^\+([ \t]*)\*@;
+ my $newindent = $1;
+ $newindent = expand_tabs($newindent);
+ if (length($oldindent) ne length($newindent)) {
+ WARN("BLOCK_COMMENT_STYLE",
+ "Block comments should align the * on each line\n" . $hereprev);
+ }
+ }
+
+# check for missing blank lines after struct/union declarations
+# with exceptions for various attributes and macros
+ if ($prevline =~ /^[\+ ]};?\s*$/ &&
+ $line =~ /^\+/ &&
+ !($line =~ /^\+\s*$/ ||
+ $line =~ /^\+\s*(?:EXPORT_SYMBOL|early_param)/ ||
+ $line =~ /^\+\s*MODULE_/i ||
+ $line =~ /^\+\s*\#\s*(?:end|elif|else)/ ||
+ $line =~ /^\+[a-z_]*init/ ||
+ $line =~ /^\+\s*(?:static\s+)?[A-Z_]*ATTR/ ||
+ $line =~ /^\+\s*DECLARE/ ||
+ $line =~ /^\+\s*builtin_[\w_]*driver/ ||
+ $line =~ /^\+\s*__setup/)) {
+ if (CHK("LINE_SPACING",
+ "Please use a blank line after function/struct/union/enum declarations\n" . $hereprev) &&
+ $fix) {
+ fix_insert_line($fixlinenr, "\+");
+ }
+ }
+
+# check for multiple consecutive blank lines
+ if ($prevline =~ /^[\+ ]\s*$/ &&
+ $line =~ /^\+\s*$/ &&
+ $last_blank_line != ($linenr - 1)) {
+ if (CHK("LINE_SPACING",
+ "Please don't use multiple blank lines\n" . $hereprev) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ }
+
+ $last_blank_line = $linenr;
+ }
+
+# check for missing blank lines after declarations
+# (declarations must have the same indentation and not be at the start of line)
+ if (($prevline =~ /\+(\s+)\S/) && $sline =~ /^\+$1\S/) {
+ # use temporaries
+ my $sl = $sline;
+ my $pl = $prevline;
+ # remove $Attribute/$Sparse uses to simplify comparisons
+ $sl =~ s/\b(?:$Attribute|$Sparse)\b//g;
+ $pl =~ s/\b(?:$Attribute|$Sparse)\b//g;
+ if (($pl =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+ # function pointer declarations
+ $pl =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+ # foo bar; where foo is some local typedef or #define
+ $pl =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+ # known declaration macros
+ $pl =~ /^\+\s+$declaration_macros/) &&
+ # for "else if" which can look like "$Ident $Ident"
+ !($pl =~ /^\+\s+$c90_Keywords\b/ ||
+ # other possible extensions of declaration lines
+ $pl =~ /(?:$Compare|$Assignment|$Operators)\s*$/ ||
+ # not starting a section or a macro "\" extended line
+ $pl =~ /(?:\{\s*|\\)$/) &&
+ # looks like a declaration
+ !($sl =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+ # function pointer declarations
+ $sl =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+ # foo bar; where foo is some local typedef or #define
+ $sl =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+ # known declaration macros
+ $sl =~ /^\+\s+$declaration_macros/ ||
+ # start of struct or union or enum
+ $sl =~ /^\+\s+(?:static\s+)?(?:const\s+)?(?:union|struct|enum|typedef)\b/ ||
+ # start or end of block or continuation of declaration
+ $sl =~ /^\+\s+(?:$|[\{\}\.\#\"\?\:\(\[])/ ||
+ # bitfield continuation
+ $sl =~ /^\+\s+$Ident\s*:\s*\d+\s*[,;]/ ||
+ # other possible extensions of declaration lines
+ $sl =~ /^\+\s+\(?\s*(?:$Compare|$Assignment|$Operators)/)) {
+ if (WARN("LINE_SPACING",
+ "Missing a blank line after declarations\n" . $hereprev) &&
+ $fix) {
+ fix_insert_line($fixlinenr, "\+");
+ }
+ }
+ }
# check for spaces at the beginning of a line.
# Exceptions:
# 1) within comments
# 2) indented preprocessor commands
# 3) hanging labels
- if ($rawline =~ /^\+ / && $line !~ /\+ *(?:$;|#|$Ident:)/) {
+ if ($rawline =~ /^\+ / && $line !~ /^\+ *(?:$;|#|$Ident:)/) {
my $herevet = "$here\n" . cat_vet($rawline) . "\n";
- WARN("LEADING_SPACE",
- "please, no spaces at the start of a line\n" . $herevet);
+ if (WARN("LEADING_SPACE",
+ "please, no spaces at the start of a line\n" . $herevet) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
+ }
+ }
+
+# check we are in a valid C source file if not then ignore this hunk
+ next if ($realfile !~ /\.(h|c)$/);
+
+# check for unusual line ending [ or (
+ if ($line =~ /^\+.*([\[\(])\s*$/) {
+ CHK("OPEN_ENDED_LINE",
+ "Lines should not end with a '$1'\n" . $herecurr);
+ }
+
+# check if this appears to be the start function declaration, save the name
+ if ($sline =~ /^\+\{\s*$/ &&
+ $prevline =~ /^\+(?:(?:(?:$Storage|$Inline)\s*)*\s*$Type\s*)?($Ident)\(/) {
+ $context_function = $1;
+ }
+
+# check if this appears to be the end of function declaration
+ if ($sline =~ /^\+\}\s*$/) {
+ undef $context_function;
+ }
+
+# check indentation of any line with a bare else
+# (but not if it is a multiple line "if (foo) return bar; else return baz;")
+# if the previous line is a break or return and is indented 1 tab more...
+ if ($sline =~ /^\+([\t]+)(?:}[ \t]*)?else(?:[ \t]*{)?\s*$/) {
+ my $tabs = length($1) + 1;
+ if ($prevline =~ /^\+\t{$tabs,$tabs}break\b/ ||
+ ($prevline =~ /^\+\t{$tabs,$tabs}return\b/ &&
+ defined $lines[$linenr] &&
+ $lines[$linenr] !~ /^[ \+]\t{$tabs,$tabs}return/)) {
+ WARN("UNNECESSARY_ELSE",
+ "else is not generally useful after a break or return\n" . $hereprev);
+ }
+ }
+
+# check indentation of a line with a break;
+# if the previous line is a goto, return or break
+# and is indented the same # of tabs
+ if ($sline =~ /^\+([\t]+)break\s*;\s*$/) {
+ my $tabs = $1;
+ if ($prevline =~ /^\+$tabs(goto|return|break)\b/) {
+ if (WARN("UNNECESSARY_BREAK",
+ "break is not useful after a $1\n" . $hereprev) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ }
+ }
}
# check for RCS/CVS revision markers
@@ -1754,27 +4175,33 @@ sub process {
"CVS style keyword markers, these will _not_ be updated\n". $herecurr);
}
-# Blackfin: don't use __builtin_bfin_[cs]sync
- if ($line =~ /__builtin_bfin_csync/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("CSYNC",
- "use the CSYNC() macro in asm/blackfin.h\n" . $herevet);
- }
- if ($line =~ /__builtin_bfin_ssync/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("SSYNC",
- "use the SSYNC() macro in asm/blackfin.h\n" . $herevet);
+# check for old HOTPLUG __dev<foo> section markings
+ if ($line =~ /\b(__dev(init|exit)(data|const|))\b/) {
+ WARN("HOTPLUG_SECTION",
+ "Using $1 is unnecessary\n" . $herecurr);
}
# Check for potential 'bare' types
my ($stat, $cond, $line_nr_next, $remain_next, $off_next,
$realline_next);
- if ($realcnt && $line =~ /.\s*\S/) {
+#print "LINE<$line>\n";
+ if ($linenr > $suppress_statement &&
+ $realcnt && $sline =~ /.\s*\S/) {
($stat, $cond, $line_nr_next, $remain_next, $off_next) =
ctx_statement_block($linenr, $realcnt, 0);
$stat =~ s/\n./\n /g;
$cond =~ s/\n./\n /g;
+#print "linenr<$linenr> <$stat>\n";
+ # If this statement has no statement boundaries within
+ # it there is no point in retrying a statement scan
+ # until we hit end of it.
+ my $frag = $stat; $frag =~ s/;+\s*$//;
+ if ($frag !~ /(?:{|;)/) {
+#print "skip<$line_nr_next>\n";
+ $suppress_statement = $line_nr_next;
+ }
+
# Find the real next line.
$realline_next = $line_nr_next;
if (defined $realline_next &&
@@ -1784,7 +4211,7 @@ sub process {
}
my $s = $stat;
- $s =~ s/\{.*$//s;
+ $s =~ s/{.*$//s;
# Ignore goto labels.
if ($s =~ /$Ident:\*$/s) {
@@ -1836,33 +4263,41 @@ sub process {
# Check for switch () and associated case and default
# statements should be at the same indent.
-# if ($line=~/\bswitch\s*\(.*\)/) {
-# my $err = '';
-# my $sep = '';
-# my @ctx = ctx_block_outer($linenr, $realcnt);
-# shift(@ctx);
-# for my $ctx (@ctx) {
-# my ($clen, $cindent) = line_stats($ctx);
-# if ($ctx =~ /^\+\s*(case\s+|default:)/ &&
-# $indent != $cindent) {
-# $err .= "$sep$ctx\n";
-# $sep = '';
-# } else {
-# $sep = "[...]\n";
-# }
-# }
-# if ($err ne '') {
-# ERROR("SWITCH_CASE_INDENT_LEVEL",
-# "switch and case should be at the same indent\n$hereline$err");
-# }
-# }
+ if ($line=~/\bswitch\s*\(.*\)/) {
+ my $err = '';
+ my $sep = '';
+ my @ctx = ctx_block_outer($linenr, $realcnt);
+ shift(@ctx);
+ for my $ctx (@ctx) {
+ my ($clen, $cindent) = line_stats($ctx);
+ if ($ctx =~ /^\+\s*(case\s+|default:)/ &&
+ $indent != $cindent) {
+ $err .= "$sep$ctx\n";
+ $sep = '';
+ } else {
+ $sep = "[...]\n";
+ }
+ }
+ if ($err ne '') {
+ ERROR("SWITCH_CASE_INDENT_LEVEL",
+ "switch and case should be at the same indent\n$hereline$err");
+ }
+ }
# if/while/etc brace do not go on next line, unless defining a do while loop,
# or if that brace on the next line is for something else
- if ($line =~ /(.*)\b((?:if|while|for|switch)\s*\(|do\b|else\b)/ && $line !~ /^.\s*\#/) {
+ if ($line =~ /(.*)\b((?:if|while|for|switch|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|do\b|else\b)/ && $line !~ /^.\s*\#/) {
my $pre_ctx = "$1$2";
my ($level, @ctx) = ctx_statement_level($linenr, $realcnt, 0);
+
+ # OpenOCD specific: Begin: replace s/6/10/
+ if ($line =~ /^\+\t{10,}/) {
+ # OpenOCD specific: End
+ WARN("DEEP_INDENTATION",
+ "Too many leading tabs - consider code refactoring\n" . $herecurr);
+ }
+
my $ctx_cnt = $realcnt - $#ctx - 1;
my $ctx = join("\n", @ctx);
@@ -1880,7 +4315,7 @@ sub process {
#print "realcnt<$realcnt> ctx_cnt<$ctx_cnt>\n";
#print "pre<$pre_ctx>\nline<$line>\nctx<$ctx>\nnext<$lines[$ctx_ln - 1]>\n";
- if ($ctx !~ /\{\s*/ && defined($lines[$ctx_ln -1]) && $lines[$ctx_ln - 1] =~ /^\+\s*\{/) {
+ if ($ctx !~ /{\s*/ && defined($lines[$ctx_ln - 1]) && $lines[$ctx_ln - 1] =~ /^\+\s*{/) {
ERROR("OPEN_BRACE",
"that open brace { should be on the previous line\n" .
"$here\n$ctx\n$rawlines[$ctx_ln - 1]\n");
@@ -1899,20 +4334,30 @@ sub process {
}
# Check relative indent for conditionals and blocks.
- if ($line =~ /\b(?:(?:if|while|for)\s*\(|do\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) {
+ if ($line =~ /\b(?:(?:if|while|for|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|(?:do|else)\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) {
+ ($stat, $cond, $line_nr_next, $remain_next, $off_next) =
+ ctx_statement_block($linenr, $realcnt, 0)
+ if (!defined $stat);
my ($s, $c) = ($stat, $cond);
substr($s, 0, length($c), '');
- # Make sure we remove the line prefixes as we have
- # none on the first line, and are going to readd them
- # where necessary.
- $s =~ s/\n./\n/gs;
+ # remove inline comments
+ $s =~ s/$;/ /g;
+ $c =~ s/$;/ /g;
# Find out how long the conditional actually is.
my @newlines = ($c =~ /\n/gs);
my $cond_lines = 1 + $#newlines;
+ # Make sure we remove the line prefixes as we have
+ # none on the first line, and are going to readd them
+ # where necessary.
+ $s =~ s/\n./\n/gs;
+ while ($s =~ /\n\s+\\\n/) {
+ $cond_lines += $s =~ s/\n\s+\\\n/\n/g;
+ }
+
# We want to check the first line inside the block
# starting at the end of the conditional, so remove:
# 1) any blank line termination
@@ -1921,7 +4366,7 @@ sub process {
my $continuation = 0;
my $check = 0;
$s =~ s/^.*\bdo\b//;
- $s =~ s/^\s*\{//;
+ $s =~ s/^\s*{//;
if ($s =~ s/^\s*\\//) {
$continuation = 1;
}
@@ -1978,8 +4423,12 @@ sub process {
#print "line<$line> prevline<$prevline> indent<$indent> sindent<$sindent> check<$check> continuation<$continuation> s<$s> cond_lines<$cond_lines> stat_real<$stat_real> stat<$stat>\n";
- if ($check && (($sindent % 4) != 0 ||
- ($sindent <= $indent && $s ne ''))) {
+ if ($check && $s ne '' &&
+ (($sindent % $tabsize) != 0 ||
+ ($sindent < $indent) ||
+ ($sindent == $indent &&
+ ($s !~ /^\s*(?:\}|\{|else\b)/)) ||
+ ($sindent > $indent + $tabsize))) {
WARN("SUSPECT_CODE_INDENT",
"suspect code indent for conditional statements ($indent, $sindent)\n" . $herecurr . "$stat_real\n");
}
@@ -1999,7 +4448,54 @@ sub process {
$prev_values = substr($curr_values, -1);
#ignore lines not being added
- if ($line=~/^[^\+]/) {next;}
+ next if ($line =~ /^[^\+]/);
+
+# check for self assignments used to avoid compiler warnings
+# e.g.: int foo = foo, *bar = NULL;
+# struct foo bar = *(&(bar));
+ if ($line =~ /^\+\s*(?:$Declare)?([A-Za-z_][A-Za-z\d_]*)\s*=/) {
+ my $var = $1;
+ if ($line =~ /^\+\s*(?:$Declare)?$var\s*=\s*(?:$var|\*\s*\(?\s*&\s*\(?\s*$var\s*\)?\s*\)?)\s*[;,]/) {
+ WARN("SELF_ASSIGNMENT",
+ "Do not use self-assignments to avoid compiler warnings\n" . $herecurr);
+ }
+ }
+
+# check for dereferences that span multiple lines
+ if ($prevline =~ /^\+.*$Lval\s*(?:\.|->)\s*$/ &&
+ $line =~ /^\+\s*(?!\#\s*(?!define\s+|if))\s*$Lval/) {
+ $prevline =~ /($Lval\s*(?:\.|->))\s*$/;
+ my $ref = $1;
+ $line =~ /^.\s*($Lval)/;
+ $ref .= $1;
+ $ref =~ s/\s//g;
+ WARN("MULTILINE_DEREFERENCE",
+ "Avoid multiple line dereference - prefer '$ref'\n" . $hereprev);
+ }
+
+# check for declarations of signed or unsigned without int
+ while ($line =~ m{\b($Declare)\s*(?!char\b|short\b|int\b|long\b)\s*($Ident)?\s*[=,;\[\)\(]}g) {
+ my $type = $1;
+ my $var = $2;
+ $var = "" if (!defined $var);
+ if ($type =~ /^(?:(?:$Storage|$Inline|$Attribute)\s+)*((?:un)?signed)((?:\s*\*)*)\s*$/) {
+ my $sign = $1;
+ my $pointer = $2;
+
+ $pointer = "" if (!defined $pointer);
+
+ if (WARN("UNSPECIFIED_INT",
+ "Prefer '" . trim($sign) . " int" . rtrim($pointer) . "' to bare use of '$sign" . rtrim($pointer) . "'\n" . $herecurr) &&
+ $fix) {
+ my $decl = trim($sign) . " int ";
+ my $comp_pointer = $pointer;
+ $comp_pointer =~ s/\s//g;
+ $decl .= $comp_pointer;
+ $decl = rtrim($decl) if ($var eq "");
+ $fixed[$fixlinenr] =~ s@\b$sign\s*\Q$pointer\E\s*$var\b@$decl$var@;
+ }
+ }
+ }
# TEST: allow direct testing of the type matcher.
if ($dbg_type) {
@@ -2025,10 +4521,20 @@ sub process {
}
# check for initialisation to aggregates open brace on the next line
- if ($line =~ /^.\s*\{/ &&
+ if ($line =~ /^.\s*{/ &&
$prevline =~ /(?:^|[^=])=\s*$/) {
- ERROR("OPEN_BRACE",
- "that open brace { should be on the previous line\n" . $hereprev);
+ if (ERROR("OPEN_BRACE",
+ "that open brace { should be on the previous line\n" . $hereprev) &&
+ $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+ fix_delete_line($fixlinenr - 1, $prevrawline);
+ fix_delete_line($fixlinenr, $rawline);
+ my $fixedline = $prevrawline;
+ $fixedline =~ s/\s*=\s*$/ = {/;
+ fix_insert_line($fixlinenr, $fixedline);
+ $fixedline = $line;
+ $fixedline =~ s/^(.\s*)\{\s*/$1/;
+ fix_insert_line($fixlinenr, $fixedline);
+ }
}
#
@@ -2040,15 +4546,25 @@ sub process {
my $path = $1;
if ($path =~ m{//}) {
ERROR("MALFORMED_INCLUDE",
- "malformed #include filename\n" .
- $herecurr);
+ "malformed #include filename\n" . $herecurr);
+ }
+ if ($path =~ "^uapi/" && $realfile =~ m@\binclude/uapi/@) {
+ ERROR("UAPI_INCLUDE",
+ "No #include in ...include/uapi/... should use a uapi/ path prefix\n" . $herecurr);
}
}
# no C99 // comments
if ($line =~ m{//}) {
- ERROR("C99_COMMENTS",
- "do not use C99 // comments\n" . $herecurr);
+ if (ERROR("C99_COMMENTS",
+ "do not use C99 // comments\n" . $herecurr) &&
+ $fix) {
+ my $line = $fixed[$fixlinenr];
+ if ($line =~ /\/\/(.*)$/) {
+ my $comment = trim($1);
+ $fixed[$fixlinenr] =~ s@\/\/(.*)$@/\* $comment \*/@;
+ }
+ }
}
# Remove C99 comments.
$line =~ s@//.*@@;
@@ -2060,14 +4576,14 @@ sub process {
if (defined $realline_next &&
exists $lines[$realline_next - 1] &&
!defined $suppress_export{$realline_next} &&
- ($lines[$realline_next - 1] =~ /EXPORT_SYMBOL.*\((.*)\)/ ||
- $lines[$realline_next - 1] =~ /EXPORT_UNUSED_SYMBOL.*\((.*)\)/)) {
+ ($lines[$realline_next - 1] =~ /EXPORT_SYMBOL.*\((.*)\)/)) {
# Handle definitions which produce identifiers with
# a prefix:
# XXX(foo);
# EXPORT_SYMBOL(something_foo);
my $name = $1;
- if ($stat =~ /^.([A-Z_]+)\s*\(\s*($Ident)/ &&
+ $name =~ s/^\s*($Ident).*/$1/;
+ if ($stat =~ /^(?:.\s*}\s*\n)?.([A-Z_]+)\s*\(\s*($Ident)/ &&
$name =~ /^${Ident}_$2/) {
#print "FOO C name<$name>\n";
$suppress_export{$realline_next} = 1;
@@ -2088,8 +4604,7 @@ sub process {
}
if (!defined $suppress_export{$linenr} &&
$prevline =~ /^.\s*$/ &&
- ($line =~ /EXPORT_SYMBOL.*\((.*)\)/ ||
- $line =~ /EXPORT_UNUSED_SYMBOL.*\((.*)\)/)) {
+ ($line =~ /EXPORT_SYMBOL.*\((.*)\)/)) {
#print "FOO B <$lines[$linenr - 1]>\n";
$suppress_export{$linenr} = 2;
}
@@ -2100,16 +4615,49 @@ sub process {
}
# check for global initialisers.
- if ($line =~ /^.$Type\s*$Ident\s*(?:\s+$Modifier)*\s*=\s*(0|NULL|false)\s*;/) {
- ERROR("GLOBAL_INITIALISERS",
- "do not initialise globals to 0 or NULL\n" .
- $herecurr);
+ if ($line =~ /^\+$Type\s*$Ident(?:\s+$Modifier)*\s*=\s*($zero_initializer)\s*;/ &&
+ !exclude_global_initialisers($realfile)) {
+ if (ERROR("GLOBAL_INITIALISERS",
+ "do not initialise globals to $1\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(^.$Type\s*$Ident(?:\s+$Modifier)*)\s*=\s*$zero_initializer\s*;/$1;/;
+ }
}
# check for static initialisers.
- if ($line =~ /\bstatic\s.*=\s*(0|NULL|false)\s*;/) {
- ERROR("INITIALISED_STATIC",
- "do not initialise statics to 0 or NULL\n" .
- $herecurr);
+ if ($line =~ /^\+.*\bstatic\s.*=\s*($zero_initializer)\s*;/) {
+ if (ERROR("INITIALISED_STATIC",
+ "do not initialise statics to $1\n" .
+ $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(\bstatic\s.*?)\s*=\s*$zero_initializer\s*;/$1;/;
+ }
+ }
+
+# check for misordered declarations of char/short/int/long with signed/unsigned
+ while ($sline =~ m{(\b$TypeMisordered\b)}g) {
+ my $tmp = trim($1);
+ WARN("MISORDERED_TYPE",
+ "type '$tmp' should be specified in [[un]signed] [short|int|long|long long] order\n" . $herecurr);
+ }
+
+# check for unnecessary <signed> int declarations of short/long/long long
+ while ($sline =~ m{\b($TypeMisordered(\s*\*)*|$C90_int_types)\b}g) {
+ my $type = trim($1);
+ next if ($type !~ /\bint\b/);
+ next if ($type !~ /\b(?:short|long\s+long|long)\b/);
+ my $new_type = $type;
+ $new_type =~ s/\b\s*int\s*\b/ /;
+ $new_type =~ s/\b\s*(?:un)?signed\b\s*/ /;
+ $new_type =~ s/^const\s+//;
+ $new_type = "unsigned $new_type" if ($type =~ /\bunsigned\b/);
+ $new_type = "const $new_type" if ($type =~ /^const\b/);
+ $new_type =~ s/\s+/ /g;
+ $new_type = trim($new_type);
+ if (WARN("UNNECESSARY_INT",
+ "Prefer '$new_type' over '$type' as the int is unnecessary\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b\Q$type\E\b/$new_type/;
+ }
}
# check for static const char * arrays.
@@ -2117,36 +4665,93 @@ sub process {
WARN("STATIC_CONST_CHAR_ARRAY",
"static const char * array should probably be static const char * const\n" .
$herecurr);
- }
+ }
+
+# check for initialized const char arrays that should be static const
+ if ($line =~ /^\+\s*const\s+(char|unsigned\s+char|_*u8|(?:[us]_)?int8_t)\s+\w+\s*\[\s*(?:\w+\s*)?\]\s*=\s*"/) {
+ if (WARN("STATIC_CONST_CHAR_ARRAY",
+ "const array should probably be static const\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(^.\s*)const\b/${1}static const/;
+ }
+ }
# check for static char foo[] = "bar" declarations.
if ($line =~ /\bstatic\s+char\s+(\w+)\s*\[\s*\]\s*=\s*"/) {
WARN("STATIC_CONST_CHAR_ARRAY",
"static char array declaration should probably be static const char\n" .
$herecurr);
- }
+ }
+
+# check for const <foo> const where <foo> is not a pointer or array type
+ if ($sline =~ /\bconst\s+($BasicType)\s+const\b/) {
+ my $found = $1;
+ if ($sline =~ /\bconst\s+\Q$found\E\s+const\b\s*\*/) {
+ WARN("CONST_CONST",
+ "'const $found const *' should probably be 'const $found * const'\n" . $herecurr);
+ } elsif ($sline !~ /\bconst\s+\Q$found\E\s+const\s+\w+\s*\[/) {
+ WARN("CONST_CONST",
+ "'const $found const' should probably be 'const $found'\n" . $herecurr);
+ }
+ }
+
+# check for const static or static <non ptr type> const declarations
+# prefer 'static const <foo>' over 'const static <foo>' and 'static <foo> const'
+ if ($sline =~ /^\+\s*const\s+static\s+($Type)\b/ ||
+ $sline =~ /^\+\s*static\s+($BasicType)\s+const\b/) {
+ if (WARN("STATIC_CONST",
+ "Move const after static - use 'static const $1'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bconst\s+static\b/static const/;
+ $fixed[$fixlinenr] =~ s/\bstatic\s+($BasicType)\s+const\b/static const $1/;
+ }
+ }
+
+# check for non-global char *foo[] = {"bar", ...} declarations.
+ if ($line =~ /^.\s+(?:static\s+|const\s+)?char\s+\*\s*\w+\s*\[\s*\]\s*=\s*\{/) {
+ WARN("STATIC_CONST_CHAR_ARRAY",
+ "char * array declaration might be better as static const\n" .
+ $herecurr);
+ }
+
+# check for sizeof(foo)/sizeof(foo[0]) that could be ARRAY_SIZE(foo)
+ if ($line =~ m@\bsizeof\s*\(\s*($Lval)\s*\)@) {
+ my $array = $1;
+ if ($line =~ m@\b(sizeof\s*\(\s*\Q$array\E\s*\)\s*/\s*sizeof\s*\(\s*\Q$array\E\s*\[\s*0\s*\]\s*\))@) {
+ my $array_div = $1;
+ if (WARN("ARRAY_SIZE",
+ "Prefer ARRAY_SIZE($array)\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$array_div\E/ARRAY_SIZE($array)/;
+ }
+ }
+ }
-# check for declarations of struct pci_device_id
- if ($line =~ /\bstruct\s+pci_device_id\s+\w+\s*\[\s*\]\s*\=\s*\{/) {
- WARN("DEFINE_PCI_DEVICE_TABLE",
- "Use DEFINE_PCI_DEVICE_TABLE for struct pci_device_id\n" . $herecurr);
+# check for function declarations without arguments like "int foo()"
+ if ($line =~ /(\b$Type\s*$Ident)\s*\(\s*\)/) {
+ if (ERROR("FUNCTION_WITHOUT_ARGS",
+ "Bad function definition - $1() should probably be $1(void)\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(\b($Type)\s+($Ident))\s*\(\s*\)/$2 $3(void)/;
+ }
}
# check for new typedefs, only function parameters and sparse annotations
# make sense.
-# if ($line =~ /\btypedef\s/ &&
-# $line !~ /\btypedef\s+$Type\s*\(\s*\*?$Ident\s*\)\s*\(/ &&
-# $line !~ /\btypedef\s+$Type\s+$Ident\s*\(/ &&
-# $line !~ /\b$typeTypedefs\b/ &&
-# $line !~ /\b__bitwise(?:__|)\b/) {
-# WARN("NEW_TYPEDEFS",
-# "do not add new typedefs\n" . $herecurr);
-# }
+ if ($line =~ /\btypedef\s/ &&
+ $line !~ /\btypedef\s+$Type\s*\(\s*\*?$Ident\s*\)\s*\(/ &&
+ $line !~ /\btypedef\s+$Type\s+$Ident\s*\(/ &&
+ $line !~ /\b$typeTypedefs\b/ &&
+ $line !~ /\b__bitwise\b/) {
+ WARN("NEW_TYPEDEFS",
+ "do not add new typedefs\n" . $herecurr);
+ }
# * goes on variable not on type
# (char*[ const])
- if ($line =~ m{\($NonptrType(\s*(?:$Modifier\b\s*|\*\s*)+)\)}) {
- my ($from, $to) = ($1, $1);
+ while ($line =~ m{(\($NonptrType(\s*(?:$Modifier\b\s*|\*\s*)+)\))}g) {
+ #print "AA<$1>\n";
+ my ($ident, $from, $to) = ($1, $2, $2);
# Should start with a space.
$to =~ s/^(\S)/ $1/;
@@ -2156,13 +4761,22 @@ sub process {
while ($to =~ s/\*\s+\*/\*\*/) {
}
- #print "from<$from> to<$to>\n";
+## print "1: from<$from> to<$to> ident<$ident>\n";
if ($from ne $to) {
- ERROR("POINTER_LOCATION",
- "\"(foo$from)\" should be \"(foo$to)\"\n" . $herecurr);
+ if (ERROR("POINTER_LOCATION",
+ "\"(foo$from)\" should be \"(foo$to)\"\n" . $herecurr) &&
+ $fix) {
+ my $sub_from = $ident;
+ my $sub_to = $ident;
+ $sub_to =~ s/\Q$from\E/$to/;
+ $fixed[$fixlinenr] =~
+ s@\Q$sub_from\E@$sub_to@;
+ }
}
- } elsif ($line =~ m{\b$NonptrType(\s*(?:$Modifier\b\s*|\*\s*)+)($Ident)}) {
- my ($from, $to, $ident) = ($1, $1, $2);
+ }
+ while ($line =~ m{(\b$NonptrType(\s*(?:$Modifier\b\s*|\*\s*)+)($Ident))}g) {
+ #print "BB<$1>\n";
+ my ($match, $from, $to, $ident) = ($1, $2, $2, $3);
# Should start with a space.
$to =~ s/^(\S)/ $1/;
@@ -2174,20 +4788,30 @@ sub process {
# Modifiers should have spaces.
$to =~ s/(\b$Modifier$)/$1 /;
- #print "from<$from> to<$to> ident<$ident>\n";
+## print "2: from<$from> to<$to> ident<$ident>\n";
if ($from ne $to && $ident !~ /^$Modifier$/) {
- ERROR("POINTER_LOCATION",
- "\"foo${from}bar\" should be \"foo${to}bar\"\n" . $herecurr);
+ if (ERROR("POINTER_LOCATION",
+ "\"foo${from}bar\" should be \"foo${to}bar\"\n" . $herecurr) &&
+ $fix) {
+
+ my $sub_from = $match;
+ my $sub_to = $match;
+ $sub_to =~ s/\Q$from\E/$to/;
+ $fixed[$fixlinenr] =~
+ s@\Q$sub_from\E@$sub_to@;
+ }
}
}
-# # no BUG() or BUG_ON()
-# if ($line =~ /\b(BUG|BUG_ON)\b/) {
-# print "Try to use WARN_ON & Recovery code rather than BUG() or BUG_ON()\n";
-# print "$herecurr";
-# $clean = 0;
-# }
+# avoid BUG() or BUG_ON()
+ if ($line =~ /\b(?:BUG|BUG_ON)\b/) {
+ my $msg_level = \&WARN;
+ $msg_level = \&CHK if ($file);
+ &{$msg_level}("AVOID_BUG",
+ "Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()\n" . $herecurr);
+ }
+# avoid LINUX_VERSION_CODE
if ($line =~ /\bLINUX_VERSION_CODE\b/) {
WARN("LINUX_VERSION_CODE",
"LINUX_VERSION_CODE should be avoided, code should be for the version to which it is merged\n" . $herecurr);
@@ -2196,52 +4820,184 @@ sub process {
# check for uses of printk_ratelimit
if ($line =~ /\bprintk_ratelimit\s*\(/) {
WARN("PRINTK_RATELIMITED",
-"Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit\n" . $herecurr);
- }
-
-# printk should use KERN_* levels. Note that follow on printk's on the
-# same line do not need a level, so we use the current block context
-# to try and find and validate the current printk. In summary the current
-# printk includes all preceding printk's which have no newline on the end.
-# we assume the first bad printk is the one to report.
- if ($line =~ /\bprintk\((?!KERN_)\s*"/) {
- my $ok = 0;
- for (my $ln = $linenr - 1; $ln >= $first_line; $ln--) {
- #print "CHECK<$lines[$ln - 1]\n";
- # we have a preceding printk if it ends
- # with "\n" ignore it, else it is to blame
- if ($lines[$ln - 1] =~ m{\bprintk\(}) {
- if ($rawlines[$ln - 1] !~ m{\\n"}) {
- $ok = 1;
- }
- last;
- }
- }
- if ($ok == 0) {
- WARN("PRINTK_WITHOUT_KERN_LEVEL",
- "printk() should include KERN_ facility level\n" . $herecurr);
+ "Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit\n" . $herecurr);
+ }
+
+# printk should use KERN_* levels
+ if ($line =~ /\bprintk\s*\(\s*(?!KERN_[A-Z]+\b)/) {
+ WARN("PRINTK_WITHOUT_KERN_LEVEL",
+ "printk() should include KERN_<LEVEL> facility level\n" . $herecurr);
+ }
+
+# prefer variants of (subsystem|netdev|dev|pr)_<level> to printk(KERN_<LEVEL>
+ if ($line =~ /\b(printk(_once|_ratelimited)?)\s*\(\s*KERN_([A-Z]+)/) {
+ my $printk = $1;
+ my $modifier = $2;
+ my $orig = $3;
+ $modifier = "" if (!defined($modifier));
+ my $level = lc($orig);
+ $level = "warn" if ($level eq "warning");
+ my $level2 = $level;
+ $level2 = "dbg" if ($level eq "debug");
+ $level .= $modifier;
+ $level2 .= $modifier;
+ WARN("PREFER_PR_LEVEL",
+ "Prefer [subsystem eg: netdev]_$level2([subsystem]dev, ... then dev_$level2(dev, ... then pr_$level(... to $printk(KERN_$orig ...\n" . $herecurr);
+ }
+
+# prefer dev_<level> to dev_printk(KERN_<LEVEL>
+ if ($line =~ /\bdev_printk\s*\(\s*KERN_([A-Z]+)/) {
+ my $orig = $1;
+ my $level = lc($orig);
+ $level = "warn" if ($level eq "warning");
+ $level = "dbg" if ($level eq "debug");
+ WARN("PREFER_DEV_LEVEL",
+ "Prefer dev_$level(... to dev_printk(KERN_$orig, ...\n" . $herecurr);
+ }
+
+# trace_printk should not be used in production code.
+ if ($line =~ /\b(trace_printk|trace_puts|ftrace_vprintk)\s*\(/) {
+ WARN("TRACE_PRINTK",
+ "Do not use $1() in production code (this can be ignored if built only with a debug config option)\n" . $herecurr);
+ }
+
+# ENOSYS means "bad syscall nr" and nothing else. This will have a small
+# number of false positives, but assembly files are not checked, so at
+# least the arch entry code will not trigger this warning.
+ if ($line =~ /\bENOSYS\b/) {
+ WARN("ENOSYS",
+ "ENOSYS means 'invalid syscall nr' and nothing else\n" . $herecurr);
+ }
+
+# ENOTSUPP is not a standard error code and should be avoided in new patches.
+# Folks usually mean EOPNOTSUPP (also called ENOTSUP), when they type ENOTSUPP.
+# Similarly to ENOSYS warning a small number of false positives is expected.
+ if (!$file && $line =~ /\bENOTSUPP\b/) {
+ if (WARN("ENOTSUPP",
+ "ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bENOTSUPP\b/EOPNOTSUPP/;
}
}
# function brace can't be on same line, except for #defines of do while,
# or if closed on same line
- if (($line=~/$Type\s*$Ident\(.*\).*\s\{/) and
- !($line=~/\#\s*define.*do\s\{/) and !($line=~/}/)) {
- ERROR("OPEN_BRACE",
- "open brace '{' following function declarations go on the next line\n" . $herecurr);
+ if ($perl_version_ok &&
+ $sline =~ /$Type\s*$Ident\s*$balanced_parens\s*\{/ &&
+ $sline !~ /\#\s*define\b.*do\s*\{/ &&
+ $sline !~ /}/) {
+ if (ERROR("OPEN_BRACE",
+ "open brace '{' following function definitions go on the next line\n" . $herecurr) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ my $fixed_line = $rawline;
+ $fixed_line =~ /(^..*$Type\s*$Ident\(.*\)\s*)\{(.*)$/;
+ my $line1 = $1;
+ my $line2 = $2;
+ fix_insert_line($fixlinenr, ltrim($line1));
+ fix_insert_line($fixlinenr, "\+{");
+ if ($line2 !~ /^\s*$/) {
+ fix_insert_line($fixlinenr, "\+\t" . trim($line2));
+ }
+ }
}
# open braces for enum, union and struct go on the same line.
- if ($line =~ /^.\s*\{/ &&
+ if ($line =~ /^.\s*{/ &&
$prevline =~ /^.\s*(?:typedef\s+)?(enum|union|struct)(?:\s+$Ident)?\s*$/) {
- ERROR("OPEN_BRACE",
- "open brace '{' following $1 go on the same line\n" . $hereprev);
+ if (ERROR("OPEN_BRACE",
+ "open brace '{' following $1 go on the same line\n" . $hereprev) &&
+ $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+ fix_delete_line($fixlinenr - 1, $prevrawline);
+ fix_delete_line($fixlinenr, $rawline);
+ my $fixedline = rtrim($prevrawline) . " {";
+ fix_insert_line($fixlinenr, $fixedline);
+ $fixedline = $rawline;
+ $fixedline =~ s/^(.\s*)\{\s*/$1\t/;
+ if ($fixedline !~ /^\+\s*$/) {
+ fix_insert_line($fixlinenr, $fixedline);
+ }
+ }
}
# missing space after union, struct or enum definition
- if ($line =~ /^.\s*(?:typedef\s+)?(enum|union|struct)(?:\s+$Ident)?(?:\s+$Ident)?[=\{]/) {
- WARN("SPACING",
- "missing space after $1 definition\n" . $herecurr);
+ if ($line =~ /^.\s*(?:typedef\s+)?(enum|union|struct)(?:\s+$Ident){1,2}[=\{]/) {
+ if (WARN("SPACING",
+ "missing space after $1 definition\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/^(.\s*(?:typedef\s+)?(?:enum|union|struct)(?:\s+$Ident){1,2})([=\{])/$1 $2/;
+ }
+ }
+
+# Function pointer declarations
+# check spacing between type, funcptr, and args
+# canonical declaration is "type (*funcptr)(args...)"
+ if ($line =~ /^.\s*($Declare)\((\s*)\*(\s*)($Ident)(\s*)\)(\s*)\(/) {
+ my $declare = $1;
+ my $pre_pointer_space = $2;
+ my $post_pointer_space = $3;
+ my $funcname = $4;
+ my $post_funcname_space = $5;
+ my $pre_args_space = $6;
+
+# the $Declare variable will capture all spaces after the type
+# so check it for a missing trailing missing space but pointer return types
+# don't need a space so don't warn for those.
+ my $post_declare_space = "";
+ if ($declare =~ /(\s+)$/) {
+ $post_declare_space = $1;
+ $declare = rtrim($declare);
+ }
+ if ($declare !~ /\*$/ && $post_declare_space =~ /^$/) {
+ WARN("SPACING",
+ "missing space after return type\n" . $herecurr);
+ $post_declare_space = " ";
+ }
+
+# unnecessary space "type (*funcptr)(args...)"
+# This test is not currently implemented because these declarations are
+# equivalent to
+# int foo(int bar, ...)
+# and this is form shouldn't/doesn't generate a checkpatch warning.
+#
+# elsif ($declare =~ /\s{2,}$/) {
+# WARN("SPACING",
+# "Multiple spaces after return type\n" . $herecurr);
+# }
+
+# unnecessary space "type ( *funcptr)(args...)"
+ if (defined $pre_pointer_space &&
+ $pre_pointer_space =~ /^\s/) {
+ WARN("SPACING",
+ "Unnecessary space after function pointer open parenthesis\n" . $herecurr);
+ }
+
+# unnecessary space "type (* funcptr)(args...)"
+ if (defined $post_pointer_space &&
+ $post_pointer_space =~ /^\s/) {
+ WARN("SPACING",
+ "Unnecessary space before function pointer name\n" . $herecurr);
+ }
+
+# unnecessary space "type (*funcptr )(args...)"
+ if (defined $post_funcname_space &&
+ $post_funcname_space =~ /^\s/) {
+ WARN("SPACING",
+ "Unnecessary space after function pointer name\n" . $herecurr);
+ }
+
+# unnecessary space "type (*funcptr) (args...)"
+ if (defined $pre_args_space &&
+ $pre_args_space =~ /^\s/) {
+ WARN("SPACING",
+ "Unnecessary space before function pointer arguments\n" . $herecurr);
+ }
+
+ if (show_type("SPACING") && $fix) {
+ $fixed[$fixlinenr] =~
+ s/^(.\s*)$Declare\s*\(\s*\*\s*$Ident\s*\)\s*\(/$1 . $declare . $post_declare_space . '(*' . $funcname . ')('/ex;
+ }
}
# check for spacing round square brackets; allowed:
@@ -2252,9 +5008,13 @@ sub process {
my ($where, $prefix) = ($-[1], $1);
if ($prefix !~ /$Type\s+$/ &&
($where != 0 || $prefix !~ /^.\s+$/) &&
- $prefix !~ /\{\s+$/) {
- ERROR("BRACKET_SPACE",
- "space prohibited before open square bracket '['\n" . $herecurr);
+ $prefix !~ /[{,:]\s+$/) {
+ if (ERROR("BRACKET_SPACE",
+ "space prohibited before open square bracket '['\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/^(\+.*?)\s+\[/$1\[/;
+ }
}
}
@@ -2271,7 +5031,6 @@ sub process {
__attribute__|format|__extension__|
asm|__asm__)$/x)
{
-
# cpp #define statements have non-optional spaces, ie
# if there is a space between the name and the open
# parenthesis it is simply not a parameter group.
@@ -2285,25 +5044,53 @@ sub process {
} elsif ($ctx =~ /$Type$/) {
} else {
- WARN("SPACING",
- "space prohibited between function name and open parenthesis '('\n" . $herecurr);
+ if (WARN("SPACING",
+ "space prohibited between function name and open parenthesis '('\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/\b$name\s+\(/$name\(/;
+ }
}
}
+
# Check operator spacing.
if (!($line=~/\#\s*include/)) {
+ my $fixed_line = "";
+ my $line_fixed = 0;
+
my $ops = qr{
<<=|>>=|<=|>=|==|!=|
\+=|-=|\*=|\/=|%=|\^=|\|=|&=|
=>|->|<<|>>|<|>|=|!|~|
&&|\|\||,|\^|\+\+|--|&|\||\+|-|\*|\/|%|
- \?|:
+ \?:|\?|:
}x;
my @elements = split(/($ops|;)/, $opline);
+
+## print("element count: <" . $#elements . ">\n");
+## foreach my $el (@elements) {
+## print("el: <$el>\n");
+## }
+
+ my @fix_elements = ();
my $off = 0;
+ foreach my $el (@elements) {
+ push(@fix_elements, substr($rawline, $off, length($el)));
+ $off += length($el);
+ }
+
+ $off = 0;
+
my $blank = copy_spacing($opline);
+ my $last_after = -1;
for (my $n = 0; $n < $#elements; $n += 2) {
+
+ my $good = $fix_elements[$n] . $fix_elements[$n + 1];
+
+## print("n: <$n> good: <$good>\n");
+
$off += length($elements[$n]);
# Pick up the preceding and succeeding characters.
@@ -2351,7 +5138,7 @@ sub process {
# Ignore operators passed as parameters.
if ($op_type ne 'V' &&
- $ca =~ /\s$/ && $cc =~ /^\s*,/) {
+ $ca =~ /\s$/ && $cc =~ /^\s*[,\)]/) {
# # Ignore comments
# } elsif ($op =~ /^$;+$/) {
@@ -2360,27 +5147,62 @@ sub process {
} elsif ($op eq ';') {
if ($ctx !~ /.x[WEBC]/ &&
$cc !~ /^\\/ && $cc !~ /^;/) {
- ERROR("SPACING",
- "space required after that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "space required after that '$op' $at\n" . $hereptr)) {
+ $good = $fix_elements[$n] . trim($fix_elements[$n + 1]) . " ";
+ $line_fixed = 1;
+ }
}
# // is a comment
} elsif ($op eq '//') {
+ # : when part of a bitfield
+ } elsif ($opv eq ':B') {
+ # skip the bitfield test for now
+
# No spaces for:
# ->
- # : when part of a bitfield
- } elsif ($op eq '->' || $opv eq ':B') {
+ } elsif ($op eq '->') {
if ($ctx =~ /Wx.|.xW/) {
- ERROR("SPACING",
- "spaces prohibited around that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "spaces prohibited around that '$op' $at\n" . $hereptr)) {
+ $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]);
+ if (defined $fix_elements[$n + 2]) {
+ $fix_elements[$n + 2] =~ s/^\s+//;
+ }
+ $line_fixed = 1;
+ }
}
- # , must have a space on the right.
+ # , must not have a space before and must have a space on the right.
} elsif ($op eq ',') {
+ my $rtrim_before = 0;
+ my $space_after = 0;
+ if ($ctx =~ /Wx./) {
+ if (ERROR("SPACING",
+ "space prohibited before that '$op' $at\n" . $hereptr)) {
+ $line_fixed = 1;
+ $rtrim_before = 1;
+ }
+ }
if ($ctx !~ /.x[WEC]/ && $cc !~ /^}/) {
- ERROR("SPACING",
- "space required after that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "space required after that '$op' $at\n" . $hereptr)) {
+ $line_fixed = 1;
+ $last_after = $n;
+ $space_after = 1;
+ }
+ }
+ if ($rtrim_before || $space_after) {
+ if ($rtrim_before) {
+ $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]);
+ } else {
+ $good = $fix_elements[$n] . trim($fix_elements[$n + 1]);
+ }
+ if ($space_after) {
+ $good .= " ";
+ }
}
# '*' as part of a type definition -- reported already.
@@ -2394,34 +5216,56 @@ sub process {
$opv eq '*U' || $opv eq '-U' ||
$opv eq '&U' || $opv eq '&&U') {
if ($ctx !~ /[WEBC]x./ && $ca !~ /(?:\)|!|~|\*|-|\&|\||\+\+|\-\-|\{)$/) {
- ERROR("SPACING",
- "space required before that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "space required before that '$op' $at\n" . $hereptr)) {
+ if ($n != $last_after + 2) {
+ $good = $fix_elements[$n] . " " . ltrim($fix_elements[$n + 1]);
+ $line_fixed = 1;
+ }
+ }
}
if ($op eq '*' && $cc =~/\s*$Modifier\b/) {
# A unary '*' may be const
} elsif ($ctx =~ /.xW/) {
- ERROR("SPACING",
- "space prohibited after that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "space prohibited after that '$op' $at\n" . $hereptr)) {
+ $good = $fix_elements[$n] . rtrim($fix_elements[$n + 1]);
+ if (defined $fix_elements[$n + 2]) {
+ $fix_elements[$n + 2] =~ s/^\s+//;
+ }
+ $line_fixed = 1;
+ }
}
# unary ++ and unary -- are allowed no space on one side.
} elsif ($op eq '++' or $op eq '--') {
if ($ctx !~ /[WEOBC]x[^W]/ && $ctx !~ /[^W]x[WOBEC]/) {
- ERROR("SPACING",
- "space required one side of that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "space required one side of that '$op' $at\n" . $hereptr)) {
+ $good = $fix_elements[$n] . trim($fix_elements[$n + 1]) . " ";
+ $line_fixed = 1;
+ }
}
if ($ctx =~ /Wx[BE]/ ||
($ctx =~ /Wx./ && $cc =~ /^;/)) {
- ERROR("SPACING",
- "space prohibited before that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "space prohibited before that '$op' $at\n" . $hereptr)) {
+ $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]);
+ $line_fixed = 1;
+ }
}
if ($ctx =~ /ExW/) {
- ERROR("SPACING",
- "space prohibited after that '$op' $at\n" . $hereptr);
+ if (ERROR("SPACING",
+ "space prohibited after that '$op' $at\n" . $hereptr)) {
+ $good = $fix_elements[$n] . trim($fix_elements[$n + 1]);
+ if (defined $fix_elements[$n + 2]) {
+ $fix_elements[$n + 2] =~ s/^\s+//;
+ }
+ $line_fixed = 1;
+ }
}
-
# << and >> may either have or not have spaces both sides
} elsif ($op eq '<<' or $op eq '>>' or
$op eq '&' or $op eq '^' or $op eq '|' or
@@ -2429,18 +5273,41 @@ sub process {
$op eq '*' or $op eq '/' or
$op eq '%')
{
- if ($ctx =~ /Wx[^WCE]|[^WCE]xW/) {
- ERROR("SPACING",
- "need consistent spacing around '$op' $at\n" .
- $hereptr);
+ if ($check) {
+ if (defined $fix_elements[$n + 2] && $ctx !~ /[EW]x[EW]/) {
+ if (CHK("SPACING",
+ "spaces preferred around that '$op' $at\n" . $hereptr)) {
+ $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " ";
+ $fix_elements[$n + 2] =~ s/^\s+//;
+ $line_fixed = 1;
+ }
+ } elsif (!defined $fix_elements[$n + 2] && $ctx !~ /Wx[OE]/) {
+ if (CHK("SPACING",
+ "space preferred before that '$op' $at\n" . $hereptr)) {
+ $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]);
+ $line_fixed = 1;
+ }
+ }
+ } elsif ($ctx =~ /Wx[^WCE]|[^WCE]xW/) {
+ if (ERROR("SPACING",
+ "need consistent spacing around '$op' $at\n" . $hereptr)) {
+ $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " ";
+ if (defined $fix_elements[$n + 2]) {
+ $fix_elements[$n + 2] =~ s/^\s+//;
+ }
+ $line_fixed = 1;
+ }
}
# A colon needs no spaces before when it is
# terminating a case value or a label.
} elsif ($opv eq ':C' || $opv eq ':L') {
- if ($ctx =~ /Wx./) {
- ERROR("SPACING",
- "space prohibited before that '$op' $at\n" . $hereptr);
+ if ($ctx =~ /Wx./ and $realfile !~ m@.*\.lds\.h$@) {
+ if (ERROR("SPACING",
+ "space prohibited before that '$op' $at\n" . $hereptr)) {
+ $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]);
+ $line_fixed = 1;
+ }
}
# All the others need spaces both sides.
@@ -2453,21 +5320,57 @@ sub process {
($op eq '>' &&
$ca =~ /<\S+\@\S+$/))
{
- $ok = 1;
+ $ok = 1;
}
- # Ignore ?:
- if (($opv eq ':O' && $ca =~ /\?$/) ||
- ($op eq '?' && $cc =~ /^:/)) {
- $ok = 1;
+ # for asm volatile statements
+ # ignore a colon with another
+ # colon immediately before or after
+ if (($op eq ':') &&
+ ($ca =~ /:$/ || $cc =~ /^:/)) {
+ $ok = 1;
}
+ # messages are ERROR, but ?: are CHK
if ($ok == 0) {
- ERROR("SPACING",
- "spaces required around that '$op' $at\n" . $hereptr);
+ my $msg_level = \&ERROR;
+ $msg_level = \&CHK if (($op eq '?:' || $op eq '?' || $op eq ':') && $ctx =~ /VxV/);
+
+ if (&{$msg_level}("SPACING",
+ "spaces required around that '$op' $at\n" . $hereptr)) {
+ $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " ";
+ if (defined $fix_elements[$n + 2]) {
+ $fix_elements[$n + 2] =~ s/^\s+//;
+ }
+ $line_fixed = 1;
+ }
}
}
$off += length($elements[$n + 1]);
+
+## print("n: <$n> GOOD: <$good>\n");
+
+ $fixed_line = $fixed_line . $good;
+ }
+
+ if (($#elements % 2) == 0) {
+ $fixed_line = $fixed_line . $fix_elements[$#elements];
+ }
+
+ if ($fix && $line_fixed && $fixed_line ne $fixed[$fixlinenr]) {
+ $fixed[$fixlinenr] = $fixed_line;
+ }
+
+
+ }
+
+# check for whitespace before a non-naked semicolon
+ if ($line =~ /^\+.*\S\s+;\s*$/) {
+ if (WARN("SPACING",
+ "space prohibited before semicolon\n" . $herecurr) &&
+ $fix) {
+ 1 while $fixed[$fixlinenr] =~
+ s/^(\+.*\S)\s+;/$1;/;
}
}
@@ -2483,7 +5386,7 @@ sub process {
## $line !~ /^.\s*$Type\s+$Ident(?:\s*=[^,{]*)?\s*,\s*$Type\s*$Ident.*/) {
##
## # Remove any bracketed sections to ensure we do not
-## # falsly report the parameters of functions.
+## # falsely report the parameters of functions.
## my $ln = $line;
## while ($ln =~ s/\([^\(\)]*\)//g) {
## }
@@ -2495,111 +5398,247 @@ sub process {
#need space before brace following if, while, etc
if (($line =~ /\(.*\)\{/ && $line !~ /\($Type\)\{/) ||
- $line =~ /do\{/) {
- ERROR("SPACING",
- "space required before the open brace '{'\n" . $herecurr);
+ $line =~ /\b(?:else|do)\{/) {
+ if (ERROR("SPACING",
+ "space required before the open brace '{'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^(\+.*(?:do|else|\)))\{/$1 {/;
+ }
}
+## # check for blank lines before declarations
+## if ($line =~ /^.\t+$Type\s+$Ident(?:\s*=.*)?;/ &&
+## $prevrawline =~ /^.\s*$/) {
+## WARN("SPACING",
+## "No blank lines before declarations\n" . $hereprev);
+## }
+##
+
# closing brace should have a space following it when it has anything
# on the line
- if ($line =~ /}(?!(?:,|;|\)))\S/) {
- ERROR("SPACING",
- "space required after that close brace '}'\n" . $herecurr);
+ if ($line =~ /}(?!(?:,|;|\)|\}))\S/) {
+ if (ERROR("SPACING",
+ "space required after that close brace '}'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/}((?!(?:,|;|\)))\S)/} $1/;
+ }
}
# check spacing on square brackets
if ($line =~ /\[\s/ && $line !~ /\[\s*$/) {
- ERROR("SPACING",
- "space prohibited after that open square bracket '['\n" . $herecurr);
+ if (ERROR("SPACING",
+ "space prohibited after that open square bracket '['\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/\[\s+/\[/;
+ }
}
if ($line =~ /\s\]/) {
- ERROR("SPACING",
- "space prohibited before that close square bracket ']'\n" . $herecurr);
+ if (ERROR("SPACING",
+ "space prohibited before that close square bracket ']'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/\s+\]/\]/;
+ }
}
# check spacing on parentheses
if ($line =~ /\(\s/ && $line !~ /\(\s*(?:\\)?$/ &&
$line !~ /for\s*\(\s+;/) {
- ERROR("SPACING",
- "space prohibited after that open parenthesis '('\n" . $herecurr);
+ if (ERROR("SPACING",
+ "space prohibited after that open parenthesis '('\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/\(\s+/\(/;
+ }
}
if ($line =~ /(\s+)\)/ && $line !~ /^.\s*\)/ &&
$line !~ /for\s*\(.*;\s+\)/ &&
$line !~ /:\s+\)/) {
- ERROR("SPACING",
- "space prohibited before that close parenthesis ')'\n" . $herecurr);
+ if (ERROR("SPACING",
+ "space prohibited before that close parenthesis ')'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/\s+\)/\)/;
+ }
}
-#goto labels aren't indented, allow a single space however
- if ($line=~/^.\s+[A-Za-z\d_]+:(?![0-9]+)/ and
- !($line=~/^. [A-Za-z\d_]+:/) and !($line=~/^.\s+default:/)) {
- WARN("INDENTED_LABEL",
- "labels should not be indented\n" . $herecurr);
+# check unnecessary parentheses around addressof/dereference single $Lvals
+# ie: &(foo->bar) should be &foo->bar and *(foo->bar) should be *foo->bar
+
+ while ($line =~ /(?:[^&]&\s*|\*)\(\s*($Ident\s*(?:$Member\s*)+)\s*\)/g) {
+ my $var = $1;
+ if (CHK("UNNECESSARY_PARENTHESES",
+ "Unnecessary parentheses around $var\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\(\s*\Q$var\E\s*\)/$var/;
+ }
}
-# Return is not a function.
- if (defined($stat) && $stat =~ /^.\s*return(\s*)(\(.*);/s) {
- my $spacing = $1;
- my $value = $2;
-
- # Flatten any parentheses
- $value =~ s/\(/ \(/g;
- $value =~ s/\)/\) /g;
- while ($value =~ s/\[[^\{\}]*\]/1/ ||
- $value !~ /(?:$Ident|-?$Constant)\s*
- $Compare\s*
- (?:$Ident|-?$Constant)/x &&
- $value =~ s/\([^\(\)]*\)/1/) {
- }
-#print "value<$value>\n";
- if ($value =~ /^\s*(?:$Ident|-?$Constant)\s*$/) {
- ERROR("RETURN_PARENTHESES",
- "return is not a function, parentheses are not required\n" . $herecurr);
+# check for unnecessary parentheses around function pointer uses
+# ie: (foo->bar)(); should be foo->bar();
+# but not "if (foo->bar) (" to avoid some false positives
+ if ($line =~ /(\bif\s*|)(\(\s*$Ident\s*(?:$Member\s*)+\))[ \t]*\(/ && $1 !~ /^if/) {
+ my $var = $2;
+ if (CHK("UNNECESSARY_PARENTHESES",
+ "Unnecessary parentheses around function pointer $var\n" . $herecurr) &&
+ $fix) {
+ my $var2 = deparenthesize($var);
+ $var2 =~ s/\s//g;
+ $fixed[$fixlinenr] =~ s/\Q$var\E/$var2/;
+ }
+ }
+# check for unnecessary parentheses around comparisons in if uses
+# when !drivers/staging or command-line uses --strict
+ if (($realfile !~ m@^(?:drivers/staging/)@ || $check_orig) &&
+ $perl_version_ok && defined($stat) &&
+ $stat =~ /(^.\s*if\s*($balanced_parens))/) {
+ my $if_stat = $1;
+ my $test = substr($2, 1, -1);
+ my $herectx;
+ while ($test =~ /(?:^|[^\w\&\!\~])+\s*\(\s*([\&\!\~]?\s*$Lval\s*(?:$Compare\s*$FuncArg)?)\s*\)/g) {
+ my $match = $1;
+ # avoid parentheses around potential macro args
+ next if ($match =~ /^\s*\w+\s*$/);
+ if (!defined($herectx)) {
+ $herectx = $here . "\n";
+ my $cnt = statement_rawlines($if_stat);
+ for (my $n = 0; $n < $cnt; $n++) {
+ my $rl = raw_line($linenr, $n);
+ $herectx .= $rl . "\n";
+ last if $rl =~ /^[ \+].*\{/;
+ }
+ }
+ CHK("UNNECESSARY_PARENTHESES",
+ "Unnecessary parentheses around '$match'\n" . $herectx);
+ }
+ }
+
+# check that goto labels aren't indented (allow a single space indentation)
+# and ignore bitfield definitions like foo:1
+# Strictly, labels can have whitespace after the identifier and before the :
+# but this is not allowed here as many ?: uses would appear to be labels
+ if ($sline =~ /^.\s+[A-Za-z_][A-Za-z\d_]*:(?!\s*\d+)/ &&
+ $sline !~ /^. [A-Za-z\d_][A-Za-z\d_]*:/ &&
+ $sline !~ /^.\s+default:/) {
+ if (WARN("INDENTED_LABEL",
+ "labels should not be indented\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/^(.)\s+/$1/;
+ }
+ }
+
+# check if a statement with a comma should be two statements like:
+# foo = bar(), /* comma should be semicolon */
+# bar = baz();
+ if (defined($stat) &&
+ $stat =~ /^\+\s*(?:$Lval\s*$Assignment\s*)?$FuncArg\s*,\s*(?:$Lval\s*$Assignment\s*)?$FuncArg\s*;\s*$/) {
+ my $cnt = statement_rawlines($stat);
+ my $herectx = get_stat_here($linenr, $cnt, $here);
+ WARN("SUSPECT_COMMA_SEMICOLON",
+ "Possible comma where semicolon could be used\n" . $herectx);
+ }
+
+# return is not a function
+ if (defined($stat) && $stat =~ /^.\s*return(\s*)\(/s) {
+ my $spacing = $1;
+ if ($perl_version_ok &&
+ $stat =~ /^.\s*return\s*($balanced_parens)\s*;\s*$/) {
+ my $value = $1;
+ $value = deparenthesize($value);
+ if ($value =~ m/^\s*$FuncArg\s*(?:\?|$)/) {
+ ERROR("RETURN_PARENTHESES",
+ "return is not a function, parentheses are not required\n" . $herecurr);
+ }
} elsif ($spacing !~ /\s+/) {
ERROR("SPACING",
"space required before the open parenthesis '('\n" . $herecurr);
}
}
-# Return of what appears to be an errno should normally be -'ve
- if ($line =~ /^.\s*return\s*(E[A-Z]*)\s*;/) {
- my $name = $1;
- if ($name ne 'EOF' && $name ne 'ERROR') {
- WARN("USE_NEGATIVE_ERRNO",
- "return of an errno should typically be -ve (return -$1)\n" . $herecurr);
+
+# unnecessary return in a void function
+# at end-of-function, with the previous line a single leading tab, then return;
+# and the line before that not a goto label target like "out:"
+ if ($sline =~ /^[ \+]}\s*$/ &&
+ $prevline =~ /^\+\treturn\s*;\s*$/ &&
+ $linenr >= 3 &&
+ $lines[$linenr - 3] =~ /^[ +]/ &&
+ $lines[$linenr - 3] !~ /^[ +]\s*$Ident\s*:/) {
+ WARN("RETURN_VOID",
+ "void function return statements are not generally useful\n" . $hereprev);
+ }
+
+# if statements using unnecessary parentheses - ie: if ((foo == bar))
+ if ($perl_version_ok &&
+ $line =~ /\bif\s*((?:\(\s*){2,})/) {
+ my $openparens = $1;
+ my $count = $openparens =~ tr@\(@\(@;
+ my $msg = "";
+ if ($line =~ /\bif\s*(?:\(\s*){$count,$count}$LvalOrFunc\s*($Compare)\s*$LvalOrFunc(?:\s*\)){$count,$count}/) {
+ my $comp = $4; #Not $1 because of $LvalOrFunc
+ $msg = " - maybe == should be = ?" if ($comp eq "==");
+ WARN("UNNECESSARY_PARENTHESES",
+ "Unnecessary parentheses$msg\n" . $herecurr);
}
}
-# typecasts on min/max could be min_t/max_t
- if ($line =~ /^\+(?:.*?)\b(min|max)\s*\($Typecast{0,1}($LvalOrFunc)\s*,\s*$Typecast{0,1}($LvalOrFunc)\s*\)/) {
- if (defined $2 || defined $8) {
- my $call = $1;
- my $cast1 = deparenthesize($2);
- my $arg1 = $3;
- my $cast2 = deparenthesize($8);
- my $arg2 = $9;
- my $cast;
-
- if ($cast1 ne "" && $cast2 ne "") {
- $cast = "$cast1 or $cast2";
- } elsif ($cast1 ne "") {
- $cast = $cast1;
- } else {
- $cast = $cast2;
+# comparisons with a constant or upper case identifier on the left
+# avoid cases like "foo + BAR < baz"
+# only fix matches surrounded by parentheses to avoid incorrect
+# conversions like "FOO < baz() + 5" being "misfixed" to "baz() > FOO + 5"
+ if ($perl_version_ok &&
+ $line =~ /^\+(.*)\b($Constant|[A-Z_][A-Z0-9_]*)\s*($Compare)\s*($LvalOrFunc)/) {
+ my $lead = $1;
+ my $const = $2;
+ my $comp = $3;
+ my $to = $4;
+ my $newcomp = $comp;
+ if ($lead !~ /(?:$Operators|\.)\s*$/ &&
+ $to !~ /^(?:Constant|[A-Z_][A-Z0-9_]*)$/ &&
+ WARN("CONSTANT_COMPARISON",
+ "Comparisons should place the constant on the right side of the test\n" . $herecurr) &&
+ $fix) {
+ if ($comp eq "<") {
+ $newcomp = ">";
+ } elsif ($comp eq "<=") {
+ $newcomp = ">=";
+ } elsif ($comp eq ">") {
+ $newcomp = "<";
+ } elsif ($comp eq ">=") {
+ $newcomp = "<=";
}
- WARN("MINMAX",
- "$call() should probably be ${call}_t($cast, $arg1, $arg2)\n" . $herecurr);
+ $fixed[$fixlinenr] =~ s/\(\s*\Q$const\E\s*$Compare\s*\Q$to\E\s*\)/($to $newcomp $const)/;
+ }
+ }
+
+# Return of what appears to be an errno should normally be negative
+ if ($sline =~ /\breturn(?:\s*\(+\s*|\s+)(E[A-Z]+)(?:\s*\)+\s*|\s*)[;:,]/) {
+ my $name = $1;
+ if ($name ne 'EOF' && $name ne 'ERROR' && $name !~ /^EPOLL/) {
+ WARN("USE_NEGATIVE_ERRNO",
+ "return of an errno should typically be negative (ie: return -$1)\n" . $herecurr);
}
}
# Need a space before open parenthesis after if, while etc
- if ($line=~/\b(if|while|for|switch)\(/) {
- ERROR("SPACING", "space required before the open parenthesis '('\n" . $herecurr);
+ if ($line =~ /\b(if|while|for|switch)\(/) {
+ if (ERROR("SPACING",
+ "space required before the open parenthesis '('\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/\b(if|while|for|switch)\(/$1 \(/;
+ }
}
# Check for illegal assignment in if conditional -- and check for trailing
# statements after the conditional.
- if ($line =~ /do\s*(?!\{)/) {
+ if ($line =~ /do\s*(?!{)/) {
+ ($stat, $cond, $line_nr_next, $remain_next, $off_next) =
+ ctx_statement_block($linenr, $realcnt, 0)
+ if (!defined $stat);
my ($stat_next) = ctx_statement_block($line_nr_next,
$remain_next, $off_next);
$stat_next =~ s/\n./\n /g;
@@ -2618,20 +5657,45 @@ sub process {
}
}
if (!defined $suppress_whiletrailers{$linenr} &&
+ defined($stat) && defined($cond) &&
$line =~ /\b(?:if|while|for)\s*\(/ && $line !~ /^.\s*#/) {
my ($s, $c) = ($stat, $cond);
+ my $fixed_assign_in_if = 0;
if ($c =~ /\bif\s*\(.*[^<>!=]=[^=].*/s) {
- ERROR("ASSIGN_IN_IF",
- "do not use assignment in if condition\n" . $herecurr);
+ if (ERROR("ASSIGN_IN_IF",
+ "do not use assignment in if condition\n" . $herecurr) &&
+ $fix && $perl_version_ok) {
+ if ($rawline =~ /^\+(\s+)if\s*\(\s*(\!)?\s*\(\s*(($Lval)\s*=\s*$LvalOrFunc)\s*\)\s*(?:($Compare)\s*($FuncArg))?\s*\)\s*(\{)?\s*$/) {
+ my $space = $1;
+ my $not = $2;
+ my $statement = $3;
+ my $assigned = $4;
+ my $test = $8;
+ my $against = $9;
+ my $brace = $15;
+ fix_delete_line($fixlinenr, $rawline);
+ fix_insert_line($fixlinenr, "$space$statement;");
+ my $newline = "${space}if (";
+ $newline .= '!' if defined($not);
+ $newline .= '(' if (defined $not && defined($test) && defined($against));
+ $newline .= "$assigned";
+ $newline .= " $test $against" if (defined($test) && defined($against));
+ $newline .= ')' if (defined $not && defined($test) && defined($against));
+ $newline .= ')';
+ $newline .= " {" if (defined($brace));
+ fix_insert_line($fixlinenr + 1, $newline);
+ $fixed_assign_in_if = 1;
+ }
+ }
}
# Find out what is on the end of the line after the
# conditional.
substr($s, 0, length($c), '');
$s =~ s/\n.*//g;
- $s =~ s/$;//g; # Remove any comments
- if (length($c) && $s !~ /^\s*\{?\s*\\*\s*$/ &&
+ $s =~ s/$;//g; # Remove any comments
+ if (length($c) && $s !~ /^\s*{?\s*\\*\s*$/ &&
$c !~ /}\s*while\s*/)
{
# Find out how long the conditional actually is.
@@ -2645,8 +5709,20 @@ sub process {
$stat_real = "[...]\n$stat_real";
}
- ERROR("TRAILING_STATEMENTS",
- "trailing statements should be on next line\n" . $herecurr . $stat_real);
+ if (ERROR("TRAILING_STATEMENTS",
+ "trailing statements should be on next line\n" . $herecurr . $stat_real) &&
+ !$fixed_assign_in_if &&
+ $cond_lines == 0 &&
+ $fix && $perl_version_ok &&
+ $fixed[$fixlinenr] =~ /^\+(\s*)((?:if|while|for)\s*$balanced_parens)\s*(.*)$/) {
+ my $indent = $1;
+ my $test = $2;
+ my $rest = rtrim($4);
+ if ($rest =~ /;$/) {
+ $fixed[$fixlinenr] = "\+$indent$test";
+ fix_insert_line($fixlinenr + 1, "$indent\t$rest");
+ }
+ }
}
}
@@ -2669,8 +5745,8 @@ sub process {
# if and else should not have general statements after it
if ($line =~ /^.\s*(?:}\s*)?else\b(.*)/) {
my $s = $1;
- $s =~ s/$;//g; # Remove any comments
- if ($s !~ /^\s*(?:\sif|(?:\{|)\s*\\?\s*$)/) {
+ $s =~ s/$;//g; # Remove any comments
+ if ($s !~ /^\s*(?:\sif|(?:{|)\s*\\?\s*$)/) {
ERROR("TRAILING_STATEMENTS",
"trailing statements should be on next line\n" . $herecurr);
}
@@ -2678,7 +5754,7 @@ sub process {
# if should not continue a brace
if ($line =~ /}\s*if\b/) {
ERROR("TRAILING_STATEMENTS",
- "trailing statements should be on next line\n" .
+ "trailing statements should be on next line (or did you mean 'else if'?)\n" .
$herecurr);
}
# case and default should not have general statements after them
@@ -2694,14 +5770,26 @@ sub process {
# Check for }<nl>else {, these must be at the same
# indent level to be relevant to each other.
- if ($prevline=~/}\s*$/ and $line=~/^.\s*else\s*/ and
- $previndent == $indent) {
- ERROR("ELSE_AFTER_BRACE",
- "else should follow close brace '}'\n" . $hereprev);
+ if ($prevline=~/}\s*$/ and $line=~/^.\s*else\s*/ &&
+ $previndent == $indent) {
+ if (ERROR("ELSE_AFTER_BRACE",
+ "else should follow close brace '}'\n" . $hereprev) &&
+ $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+ fix_delete_line($fixlinenr - 1, $prevrawline);
+ fix_delete_line($fixlinenr, $rawline);
+ my $fixedline = $prevrawline;
+ $fixedline =~ s/}\s*$//;
+ if ($fixedline !~ /^\+\s*$/) {
+ fix_insert_line($fixlinenr, $fixedline);
+ }
+ $fixedline = $rawline;
+ $fixedline =~ s/^(.\s*)else/$1} else/;
+ fix_insert_line($fixlinenr, $fixedline);
+ }
}
- if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ and
- $previndent == $indent) {
+ if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ &&
+ $previndent == $indent) {
my ($s, $c) = ctx_statement_block($linenr, $realcnt, 0);
# Find out what is on the end of the line after the
@@ -2710,25 +5798,84 @@ sub process {
$s =~ s/\n.*//g;
if ($s =~ /^\s*;/) {
- ERROR("WHILE_AFTER_BRACE",
- "while should follow close brace '}'\n" . $hereprev);
+ if (ERROR("WHILE_AFTER_BRACE",
+ "while should follow close brace '}'\n" . $hereprev) &&
+ $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+ fix_delete_line($fixlinenr - 1, $prevrawline);
+ fix_delete_line($fixlinenr, $rawline);
+ my $fixedline = $prevrawline;
+ my $trailing = $rawline;
+ $trailing =~ s/^\+//;
+ $trailing = trim($trailing);
+ $fixedline =~ s/}\s*$/} $trailing/;
+ fix_insert_line($fixlinenr, $fixedline);
+ }
}
}
-#studly caps, commented out until figure out how to distinguish between use of existing and adding new
-# if (($line=~/[\w_][a-z\d]+[A-Z]/) and !($line=~/print/)) {
-# print "No studly caps, use _\n";
-# print "$herecurr";
-# $clean = 0;
-# }
+#Specific variable tests
+ while ($line =~ m{($Constant|$Lval)}g) {
+ my $var = $1;
+
+#CamelCase
+ if (!$OpenOCD) {
+ if ($var !~ /^$Constant$/ &&
+ $var =~ /[A-Z][a-z]|[a-z][A-Z]/ &&
+#Ignore some autogenerated defines and enum values
+ $var !~ /^(?:[A-Z]+_){1,5}[A-Z]{1,3}[a-z]/ &&
+#Ignore Page<foo> variants
+ $var !~ /^(?:Clear|Set|TestClear|TestSet|)Page[A-Z]/ &&
+#Ignore SI style variants like nS, mV and dB
+#(ie: max_uV, regulator_min_uA_show, RANGE_mA_VALUE)
+ $var !~ /^(?:[a-z0-9_]*|[A-Z0-9_]*)?_?[a-z][A-Z](?:_[a-z0-9_]+|_[A-Z0-9_]+)?$/ &&
+#Ignore some three character SI units explicitly, like MiB and KHz
+ $var !~ /^(?:[a-z_]*?)_?(?:[KMGT]iB|[KMGT]?Hz)(?:_[a-z_]+)?$/) {
+ }
+ } # !$OpenOCD
+ # OpenOCD Specific: Begin: remove Linux exceptions, extend to camel[0-9_]*CASE
+ if ($var !~ /^$Constant$/ &&
+ $var =~ /[A-Z][0-9_]*[a-z]|[a-z][0-9_]*[A-Z]/) {
+ # OpenOCD Specific: End
+ while ($var =~ m{\b($Ident)}g) {
+ my $word = $1;
+ if (!$OpenOCD) {
+ next if ($word !~ /[A-Z][a-z]|[a-z][A-Z]/);
+ } # !$OpenOCD
+ # OpenOCD Specific: Begin: extend to camel[0-9_]*CASE
+ next if ($word !~ /[A-Z][0-9_]*[a-z]|[a-z][0-9_]*[A-Z]/);
+ # OpenOCD Specific: End
+ if (!$OpenOCD) {
+ # This will not work for OpenOCD jenkins because it runs
+ # checkpatch from a tree already patched. Any new camelcase
+ # in include file will be ignored as it was pre-existing.
+ if ($check) {
+ seed_camelcase_includes();
+ if (!$file && !$camelcase_file_seeded) {
+ seed_camelcase_file($realfile);
+ $camelcase_file_seeded = 1;
+ }
+ }
+ } # !$OpenOCD
+ if (!defined $camelcase{$word}) {
+ $camelcase{$word} = 1;
+ CHK("CAMELCASE",
+ "Avoid CamelCase: <$word>\n" . $herecurr);
+ }
+ }
+ }
+ }
#no spaces allowed after \ in define
- if ($line=~/\#\s*define.*\\\s$/) {
- WARN("WHITESPACE_AFTER_LINE_CONTINUATION",
- "Whitepspace after \\ makes next lines useless\n" . $herecurr);
+ if ($line =~ /\#\s*define.*\\\s+$/) {
+ if (WARN("WHITESPACE_AFTER_LINE_CONTINUATION",
+ "Whitespace after \\ makes next lines useless\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\s+$//;
+ }
}
-#warn if <asm/foo.h> is #included and <linux/foo.h> is available (uses RAW line)
+# warn if <asm/foo.h> is #included and <linux/foo.h> is available and includes
+# itself <asm/foo.h> (uses RAW line)
if ($tree && $rawline =~ m{^.\s*\#\s*include\s*\<asm\/(.*)\.h\>}) {
my $file = "$1.h";
my $checkfile = "include/linux/$file";
@@ -2736,12 +5883,15 @@ sub process {
$realfile ne $checkfile &&
$1 !~ /$allowed_asm_includes/)
{
- if ($realfile =~ m{^arch/}) {
- CHK("ARCH_INCLUDE_LINUX",
- "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
- } else {
- WARN("INCLUDE_LINUX",
- "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+ my $asminclude = `grep -Ec "#include\\s+<asm/$file>" $root/$checkfile`;
+ if ($asminclude > 0) {
+ if ($realfile =~ m{^arch/}) {
+ CHK("ARCH_INCLUDE_LINUX",
+ "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+ } else {
+ WARN("INCLUDE_LINUX",
+ "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+ }
}
}
}
@@ -2755,101 +5905,201 @@ sub process {
my $cnt = $realcnt;
my ($off, $dstat, $dcond, $rest);
my $ctx = '';
-
- my $args = defined($1);
-
- # Find the end of the macro and limit our statement
- # search to that.
- while ($cnt > 0 && defined $lines[$ln - 1] &&
- $lines[$ln - 1] =~ /^(?:-|..*\\$)/)
- {
- $ctx .= $rawlines[$ln - 1] . "\n";
- $cnt-- if ($lines[$ln - 1] !~ /^-/);
- $ln++;
- }
- $ctx .= $rawlines[$ln - 1];
-
+ my $has_flow_statement = 0;
+ my $has_arg_concat = 0;
($dstat, $dcond, $ln, $cnt, $off) =
- ctx_statement_block($linenr, $ln - $linenr + 1, 0);
+ ctx_statement_block($linenr, $realcnt, 0);
+ $ctx = $dstat;
#print "dstat<$dstat> dcond<$dcond> cnt<$cnt> off<$off>\n";
#print "LINE<$lines[$ln-1]> len<" . length($lines[$ln-1]) . "\n";
- # Extract the remainder of the define (if any) and
- # rip off surrounding spaces, and trailing \'s.
- $rest = '';
- while ($off != 0 || ($cnt > 0 && $rest =~ /\\\s*$/)) {
- #print "ADDING cnt<$cnt> $off <" . substr($lines[$ln - 1], $off) . "> rest<$rest>\n";
- if ($off != 0 || $lines[$ln - 1] !~ /^-/) {
- $rest .= substr($lines[$ln - 1], $off) . "\n";
- $cnt--;
- }
- $ln++;
- $off = 0;
- }
- $rest =~ s/\\\n.//g;
- $rest =~ s/^\s*//s;
- $rest =~ s/\s*$//s;
-
- # Clean up the original statement.
- if ($args) {
- substr($dstat, 0, length($dcond), '');
- } else {
- $dstat =~ s/^.\s*\#\s*define\s+$Ident\s*//;
+ $has_flow_statement = 1 if ($ctx =~ /\b(goto|return)\b/);
+ $has_arg_concat = 1 if ($ctx =~ /\#\#/ && $ctx !~ /\#\#\s*(?:__VA_ARGS__|args)\b/);
+
+ $dstat =~ s/^.\s*\#\s*define\s+$Ident(\([^\)]*\))?\s*//;
+ my $define_args = $1;
+ my $define_stmt = $dstat;
+ my @def_args = ();
+
+ if (defined $define_args && $define_args ne "") {
+ $define_args = substr($define_args, 1, length($define_args) - 2);
+ $define_args =~ s/\s*//g;
+ $define_args =~ s/\\\+?//g;
+ @def_args = split(",", $define_args);
}
+
$dstat =~ s/$;//g;
$dstat =~ s/\\\n.//g;
$dstat =~ s/^\s*//s;
$dstat =~ s/\s*$//s;
# Flatten any parentheses and braces
- while ($dstat =~ s/\([^\(\)]*\)/1/ ||
- $dstat =~ s/\{[^\{\}]*\}/1/ ||
- $dstat =~ s/\[[^\{\}]*\]/1/)
+ while ($dstat =~ s/\([^\(\)]*\)/1u/ ||
+ $dstat =~ s/\{[^\{\}]*\}/1u/ ||
+ $dstat =~ s/.\[[^\[\]]*\]/1u/)
+ {
+ }
+
+ # Flatten any obvious string concatenation.
+ while ($dstat =~ s/($String)\s*$Ident/$1/ ||
+ $dstat =~ s/$Ident\s*($String)/$1/)
{
}
+ # Make asm volatile uses seem like a generic function
+ $dstat =~ s/\b_*asm_*\s+_*volatile_*\b/asm_volatile/g;
+
my $exceptions = qr{
$Declare|
module_param_named|
- MODULE_PARAM_DESC|
+ MODULE_PARM_DESC|
DECLARE_PER_CPU|
DEFINE_PER_CPU|
__typeof__\(|
union|
struct|
\.$Ident\s*=\s*|
- ^\"|\"$
+ ^\"|\"$|
+ ^\[
}x;
#print "REST<$rest> dstat<$dstat> ctx<$ctx>\n";
- if ($rest ne '' && $rest ne ',') {
- if ($rest !~ /while\s*\(/ &&
- $dstat !~ /$exceptions/)
- {
+
+ $ctx =~ s/\n*$//;
+ my $stmt_cnt = statement_rawlines($ctx);
+ my $herectx = get_stat_here($linenr, $stmt_cnt, $here);
+
+ if ($dstat ne '' &&
+ $dstat !~ /^(?:$Ident|-?$Constant),$/ && # 10, // foo(),
+ $dstat !~ /^(?:$Ident|-?$Constant);$/ && # foo();
+ $dstat !~ /^[!~-]?(?:$Lval|$Constant)$/ && # 10 // foo() // !foo // ~foo // -foo // foo->bar // foo.bar->baz
+ $dstat !~ /^'X'$/ && $dstat !~ /^'XX'$/ && # character constants
+ $dstat !~ /$exceptions/ &&
+ $dstat !~ /^\.$Ident\s*=/ && # .foo =
+ $dstat !~ /^(?:\#\s*$Ident|\#\s*$Constant)\s*$/ && # stringification #foo
+ $dstat !~ /^do\s*$Constant\s*while\s*$Constant;?$/ && # do {...} while (...); // do {...} while (...)
+ $dstat !~ /^while\s*$Constant\s*$Constant\s*$/ && # while (...) {...}
+ $dstat !~ /^for\s*$Constant$/ && # for (...)
+ $dstat !~ /^for\s*$Constant\s+(?:$Ident|-?$Constant)$/ && # for (...) bar()
+ $dstat !~ /^do\s*{/ && # do {...
+ $dstat !~ /^\(\{/ && # ({...
+ $ctx !~ /^.\s*#\s*define\s+TRACE_(?:SYSTEM|INCLUDE_FILE|INCLUDE_PATH)\b/)
+ {
+ if ($dstat =~ /^\s*if\b/) {
+ ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
+ "Macros starting with if should be enclosed by a do - while loop to avoid possible if/else logic defects\n" . "$herectx");
+ } elsif ($dstat =~ /;/) {
ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
- "Macros with multiple statements should be enclosed in a do - while loop\n" . "$here\n$ctx\n");
+ "Macros with multiple statements should be enclosed in a do - while loop\n" . "$herectx");
+ } else {
+ ERROR("COMPLEX_MACRO",
+ "Macros with complex values should be enclosed in parentheses\n" . "$herectx");
}
- } elsif ($ctx !~ /;/) {
- if ($dstat ne '' &&
- $dstat !~ /^(?:$Ident|-?$Constant)$/ &&
- $dstat !~ /$exceptions/ &&
- $dstat !~ /^\.$Ident\s*=/ &&
- $dstat =~ /$Operators/)
- {
- ERROR("COMPLEX_MACRO",
- "Macros with complex values should be enclosed in parenthesis\n" . "$here\n$ctx\n");
+ }
+
+ # Make $define_stmt single line, comment-free, etc
+ my @stmt_array = split('\n', $define_stmt);
+ my $first = 1;
+ $define_stmt = "";
+ foreach my $l (@stmt_array) {
+ $l =~ s/\\$//;
+ if ($first) {
+ $define_stmt = $l;
+ $first = 0;
+ } elsif ($l =~ /^[\+ ]/) {
+ $define_stmt .= substr($l, 1);
+ }
+ }
+ $define_stmt =~ s/$;//g;
+ $define_stmt =~ s/\s+/ /g;
+ $define_stmt = trim($define_stmt);
+
+# check if any macro arguments are reused (ignore '...' and 'type')
+ foreach my $arg (@def_args) {
+ next if ($arg =~ /\.\.\./);
+ next if ($arg =~ /^type$/i);
+ my $tmp_stmt = $define_stmt;
+ $tmp_stmt =~ s/\b(__must_be_array|offsetof|sizeof|sizeof_field|__stringify|typeof|__typeof__|__builtin\w+|typecheck\s*\(\s*$Type\s*,|\#+)\s*\(*\s*$arg\s*\)*\b//g;
+ $tmp_stmt =~ s/\#+\s*$arg\b//g;
+ $tmp_stmt =~ s/\b$arg\s*\#\#//g;
+ my $use_cnt = () = $tmp_stmt =~ /\b$arg\b/g;
+ if ($use_cnt > 1) {
+ CHK("MACRO_ARG_REUSE",
+ "Macro argument reuse '$arg' - possible side-effects?\n" . "$herectx");
+ }
+# check if any macro arguments may have other precedence issues
+ if ($tmp_stmt =~ m/($Operators)?\s*\b$arg\b\s*($Operators)?/m &&
+ ((defined($1) && $1 ne ',') ||
+ (defined($2) && $2 ne ','))) {
+ CHK("MACRO_ARG_PRECEDENCE",
+ "Macro argument '$arg' may be better as '($arg)' to avoid precedence issues\n" . "$herectx");
}
}
+
+# check for macros with flow control, but without ## concatenation
+# ## concatenation is commonly a macro that defines a function so ignore those
+ if ($has_flow_statement && !$has_arg_concat) {
+ my $cnt = statement_rawlines($ctx);
+ my $herectx = get_stat_here($linenr, $cnt, $here);
+
+ WARN("MACRO_WITH_FLOW_CONTROL",
+ "Macros with flow control statements should be avoided\n" . "$herectx");
+ }
+
+# check for line continuations outside of #defines, preprocessor #, and asm
+
+ } else {
+ if ($prevline !~ /^..*\\$/ &&
+ $line !~ /^\+\s*\#.*\\$/ && # preprocessor
+ $line !~ /^\+.*\b(__asm__|asm)\b.*\\$/ && # asm
+ $line =~ /^\+.*\\$/) {
+ WARN("LINE_CONTINUATIONS",
+ "Avoid unnecessary line continuations\n" . $herecurr);
+ }
}
-# make sure symbols are always wrapped with VMLINUX_SYMBOL() ...
-# all assignments may have only one of the following with an assignment:
-# .
-# ALIGN(...)
-# VMLINUX_SYMBOL(...)
- if ($realfile eq 'vmlinux.lds.h' && $line =~ /(?:(?:^|\s)$Ident\s*=|=\s*$Ident(?:\s|$))/) {
- WARN("MISSING_VMLINUX_SYMBOL",
- "vmlinux.lds.h needs VMLINUX_SYMBOL() around C-visible symbols\n" . $herecurr);
+# do {} while (0) macro tests:
+# single-statement macros do not need to be enclosed in do while (0) loop,
+# macro should not end with a semicolon
+ if ($perl_version_ok &&
+ $realfile !~ m@/vmlinux.lds.h$@ &&
+ $line =~ /^.\s*\#\s*define\s+$Ident(\()?/) {
+ my $ln = $linenr;
+ my $cnt = $realcnt;
+ my ($off, $dstat, $dcond, $rest);
+ my $ctx = '';
+ ($dstat, $dcond, $ln, $cnt, $off) =
+ ctx_statement_block($linenr, $realcnt, 0);
+ $ctx = $dstat;
+
+ $dstat =~ s/\\\n.//g;
+ $dstat =~ s/$;/ /g;
+
+ if ($dstat =~ /^\+\s*#\s*define\s+$Ident\s*${balanced_parens}\s*do\s*{(.*)\s*}\s*while\s*\(\s*0\s*\)\s*([;\s]*)\s*$/) {
+ my $stmts = $2;
+ my $semis = $3;
+
+ $ctx =~ s/\n*$//;
+ my $cnt = statement_rawlines($ctx);
+ my $herectx = get_stat_here($linenr, $cnt, $here);
+
+ if (($stmts =~ tr/;/;/) == 1 &&
+ $stmts !~ /^\s*(if|while|for|switch)\b/) {
+ WARN("SINGLE_STATEMENT_DO_WHILE_MACRO",
+ "Single statement macros should not use a do {} while (0) loop\n" . "$herectx");
+ }
+ if (defined $semis && $semis ne "") {
+ WARN("DO_WHILE_MACRO_WITH_TRAILING_SEMICOLON",
+ "do {} while (0) macros should not be semicolon terminated\n" . "$herectx");
+ }
+ } elsif ($dstat =~ /^\+\s*#\s*define\s+$Ident.*;\s*$/) {
+ $ctx =~ s/\n*$//;
+ my $cnt = statement_rawlines($ctx);
+ my $herectx = get_stat_here($linenr, $cnt, $here);
+
+ WARN("TRAILING_SEMICOLON",
+ "macros should not use a trailing semicolon\n" . "$herectx");
+ }
}
# check for redundant bracing round if etc
@@ -2859,7 +6109,8 @@ sub process {
#print "chunks<$#chunks> linenr<$linenr> endln<$endln> level<$level>\n";
#print "APW: <<$chunks[1][0]>><<$chunks[1][1]>>\n";
if ($#chunks > 0 && $level == 0) {
- my $allowed = 0;
+ my @allowed = ();
+ my $allow = 0;
my $seen = 0;
my $herectx = $here . "\n";
my $ln = $linenr - 1;
@@ -2870,6 +6121,7 @@ sub process {
my ($whitespace) = ($cond =~ /^((?:\s*\n[+-])*\s*)/s);
my $offset = statement_rawlines($whitespace) - 1;
+ $allowed[$allow] = 0;
#print "COND<$cond> whitespace<$whitespace> offset<$offset>\n";
# We have looked at and allowed this specific line.
@@ -2880,25 +6132,36 @@ sub process {
substr($block, 0, length($cond), '');
- $seen++ if ($block =~ /^\s*\{/);
+ $seen++ if ($block =~ /^\s*{/);
- #print "cond<$cond> block<$block> allowed<$allowed>\n";
+ #print "cond<$cond> block<$block> allowed<$allowed[$allow]>\n";
if (statement_lines($cond) > 1) {
#print "APW: ALLOWED: cond<$cond>\n";
- $allowed = 1;
+ $allowed[$allow] = 1;
}
if ($block =~/\b(?:if|for|while)\b/) {
#print "APW: ALLOWED: block<$block>\n";
- $allowed = 1;
+ $allowed[$allow] = 1;
}
if (statement_block_size($block) > 1) {
#print "APW: ALLOWED: lines block<$block>\n";
- $allowed = 1;
+ $allowed[$allow] = 1;
}
+ $allow++;
}
- if ($seen && !$allowed) {
- WARN("BRACES",
- "braces {} are not necessary for any arm of this statement\n" . $herectx);
+ if ($seen) {
+ my $sum_allowed = 0;
+ foreach (@allowed) {
+ $sum_allowed += $_;
+ }
+ if ($sum_allowed == 0) {
+ WARN("BRACES",
+ "braces {} are not necessary for any arm of this statement\n" . $herectx);
+ } elsif ($sum_allowed != $allow &&
+ $seen != $allow) {
+ CHK("BRACES",
+ "braces {} should be used on all arms of this statement\n" . $herectx);
+ }
}
}
}
@@ -2945,71 +6208,377 @@ sub process {
}
}
if ($level == 0 && $block =~ /^\s*\{/ && !$allowed) {
- my $herectx = $here . "\n";
my $cnt = statement_rawlines($block);
-
- for (my $n = 0; $n < $cnt; $n++) {
- $herectx .= raw_line($linenr, $n) . "\n";
- }
+ my $herectx = get_stat_here($linenr, $cnt, $here);
WARN("BRACES",
"braces {} are not necessary for single statement blocks\n" . $herectx);
}
}
-# don't include deprecated include files (uses RAW line)
- for my $inc (@dep_includes) {
- if ($rawline =~ m@^.\s*\#\s*include\s*\<$inc>@) {
- ERROR("DEPRECATED_INCLUDE",
- "Don't use <$inc>: see Documentation/feature-removal-schedule.txt\n" . $herecurr);
- }
+# check for single line unbalanced braces
+ if ($sline =~ /^.\s*\}\s*else\s*$/ ||
+ $sline =~ /^.\s*else\s*\{\s*$/) {
+ CHK("BRACES", "Unbalanced braces around else statement\n" . $herecurr);
}
-# don't use deprecated functions
- for my $func (@dep_functions) {
- if ($line =~ /\b$func\b/) {
- ERROR("DEPRECATED_FUNCTION",
- "Don't use $func(): see Documentation/feature-removal-schedule.txt\n" . $herecurr);
+# check for unnecessary blank lines around braces
+ if (($line =~ /^.\s*}\s*$/ && $prevrawline =~ /^.\s*$/)) {
+ if (CHK("BRACES",
+ "Blank lines aren't necessary before a close brace '}'\n" . $hereprev) &&
+ $fix && $prevrawline =~ /^\+/) {
+ fix_delete_line($fixlinenr - 1, $prevrawline);
+ }
+ }
+ if (($rawline =~ /^.\s*$/ && $prevline =~ /^..*{\s*$/)) {
+ if (CHK("BRACES",
+ "Blank lines aren't necessary after an open brace '{'\n" . $hereprev) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
}
}
# no volatiles please
-# my $asm_volatile = qr{\b(__asm__|asm)\s+(__volatile__|volatile)\b};
-# if ($line =~ /\bvolatile\b/ && $line !~ /$asm_volatile/) {
-# WARN("VOLATILE",
-# "Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt\n" . $herecurr);
-# }
+ my $asm_volatile = qr{\b(__asm__|asm)\s+(__volatile__|volatile)\b};
+ if ($line =~ /\bvolatile\b/ && $line !~ /$asm_volatile/) {
+ WARN("VOLATILE",
+ "Use of volatile is usually wrong: see Documentation/process/volatile-considered-harmful.rst\n" . $herecurr);
+ }
+
+# Check for user-visible strings broken across lines, which breaks the ability
+# to grep for the string. Make exceptions when the previous string ends in a
+# newline (multiple lines in one string constant) or '\t', '\r', ';', or '{'
+# (common in inline assembly) or is a octal \123 or hexadecimal \xaf value
+ if ($line =~ /^\+\s*$String/ &&
+ $prevline =~ /"\s*$/ &&
+ $prevrawline !~ /(?:\\(?:[ntr]|[0-7]{1,3}|x[0-9a-fA-F]{1,2})|;\s*|\{\s*)"\s*$/) {
+ if (WARN("SPLIT_STRING",
+ "quoted string split across lines\n" . $hereprev) &&
+ $fix &&
+ $prevrawline =~ /^\+.*"\s*$/ &&
+ $last_coalesced_string_linenr != $linenr - 1) {
+ my $extracted_string = get_quoted_string($line, $rawline);
+ my $comma_close = "";
+ if ($rawline =~ /\Q$extracted_string\E(\s*\)\s*;\s*$|\s*,\s*)/) {
+ $comma_close = $1;
+ }
+
+ fix_delete_line($fixlinenr - 1, $prevrawline);
+ fix_delete_line($fixlinenr, $rawline);
+ my $fixedline = $prevrawline;
+ $fixedline =~ s/"\s*$//;
+ $fixedline .= substr($extracted_string, 1) . trim($comma_close);
+ fix_insert_line($fixlinenr - 1, $fixedline);
+ $fixedline = $rawline;
+ $fixedline =~ s/\Q$extracted_string\E\Q$comma_close\E//;
+ if ($fixedline !~ /\+\s*$/) {
+ fix_insert_line($fixlinenr, $fixedline);
+ }
+ $last_coalesced_string_linenr = $linenr;
+ }
+ }
+
+# check for missing a space in a string concatenation
+ if ($prevrawline =~ /[^\\]\w"$/ && $rawline =~ /^\+[\t ]+"\w/) {
+ WARN('MISSING_SPACE',
+ "break quoted strings at a space character\n" . $hereprev);
+ }
+
+# check for an embedded function name in a string when the function is known
+# This does not work very well for -f --file checking as it depends on patch
+# context providing the function name or a single line form for in-file
+# function declarations
+ if ($line =~ /^\+.*$String/ &&
+ defined($context_function) &&
+ get_quoted_string($line, $rawline) =~ /\b$context_function\b/ &&
+ length(get_quoted_string($line, $rawline)) != (length($context_function) + 2)) {
+ WARN("EMBEDDED_FUNCTION_NAME",
+ "Prefer using '\"%s...\", __func__' to using '$context_function', this function's name, in a string\n" . $herecurr);
+ }
+
+# check for unnecessary function tracing like uses
+# This does not use $logFunctions because there are many instances like
+# 'dprintk(FOO, "%s()\n", __func__);' which do not match $logFunctions
+ if ($rawline =~ /^\+.*\([^"]*"$tracing_logging_tags{0,3}%s(?:\s*\(\s*\)\s*)?$tracing_logging_tags{0,3}(?:\\n)?"\s*,\s*__func__\s*\)\s*;/) {
+ if (WARN("TRACING_LOGGING",
+ "Unnecessary ftrace-like logging - prefer using ftrace\n" . $herecurr) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ }
+ }
+
+# check for spaces before a quoted newline
+ if ($rawline =~ /^.*\".*\s\\n/) {
+ if (WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE",
+ "unnecessary whitespace before a quoted newline\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^(\+.*\".*)\s+\\n/$1\\n/;
+ }
+
+ }
+
+# concatenated string without spaces between elements
+ if ($line =~ /$String[A-Z_]/ ||
+ ($line =~ /([A-Za-z0-9_]+)$String/ && $1 !~ /^[Lu]$/)) {
+ if (CHK("CONCATENATED_STRING",
+ "Concatenated strings should use spaces between elements\n" . $herecurr) &&
+ $fix) {
+ while ($line =~ /($String)/g) {
+ my $extracted_string = substr($rawline, $-[0], $+[0] - $-[0]);
+ $fixed[$fixlinenr] =~ s/\Q$extracted_string\E([A-Za-z0-9_])/$extracted_string $1/;
+ $fixed[$fixlinenr] =~ s/([A-Za-z0-9_])\Q$extracted_string\E/$1 $extracted_string/;
+ }
+ }
+ }
+
+# uncoalesced string fragments
+ if ($line =~ /$String\s*[Lu]?"/) {
+ if (WARN("STRING_FRAGMENTS",
+ "Consecutive strings are generally better as a single string\n" . $herecurr) &&
+ $fix) {
+ while ($line =~ /($String)(?=\s*")/g) {
+ my $extracted_string = substr($rawline, $-[0], $+[0] - $-[0]);
+ $fixed[$fixlinenr] =~ s/\Q$extracted_string\E\s*"/substr($extracted_string, 0, -1)/e;
+ }
+ }
+ }
+
+# check for non-standard and hex prefixed decimal printf formats
+ my $show_L = 1; #don't show the same defect twice
+ my $show_Z = 1;
+ while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) {
+ my $string = substr($rawline, $-[1], $+[1] - $-[1]);
+ $string =~ s/%%/__/g;
+ # check for %L
+ if ($show_L && $string =~ /%[\*\d\.\$]*L([diouxX])/) {
+ WARN("PRINTF_L",
+ "\%L$1 is non-standard C, use %ll$1\n" . $herecurr);
+ $show_L = 0;
+ }
+ # check for %Z
+ if ($show_Z && $string =~ /%[\*\d\.\$]*Z([diouxX])/) {
+ WARN("PRINTF_Z",
+ "%Z$1 is non-standard C, use %z$1\n" . $herecurr);
+ $show_Z = 0;
+ }
+ # check for 0x<decimal>
+ if ($string =~ /0x%[\*\d\.\$\Llzth]*[diou]/) {
+ ERROR("PRINTF_0XDECIMAL",
+ "Prefixing 0x with decimal output is defective\n" . $herecurr);
+ }
+ }
+
+# check for line continuations in quoted strings with odd counts of "
+ if ($rawline =~ /\\$/ && $sline =~ tr/"/"/ % 2) {
+ WARN("LINE_CONTINUATIONS",
+ "Avoid line continuations in quoted strings\n" . $herecurr);
+ }
# warn about #if 0
if ($line =~ /^.\s*\#\s*if\s+0\b/) {
- CHK("REDUNDANT_CODE",
- "if this code is redundant consider removing it\n" .
- $herecurr);
+ WARN("IF_0",
+ "Consider removing the code enclosed by this #if 0 and its #endif\n" . $herecurr);
+ }
+
+# warn about #if 1
+ if ($line =~ /^.\s*\#\s*if\s+1\b/) {
+ WARN("IF_1",
+ "Consider removing the #if 1 and its #endif\n" . $herecurr);
+ }
+
+# check for needless "if (<foo>) fn(<foo>)" uses
+ if ($prevline =~ /\bif\s*\(\s*($Lval)\s*\)/) {
+ my $tested = quotemeta($1);
+ my $expr = '\s*\(\s*' . $tested . '\s*\)\s*;';
+ if ($line =~ /\b(kfree|usb_free_urb|debugfs_remove(?:_recursive)?|(?:kmem_cache|mempool|dma_pool)_destroy)$expr/) {
+ my $func = $1;
+ if (WARN('NEEDLESS_IF',
+ "$func(NULL) is safe and this check is probably not required\n" . $hereprev) &&
+ $fix) {
+ my $do_fix = 1;
+ my $leading_tabs = "";
+ my $new_leading_tabs = "";
+ if ($lines[$linenr - 2] =~ /^\+(\t*)if\s*\(\s*$tested\s*\)\s*$/) {
+ $leading_tabs = $1;
+ } else {
+ $do_fix = 0;
+ }
+ if ($lines[$linenr - 1] =~ /^\+(\t+)$func\s*\(\s*$tested\s*\)\s*;\s*$/) {
+ $new_leading_tabs = $1;
+ if (length($leading_tabs) + 1 ne length($new_leading_tabs)) {
+ $do_fix = 0;
+ }
+ } else {
+ $do_fix = 0;
+ }
+ if ($do_fix) {
+ fix_delete_line($fixlinenr - 1, $prevrawline);
+ $fixed[$fixlinenr] =~ s/^\+$new_leading_tabs/\+$leading_tabs/;
+ }
+ }
+ }
+ }
+
+# check for unnecessary "Out of Memory" messages
+ if ($line =~ /^\+.*\b$logFunctions\s*\(/ &&
+ $prevline =~ /^[ \+]\s*if\s*\(\s*(\!\s*|NULL\s*==\s*)?($Lval)(\s*==\s*NULL\s*)?\s*\)/ &&
+ (defined $1 || defined $3) &&
+ $linenr > 3) {
+ my $testval = $2;
+ my $testline = $lines[$linenr - 3];
+
+ my ($s, $c) = ctx_statement_block($linenr - 3, $realcnt, 0);
+# print("line: <$line>\nprevline: <$prevline>\ns: <$s>\nc: <$c>\n\n\n");
+
+ if ($s =~ /(?:^|\n)[ \+]\s*(?:$Type\s*)?\Q$testval\E\s*=\s*(?:\([^\)]*\)\s*)?\s*$allocFunctions\s*\(/ &&
+ $s !~ /\b__GFP_NOWARN\b/ ) {
+ WARN("OOM_MESSAGE",
+ "Possible unnecessary 'out of memory' message\n" . $hereprev);
+ }
}
-# check for needless kfree() checks
- if ($prevline =~ /\bif\s*\(([^\)]*)\)/) {
- my $expr = $1;
- if ($line =~ /\bkfree\(\Q$expr\E\);/) {
- WARN("NEEDLESS_KFREE",
- "kfree(NULL) is safe this check is probably not required\n" . $hereprev);
+# check for logging functions with KERN_<LEVEL>
+ if ($line !~ /printk(?:_ratelimited|_once)?\s*\(/ &&
+ $line =~ /\b$logFunctions\s*\(.*\b(KERN_[A-Z]+)\b/) {
+ my $level = $1;
+ if (WARN("UNNECESSARY_KERN_LEVEL",
+ "Possible unnecessary $level\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\s*$level\s*//;
}
}
-# check for needless usb_free_urb() checks
- if ($prevline =~ /\bif\s*\(([^\)]*)\)/) {
- my $expr = $1;
- if ($line =~ /\busb_free_urb\(\Q$expr\E\);/) {
- WARN("NEEDLESS_USB_FREE_URB",
- "usb_free_urb(NULL) is safe this check is probably not required\n" . $hereprev);
+
+# check for logging continuations
+ if ($line =~ /\bprintk\s*\(\s*KERN_CONT\b|\bpr_cont\s*\(/) {
+ WARN("LOGGING_CONTINUATION",
+ "Avoid logging continuation uses where feasible\n" . $herecurr);
+ }
+
+# check for unnecessary use of %h[xudi] and %hh[xudi] in logging functions
+ if (defined $stat &&
+ $line =~ /\b$logFunctions\s*\(/ &&
+ index($stat, '"') >= 0) {
+ my $lc = $stat =~ tr@\n@@;
+ $lc = $lc + $linenr;
+ my $stat_real = get_stat_real($linenr, $lc);
+ pos($stat_real) = index($stat_real, '"');
+ while ($stat_real =~ /[^\"%]*(%[\#\d\.\*\-]*(h+)[idux])/g) {
+ my $pspec = $1;
+ my $h = $2;
+ my $lineoff = substr($stat_real, 0, $-[1]) =~ tr@\n@@;
+ if (WARN("UNNECESSARY_MODIFIER",
+ "Integer promotion: Using '$h' in '$pspec' is unnecessary\n" . "$here\n$stat_real\n") &&
+ $fix && $fixed[$fixlinenr + $lineoff] =~ /^\+/) {
+ my $nspec = $pspec;
+ $nspec =~ s/h//g;
+ $fixed[$fixlinenr + $lineoff] =~ s/\Q$pspec\E/$nspec/;
+ }
+ }
+ }
+
+# check for mask then right shift without a parentheses
+ if ($perl_version_ok &&
+ $line =~ /$LvalOrFunc\s*\&\s*($LvalOrFunc)\s*>>/ &&
+ $4 !~ /^\&/) { # $LvalOrFunc may be &foo, ignore if so
+ WARN("MASK_THEN_SHIFT",
+ "Possible precedence defect with mask then right shift - may need parentheses\n" . $herecurr);
+ }
+
+# check for pointer comparisons to NULL
+ if ($perl_version_ok) {
+ while ($line =~ /\b$LvalOrFunc\s*(==|\!=)\s*NULL\b/g) {
+ my $val = $1;
+ my $equal = "!";
+ $equal = "" if ($4 eq "!=");
+ if (CHK("COMPARISON_TO_NULL",
+ "Comparison to NULL could be written \"${equal}${val}\"\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b\Q$val\E\s*(?:==|\!=)\s*NULL\b/$equal$val/;
+ }
+ }
+ }
+
+# check for bad placement of section $InitAttribute (e.g.: __initdata)
+ if ($line =~ /(\b$InitAttribute\b)/) {
+ my $attr = $1;
+ if ($line =~ /^\+\s*static\s+(?:const\s+)?(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*[=;]/) {
+ my $ptr = $1;
+ my $var = $2;
+ if ((($ptr =~ /\b(union|struct)\s+$attr\b/ &&
+ ERROR("MISPLACED_INIT",
+ "$attr should be placed after $var\n" . $herecurr)) ||
+ ($ptr !~ /\b(union|struct)\s+$attr\b/ &&
+ WARN("MISPLACED_INIT",
+ "$attr should be placed after $var\n" . $herecurr))) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(\bstatic\s+(?:const\s+)?)(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*([=;])\s*/"$1" . trim(string_find_replace($2, "\\s*$attr\\s*", " ")) . " " . trim(string_find_replace($3, "\\s*$attr\\s*", "")) . " $attr" . ("$4" eq ";" ? ";" : " = ")/e;
+ }
+ }
+ }
+
+# check for $InitAttributeData (ie: __initdata) with const
+ if ($line =~ /\bconst\b/ && $line =~ /($InitAttributeData)/) {
+ my $attr = $1;
+ $attr =~ /($InitAttributePrefix)(.*)/;
+ my $attr_prefix = $1;
+ my $attr_type = $2;
+ if (ERROR("INIT_ATTRIBUTE",
+ "Use of const init definition must use ${attr_prefix}initconst\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/$InitAttributeData/${attr_prefix}initconst/;
+ }
+ }
+
+# check for $InitAttributeConst (ie: __initconst) without const
+ if ($line !~ /\bconst\b/ && $line =~ /($InitAttributeConst)/) {
+ my $attr = $1;
+ if (ERROR("INIT_ATTRIBUTE",
+ "Use of $attr requires a separate use of const\n" . $herecurr) &&
+ $fix) {
+ my $lead = $fixed[$fixlinenr] =~
+ /(^\+\s*(?:static\s+))/;
+ $lead = rtrim($1);
+ $lead = "$lead " if ($lead !~ /^\+$/);
+ $lead = "${lead}const ";
+ $fixed[$fixlinenr] =~ s/(^\+\s*(?:static\s+))/$lead/;
+ }
+ }
+
+# check for __read_mostly with const non-pointer (should just be const)
+ if ($line =~ /\b__read_mostly\b/ &&
+ $line =~ /($Type)\s*$Ident/ && $1 !~ /\*\s*$/ && $1 =~ /\bconst\b/) {
+ if (ERROR("CONST_READ_MOSTLY",
+ "Invalid use of __read_mostly with const type\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\s+__read_mostly\b//;
+ }
+ }
+
+# don't use __constant_<foo> functions outside of include/uapi/
+ if ($realfile !~ m@^include/uapi/@ &&
+ $line =~ /(__constant_(?:htons|ntohs|[bl]e(?:16|32|64)_to_cpu|cpu_to_[bl]e(?:16|32|64)))\s*\(/) {
+ my $constant_func = $1;
+ my $func = $constant_func;
+ $func =~ s/^__constant_//;
+ if (WARN("CONSTANT_CONVERSION",
+ "$constant_func should be $func\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b$constant_func\b/$func/g;
}
}
# prefer usleep_range over udelay
- if ($line =~ /\budelay\s*\(\s*(\w+)\s*\)/) {
+ if ($line =~ /\budelay\s*\(\s*(\d+)\s*\)/) {
+ my $delay = $1;
# ignore udelay's < 10, however
- if (! (($1 =~ /(\d+)/) && ($1 < 10)) ) {
+ if (! ($delay < 10) ) {
CHK("USLEEP_RANGE",
- "usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt\n" . $line);
+ "usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst\n" . $herecurr);
+ }
+ if ($delay > 2000) {
+ WARN("LONG_UDELAY",
+ "long udelay - prefer mdelay; see arch/arm/include/asm/delay.h\n" . $herecurr);
}
}
@@ -3017,10 +6586,22 @@ sub process {
if ($line =~ /\bmsleep\s*\((\d+)\);/) {
if ($1 < 20) {
WARN("MSLEEP",
- "msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt\n" . $line);
+ "msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.rst\n" . $herecurr);
}
}
+# check for comparisons of jiffies
+ if ($line =~ /\bjiffies\s*$Compare|$Compare\s*jiffies\b/) {
+ WARN("JIFFIES_COMPARISON",
+ "Comparing jiffies is almost always wrong; prefer time_after, time_before and friends\n" . $herecurr);
+ }
+
+# check for comparisons of get_jiffies_64()
+ if ($line =~ /\bget_jiffies_64\s*\(\s*\)\s*$Compare|$Compare\s*get_jiffies_64\s*\(\s*\)/) {
+ WARN("JIFFIES_COMPARISON",
+ "Comparing get_jiffies_64() is almost always wrong; prefer time_after64, time_before64 and friends\n" . $herecurr);
+ }
+
# warn about #ifdefs in C files
# if ($line =~ /^.\s*\#\s*if(|n)def/ && ($realfile =~ /\.c$/)) {
# print "#ifdef in C files should be avoided\n";
@@ -3030,8 +6611,13 @@ sub process {
# warn about spacing in #ifdefs
if ($line =~ /^.\s*\#\s*(ifdef|ifndef|elif)\s\s+/) {
- ERROR("SPACING",
- "exactly one space required after that #$1\n" . $herecurr);
+ if (ERROR("SPACING",
+ "exactly one space required after that #$1\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~
+ s/^(.\s*\#\s*(ifdef|ifndef|elif))\s{2,}/$1 /;
+ }
+
}
# check for spinlock_t definitions without a comment.
@@ -3044,22 +6630,77 @@ sub process {
}
}
# check for memory barriers without a comment.
- if ($line =~ /\b(mb|rmb|wmb|read_barrier_depends|smp_mb|smp_rmb|smp_wmb|smp_read_barrier_depends)\(/) {
+
+ my $barriers = qr{
+ mb|
+ rmb|
+ wmb
+ }x;
+ my $barrier_stems = qr{
+ mb__before_atomic|
+ mb__after_atomic|
+ store_release|
+ load_acquire|
+ store_mb|
+ (?:$barriers)
+ }x;
+ my $all_barriers = qr{
+ (?:$barriers)|
+ smp_(?:$barrier_stems)|
+ virt_(?:$barrier_stems)
+ }x;
+
+ if ($line =~ /\b(?:$all_barriers)\s*\(/) {
+ if (!ctx_has_comment($first_line, $linenr)) {
+ WARN("MEMORY_BARRIER",
+ "memory barrier without comment\n" . $herecurr);
+ }
+ }
+
+ my $underscore_smp_barriers = qr{__smp_(?:$barrier_stems)}x;
+
+ if ($realfile !~ m@^include/asm-generic/@ &&
+ $realfile !~ m@/barrier\.h$@ &&
+ $line =~ m/\b(?:$underscore_smp_barriers)\s*\(/ &&
+ $line !~ m/^.\s*\#\s*define\s+(?:$underscore_smp_barriers)\s*\(/) {
+ WARN("MEMORY_BARRIER",
+ "__smp memory barriers shouldn't be used outside barrier.h and asm-generic\n" . $herecurr);
+ }
+
+# check for waitqueue_active without a comment.
+ if ($line =~ /\bwaitqueue_active\s*\(/) {
if (!ctx_has_comment($first_line, $linenr)) {
- CHK("MEMORY_BARRIER",
- "memory barrier without comment\n" . $herecurr);
+ WARN("WAITQUEUE_ACTIVE",
+ "waitqueue_active without comment\n" . $herecurr);
}
}
+
+# check for data_race without a comment.
+ if ($line =~ /\bdata_race\s*\(/) {
+ if (!ctx_has_comment($first_line, $linenr)) {
+ WARN("DATA_RACE",
+ "data_race without comment\n" . $herecurr);
+ }
+ }
+
# check of hardware specific defines
if ($line =~ m@^.\s*\#\s*if.*\b(__i386__|__powerpc64__|__sun__|__s390x__)\b@ && $realfile !~ m@include/asm-@) {
CHK("ARCH_DEFINES",
"architecture specific defines should be avoided\n" . $herecurr);
}
+# check that the storage class is not after a type
+ if ($line =~ /\b($Type)\s+($Storage)\b/) {
+ WARN("STORAGE_CLASS",
+ "storage class '$2' should be located before type '$1'\n" . $herecurr);
+ }
# Check that the storage class is at the beginning of a declaration
- if ($line =~ /\b$Storage\b/ && $line !~ /^.\s*$Storage\b/) {
+ if ($line =~ /\b$Storage\b/ &&
+ $line !~ /^.\s*$Storage/ &&
+ $line =~ /^.\s*(.+?)\$Storage\s/ &&
+ $1 !~ /[\,\)]\s*$/) {
WARN("STORAGE_CLASS",
- "storage class should be at the beginning of the declaration\n" . $herecurr)
+ "storage class should be at the beginning of the declaration\n" . $herecurr);
}
# check the location of the inline attribute, that it is between
@@ -3071,22 +6712,128 @@ sub process {
}
# Check for __inline__ and __inline, prefer inline
- if ($line =~ /\b(__inline__|__inline)\b/) {
- WARN("INLINE",
- "plain inline is preferred over $1\n" . $herecurr);
+ if ($realfile !~ m@\binclude/uapi/@ &&
+ $line =~ /\b(__inline__|__inline)\b/) {
+ if (WARN("INLINE",
+ "plain inline is preferred over $1\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b(__inline__|__inline)\b/inline/;
+
+ }
}
-# Check for __attribute__ packed, prefer __packed
-# if ($line =~ /\b__attribute__\s*\(\s*\(.*\bpacked\b/) {
-# WARN("PREFER_PACKED",
-# "__packed is preferred over __attribute__((packed))\n" . $herecurr);
-# }
+# Check for compiler attributes
+ if ($realfile !~ m@\binclude/uapi/@ &&
+ $rawline =~ /\b__attribute__\s*\(\s*($balanced_parens)\s*\)/) {
+ my $attr = $1;
+ $attr =~ s/\s*\(\s*(.*)\)\s*/$1/;
+
+ my %attr_list = (
+ "alias" => "__alias",
+ "aligned" => "__aligned",
+ "always_inline" => "__always_inline",
+ "assume_aligned" => "__assume_aligned",
+ "cold" => "__cold",
+ "const" => "__attribute_const__",
+ "copy" => "__copy",
+ "designated_init" => "__designated_init",
+ "externally_visible" => "__visible",
+ "format" => "printf|scanf",
+ "gnu_inline" => "__gnu_inline",
+ "malloc" => "__malloc",
+ "mode" => "__mode",
+ "no_caller_saved_registers" => "__no_caller_saved_registers",
+ "noclone" => "__noclone",
+ "noinline" => "noinline",
+ "nonstring" => "__nonstring",
+ "noreturn" => "__noreturn",
+ "packed" => "__packed",
+ "pure" => "__pure",
+ "section" => "__section",
+ "used" => "__used",
+ "weak" => "__weak"
+ );
+
+ while ($attr =~ /\s*(\w+)\s*(${balanced_parens})?/g) {
+ my $orig_attr = $1;
+ my $params = '';
+ $params = $2 if defined($2);
+ my $curr_attr = $orig_attr;
+ $curr_attr =~ s/^[\s_]+|[\s_]+$//g;
+ if (exists($attr_list{$curr_attr})) {
+ my $new = $attr_list{$curr_attr};
+ if ($curr_attr eq "format" && $params) {
+ $params =~ /^\s*\(\s*(\w+)\s*,\s*(.*)/;
+ $new = "__$1\($2";
+ } else {
+ $new = "$new$params";
+ }
+ if (WARN("PREFER_DEFINED_ATTRIBUTE_MACRO",
+ "Prefer $new over __attribute__(($orig_attr$params))\n" . $herecurr) &&
+ $fix) {
+ my $remove = "\Q$orig_attr\E" . '\s*' . "\Q$params\E" . '(?:\s*,\s*)?';
+ $fixed[$fixlinenr] =~ s/$remove//;
+ $fixed[$fixlinenr] =~ s/\b__attribute__/$new __attribute__/;
+ $fixed[$fixlinenr] =~ s/\}\Q$new\E/} $new/;
+ $fixed[$fixlinenr] =~ s/ __attribute__\s*\(\s*\(\s*\)\s*\)//;
+ }
+ }
+ }
-# Check for __attribute__ aligned, prefer __aligned
-# if ($line =~ /\b__attribute__\s*\(\s*\(.*aligned/) {
-# WARN("PREFER_ALIGNED",
-# "__aligned(size) is preferred over __attribute__((aligned(size)))\n" . $herecurr);
-# }
+ # Check for __attribute__ unused, prefer __always_unused or __maybe_unused
+ if ($attr =~ /^_*unused/) {
+ WARN("PREFER_DEFINED_ATTRIBUTE_MACRO",
+ "__always_unused or __maybe_unused is preferred over __attribute__((__unused__))\n" . $herecurr);
+ }
+ }
+
+# Check for __attribute__ weak, or __weak declarations (may have link issues)
+ if ($perl_version_ok &&
+ $line =~ /(?:$Declare|$DeclareMisordered)\s*$Ident\s*$balanced_parens\s*(?:$Attribute)?\s*;/ &&
+ ($line =~ /\b__attribute__\s*\(\s*\(.*\bweak\b/ ||
+ $line =~ /\b__weak\b/)) {
+ ERROR("WEAK_DECLARATION",
+ "Using weak declarations can have unintended link defects\n" . $herecurr);
+ }
+
+# check for c99 types like uint8_t used outside of uapi/ and tools/
+ if ($realfile !~ m@\binclude/uapi/@ &&
+ $realfile !~ m@\btools/@ &&
+ $line =~ /\b($Declare)\s*$Ident\s*[=;,\[]/) {
+ my $type = $1;
+ if ($type =~ /\b($typeC99Typedefs)\b/) {
+ $type = $1;
+ my $kernel_type = 'u';
+ $kernel_type = 's' if ($type =~ /^_*[si]/);
+ $type =~ /(\d+)/;
+ $kernel_type .= $1;
+ if (CHK("PREFER_KERNEL_TYPES",
+ "Prefer kernel type '$kernel_type' over '$type'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b$type\b/$kernel_type/;
+ }
+ }
+ }
+
+# check for cast of C90 native int or longer types constants
+ if ($line =~ /(\(\s*$C90_int_types\s*\)\s*)($Constant)\b/) {
+ my $cast = $1;
+ my $const = $2;
+ my $suffix = "";
+ my $newconst = $const;
+ $newconst =~ s/${Int_type}$//;
+ $suffix .= 'U' if ($cast =~ /\bunsigned\b/);
+ if ($cast =~ /\blong\s+long\b/) {
+ $suffix .= 'LL';
+ } elsif ($cast =~ /\blong\b/) {
+ $suffix .= 'L';
+ }
+ if (WARN("TYPECAST_INT_CONSTANT",
+ "Unnecessary typecast of c90 int constant - '$cast$const' could be '$const$suffix'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$cast\E$const\b/$newconst$suffix/;
+ }
+ }
# check for sizeof(&)
if ($line =~ /\bsizeof\s*\(\s*\&/) {
@@ -3094,156 +6841,573 @@ sub process {
"sizeof(& should be avoided\n" . $herecurr);
}
-# check for line continuations in quoted strings with odd counts of "
- if ($rawline =~ /\\$/ && $rawline =~ tr/"/"/ % 2) {
- WARN("LINE_CONTINUATIONS",
- "Avoid line continuations in quoted strings\n" . $herecurr);
+# check for sizeof without parenthesis
+ if ($line =~ /\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/) {
+ if (WARN("SIZEOF_PARENTHESIS",
+ "sizeof $1 should be sizeof($1)\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/"sizeof(" . trim($1) . ")"/ex;
+ }
}
-# check for new externs in .c files.
-# if ($realfile =~ /\.c$/ && defined $stat &&
-# $stat =~ /^.\s*(?:extern\s+)?$Type\s+($Ident)(\s*)\(/s)
-# {
-# my $function_name = $1;
-# my $paren_space = $2;
-#
-# my $s = $stat;
-# if (defined $cond) {
-# substr($s, 0, length($cond), '');
-# }
-# if ($s =~ /^\s*;/ &&
-# $function_name ne 'uninitialized_var')
-# {
-# WARN("AVOID_EXTERNS",
-# "externs should be avoided in .c files\n" . $herecurr);
+# check for struct spinlock declarations
+ if ($line =~ /^.\s*\bstruct\s+spinlock\s+\w+\s*;/) {
+ WARN("USE_SPINLOCK_T",
+ "struct spinlock should be spinlock_t\n" . $herecurr);
+ }
+
+# check for seq_printf uses that could be seq_puts
+ if ($sline =~ /\bseq_printf\s*\(.*"\s*\)\s*;\s*$/) {
+ my $fmt = get_quoted_string($line, $rawline);
+ $fmt =~ s/%%//g;
+ if ($fmt !~ /%/) {
+ if (WARN("PREFER_SEQ_PUTS",
+ "Prefer seq_puts to seq_printf\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bseq_printf\b/seq_puts/;
+ }
+ }
+ }
+
+# check for vsprintf extension %p<foo> misuses
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /^\+(?![^\{]*\{\s*).*\b(\w+)\s*\(.*$String\s*,/s &&
+ $1 !~ /^_*volatile_*$/) {
+ my $stat_real;
+
+ my $lc = $stat =~ tr@\n@@;
+ $lc = $lc + $linenr;
+ for (my $count = $linenr; $count <= $lc; $count++) {
+ my $specifier;
+ my $extension;
+ my $qualifier;
+ my $bad_specifier = "";
+ my $fmt = get_quoted_string($lines[$count - 1], raw_line($count, 0));
+ $fmt =~ s/%%//g;
+
+ while ($fmt =~ /(\%[\*\d\.]*p(\w)(\w*))/g) {
+ $specifier = $1;
+ $extension = $2;
+ $qualifier = $3;
+ if ($extension !~ /[4SsBKRraEehMmIiUDdgVCbGNOxtf]/ ||
+ ($extension eq "f" &&
+ defined $qualifier && $qualifier !~ /^w/) ||
+ ($extension eq "4" &&
+ defined $qualifier && $qualifier !~ /^cc/)) {
+ $bad_specifier = $specifier;
+ last;
+ }
+ if ($extension eq "x" && !defined($stat_real)) {
+ if (!defined($stat_real)) {
+ $stat_real = get_stat_real($linenr, $lc);
+ }
+ WARN("VSPRINTF_SPECIFIER_PX",
+ "Using vsprintf specifier '\%px' potentially exposes the kernel memory layout, if you don't really need the address please consider using '\%p'.\n" . "$here\n$stat_real\n");
+ }
+ }
+ if ($bad_specifier ne "") {
+ my $stat_real = get_stat_real($linenr, $lc);
+ my $ext_type = "Invalid";
+ my $use = "";
+ if ($bad_specifier =~ /p[Ff]/) {
+ $use = " - use %pS instead";
+ $use =~ s/pS/ps/ if ($bad_specifier =~ /pf/);
+ }
+
+ WARN("VSPRINTF_POINTER_EXTENSION",
+ "$ext_type vsprintf pointer extension '$bad_specifier'$use\n" . "$here\n$stat_real\n");
+ }
+ }
+ }
+
+# Check for misused memsets
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*$FuncArg\s*\)/) {
+
+ my $ms_addr = $2;
+ my $ms_val = $7;
+ my $ms_size = $12;
+
+ if ($ms_size =~ /^(0x|)0$/i) {
+ ERROR("MEMSET",
+ "memset to 0's uses 0 as the 2nd argument, not the 3rd\n" . "$here\n$stat\n");
+ } elsif ($ms_size =~ /^(0x|)1$/i) {
+ WARN("MEMSET",
+ "single byte memset is suspicious. Swapped 2nd/3rd argument?\n" . "$here\n$stat\n");
+ }
+ }
+
+# Check for memcpy(foo, bar, ETH_ALEN) that could be ether_addr_copy(foo, bar)
+# if ($perl_version_ok &&
+# defined $stat &&
+# $stat =~ /^\+(?:.*?)\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+# if (WARN("PREFER_ETHER_ADDR_COPY",
+# "Prefer ether_addr_copy() over memcpy() if the Ethernet addresses are __aligned(2)\n" . "$here\n$stat\n") &&
+# $fix) {
+# $fixed[$fixlinenr] =~ s/\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/ether_addr_copy($2, $7)/;
# }
+# }
+
+# Check for memcmp(foo, bar, ETH_ALEN) that could be ether_addr_equal*(foo, bar)
+# if ($perl_version_ok &&
+# defined $stat &&
+# $stat =~ /^\+(?:.*?)\bmemcmp\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+# WARN("PREFER_ETHER_ADDR_EQUAL",
+# "Prefer ether_addr_equal() or ether_addr_equal_unaligned() over memcmp()\n" . "$here\n$stat\n")
+# }
+
+# check for memset(foo, 0x0, ETH_ALEN) that could be eth_zero_addr
+# check for memset(foo, 0xFF, ETH_ALEN) that could be eth_broadcast_addr
+# if ($perl_version_ok &&
+# defined $stat &&
+# $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
#
-# if ($paren_space =~ /\n/) {
-# WARN("FUNCTION_ARGUMENTS",
-# "arguments for function declarations should follow identifier\n" . $herecurr);
-# }
+# my $ms_val = $7;
#
-# } elsif ($realfile =~ /\.c$/ && defined $stat &&
-# $stat =~ /^.\s*extern\s+/)
-# {
-# WARN("AVOID_EXTERNS",
-# "externs should be avoided in .c files\n" . $herecurr);
+# if ($ms_val =~ /^(?:0x|)0+$/i) {
+# if (WARN("PREFER_ETH_ZERO_ADDR",
+# "Prefer eth_zero_addr over memset()\n" . "$here\n$stat\n") &&
+# $fix) {
+# $fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_zero_addr($2)/;
+# }
+# } elsif ($ms_val =~ /^(?:0xff|255)$/i) {
+# if (WARN("PREFER_ETH_BROADCAST_ADDR",
+# "Prefer eth_broadcast_addr() over memset()\n" . "$here\n$stat\n") &&
+# $fix) {
+# $fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_broadcast_addr($2)/;
+# }
+# }
# }
+# strlcpy uses that should likely be strscpy
+ if ($line =~ /\bstrlcpy\s*\(/) {
+ WARN("STRLCPY",
+ "Prefer strscpy over strlcpy - see: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw\@mail.gmail.com/\n" . $herecurr);
+ }
+
+# typecasts on min/max could be min_t/max_t
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /^\+(?:.*?)\b(min|max)\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\)/) {
+ if (defined $2 || defined $7) {
+ my $call = $1;
+ my $cast1 = deparenthesize($2);
+ my $arg1 = $3;
+ my $cast2 = deparenthesize($7);
+ my $arg2 = $8;
+ my $cast;
+
+ if ($cast1 ne "" && $cast2 ne "" && $cast1 ne $cast2) {
+ $cast = "$cast1 or $cast2";
+ } elsif ($cast1 ne "") {
+ $cast = $cast1;
+ } else {
+ $cast = $cast2;
+ }
+ WARN("MINMAX",
+ "$call() should probably be ${call}_t($cast, $arg1, $arg2)\n" . "$here\n$stat\n");
+ }
+ }
+
+# check usleep_range arguments
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /^\+(?:.*?)\busleep_range\s*\(\s*($FuncArg)\s*,\s*($FuncArg)\s*\)/) {
+ my $min = $1;
+ my $max = $7;
+ if ($min eq $max) {
+ WARN("USLEEP_RANGE",
+ "usleep_range should not use min == max args; see Documentation/timers/timers-howto.rst\n" . "$here\n$stat\n");
+ } elsif ($min =~ /^\d+$/ && $max =~ /^\d+$/ &&
+ $min > $max) {
+ WARN("USLEEP_RANGE",
+ "usleep_range args reversed, use min then max; see Documentation/timers/timers-howto.rst\n" . "$here\n$stat\n");
+ }
+ }
+
+# check for naked sscanf
+ if ($perl_version_ok &&
+ defined $stat &&
+ $line =~ /\bsscanf\b/ &&
+ ($stat !~ /$Ident\s*=\s*sscanf\s*$balanced_parens/ &&
+ $stat !~ /\bsscanf\s*$balanced_parens\s*(?:$Compare)/ &&
+ $stat !~ /(?:$Compare)\s*\bsscanf\s*$balanced_parens/)) {
+ my $lc = $stat =~ tr@\n@@;
+ $lc = $lc + $linenr;
+ my $stat_real = get_stat_real($linenr, $lc);
+ WARN("NAKED_SSCANF",
+ "unchecked sscanf return value\n" . "$here\n$stat_real\n");
+ }
+
+# check for simple sscanf that should be kstrto<foo>
+ if ($perl_version_ok &&
+ defined $stat &&
+ $line =~ /\bsscanf\b/) {
+ my $lc = $stat =~ tr@\n@@;
+ $lc = $lc + $linenr;
+ my $stat_real = get_stat_real($linenr, $lc);
+ if ($stat_real =~ /\bsscanf\b\s*\(\s*$FuncArg\s*,\s*("[^"]+")/) {
+ my $format = $6;
+ my $count = $format =~ tr@%@%@;
+ if ($count == 1 &&
+ $format =~ /^"\%(?i:ll[udxi]|[udxi]ll|ll|[hl]h?[udxi]|[udxi][hl]h?|[hl]h?|[udxi])"$/) {
+ WARN("SSCANF_TO_KSTRTO",
+ "Prefer kstrto<type> to single variable sscanf\n" . "$here\n$stat_real\n");
+ }
+ }
+ }
+
+# check for new externs in .h files.
+ if ($realfile =~ /\.h$/ &&
+ $line =~ /^\+\s*(extern\s+)$Type\s*$Ident\s*\(/s) {
+ if (CHK("AVOID_EXTERNS",
+ "extern prototypes should be avoided in .h files\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(.*)\bextern\b\s*(.*)/$1$2/;
+ }
+ }
+
+# check for new externs in .c files.
+ if ($realfile =~ /\.c$/ && defined $stat &&
+ $stat =~ /^.\s*(?:extern\s+)?$Type\s+($Ident)(\s*)\(/s)
+ {
+ my $function_name = $1;
+ my $paren_space = $2;
+
+ my $s = $stat;
+ if (defined $cond) {
+ substr($s, 0, length($cond), '');
+ }
+ if ($s =~ /^\s*;/)
+ {
+ WARN("AVOID_EXTERNS",
+ "externs should be avoided in .c files\n" . $herecurr);
+ }
+
+ if ($paren_space =~ /\n/) {
+ WARN("FUNCTION_ARGUMENTS",
+ "arguments for function declarations should follow identifier\n" . $herecurr);
+ }
+
+ } elsif ($realfile =~ /\.c$/ && defined $stat &&
+ $stat =~ /^.\s*extern\s+/)
+ {
+ WARN("AVOID_EXTERNS",
+ "externs should be avoided in .c files\n" . $herecurr);
+ }
+
+# check for function declarations that have arguments without identifier names
+ if (defined $stat &&
+ $stat =~ /^.\s*(?:extern\s+)?$Type\s*(?:$Ident|\(\s*\*\s*$Ident\s*\))\s*\(\s*([^{]+)\s*\)\s*;/s &&
+ $1 ne "void") {
+ my $args = trim($1);
+ while ($args =~ m/\s*($Type\s*(?:$Ident|\(\s*\*\s*$Ident?\s*\)\s*$balanced_parens)?)/g) {
+ my $arg = trim($1);
+ if ($arg =~ /^$Type$/ && $arg !~ /enum\s+$Ident$/) {
+ WARN("FUNCTION_ARGUMENTS",
+ "function definition argument '$arg' should also have an identifier name\n" . $herecurr);
+ }
+ }
+ }
+
+# check for function definitions
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /^.\s*(?:$Storage\s+)?$Type\s*($Ident)\s*$balanced_parens\s*{/s) {
+ $context_function = $1;
+
+# check for multiline function definition with misplaced open brace
+ my $ok = 0;
+ my $cnt = statement_rawlines($stat);
+ my $herectx = $here . "\n";
+ for (my $n = 0; $n < $cnt; $n++) {
+ my $rl = raw_line($linenr, $n);
+ $herectx .= $rl . "\n";
+ $ok = 1 if ($rl =~ /^[ \+]\{/);
+ $ok = 1 if ($rl =~ /\{/ && $n == 0);
+ last if $rl =~ /^[ \+].*\{/;
+ }
+ if (!$ok) {
+ ERROR("OPEN_BRACE",
+ "open brace '{' following function definitions go on the next line\n" . $herectx);
+ }
+ }
+
# checks for new __setup's
if ($rawline =~ /\b__setup\("([^"]*)"/) {
my $name = $1;
if (!grep(/$name/, @setup_docs)) {
CHK("UNDOCUMENTED_SETUP",
- "__setup appears un-documented -- check Documentation/kernel-parameters.txt\n" . $herecurr);
+ "__setup appears un-documented -- check Documentation/admin-guide/kernel-parameters.txt\n" . $herecurr);
}
}
-# check for pointless casting of kmalloc return
- if ($line =~ /\*\s*\)\s*[kv][czm]alloc(_node){0,1}\b/) {
+# check for pointless casting of alloc functions
+ if ($line =~ /\*\s*\)\s*$allocFunctions\b/) {
WARN("UNNECESSARY_CASTS",
"unnecessary cast may hide bugs, see http://c-faq.com/malloc/mallocnocast.html\n" . $herecurr);
}
+# alloc style
+# p = alloc(sizeof(struct foo), ...) should be p = alloc(sizeof(*p), ...)
+ if ($perl_version_ok &&
+ $line =~ /\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*((?:kv|k|v)[mz]alloc(?:_node)?)\s*\(\s*(sizeof\s*\(\s*struct\s+$Lval\s*\))/) {
+ CHK("ALLOC_SIZEOF_STRUCT",
+ "Prefer $3(sizeof(*$1)...) over $3($4...)\n" . $herecurr);
+ }
+
+# check for (kv|k)[mz]alloc with multiplies that could be kmalloc_array/kvmalloc_array/kvcalloc/kcalloc
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /^\+\s*($Lval)\s*\=\s*(?:$balanced_parens)?\s*((?:kv|k)[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)\s*,/) {
+ my $oldfunc = $3;
+ my $a1 = $4;
+ my $a2 = $10;
+ my $newfunc = "kmalloc_array";
+ $newfunc = "kvmalloc_array" if ($oldfunc eq "kvmalloc");
+ $newfunc = "kvcalloc" if ($oldfunc eq "kvzalloc");
+ $newfunc = "kcalloc" if ($oldfunc eq "kzalloc");
+ my $r1 = $a1;
+ my $r2 = $a2;
+ if ($a1 =~ /^sizeof\s*\S/) {
+ $r1 = $a2;
+ $r2 = $a1;
+ }
+ if ($r1 !~ /^sizeof\b/ && $r2 =~ /^sizeof\s*\S/ &&
+ !($r1 =~ /^$Constant$/ || $r1 =~ /^[A-Z_][A-Z0-9_]*$/)) {
+ my $cnt = statement_rawlines($stat);
+ my $herectx = get_stat_here($linenr, $cnt, $here);
+
+ if (WARN("ALLOC_WITH_MULTIPLY",
+ "Prefer $newfunc over $oldfunc with multiply\n" . $herectx) &&
+ $cnt == 1 &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*((?:kv|k)[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)/$1 . ' = ' . "$newfunc(" . trim($r1) . ', ' . trim($r2)/e;
+ }
+ }
+ }
+
+# check for krealloc arg reuse
+ if ($perl_version_ok &&
+ $line =~ /\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*krealloc\s*\(\s*($Lval)\s*,/ &&
+ $1 eq $3) {
+ WARN("KREALLOC_ARG_REUSE",
+ "Reusing the krealloc arg is almost always a bug\n" . $herecurr);
+ }
+
+# check for alloc argument mismatch
+ if ($line =~ /\b((?:devm_)?(?:kcalloc|kmalloc_array))\s*\(\s*sizeof\b/) {
+ WARN("ALLOC_ARRAY_ARGS",
+ "$1 uses number as first arg, sizeof is generally wrong\n" . $herecurr);
+ }
+
# check for multiple semicolons
if ($line =~ /;\s*;\s*$/) {
- WARN("ONE_SEMICOLON",
- "Statements terminations use 1 semicolon\n" . $herecurr);
+ if (WARN("ONE_SEMICOLON",
+ "Statements terminations use 1 semicolon\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(\s*;\s*){2,}$/;/g;
+ }
+ }
+
+# check for #defines like: 1 << <digit> that could be BIT(digit), it is not exported to uapi
+ if ($realfile !~ m@^include/uapi/@ &&
+ $line =~ /#\s*define\s+\w+\s+\(?\s*1\s*([ulUL]*)\s*\<\<\s*(?:\d+|$Ident)\s*\)?/) {
+ my $ull = "";
+ $ull = "_ULL" if (defined($1) && $1 =~ /ll/i);
+ if (CHK("BIT_MACRO",
+ "Prefer using the BIT$ull macro\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\(?\s*1\s*[ulUL]*\s*<<\s*(\d+|$Ident)\s*\)?/BIT${ull}($1)/;
+ }
+ }
+
+# check for IS_ENABLED() without CONFIG_<FOO> ($rawline for comments too)
+ if ($rawline =~ /\bIS_ENABLED\s*\(\s*(\w+)\s*\)/ && $1 !~ /^${CONFIG_}/) {
+ WARN("IS_ENABLED_CONFIG",
+ "IS_ENABLED($1) is normally used as IS_ENABLED(${CONFIG_}$1)\n" . $herecurr);
+ }
+
+# check for #if defined CONFIG_<FOO> || defined CONFIG_<FOO>_MODULE
+ if ($line =~ /^\+\s*#\s*if\s+defined(?:\s*\(?\s*|\s+)(${CONFIG_}[A-Z_]+)\s*\)?\s*\|\|\s*defined(?:\s*\(?\s*|\s+)\1_MODULE\s*\)?\s*$/) {
+ my $config = $1;
+ if (WARN("PREFER_IS_ENABLED",
+ "Prefer IS_ENABLED(<FOO>) to ${CONFIG_}<FOO> || ${CONFIG_}<FOO>_MODULE\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] = "\+#if IS_ENABLED($config)";
+ }
+ }
+
+# check for /* fallthrough */ like comment, prefer fallthrough;
+ my @fallthroughs = (
+ 'fallthrough',
+ '@fallthrough@',
+ 'lint -fallthrough[ \t]*',
+ 'intentional(?:ly)?[ \t]*fall(?:(?:s | |-)[Tt]|t)hr(?:ough|u|ew)',
+ '(?:else,?\s*)?FALL(?:S | |-)?THR(?:OUGH|U|EW)[ \t.!]*(?:-[^\n\r]*)?',
+ 'Fall(?:(?:s | |-)[Tt]|t)hr(?:ough|u|ew)[ \t.!]*(?:-[^\n\r]*)?',
+ 'fall(?:s | |-)?thr(?:ough|u|ew)[ \t.!]*(?:-[^\n\r]*)?',
+ );
+ if ($raw_comment ne '') {
+ foreach my $ft (@fallthroughs) {
+ if ($raw_comment =~ /$ft/) {
+ my $msg_level = \&WARN;
+ $msg_level = \&CHK if ($file);
+ &{$msg_level}("PREFER_FALLTHROUGH",
+ "Prefer 'fallthrough;' over fallthrough comment\n" . $herecurr);
+ last;
+ }
+ }
+ }
+
+# check for switch/default statements without a break;
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /^\+[$;\s]*(?:case[$;\s]+\w+[$;\s]*:[$;\s]*|)*[$;\s]*\bdefault[$;\s]*:[$;\s]*;/g) {
+ my $cnt = statement_rawlines($stat);
+ my $herectx = get_stat_here($linenr, $cnt, $here);
+
+ WARN("DEFAULT_NO_BREAK",
+ "switch default: should use break\n" . $herectx);
}
# check for gcc specific __FUNCTION__
- if ($line =~ /__FUNCTION__/) {
- WARN("USE_FUNC",
- "__func__ should be used instead of gcc specific __FUNCTION__\n" . $herecurr);
+ if ($line =~ /\b__FUNCTION__\b/) {
+ if (WARN("USE_FUNC",
+ "__func__ should be used instead of gcc specific __FUNCTION__\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b__FUNCTION__\b/__func__/g;
+ }
+ }
+
+# check for uses of __DATE__, __TIME__, __TIMESTAMP__
+ while ($line =~ /\b(__(?:DATE|TIME|TIMESTAMP)__)\b/g) {
+ ERROR("DATE_TIME",
+ "Use of the '$1' macro makes the build non-deterministic\n" . $herecurr);
+ }
+
+# check for use of yield()
+ if ($line =~ /\byield\s*\(\s*\)/) {
+ WARN("YIELD",
+ "Using yield() is generally wrong. See yield() kernel-doc (sched/core.c)\n" . $herecurr);
+ }
+
+# check for comparisons against true and false
+ if ($line =~ /\+\s*(.*?)\b(true|false|$Lval)\s*(==|\!=)\s*(true|false|$Lval)\b(.*)$/i) {
+ my $lead = $1;
+ my $arg = $2;
+ my $test = $3;
+ my $otype = $4;
+ my $trail = $5;
+ my $op = "!";
+
+ ($arg, $otype) = ($otype, $arg) if ($arg =~ /^(?:true|false)$/i);
+
+ my $type = lc($otype);
+ if ($type =~ /^(?:true|false)$/) {
+ if (("$test" eq "==" && "$type" eq "true") ||
+ ("$test" eq "!=" && "$type" eq "false")) {
+ $op = "";
+ }
+
+ CHK("BOOL_COMPARISON",
+ "Using comparison to $otype is error prone\n" . $herecurr);
+
+## maybe suggesting a correct construct would better
+## "Using comparison to $otype is error prone. Perhaps use '${lead}${op}${arg}${trail}'\n" . $herecurr);
+
+ }
}
# check for semaphores initialized locked
if ($line =~ /^.\s*sema_init.+,\W?0\W?\)/) {
WARN("CONSIDER_COMPLETION",
"consider using a completion\n" . $herecurr);
-
}
-# recommend kstrto* over simple_strto*
- if ($line =~ /\bsimple_(strto.*?)\s*\(/) {
+
+# recommend kstrto* over simple_strto* and strict_strto*
+ if ($line =~ /\b((simple|strict)_(strto(l|ll|ul|ull)))\s*\(/) {
WARN("CONSIDER_KSTRTO",
- "consider using kstrto* in preference to simple_$1\n" . $herecurr);
+ "$1 is obsolete, use k$3 instead\n" . $herecurr);
}
-# check for __initcall(), use device_initcall() explicitly please
+
+# check for __initcall(), use device_initcall() explicitly or more appropriate function please
if ($line =~ /^.\s*__initcall\s*\(/) {
WARN("USE_DEVICE_INITCALL",
- "please use device_initcall() instead of __initcall()\n" . $herecurr);
- }
-# check for various ops structs, ensure they are const.
- my $struct_ops = qr{acpi_dock_ops|
- address_space_operations|
- backlight_ops|
- block_device_operations|
- dentry_operations|
- dev_pm_ops|
- dma_map_ops|
- extent_io_ops|
- file_lock_operations|
- file_operations|
- hv_ops|
- ide_dma_ops|
- intel_dvo_dev_ops|
- item_operations|
- iwl_ops|
- kgdb_arch|
- kgdb_io|
- kset_uevent_ops|
- lock_manager_operations|
- microcode_ops|
- mtrr_ops|
- neigh_ops|
- nlmsvc_binding|
- pci_raw_ops|
- pipe_buf_operations|
- platform_hibernation_ops|
- platform_suspend_ops|
- proto_ops|
- rpc_pipe_ops|
- seq_operations|
- snd_ac97_build_ops|
- soc_pcmcia_socket_ops|
- stacktrace_ops|
- sysfs_ops|
- tty_operations|
- usb_mon_operations|
- wd_ops}x;
- if ($line !~ /\bconst\b/ &&
- $line =~ /\bstruct\s+($struct_ops)\b/) {
+ "please use device_initcall() or more appropriate function instead of __initcall() (see include/linux/init.h)\n" . $herecurr);
+ }
+
+# check for spin_is_locked(), suggest lockdep instead
+ if ($line =~ /\bspin_is_locked\(/) {
+ WARN("USE_LOCKDEP",
+ "Where possible, use lockdep_assert_held instead of assertions based on spin_is_locked\n" . $herecurr);
+ }
+
+# check for deprecated apis
+ if ($line =~ /\b($deprecated_apis_search)\b\s*\(/) {
+ my $deprecated_api = $1;
+ my $new_api = $deprecated_apis{$deprecated_api};
+ WARN("DEPRECATED_API",
+ "Deprecated use of '$deprecated_api', prefer '$new_api' instead\n" . $herecurr);
+ }
+
+# check for various structs that are normally const (ops, kgdb, device_tree)
+# and avoid what seem like struct definitions 'struct foo {'
+ if (defined($const_structs) &&
+ $line !~ /\bconst\b/ &&
+ $line =~ /\bstruct\s+($const_structs)\b(?!\s*\{)/) {
WARN("CONST_STRUCT",
- "struct $1 should normally be const\n" .
- $herecurr);
+ "struct $1 should normally be const\n" . $herecurr);
}
# use of NR_CPUS is usually wrong
# ignore definitions of NR_CPUS and usage to define arrays as likely right
+# ignore designated initializers using NR_CPUS
if ($line =~ /\bNR_CPUS\b/ &&
$line !~ /^.\s*\s*#\s*if\b.*\bNR_CPUS\b/ &&
$line !~ /^.\s*\s*#\s*define\b.*\bNR_CPUS\b/ &&
$line !~ /^.\s*$Declare\s.*\[[^\]]*NR_CPUS[^\]]*\]/ &&
$line !~ /\[[^\]]*\.\.\.[^\]]*NR_CPUS[^\]]*\]/ &&
- $line !~ /\[[^\]]*NR_CPUS[^\]]*\.\.\.[^\]]*\]/)
+ $line !~ /\[[^\]]*NR_CPUS[^\]]*\.\.\.[^\]]*\]/ &&
+ $line !~ /^.\s*\.\w+\s*=\s*.*\bNR_CPUS\b/)
{
WARN("NR_CPUS",
"usage of NR_CPUS is often wrong - consider using cpu_possible(), num_possible_cpus(), for_each_possible_cpu(), etc\n" . $herecurr);
}
-# check for %L{u,d,i} in strings
- my $string;
- while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) {
- $string = substr($rawline, $-[1], $+[1] - $-[1]);
- $string =~ s/%%/__/g;
- if ($string =~ /(?<!%)%L[udi]/) {
- WARN("PRINTF_L",
- "\%Ld/%Lu are not-standard C, use %lld/%llu\n" . $herecurr);
- last;
+# Use of __ARCH_HAS_<FOO> or ARCH_HAVE_<BAR> is wrong.
+ if ($line =~ /\+\s*#\s*define\s+((?:__)?ARCH_(?:HAS|HAVE)\w*)\b/) {
+ ERROR("DEFINE_ARCH_HAS",
+ "#define of '$1' is wrong - use Kconfig variables or standard guards instead\n" . $herecurr);
+ }
+
+# likely/unlikely comparisons similar to "(likely(foo) > 0)"
+ if ($perl_version_ok &&
+ $line =~ /\b((?:un)?likely)\s*\(\s*$FuncArg\s*\)\s*$Compare/) {
+ WARN("LIKELY_MISUSE",
+ "Using $1 should generally have parentheses around the comparison\n" . $herecurr);
+ }
+
+# return sysfs_emit(foo, fmt, ...) fmt without newline
+ if ($line =~ /\breturn\s+sysfs_emit\s*\(\s*$FuncArg\s*,\s*($String)/ &&
+ substr($rawline, $-[6], $+[6] - $-[6]) !~ /\\n"$/) {
+ my $offset = $+[6] - 1;
+ if (WARN("SYSFS_EMIT",
+ "return sysfs_emit(...) formats should include a terminating newline\n" . $herecurr) &&
+ $fix) {
+ substr($fixed[$fixlinenr], $offset, 0) = '\\n';
}
}
+# nested likely/unlikely calls
+ if ($line =~ /\b(?:(?:un)?likely)\s*\(\s*!?\s*(IS_ERR(?:_OR_NULL|_VALUE)?|WARN)/) {
+ WARN("LIKELY_MISUSE",
+ "nested (un)?likely() calls, $1 already uses unlikely() internally\n" . $herecurr);
+ }
+
# whine mightly about in_atomic
if ($line =~ /\bin_atomic\s*\(/) {
if ($realfile =~ m@^drivers/@) {
@@ -3266,16 +7430,149 @@ sub process {
}
}
- if ($line =~ /debugfs_create_file.*S_IWUGO/ ||
- $line =~ /DEVICE_ATTR.*S_IWUGO/ ) {
+ if ($line =~ /debugfs_create_\w+.*\b$mode_perms_world_writable\b/ ||
+ $line =~ /DEVICE_ATTR.*\b$mode_perms_world_writable\b/) {
WARN("EXPORTED_WORLD_WRITABLE",
"Exporting world writable files is usually an error. Consider more restrictive permissions.\n" . $herecurr);
}
- # Check for memset with swapped arguments
- if ($line =~ /memset.*\,(\ |)(0x|)0(\ |0|)\);/) {
- ERROR("MEMSET",
- "memset size is 3rd argument, not the second.\n" . $herecurr);
+# check for DEVICE_ATTR uses that could be DEVICE_ATTR_<FOO>
+# and whether or not function naming is typical and if
+# DEVICE_ATTR permissions uses are unusual too
+ if ($perl_version_ok &&
+ defined $stat &&
+ $stat =~ /\bDEVICE_ATTR\s*\(\s*(\w+)\s*,\s*\(?\s*(\s*(?:${multi_mode_perms_string_search}|0[0-7]{3,3})\s*)\s*\)?\s*,\s*(\w+)\s*,\s*(\w+)\s*\)/) {
+ my $var = $1;
+ my $perms = $2;
+ my $show = $3;
+ my $store = $4;
+ my $octal_perms = perms_to_octal($perms);
+ if ($show =~ /^${var}_show$/ &&
+ $store =~ /^${var}_store$/ &&
+ $octal_perms eq "0644") {
+ if (WARN("DEVICE_ATTR_RW",
+ "Use DEVICE_ATTR_RW\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bDEVICE_ATTR\s*\(\s*$var\s*,\s*\Q$perms\E\s*,\s*$show\s*,\s*$store\s*\)/DEVICE_ATTR_RW(${var})/;
+ }
+ } elsif ($show =~ /^${var}_show$/ &&
+ $store =~ /^NULL$/ &&
+ $octal_perms eq "0444") {
+ if (WARN("DEVICE_ATTR_RO",
+ "Use DEVICE_ATTR_RO\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bDEVICE_ATTR\s*\(\s*$var\s*,\s*\Q$perms\E\s*,\s*$show\s*,\s*NULL\s*\)/DEVICE_ATTR_RO(${var})/;
+ }
+ } elsif ($show =~ /^NULL$/ &&
+ $store =~ /^${var}_store$/ &&
+ $octal_perms eq "0200") {
+ if (WARN("DEVICE_ATTR_WO",
+ "Use DEVICE_ATTR_WO\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bDEVICE_ATTR\s*\(\s*$var\s*,\s*\Q$perms\E\s*,\s*NULL\s*,\s*$store\s*\)/DEVICE_ATTR_WO(${var})/;
+ }
+ } elsif ($octal_perms eq "0644" ||
+ $octal_perms eq "0444" ||
+ $octal_perms eq "0200") {
+ my $newshow = "$show";
+ $newshow = "${var}_show" if ($show ne "NULL" && $show ne "${var}_show");
+ my $newstore = $store;
+ $newstore = "${var}_store" if ($store ne "NULL" && $store ne "${var}_store");
+ my $rename = "";
+ if ($show ne $newshow) {
+ $rename .= " '$show' to '$newshow'";
+ }
+ if ($store ne $newstore) {
+ $rename .= " '$store' to '$newstore'";
+ }
+ WARN("DEVICE_ATTR_FUNCTIONS",
+ "Consider renaming function(s)$rename\n" . $herecurr);
+ } else {
+ WARN("DEVICE_ATTR_PERMS",
+ "DEVICE_ATTR unusual permissions '$perms' used\n" . $herecurr);
+ }
+ }
+
+# Mode permission misuses where it seems decimal should be octal
+# This uses a shortcut match to avoid unnecessary uses of a slow foreach loop
+# o Ignore module_param*(...) uses with a decimal 0 permission as that has a
+# specific definition of not visible in sysfs.
+# o Ignore proc_create*(...) uses with a decimal 0 permission as that means
+# use the default permissions
+ if ($perl_version_ok &&
+ defined $stat &&
+ $line =~ /$mode_perms_search/) {
+ foreach my $entry (@mode_permission_funcs) {
+ my $func = $entry->[0];
+ my $arg_pos = $entry->[1];
+
+ my $lc = $stat =~ tr@\n@@;
+ $lc = $lc + $linenr;
+ my $stat_real = get_stat_real($linenr, $lc);
+
+ my $skip_args = "";
+ if ($arg_pos > 1) {
+ $arg_pos--;
+ $skip_args = "(?:\\s*$FuncArg\\s*,\\s*){$arg_pos,$arg_pos}";
+ }
+ my $test = "\\b$func\\s*\\(${skip_args}($FuncArg(?:\\|\\s*$FuncArg)*)\\s*[,\\)]";
+ if ($stat =~ /$test/) {
+ my $val = $1;
+ $val = $6 if ($skip_args ne "");
+ if (!($func =~ /^(?:module_param|proc_create)/ && $val eq "0") &&
+ (($val =~ /^$Int$/ && $val !~ /^$Octal$/) ||
+ ($val =~ /^$Octal$/ && length($val) ne 4))) {
+ ERROR("NON_OCTAL_PERMISSIONS",
+ "Use 4 digit octal (0777) not decimal permissions\n" . "$here\n" . $stat_real);
+ }
+ if ($val =~ /^$Octal$/ && (oct($val) & 02)) {
+ ERROR("EXPORTED_WORLD_WRITABLE",
+ "Exporting writable files is usually an error. Consider more restrictive permissions.\n" . "$here\n" . $stat_real);
+ }
+ }
+ }
+ }
+
+# check for uses of S_<PERMS> that could be octal for readability
+ while ($line =~ m{\b($multi_mode_perms_string_search)\b}g) {
+ my $oval = $1;
+ my $octal = perms_to_octal($oval);
+ if (WARN("SYMBOLIC_PERMS",
+ "Symbolic permissions '$oval' are not preferred. Consider using octal permissions '$octal'.\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$oval\E/$octal/;
+ }
+ }
+
+# validate content of MODULE_LICENSE against list from include/linux/module.h
+ if ($line =~ /\bMODULE_LICENSE\s*\(\s*($String)\s*\)/) {
+ my $extracted_string = get_quoted_string($line, $rawline);
+ my $valid_licenses = qr{
+ GPL|
+ GPL\ v2|
+ GPL\ and\ additional\ rights|
+ Dual\ BSD/GPL|
+ Dual\ MIT/GPL|
+ Dual\ MPL/GPL|
+ Proprietary
+ }x;
+ if ($extracted_string !~ /^"(?:$valid_licenses)"$/x) {
+ WARN("MODULE_LICENSE",
+ "unknown module license " . $extracted_string . "\n" . $herecurr);
+ }
+ if (!$file && $extracted_string eq '"GPL v2"') {
+ if (WARN("MODULE_LICENSE",
+ "Prefer \"GPL\" over \"GPL v2\" - see commit bf7fbeeae6db (\"module: Cure the MODULE_LICENSE \"GPL\" vs. \"GPL v2\" bogosity\")\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bMODULE_LICENSE\s*\(\s*"GPL v2"\s*\)/MODULE_LICENSE("GPL")/;
+ }
+ }
+ }
+
+# check for sysctl duplicate constants
+ if ($line =~ /\.extra[12]\s*=\s*&(zero|one|int_max)\b/) {
+ WARN("DUPLICATED_SYSCTL_CONST",
+ "duplicated sysctl range checking value '$1', consider using the shared one in include/linux/sysctl.h\n" . $herecurr);
}
}
@@ -3291,19 +7588,48 @@ sub process {
exit(0);
}
- # This is not a patch, and we are are in 'no-patch' mode so
+ # This is not a patch, and we are in 'no-patch' mode so
# just keep quiet.
if (!$chk_patch && !$is_patch) {
exit(0);
}
- if (!$is_patch) {
+ if (!$is_patch && $filename !~ /cover-letter\.patch$/) {
ERROR("NOT_UNIFIED_DIFF",
"Does not appear to be a unified-diff format patch\n");
}
- if ($is_patch && $chk_signoff && $signoff == 0) {
- ERROR("MISSING_SIGN_OFF",
- "Missing Signed-off-by: line(s)\n");
+ if ($is_patch && $has_commit_log && $chk_signoff) {
+ if ($signoff == 0) {
+ ERROR("MISSING_SIGN_OFF",
+ "Missing Signed-off-by: line(s)\n");
+ } elsif ($authorsignoff != 1) {
+ # authorsignoff values:
+ # 0 -> missing sign off
+ # 1 -> sign off identical
+ # 2 -> names and addresses match, comments mismatch
+ # 3 -> addresses match, names different
+ # 4 -> names match, addresses different
+ # 5 -> names match, addresses excluding subaddress details (refer RFC 5233) match
+
+ my $sob_msg = "'From: $author' != 'Signed-off-by: $author_sob'";
+
+ if ($authorsignoff == 0) {
+ ERROR("NO_AUTHOR_SIGN_OFF",
+ "Missing Signed-off-by: line by nominal patch author '$author'\n");
+ } elsif ($authorsignoff == 2) {
+ CHK("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email comments mismatch: $sob_msg\n");
+ } elsif ($authorsignoff == 3) {
+ WARN("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email name mismatch: $sob_msg\n");
+ } elsif ($authorsignoff == 4) {
+ WARN("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email address mismatch: $sob_msg\n");
+ } elsif ($authorsignoff == 5) {
+ WARN("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email subaddress mismatch: $sob_msg\n");
+ }
+ }
}
print report_dump();
@@ -3312,40 +7638,75 @@ sub process {
print "total: $cnt_error errors, $cnt_warn warnings, " .
(($check)? "$cnt_chk checks, " : "") .
"$cnt_lines lines checked\n";
- print "\n" if ($quiet == 0);
}
if ($quiet == 0) {
+ # If there were any defects found and not already fixing them
+ if (!$clean and !$fix) {
+ print << "EOM"
+
+NOTE: For some of the reported defects, checkpatch may be able to
+ mechanically convert to the typical style using --fix or --fix-inplace.
+EOM
+ }
# If there were whitespace errors which cleanpatch can fix
# then suggest that.
if ($rpt_cleaners) {
- print "NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or\n";
- print " scripts/cleanfile\n\n";
$rpt_cleaners = 0;
+ print << "EOM"
+
+NOTE: Whitespace errors detected.
+ You may wish to use scripts/cleanpatch or scripts/cleanfile
+EOM
}
}
- if (keys %ignore_type) {
- print "NOTE: Ignored message types:";
- foreach my $ignore (sort keys %ignore_type) {
- print " $ignore";
- }
- print "\n";
- print "\n" if ($quiet == 0);
- }
+ if ($clean == 0 && $fix &&
+ ("@rawlines" ne "@fixed" ||
+ $#fixed_inserted >= 0 || $#fixed_deleted >= 0)) {
+ my $newfile = $filename;
+ $newfile .= ".EXPERIMENTAL-checkpatch-fixes" if (!$fix_inplace);
+ my $linecount = 0;
+ my $f;
+
+ @fixed = fix_inserted_deleted_lines(\@fixed, \@fixed_inserted, \@fixed_deleted);
+
+ open($f, '>', $newfile)
+ or die "$P: Can't open $newfile for write\n";
+ foreach my $fixed_line (@fixed) {
+ $linecount++;
+ if ($file) {
+ if ($linecount > 3) {
+ $fixed_line =~ s/^\+//;
+ print $f $fixed_line . "\n";
+ }
+ } else {
+ print $f $fixed_line . "\n";
+ }
+ }
+ close($f);
- if ($clean == 1 && $quiet == 0) {
- print "$vname has no obvious style problems and is ready for submission.\n"
- }
- if ($clean == 0 && $quiet == 0) {
- print << "EOM";
-$vname has style problems, please review.
+ if (!$quiet) {
+ print << "EOM";
+
+Wrote EXPERIMENTAL --fix correction(s) to '$newfile'
-If any of these errors are false positives, please report
-them to the openocd-devel mailing list or prepare a patch
-and send it to Gerrit for review.
+Do _NOT_ trust the results written to this file.
+Do _NOT_ submit these changes without inspecting them for correctness.
+
+This EXPERIMENTAL file is simply a convenience to help rewrite patches.
+No warranties, expressed or implied...
EOM
+ }
}
+ if ($quiet == 0) {
+ print "\n";
+ if ($clean == 1) {
+ print "$vname has no obvious style problems and is ready for submission.\n";
+ } else {
+ print "$vname has style problems, please review.\n";
+ }
+ }
return $clean;
}
diff --git a/tools/scripts/const_structs.checkpatch b/tools/scripts/const_structs.checkpatch
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/tools/scripts/const_structs.checkpatch
diff --git a/tools/scripts/spdxcheck.py b/tools/scripts/spdxcheck.py
new file mode 100755
index 0000000..f882943
--- /dev/null
+++ b/tools/scripts/spdxcheck.py
@@ -0,0 +1,449 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: GPL-2.0
+# Copyright Thomas Gleixner <tglx@linutronix.de>
+
+from argparse import ArgumentParser
+from ply import lex, yacc
+import locale
+import traceback
+import fnmatch
+import sys
+import git
+import re
+import os
+
+class ParserException(Exception):
+ def __init__(self, tok, txt):
+ self.tok = tok
+ self.txt = txt
+
+class SPDXException(Exception):
+ def __init__(self, el, txt):
+ self.el = el
+ self.txt = txt
+
+class SPDXdata(object):
+ def __init__(self):
+ self.license_files = 0
+ self.exception_files = 0
+ self.licenses = [ ]
+ self.exceptions = { }
+
+class dirinfo(object):
+ def __init__(self):
+ self.missing = 0
+ self.total = 0
+ self.files = []
+
+ def update(self, fname, basedir, miss):
+ self.total += 1
+ self.missing += miss
+ if miss:
+ fname = './' + fname
+ bdir = os.path.dirname(fname)
+ if bdir == basedir.rstrip('/'):
+ self.files.append(fname)
+
+# Read the spdx data from the LICENSES directory
+def read_spdxdata(repo):
+
+ # The subdirectories of LICENSES in the kernel source
+ # Note: exceptions needs to be parsed as last directory.
+ # OpenOCD specific: Begin
+ license_dirs = [ "preferred", "stand-alone", "exceptions" ]
+ # OpenOCD specific: End
+ lictree = repo.head.commit.tree['LICENSES']
+
+ spdx = SPDXdata()
+
+ for d in license_dirs:
+ for el in lictree[d].traverse():
+ if not os.path.isfile(el.path):
+ continue
+
+ exception = None
+ for l in open(el.path, encoding="utf-8").readlines():
+ if l.startswith('Valid-License-Identifier:'):
+ lid = l.split(':')[1].strip().upper()
+ if lid in spdx.licenses:
+ raise SPDXException(el, 'Duplicate License Identifier: %s' %lid)
+ else:
+ spdx.licenses.append(lid)
+
+ elif l.startswith('SPDX-Exception-Identifier:'):
+ exception = l.split(':')[1].strip().upper()
+ spdx.exceptions[exception] = []
+
+ elif l.startswith('SPDX-Licenses:'):
+ for lic in l.split(':')[1].upper().strip().replace(' ', '').replace('\t', '').split(','):
+ if not lic in spdx.licenses:
+ raise SPDXException(None, 'Exception %s missing license %s' %(exception, lic))
+ spdx.exceptions[exception].append(lic)
+
+ elif l.startswith("License-Text:"):
+ if exception:
+ if not len(spdx.exceptions[exception]):
+ raise SPDXException(el, 'Exception %s is missing SPDX-Licenses' %exception)
+ spdx.exception_files += 1
+ else:
+ spdx.license_files += 1
+ break
+ return spdx
+
+class id_parser(object):
+
+ reserved = [ 'AND', 'OR', 'WITH' ]
+ tokens = [ 'LPAR', 'RPAR', 'ID', 'EXC' ] + reserved
+
+ precedence = ( ('nonassoc', 'AND', 'OR'), )
+
+ t_ignore = ' \t'
+
+ def __init__(self, spdx):
+ self.spdx = spdx
+ self.lasttok = None
+ self.lastid = None
+ self.lexer = lex.lex(module = self, reflags = re.UNICODE)
+ # Initialize the parser. No debug file and no parser rules stored on disk
+ # The rules are small enough to be generated on the fly
+ self.parser = yacc.yacc(module = self, write_tables = False, debug = False)
+ self.lines_checked = 0
+ self.checked = 0
+ self.excluded = 0
+ self.spdx_valid = 0
+ self.spdx_errors = 0
+ self.spdx_dirs = {}
+ self.dirdepth = -1
+ self.basedir = '.'
+ self.curline = 0
+ self.deepest = 0
+
+ def set_dirinfo(self, basedir, dirdepth):
+ if dirdepth >= 0:
+ self.basedir = basedir
+ bdir = basedir.lstrip('./').rstrip('/')
+ if bdir != '':
+ parts = bdir.split('/')
+ else:
+ parts = []
+ self.dirdepth = dirdepth + len(parts)
+
+ # Validate License and Exception IDs
+ def validate(self, tok):
+ id = tok.value.upper()
+ if tok.type == 'ID':
+ if not id in self.spdx.licenses:
+ raise ParserException(tok, 'Invalid License ID')
+ self.lastid = id
+ elif tok.type == 'EXC':
+ if id not in self.spdx.exceptions:
+ raise ParserException(tok, 'Invalid Exception ID')
+ if self.lastid not in self.spdx.exceptions[id]:
+ raise ParserException(tok, 'Exception not valid for license %s' %self.lastid)
+ self.lastid = None
+ elif tok.type != 'WITH':
+ self.lastid = None
+
+ # Lexer functions
+ def t_RPAR(self, tok):
+ r'\)'
+ self.lasttok = tok.type
+ return tok
+
+ def t_LPAR(self, tok):
+ r'\('
+ self.lasttok = tok.type
+ return tok
+
+ def t_ID(self, tok):
+ r'[A-Za-z.0-9\-+]+'
+
+ if self.lasttok == 'EXC':
+ print(tok)
+ raise ParserException(tok, 'Missing parentheses')
+
+ tok.value = tok.value.strip()
+ val = tok.value.upper()
+
+ if val in self.reserved:
+ tok.type = val
+ elif self.lasttok == 'WITH':
+ tok.type = 'EXC'
+
+ self.lasttok = tok.type
+ self.validate(tok)
+ return tok
+
+ def t_error(self, tok):
+ raise ParserException(tok, 'Invalid token')
+
+ def p_expr(self, p):
+ '''expr : ID
+ | ID WITH EXC
+ | expr AND expr
+ | expr OR expr
+ | LPAR expr RPAR'''
+ pass
+
+ def p_error(self, p):
+ if not p:
+ raise ParserException(None, 'Unfinished license expression')
+ else:
+ raise ParserException(p, 'Syntax error')
+
+ def parse(self, expr):
+ self.lasttok = None
+ self.lastid = None
+ self.parser.parse(expr, lexer = self.lexer)
+
+ def parse_lines(self, fd, maxlines, fname):
+ self.checked += 1
+ self.curline = 0
+ fail = 1
+ try:
+ for line in fd:
+ line = line.decode(locale.getpreferredencoding(False), errors='ignore')
+ self.curline += 1
+ if self.curline > maxlines:
+ break
+ self.lines_checked += 1
+ if line.find("SPDX-License-Identifier:") < 0:
+ continue
+ expr = line.split(':')[1].strip()
+ # Remove trailing comment closure
+ if line.strip().endswith('*/'):
+ expr = expr.rstrip('*/').strip()
+ # Remove trailing xml comment closure
+ if line.strip().endswith('-->'):
+ expr = expr.rstrip('-->').strip()
+ # Special case for SH magic boot code files
+ if line.startswith('LIST \"'):
+ expr = expr.rstrip('\"').strip()
+ self.parse(expr)
+ self.spdx_valid += 1
+ #
+ # Should we check for more SPDX ids in the same file and
+ # complain if there are any?
+ #
+ fail = 0
+ break
+
+ except ParserException as pe:
+ if pe.tok:
+ col = line.find(expr) + pe.tok.lexpos
+ tok = pe.tok.value
+ sys.stdout.write('%s: %d:%d %s: %s\n' %(fname, self.curline, col, pe.txt, tok))
+ else:
+ sys.stdout.write('%s: %d:0 %s\n' %(fname, self.curline, pe.txt))
+ self.spdx_errors += 1
+
+ if fname == '-':
+ return
+
+ base = os.path.dirname(fname)
+ if self.dirdepth > 0:
+ parts = base.split('/')
+ i = 0
+ base = '.'
+ while i < self.dirdepth and i < len(parts) and len(parts[i]):
+ base += '/' + parts[i]
+ i += 1
+ elif self.dirdepth == 0:
+ base = self.basedir
+ else:
+ base = './' + base.rstrip('/')
+ base += '/'
+
+ di = self.spdx_dirs.get(base, dirinfo())
+ di.update(fname, base, fail)
+ self.spdx_dirs[base] = di
+
+class pattern(object):
+ def __init__(self, line):
+ self.pattern = line
+ self.match = self.match_file
+ if line == '.*':
+ self.match = self.match_dot
+ elif line.endswith('/'):
+ self.pattern = line[:-1]
+ self.match = self.match_dir
+ elif line.startswith('/'):
+ self.pattern = line[1:]
+ self.match = self.match_fn
+
+ def match_dot(self, fpath):
+ return os.path.basename(fpath).startswith('.')
+
+ def match_file(self, fpath):
+ return os.path.basename(fpath) == self.pattern
+
+ def match_fn(self, fpath):
+ return fnmatch.fnmatchcase(fpath, self.pattern)
+
+ def match_dir(self, fpath):
+ if self.match_fn(os.path.dirname(fpath)):
+ return True
+ return fpath.startswith(self.pattern)
+
+def exclude_file(fpath):
+ for rule in exclude_rules:
+ if rule.match(fpath):
+ return True
+ return False
+
+def scan_git_tree(tree, basedir, dirdepth):
+ parser.set_dirinfo(basedir, dirdepth)
+ for el in tree.traverse():
+ if not os.path.isfile(el.path):
+ continue
+ if exclude_file(el.path):
+ parser.excluded += 1
+ continue
+ with open(el.path, 'rb') as fd:
+ parser.parse_lines(fd, args.maxlines, el.path)
+
+def scan_git_subtree(tree, path, dirdepth):
+ for p in path.strip('/').split('/'):
+ tree = tree[p]
+ scan_git_tree(tree, path.strip('/'), dirdepth)
+
+def read_exclude_file(fname):
+ rules = []
+ if not fname:
+ return rules
+ with open(fname) as fd:
+ for line in fd:
+ line = line.strip()
+ if line.startswith('#'):
+ continue
+ if not len(line):
+ continue
+ rules.append(pattern(line))
+ return rules
+
+if __name__ == '__main__':
+
+ ap = ArgumentParser(description='SPDX expression checker')
+ ap.add_argument('path', nargs='*', help='Check path or file. If not given full git tree scan. For stdin use "-"')
+ ap.add_argument('-d', '--dirs', action='store_true',
+ help='Show [sub]directory statistics.')
+ ap.add_argument('-D', '--depth', type=int, default=-1,
+ help='Directory depth for -d statistics. Default: unlimited')
+ ap.add_argument('-e', '--exclude',
+ help='File containing file patterns to exclude. Default: scripts/spdxexclude')
+ ap.add_argument('-f', '--files', action='store_true',
+ help='Show files without SPDX.')
+ ap.add_argument('-m', '--maxlines', type=int, default=15,
+ help='Maximum number of lines to scan in a file. Default 15')
+ ap.add_argument('-v', '--verbose', action='store_true', help='Verbose statistics output')
+ args = ap.parse_args()
+
+ # Sanity check path arguments
+ if '-' in args.path and len(args.path) > 1:
+ sys.stderr.write('stdin input "-" must be the only path argument\n')
+ sys.exit(1)
+
+ try:
+ # Use git to get the valid license expressions
+ repo = git.Repo(os.getcwd())
+ assert not repo.bare
+
+ # Initialize SPDX data
+ spdx = read_spdxdata(repo)
+
+ # Initialize the parser
+ parser = id_parser(spdx)
+
+ except SPDXException as se:
+ if se.el:
+ sys.stderr.write('%s: %s\n' %(se.el.path, se.txt))
+ else:
+ sys.stderr.write('%s\n' %se.txt)
+ sys.exit(1)
+
+ except Exception as ex:
+ sys.stderr.write('FAIL: %s\n' %ex)
+ sys.stderr.write('%s\n' %traceback.format_exc())
+ sys.exit(1)
+
+ try:
+ fname = args.exclude
+ if not fname:
+ fname = os.path.join(os.path.dirname(__file__), 'spdxexclude')
+ exclude_rules = read_exclude_file(fname)
+ except Exception as ex:
+ sys.stderr.write('FAIL: Reading exclude file %s: %s\n' %(fname, ex))
+ sys.exit(1)
+
+ try:
+ if len(args.path) and args.path[0] == '-':
+ stdin = os.fdopen(sys.stdin.fileno(), 'rb')
+ parser.parse_lines(stdin, args.maxlines, '-')
+ else:
+ if args.path:
+ for p in args.path:
+ if os.path.isfile(p):
+ parser.parse_lines(open(p, 'rb'), args.maxlines, p)
+ elif os.path.isdir(p):
+ scan_git_subtree(repo.head.reference.commit.tree, p,
+ args.depth)
+ else:
+ sys.stderr.write('path %s does not exist\n' %p)
+ sys.exit(1)
+ else:
+ # Full git tree scan
+ scan_git_tree(repo.head.commit.tree, '.', args.depth)
+
+ ndirs = len(parser.spdx_dirs)
+ dirsok = 0
+ if ndirs:
+ for di in parser.spdx_dirs.values():
+ if not di.missing:
+ dirsok += 1
+
+ if args.verbose:
+ sys.stderr.write('\n')
+ sys.stderr.write('License files: %12d\n' %spdx.license_files)
+ sys.stderr.write('Exception files: %12d\n' %spdx.exception_files)
+ sys.stderr.write('License IDs %12d\n' %len(spdx.licenses))
+ sys.stderr.write('Exception IDs %12d\n' %len(spdx.exceptions))
+ sys.stderr.write('\n')
+ sys.stderr.write('Files excluded: %12d\n' %parser.excluded)
+ sys.stderr.write('Files checked: %12d\n' %parser.checked)
+ sys.stderr.write('Lines checked: %12d\n' %parser.lines_checked)
+ if parser.checked:
+ pc = int(100 * parser.spdx_valid / parser.checked)
+ sys.stderr.write('Files with SPDX: %12d %3d%%\n' %(parser.spdx_valid, pc))
+ sys.stderr.write('Files with errors: %12d\n' %parser.spdx_errors)
+ if ndirs:
+ sys.stderr.write('\n')
+ sys.stderr.write('Directories accounted: %8d\n' %ndirs)
+ pc = int(100 * dirsok / ndirs)
+ sys.stderr.write('Directories complete: %8d %3d%%\n' %(dirsok, pc))
+
+ if ndirs and ndirs != dirsok and args.dirs:
+ if args.verbose:
+ sys.stderr.write('\n')
+ sys.stderr.write('Incomplete directories: SPDX in Files\n')
+ for f in sorted(parser.spdx_dirs.keys()):
+ di = parser.spdx_dirs[f]
+ if di.missing:
+ valid = di.total - di.missing
+ pc = int(100 * valid / di.total)
+ sys.stderr.write(' %-80s: %5d of %5d %3d%%\n' %(f, valid, di.total, pc))
+
+ if ndirs and ndirs != dirsok and args.files:
+ if args.verbose or args.dirs:
+ sys.stderr.write('\n')
+ sys.stderr.write('Files without SPDX:\n')
+ for f in sorted(parser.spdx_dirs.keys()):
+ di = parser.spdx_dirs[f]
+ for f in sorted(di.files):
+ sys.stderr.write(' %s\n' %f)
+
+ sys.exit(0)
+
+ except Exception as ex:
+ sys.stderr.write('FAIL: %s\n' %ex)
+ sys.stderr.write('%s\n' %traceback.format_exc())
+ sys.exit(1)
diff --git a/tools/scripts/spdxexclude b/tools/scripts/spdxexclude
new file mode 100644
index 0000000..cea3467
--- /dev/null
+++ b/tools/scripts/spdxexclude
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Patterns for excluding files and directories
+
+# Ignore the license directory and the licensing documentation which would
+# create lots of noise for no value
+LICENSES/
+license-rules.rst
+
+# Other files without copyrightable content
+/NEWS*
+testing/
+
diff --git a/tools/scripts/spelling.txt b/tools/scripts/spelling.txt
new file mode 100644
index 0000000..8435b99
--- /dev/null
+++ b/tools/scripts/spelling.txt
@@ -0,0 +1,1642 @@
+# Originally from Debian's Lintian tool. Various false positives have been
+# removed, and various additions have been made as they've been discovered
+# in the kernel source.
+#
+# License: GPLv2
+#
+# The format of each line is:
+# mistake||correction
+#
+abandonning||abandoning
+abigious||ambiguous
+abitrary||arbitrary
+abitrate||arbitrate
+abnornally||abnormally
+abnrormal||abnormal
+abord||abort
+aboslute||absolute
+abov||above
+abreviated||abbreviated
+absense||absence
+absolut||absolute
+absoulte||absolute
+acccess||access
+acceess||access
+accelaration||acceleration
+acceleratoin||acceleration
+accelleration||acceleration
+accesing||accessing
+accesnt||accent
+accessable||accessible
+accesss||access
+accidentaly||accidentally
+accidentually||accidentally
+acclerated||accelerated
+accoding||according
+accomodate||accommodate
+accomodates||accommodates
+accordign||according
+accoring||according
+accout||account
+accquire||acquire
+accquired||acquired
+accross||across
+accumalate||accumulate
+accumalator||accumulator
+acessable||accessible
+acess||access
+acessing||accessing
+achitecture||architecture
+acient||ancient
+acitions||actions
+acitve||active
+acknowldegement||acknowledgment
+acknowledgement||acknowledgment
+ackowledge||acknowledge
+ackowledged||acknowledged
+acording||according
+activete||activate
+actived||activated
+actualy||actually
+acumulating||accumulating
+acumulative||accumulative
+acumulator||accumulator
+acutally||actually
+adapater||adapter
+addional||additional
+additionaly||additionally
+additonal||additional
+addres||address
+adddress||address
+addreses||addresses
+addresss||address
+addrress||address
+aditional||additional
+aditionally||additionally
+aditionaly||additionally
+adminstrative||administrative
+adress||address
+adresses||addresses
+adrresses||addresses
+advertisment||advertisement
+adviced||advised
+afecting||affecting
+againt||against
+agaist||against
+aggreataon||aggregation
+aggreation||aggregation
+ajust||adjust
+albumns||albums
+alegorical||allegorical
+algined||aligned
+algorith||algorithm
+algorithmical||algorithmically
+algoritm||algorithm
+algoritms||algorithms
+algorithmn||algorithm
+algorrithm||algorithm
+algorritm||algorithm
+aligment||alignment
+alignement||alignment
+allign||align
+alligned||aligned
+alllocate||allocate
+alloated||allocated
+allocatote||allocate
+allocatrd||allocated
+allocte||allocate
+allocted||allocated
+allpication||application
+alocate||allocate
+alogirhtms||algorithms
+alogrithm||algorithm
+alot||a lot
+alow||allow
+alows||allows
+alreay||already
+alredy||already
+altough||although
+alue||value
+ambigious||ambiguous
+ambigous||ambiguous
+amoung||among
+amout||amount
+amplifer||amplifier
+amplifyer||amplifier
+an union||a union
+an user||a user
+an userspace||a userspace
+an one||a one
+analysator||analyzer
+ang||and
+anniversery||anniversary
+annoucement||announcement
+anomolies||anomalies
+anomoly||anomaly
+anway||anyway
+aplication||application
+appearence||appearance
+applicaion||application
+appliction||application
+applictions||applications
+applys||applies
+appplications||applications
+appropiate||appropriate
+appropriatly||appropriately
+approriate||appropriate
+approriately||appropriately
+apropriate||appropriate
+aquainted||acquainted
+aquired||acquired
+aquisition||acquisition
+arbitary||arbitrary
+architechture||architecture
+arguement||argument
+arguements||arguments
+arithmatic||arithmetic
+aritmetic||arithmetic
+arne't||aren't
+arraival||arrival
+artifical||artificial
+artillary||artillery
+asign||assign
+asser||assert
+assertation||assertion
+assertting||asserting
+assgined||assigned
+assiged||assigned
+assigment||assignment
+assigments||assignments
+assistent||assistant
+assocaited||associated
+assocating||associating
+assocation||association
+associcated||associated
+assotiated||associated
+asssert||assert
+assum||assume
+assumtpion||assumption
+asuming||assuming
+asycronous||asynchronous
+asychronous||asynchronous
+asynchnous||asynchronous
+asynchronus||asynchronous
+asynchromous||asynchronous
+asymetric||asymmetric
+asymmeric||asymmetric
+atleast||at least
+atomatically||automatically
+atomicly||atomically
+atempt||attempt
+atrributes||attributes
+attachement||attachment
+attatch||attach
+attched||attached
+attemp||attempt
+attemps||attempts
+attemping||attempting
+attepmpt||attempt
+attnetion||attention
+attruibutes||attributes
+authentification||authentication
+authenicated||authenticated
+automaticaly||automatically
+automaticly||automatically
+automatize||automate
+automatized||automated
+automatizes||automates
+autonymous||autonomous
+auxillary||auxiliary
+auxilliary||auxiliary
+avaiable||available
+avaible||available
+availabe||available
+availabled||available
+availablity||availability
+availaible||available
+availale||available
+availavility||availability
+availble||available
+availiable||available
+availible||available
+avalable||available
+avaliable||available
+aysnc||async
+backgroud||background
+backword||backward
+backwords||backwards
+bahavior||behavior
+bakup||backup
+baloon||balloon
+baloons||balloons
+bandwith||bandwidth
+banlance||balance
+batery||battery
+battey||battery
+beacuse||because
+becasue||because
+becomming||becoming
+becuase||because
+beeing||being
+befor||before
+begining||beginning
+beter||better
+betweeen||between
+bianries||binaries
+bitmast||bitmask
+bitwiedh||bitwidth
+boardcast||broadcast
+borad||board
+boundry||boundary
+brievely||briefly
+brigde||bridge
+broadcase||broadcast
+broadcat||broadcast
+bufer||buffer
+bufufer||buffer
+cacluated||calculated
+caculate||calculate
+caculation||calculation
+cadidate||candidate
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+regster||register
+regualar||regular
+reguator||regulator
+regulamentations||regulations
+reigstration||registration
+releated||related
+relevent||relevant
+reloade||reload
+remoote||remote
+remore||remote
+removeable||removable
+repectively||respectively
+replacable||replaceable
+replacments||replacements
+replys||replies
+reponse||response
+representaion||representation
+reqeust||request
+reqister||register
+requed||requeued
+requestied||requested
+requiere||require
+requirment||requirement
+requred||required
+requried||required
+requst||request
+requsted||requested
+reregisteration||reregistration
+reseting||resetting
+reseved||reserved
+reseverd||reserved
+resizeable||resizable
+resouce||resource
+resouces||resources
+resoures||resources
+responce||response
+resrouce||resource
+ressizes||resizes
+ressource||resource
+ressources||resources
+restesting||retesting
+resumbmitting||resubmitting
+retransmited||retransmitted
+retreived||retrieved
+retreive||retrieve
+retreiving||retrieving
+retrive||retrieve
+retrived||retrieved
+retrun||return
+retun||return
+retuned||returned
+reudce||reduce
+reuest||request
+reuqest||request
+reutnred||returned
+revsion||revision
+rmeoved||removed
+rmeove||remove
+rmeoves||removes
+rountine||routine
+routins||routines
+rquest||request
+runing||running
+runned||ran
+runnnig||running
+runnning||running
+runtine||runtime
+sacrifying||sacrificing
+safly||safely
+safty||safety
+savable||saveable
+scaleing||scaling
+scaned||scanned
+scaning||scanning
+scarch||search
+schdule||schedule
+seach||search
+searchs||searches
+secion||section
+secquence||sequence
+secund||second
+segement||segment
+seleted||selected
+semaphone||semaphore
+senario||scenario
+senarios||scenarios
+sentivite||sensitive
+separatly||separately
+sepcify||specify
+seperated||separated
+seperately||separately
+seperate||separate
+seperatly||separately
+seperator||separator
+sepperate||separate
+seqeunce||sequence
+seqeuncer||sequencer
+seqeuencer||sequencer
+sequece||sequence
+sequemce||sequence
+sequencial||sequential
+serivce||service
+serveral||several
+servive||service
+setts||sets
+settting||setting
+shapshot||snapshot
+shoft||shift
+shotdown||shutdown
+shoud||should
+shouldnt||shouldn't
+shoule||should
+shrinked||shrunk
+siginificantly||significantly
+signabl||signal
+significanly||significantly
+similary||similarly
+similiar||similar
+simlar||similar
+simliar||similar
+simpified||simplified
+simultanous||simultaneous
+singaled||signaled
+singal||signal
+singed||signed
+sleeped||slept
+sliped||slipped
+softwade||software
+softwares||software
+soley||solely
+souce||source
+speach||speech
+specfic||specific
+specfield||specified
+speciefied||specified
+specifc||specific
+specifed||specified
+specificatin||specification
+specificaton||specification
+specificed||specified
+specifing||specifying
+specifiy||specify
+specifiying||specifying
+speficied||specified
+speicify||specify
+speling||spelling
+spinlcok||spinlock
+spinock||spinlock
+splitted||split
+spreaded||spread
+spurrious||spurious
+sructure||structure
+stablilization||stabilization
+staically||statically
+staion||station
+standardss||standards
+standartization||standardization
+standart||standard
+standy||standby
+stardard||standard
+staticly||statically
+statuss||status
+stoped||stopped
+stoping||stopping
+stoppped||stopped
+straming||streaming
+struc||struct
+structres||structures
+stuct||struct
+strucuture||structure
+stucture||structure
+sturcture||structure
+subdirectoires||subdirectories
+suble||subtle
+substract||subtract
+submited||submitted
+submition||submission
+succeded||succeeded
+suceed||succeed
+succesfully||successfully
+succesful||successful
+successed||succeeded
+successfull||successful
+successfuly||successfully
+sucessfully||successfully
+sucessful||successful
+sucess||success
+superflous||superfluous
+superseeded||superseded
+suplied||supplied
+suported||supported
+suport||support
+supportet||supported
+suppored||supported
+supportin||supporting
+suppoted||supported
+suppported||supported
+suppport||support
+supprot||support
+supress||suppress
+surpressed||suppressed
+surpresses||suppresses
+susbsystem||subsystem
+suspeneded||suspended
+suspsend||suspend
+suspicously||suspiciously
+swaping||swapping
+switchs||switches
+swith||switch
+swithable||switchable
+swithc||switch
+swithced||switched
+swithcing||switching
+swithed||switched
+swithing||switching
+swtich||switch
+syfs||sysfs
+symetric||symmetric
+synax||syntax
+synchonized||synchronized
+sychronization||synchronization
+synchronuously||synchronously
+syncronize||synchronize
+syncronized||synchronized
+syncronizing||synchronizing
+syncronus||synchronous
+syste||system
+sytem||system
+sythesis||synthesis
+taht||that
+tained||tainted
+tansmit||transmit
+targetted||targeted
+targetting||targeting
+taskelt||tasklet
+teh||the
+temorary||temporary
+temproarily||temporarily
+temperture||temperature
+thead||thread
+therfore||therefore
+thier||their
+threds||threads
+threee||three
+threshhold||threshold
+thresold||threshold
+throught||through
+trackling||tracking
+troughput||throughput
+trys||tries
+thses||these
+tiggers||triggers
+tiggered||triggered
+tipically||typically
+timeing||timing
+timout||timeout
+tmis||this
+toogle||toggle
+torerable||tolerable
+torlence||tolerance
+traget||target
+traking||tracking
+tramsmitted||transmitted
+tramsmit||transmit
+tranasction||transaction
+tranceiver||transceiver
+tranfer||transfer
+tranmission||transmission
+transcevier||transceiver
+transciever||transceiver
+transferd||transferred
+transfered||transferred
+transfering||transferring
+transision||transition
+transistioned||transitioned
+transmittd||transmitted
+transormed||transformed
+trasfer||transfer
+trasmission||transmission
+treshold||threshold
+triggerd||triggered
+trigerred||triggered
+trigerring||triggering
+trun||turn
+tunning||tuning
+ture||true
+tyep||type
+udpate||update
+uesd||used
+uknown||unknown
+usccess||success
+uncommited||uncommitted
+uncompatible||incompatible
+unconditionaly||unconditionally
+undeflow||underflow
+underun||underrun
+unecessary||unnecessary
+unexecpted||unexpected
+unexepected||unexpected
+unexpcted||unexpected
+unexpectd||unexpected
+unexpeted||unexpected
+unexpexted||unexpected
+unfortunatelly||unfortunately
+unifiy||unify
+uniterrupted||uninterrupted
+uninterruptable||uninterruptible
+unintialized||uninitialized
+unitialized||uninitialized
+unkmown||unknown
+unknonw||unknown
+unknouwn||unknown
+unknow||unknown
+unkown||unknown
+unamed||unnamed
+uneeded||unneeded
+unneded||unneeded
+unneccecary||unnecessary
+unneccesary||unnecessary
+unneccessary||unnecessary
+unnecesary||unnecessary
+unneedingly||unnecessarily
+unnsupported||unsupported
+unmached||unmatched
+unprecise||imprecise
+unregester||unregister
+unresgister||unregister
+unrgesiter||unregister
+unsinged||unsigned
+unstabel||unstable
+unsolicitied||unsolicited
+unsuccessfull||unsuccessful
+unsuported||unsupported
+untill||until
+ununsed||unused
+unuseful||useless
+unvalid||invalid
+upate||update
+upsupported||unsupported
+useable||usable
+usefule||useful
+usefull||useful
+usege||usage
+usera||users
+usualy||usually
+usupported||unsupported
+utilites||utilities
+utillities||utilities
+utilties||utilities
+utiltity||utility
+utitity||utility
+utitlty||utility
+vaid||valid
+vaild||valid
+valide||valid
+variantions||variations
+varible||variable
+varient||variant
+vaule||value
+verbse||verbose
+veify||verify
+verfication||verification
+veriosn||version
+verisons||versions
+verison||version
+verson||version
+vicefersa||vice-versa
+virtal||virtual
+virtaul||virtual
+virtiual||virtual
+visiters||visitors
+vitual||virtual
+vunerable||vulnerable
+wakeus||wakeups
+was't||wasn't
+wathdog||watchdog
+wating||waiting
+wiat||wait
+wether||whether
+whataver||whatever
+whcih||which
+whenver||whenever
+wheter||whether
+whe||when
+wierd||weird
+wiil||will
+wirte||write
+withing||within
+wnat||want
+wont||won't
+workarould||workaround
+writeing||writing
+writting||writing
+wtih||with
+zombe||zombie
+zomebie||zombie
diff --git a/tools/scripts/typedefs.txt b/tools/scripts/typedefs.txt
new file mode 100644
index 0000000..97f330d
--- /dev/null
+++ b/tools/scripts/typedefs.txt
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+fd_set
+Jim_Cmd
+Jim_CmdProc
+Jim_DelCmdProc
+Jim_Interp
+Jim_Obj