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| author | Tim Newsome <tim@sifive.com> | 2023-03-15 09:29:03 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-03-15 09:29:03 -0700 |
| commit | 750f7b4bc3afe71c7332d601138626192e17bd51 (patch) | |
| tree | fde5c5bdb800eff79be4b4af2c8c2655c5edacfa | |
| parent | 3e7a683980699a0d9a209758e82f7e591567c24d (diff) | |
| parent | 2370d78249f220e5584c4fe023abffbadcf785b0 (diff) | |
| download | riscv-openocd-750f7b4bc3afe71c7332d601138626192e17bd51.zip riscv-openocd-750f7b4bc3afe71c7332d601138626192e17bd51.tar.gz riscv-openocd-750f7b4bc3afe71c7332d601138626192e17bd51.tar.bz2 | |
Merge pull request #812 from XuHangHub/riscv
target/riscv: fix the bug of using S2 register in read_memory_progbuf
| -rw-r--r-- | src/target/riscv/riscv-013.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 3ee7a1c..3043b06 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3196,7 +3196,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres return result; if (increment == 0 && - register_write_direct(target, GDB_REGNO_S2, 0) != ERROR_OK) + register_write_direct(target, GDB_REGNO_A0, 0) != ERROR_OK) return ERROR_FAIL; uint32_t command = access_register_command(target, GDB_REGNO_S1, @@ -3298,7 +3298,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres /* See how far we got, clobbering dmi_data0. */ if (increment == 0) { uint64_t counter; - result = register_read_direct(target, &counter, GDB_REGNO_S2); + result = register_read_direct(target, &counter, GDB_REGNO_A0); next_index = counter; } else { uint64_t next_read_addr; @@ -3523,13 +3523,13 @@ static int read_memory_progbuf(struct target *target, target_addr_t address, /* s0 holds the next address to read from * s1 holds the next data value read - * s2 is a counter in case increment is 0 + * a0 is a counter in case increment is 0 */ if (riscv_save_register(target, GDB_REGNO_S0) != ERROR_OK) return ERROR_FAIL; if (riscv_save_register(target, GDB_REGNO_S1) != ERROR_OK) return ERROR_FAIL; - if (increment == 0 && riscv_save_register(target, GDB_REGNO_S2) != ERROR_OK) + if (increment == 0 && riscv_save_register(target, GDB_REGNO_A0) != ERROR_OK) return ERROR_FAIL; /* Write the program (load, increment) */ @@ -3559,7 +3559,7 @@ static int read_memory_progbuf(struct target *target, target_addr_t address, if (riscv_enable_virtual && has_sufficient_progbuf(target, 5) && get_field(mstatus, MSTATUS_MPRV)) riscv_program_csrrci(&program, GDB_REGNO_ZERO, CSR_DCSR_MPRVEN, GDB_REGNO_DCSR); if (increment == 0) - riscv_program_addi(&program, GDB_REGNO_S2, GDB_REGNO_S2, 1); + riscv_program_addi(&program, GDB_REGNO_A0, GDB_REGNO_A0, 1); else riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, increment); |