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riscv-opcodes
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This repo enumerates standard RISC-V instruction opcodes and control and
status registers. It also contains a script to convert them into several
formats (C, Scala, LaTeX).
This repo is not meant to stand alone; it is a subcomponent of
[riscv-tools](https://github.com/riscv/riscv-tools) and assumes that it
is part of that directory structure.
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