| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2013-11-29 | Add vsetprec instructionconfprec | Quan Nguyen | 1 | -0/+1 |
| 2013-10-17 | add hwacha exception support | Yunsup Lee | 1 | -0/+3 |
| 2013-10-17 | custom-1 opcodes are now 0x0A | Yunsup Lee | 1 | -12/+12 |
| 2013-10-10 | revamp hwacha-v3 opcodes | Yunsup Lee | 1 | -114/+68 |
| 2013-08-07 | hwacha v3: inst format follows the new rocket accelerator extensions | Yunsup Lee | 1 | -132/+112 |
| 2013-07-26 | Factor out Hwacha/RVC and rename MFTX/MXTF to FMV | Andrew Waterman | 1 | -0/+144 |
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index : riscv-tools/riscv-opcodes.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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path: root/opcodes-hwacha