Age | Commit message (Expand) | Author | Files | Lines |
2013-09-21 | Remove old file | Andrew Waterman | 1 | -160/+0 |
2013-08-06 | Rename MTFSR/MFFSR to FSSR/FRSR | Andrew Waterman | 1 | -2/+2 |
2013-07-31 | Swap J and JALR encodings | Andrew Waterman | 1 | -7/+7 |
2013-07-26 | Factor out Hwacha/RVC and rename MFTX/MXTF to FMV | Andrew Waterman | 1 | -127/+4 |
2013-07-25 | Refactor parse-opcodes | Andrew Waterman | 1 | -285/+282 |
2013-04-17 | add auipc, lr, sc | Andrew Waterman | 1 | -1/+5 |
2012-03-24 | new supervisor mode | Andrew Waterman | 1 | -14/+13 |
2012-03-18 | change vector fence names/encoding | Andrew Waterman | 1 | -6/+4 |
2012-03-18 | clean up vector exception instructions | Yunsup Lee | 1 | -7/+9 |
2012-03-13 | add more instructions for vector exception handling | Yunsup Lee | 1 | -1/+4 |
2012-03-13 | add vvcfg,vtcfg | Yunsup Lee | 1 | -0/+2 |
2012-03-13 | opcodes cleanup | Yunsup Lee | 1 | -3/+2 |
2012-03-10 | slight change to vector supervisor instructions | Yunsup Lee | 1 | -4/+4 |
2012-03-03 | new instructions to handle vector exceptions | Yunsup Lee | 1 | -0/+6 |
2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+273 |
2011-06-19 | Renamed packages | Andrew Waterman | 1 | -273/+0 |
2011-06-19 | [riscv-isa-run] code cleanup; added README | Andrew Waterman | 1 | -0/+1 |
2011-05-15 | [opcodes,pk,sim,xcc] resolve a conflict | Yunsup Lee | 1 | -4/+4 |
2011-05-15 | [libs,opcodes,pk,sim,xcc] add mov*,fmov*, shuffle vec insts | Yunsup Lee | 1 | -71/+76 |
2011-05-13 | tweaked encoding of rdcycle & cousins | Andrew Waterman | 1 | -3/+6 |
2011-05-06 | [opcodes] reordered RVC instructions | Andrew Waterman | 1 | -7/+7 |
2011-04-24 | [xcc,sim,opcodes] added c.addiw | Andrew Waterman | 1 | -0/+1 |
2011-04-24 | [xcc,sim,opcodes] added more RVC instructions | Andrew Waterman | 1 | -1/+20 |
2011-04-18 | [xcc,sim,opcodes] added rvc conditional branches | Andrew Waterman | 1 | -0/+2 |
2011-04-12 | [xcc,pk,sim] added privileged cflush instruction | Andrew Waterman | 1 | -0/+1 |
2011-04-12 | [xcc,sim] rvc loads and stores | Andrew Waterman | 1 | -0/+8 |
2011-04-11 | [xcc,sim,opcodes] more rvc instructions and bug fixes | Andrew Waterman | 1 | -0/+2 |
2011-04-09 | [xcc, sim] added rvc insn c.li; misc fixes | Andrew Waterman | 1 | -0/+1 |
2011-04-09 | [xcc,pk,sim,opcodes] added first RVC instruction | Andrew Waterman | 1 | -3/+3 |
2011-04-06 | [opcodes,pk,sim,xcc] fix utidx - add rd | Yunsup Lee | 1 | -1/+1 |
2011-04-05 | [opcodes,pk,sim,xcc] fix vector mem instruction format, add vector seg mem in... | Yunsup Lee | 1 | -33/+69 |
2011-04-04 | [opcodes,pk,sim,xcc] add leftover vector instructions (vf, etc.) | Yunsup Lee | 1 | -0/+5 |
2011-04-04 | [opcodes,pk,sim,xcc] add vector mem instructions | Yunsup Lee | 1 | -0/+30 |
2011-04-04 | [opcodes,pk,sim,xcc] add stop,utidx instructions | Yunsup Lee | 1 | -0/+2 |
2011-04-04 | [opcodes,pk,sim,xcc] add fence instructions for vector unit | Yunsup Lee | 1 | -0/+4 |
2011-03-25 | [opcodes] minor opcode changes | Andrew Waterman | 1 | -41/+41 |
2011-03-25 | [sim,pk,xcc,opcodes] removed fminmag/fmaxmag | Andrew Waterman | 1 | -4/+0 |
2011-03-25 | [xcc,pk,opcodes,sim] updated encoding/insn names | Andrew Waterman | 1 | -29/+38 |
2011-02-15 | [xcc,opcodes,pk,sim] krste's re-renaming spree | Andrew Waterman | 1 | -40/+40 |
2011-02-15 | [xcc,sim,opcodes] removed mtflh/mffl/mffh | Andrew Waterman | 1 | -3/+0 |
2011-02-02 | [sim,xcc,opcodes] added back mtflh.d | Andrew Waterman | 1 | -1/+2 |
2011-02-02 | [opcodes,pk,sim,xcc] synci now bombs whole icache | Andrew Waterman | 1 | -1/+1 |
2011-02-01 | [xcc,opcodes,pk,sim] cleanup to FP ISA | Andrew Waterman | 1 | -24/+23 |
2011-01-31 | [opcodes] fixed verilog generation for shifts | Andrew Waterman | 1 | -6/+6 |
2011-01-25 | [sim,opcodes] add mulhsu instruction | Andrew Waterman | 1 | -1/+2 |
2011-01-25 | [opcodes,pk,sim,xcc] great renumbering of 2011, part deux | Andrew Waterman | 1 | -145/+143 |
2011-01-20 | [sim, pk, xcc, opcodes] great instruction renaming of 2011 | Andrew Waterman | 1 | -79/+81 |
2011-01-18 | [opcodes, sim, xcc] made *w insns illegal in RV32 | Andrew Waterman | 1 | -2/+0 |
2011-01-17 | [opcodes, pk, sim, xcc] removed nor, normalized macros to addi | Andrew Waterman | 1 | -1/+0 |
2011-01-03 | [opcodes,pk,sim,xcc] flip fields to favor little endian | Yunsup Lee | 1 | -152/+152 |