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2026-04-29ext-p: fix typo (#414)HEADmasterChih-Min Chao1-1/+1
The opcode[1:0] should 3 but not 2 for 32bits encoding Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2026-03-24ext-p : update table to v0.20 (#413)Chih-Min Chao3-0/+22
Quoted from spec "This version (020) differs from the previous one (019) with the addition of: * SHL instructions (shift left or right, logical) that are unsigned versions of the SHA instructions (shift left or right, arithmetic); and * for RV64 only, ‘P’-suffi x versions of PNCLIP instructions that are similar to RV32 PNCLIP instructions without shifting or rounding. The complete set of instructions added for RV32 are: PSSHL.HS SSHL PSSHL.DHS PSSHL.DWS PSSHLR.HS SSHLR PSSHLR.DHS PSSHLR.DWS And for RV64: PSSHL.HS PSSHL.WS SHL PNCLIPP.B PNCLIPP.H PNCLIPP.W PSSHLR.HS PSSHLR.WS SHLR PNCLIPUP.B PNCLIPUP.H PNCLIPUP.W" reference: https://www.jhauser.us/RISCV/ext-P/RVP-instrEncodings-020.pdf Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2026-03-11Refine rvp (#409)Chih-Min Chao3-0/+784
* rvp: Add P extension This commit add encodings for P Extension: https://www.jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf Signed-off-by: 2011eric <201165r1c@gmail.com> * rvp: rename pmqwacc/mqrwacc Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: pdif has been renamed by pabd Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: fix some missing characters in instructions name Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: ppack has been renamed by ppair Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: add missing instructions Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: remove old grevi Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: convert 56 RV32 scalar instructions to pseudo-instructions of RV64 equivalents Based on RVP-instrEncodings-019.pdf, converted RV32 scalar instructions that share the same encoding with RV64 packed-word instructions to pseudo-instructions. Instructions converted (56 total): - Pages 4-8: sslai, ssha, sshar (3) - Page 9: sadd, aadd, saddu, aaddu, ssub, asub, ssubu, asubu (8) - Page 10: mul.h01, macc.h01, mulu.h01, maccu.h01 (4) - Page 11: sh1sadd (1) - Page 12: mul/macc/mulu/maccu/mulsu/maccsu.h00/h11 (12) - Page 14: mqacc.h01, mqracc.h01 (2) - Page 15: mseq, mslt, msltu (3) - Page 16: mulhr, mhacc, mhracc, mulhru, mhaccu, mhraccu, mulh.h0/h1, mulhsu.h0/h1, mhacc.h0/h1, mhaccsu.h0/h1, mulhrsu, mhaccsu, mhraccsu, mulq, mulqr, mqacc.h00/h11, mqracc.h00/h11 (23) Also removed packbt/packtb/packt pseudo-instructions that referenced non-existent rv64_p instructions. Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: align indent and add comment by page Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: fix mnemonic typo Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> * rvp: add P-extension scalar pseudo-ops to emitted_pseudo_ops --------- Signed-off-by: 2011eric <201165r1c@gmail.com> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Co-authored-by: 2011eric <201165r1c@gmail.com>
2026-02-13[Zvdot4a] Renaming Zvqdotq extension and vdotq instructions (#402)Nicolas Brunie2-7/+7
Following ARC feedback, renaming Zvqdotq extension to Zvdot4a (as a pattern for Zvdot4a8i since encodings could be shared by other SEW) and renaming vqdot instructions to vdot4a Co-authored-by: Nicolas Brunie <nibrunie@gmail.com>
2026-01-12Remove unratified rv64_zbp dependencies from ratified extensionsHeath Dutton🕴️16-30/+30
2025-12-28Update rv_zibi: add missing register field (#397)Puneet Goel1-2/+2
Signed-off-by: Puneet Goel <puneet@coverify.com>
2025-12-10Add Zfhmin extension (#395)robinali-codasip4-6/+8
* Add Zfhmin extension * Zfhmin is a subset of zfh so this moves some instructions from rv_zfh to the new rv_zfhmin file * rv_d_zfh -> rv_d_zfhmin as it only contains zfhmin instructions * Add q_zfhmin
2025-12-03Change immediate type of select vector-immediate instructions to zimm5 (#393)robinali-codasip1-12/+12
According to the RISC-V unprivileged spec, the following instructions have a zero-extended immediate: * vsll_vi * vsrl_vi", * vsra_vi * vnsrl_wi * vnsra_wi * vssrl_vi * vssra_vi * vnclipu_wi * vnclip_wi * vslideup_vi * vslidedown_vi * vrgather_vi
2025-12-02add zvabd draft spec (#381)Qian Jiayan1-0/+6
* add zvabd draft spec * renaming according to ARC review * fix missing newline
2025-11-14Add unratified Zvzip extension encodings (#391)Ved Shanbhogue1-0/+5
2025-10-30Split zabha into zabha and zabha_zacas (#384)robinali-codasip2-2/+5
* Split zabha into zabha and zabha_zacas * Move AMOCAS.H and AMOCAS.B instructions into the new rv_zabha_zacas file * Run pre-commit
2025-10-13updated instruction naming for rv_zvfofp8min (#377)Mladen Slijepcevic1-2/+2
2025-09-30ext: add zvfofp4min definition (#373)Chih-Min Chao1-0/+1
reference https://riscv.atlassian.net/wiki/spaces/FPXX/pages/552370182/2025-06-02+Ordinary+Meeting+Notes https://github.com/aswaterman/riscv-misc/blob/e1e20a75c9a9fa797519fcc11ee997c7a7be4503/isa/zvfofp4min.adoc Co-authored-by: tsewei-lin <tse-wei.lin@sifive.com>
2025-09-24add rv_zibi draft spec (#370)Chih-Min Chao1-0/+3
reference: https://github.com/riscv/zibi/releases/tag/v0.6 Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2025-09-03Add Zvldot/Zvbdot extension families (#366)Andrew Waterman7-0/+11
2025-08-04Move Zilsd & Zclsd to ratified extensions directory (#360)Christian Herber2-0/+13
* Move Zilsd & Zclsd to ratified extensions directory * Zilsd: Fixing difference in encoding to RV64 ld/sd * Zilsd: Define instructions using pseudo ops
2025-07-18Update Zvkn and Zvks extension according to Crypto Extensions Volume II (#345)Li Xiaogang2-28/+2
1. remove Zvbc import in Zvkn and Zvks extension 2. replace Zvbb with Zvkb in Zvkn and Zvks Co-authored-by: lixiaogang <lixiaogang@masscore.cn>
2025-07-07Fix #357 Incorrect data for zext.b (#358)Cillié Malan1-1/+1
2025-03-24Fix file name: smdbltrp -> ssctr (#350)Ved Shanbhogue1-0/+0
2025-03-18Change zimm variable to zimm5, since they were exactly the same. Fixes #342. ↵Afonso Oliveira3-9/+9
(#347) Signed-off-by: Afonso Oliveira <Afonso.Oliveira@synopsys.com>
2025-03-03Add Zvfofp8min draftAndrew Waterman1-0/+3
2025-02-14Add encodings for Zvqdotq instrutions (#337)Andrew Waterman1-0/+7
2024-11-21Updated extensions to ratified state (#324)Ved Shanbhogue8-0/+0
* Update ratified opcodes * Update ratified opcodes
2024-11-07restructured codebaseMyrausman108-0/+1608
Signed-off-by: Myrausman <maira.usman5703@gmail.com>
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