index
:
riscv-tools/riscv-opcodes.git
confprec
debug
incoresemi-migration-to-new-format
latex-based-output-refactor
llvm-encodings
master
mvp
riscv-bitmanip
rnmi
rvv
v
vadc
wfmi
zfh
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
encoding.h
Age
Commit message (
Expand
)
Author
Files
Lines
2024-04-10
Add mstateen0[60] for Smcsrind/Sscsrind (#241)
YenHaoChen
1
-0
/
+4
2024-04-10
Add stateen0[59] for AIA (#242)
YenHaoChen
1
-0
/
+4
2024-02-26
Add definition of low-priority and high-priority RAS event from AIA (#234)
YenHaoChen
1
-15
/
+19
2024-02-21
Add CSR fields of mtopi
YenHaoChen
1
-0
/
+3
2024-02-18
Remove erroneous MSTATEEN0[H]_HENVCFGH macros (#230)
Andrew Waterman
1
-2
/
+0
2024-02-15
Add CSR fields of hvictl (#228)
YenHaoChen
1
-0
/
+6
2024-02-03
Add Zicfilp codes (#225)
mylai-mtk
1
-0
/
+3
2023-12-25
update mstateen0 fields (#218)
Ved Shanbhogue
1
-1
/
+4
2023-12-23
add srmcfg CSR
Ved Shanbhogue
1
-0
/
+4
2023-11-27
CSR fields introduced by Zicfilp (#210)
Ved Shanbhogue
1
-0
/
+8
2023-11-24
CSR fields introduced by Zicfiss
Ved Shanbhogue
1
-0
/
+3
2023-08-13
Svadu: Rename HADE to ADUE
Ved Shanbhogue
1
-4
/
+4
2023-07-12
Add Smcdeleg CSR+constants
Atul Khare
1
-0
/
+13
2023-03-16
Add Snrmni CSR and field definitions
Andrew Waterman
1
-0
/
+4
2023-01-26
Add support for Svadu
Aaron Durbin
1
-0
/
+4
2022-11-17
Add support for Zc* extensions (#107)
liweiwei90
1
-0
/
+7
2022-07-22
Move the SPDX tag to the first line (#137)
Antonio Borneo
1
-2
/
+0
2022-07-06
Remove UCB HTIF-specific interrupt from encoding.h
Andrew Waterman
1
-1
/
+0
2022-07-04
add field definition for MIP/SIP csrs added by Sscofpmf extension
Weiwei Li
1
-0
/
+2
2022-07-04
add field definition for mhpmevent csrs added by Sscofpmf extension
Weiwei Li
1
-0
/
+14
2022-07-02
add field definition for stateen csrs
Weiwei Li
1
-0
/
+23
2022-06-30
Change license to BSD-3-Clause-Clear (#133)
Tim Newsome
1
-1
/
+1
2022-03-28
Define HGATP_MODE_SV57X4 for Sv57x4 translation mode
Andrew Waterman
1
-0
/
+1
2021-12-16
Add new CSR bits defined in Privileged Spec version 1.12 (#94)
Tsukasa #01 (a4lg)
1
-0
/
+31
2021-11-02
Remove no-longer-used SSTATUS_VS_MASK
Scott Johnson
1
-4
/
+0
2021-11-02
Add new hypervisor bits to mstatush
Scott Johnson
1
-0
/
+2
2021-07-19
Virtual memory updates (#76)
Daniel Lustig
1
-0
/
+3
2021-06-07
Update PTE_N encoding
Andrew Waterman
1
-1
/
+1
2021-01-23
Removing platform-specific definitions (#59)
Dan Petrisko
1
-6
/
+0
2021-01-08
Add Zsn to encoding.h
Andrew Waterman
1
-0
/
+1
2021-01-08
Update mstatus/sstatus fields for hypervisor v0.6
Andrew Waterman
1
-2
/
+8
2020-07-31
hyperviosr: add csr mask and interrupt macro name
Chih-Min Chao
1
-7
/
+46
2020-05-04
Add DCSR_CAUSE_GROUP. (#44)
Tim Newsome
1
-0
/
+1
2020-02-24
Add N-extension CSRs and status bits. (#37)
michael-roe
1
-0
/
+9
2020-02-13
Remove mstatus.HPP; move mstatus.VS to its old location
Andrew Waterman
1
-3
/
+2
2019-11-28
rvv: add vleb csr register and mstatus.vs field
Chih-Min Chao
1
-0
/
+2
2017-12-27
Use old C style comments. (#18)
Tim Newsome
1
-11
/
+11
2017-11-27
Rename sptbr to satp and sbadaddr to stval
Andrew Waterman
1
-15
/
+15
2017-05-07
Add UXl/SXL
Andrew Waterman
1
-0
/
+3
2017-03-30
New PMP encoding
Andrew Waterman
1
-5
/
+6
2017-03-27
Separate page faults from physical memory access exceptions
Andrew Waterman
1
-3
/
+2
2017-03-23
Add PMP
Andrew Waterman
1
-1
/
+12
2017-03-23
Add TW/TVM/TSR fields to mstatus
Andrew Waterman
1
-1
/
+4
2017-03-09
Update SPTBR fields
Andrew Waterman
1
-14
/
+9
2017-02-20
Use gcc csr register constraint
Andrew Waterman
1
-16
/
+4
2017-02-20
Drop mstatus.VM field
Andrew Waterman
1
-1
/
+0
2017-02-08
Encode VM type in sptbr, not mstatus
Andrew Waterman
1
-0
/
+14
2016-12-06
avoid non-standard predefined macros
Andrew Waterman
1
-1
/
+1
2016-08-26
Add mcontrol type constants. (#11)
Tim Newsome
1
-0
/
+3
2016-08-25
Make hardware triggers match latest spec.
Tim Newsome
1
-18
/
+30
[next]