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author | Atul Khare <atulkhare@rivosinc.com> | 2023-07-07 10:47:46 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2023-07-12 17:12:19 -0700 |
commit | 99d5c26cec50c6bd4ac6d409691e909ba37b20c4 (patch) | |
tree | 5e0c51626fbdf895dcb0ab2f23c36c7ebd9a514a /encoding.h | |
parent | be53d2453ff46e13eba372de208f1c719635e67b (diff) | |
download | riscv-opcodes-99d5c26cec50c6bd4ac6d409691e909ba37b20c4.zip riscv-opcodes-99d5c26cec50c6bd4ac6d409691e909ba37b20c4.tar.gz riscv-opcodes-99d5c26cec50c6bd4ac6d409691e909ba37b20c4.tar.bz2 |
Add Smcdeleg CSR+constants
Adds CSR scountinhibit (0x120), MSTATEEN0.CD (bit 56), and siselect
range (0x40 - 0x5F).
Diffstat (limited to 'encoding.h')
-rw-r--r-- | encoding.h | 13 |
1 files changed, 13 insertions, 0 deletions
@@ -163,6 +163,7 @@ #define MSTATEEN0_FCSR 0x00000002 #define MSTATEEN0_JVT 0x00000004 #define MSTATEEN0_HCONTEXT 0x0200000000000000 +#define MSTATEEN0_CD 0x0100000000000000 #define MSTATEEN0_HENVCFG 0x4000000000000000 #define MSTATEEN_HSTATEEN 0x8000000000000000 @@ -196,6 +197,18 @@ #define HENVCFGH_PBMTE 0x40000000 #define HENVCFGH_STCE 0x80000000 +#define SISELECT_SMCDELEG_START 0x40 +#define SISELECT_SMCDELEG_UNUSED 0x41 +#define SISELECT_SMCDELEG_INSTRET 0x42 +#define SISELECT_SMCDELEG_INSTRETCFG 0x42 +/* + * ?iselect values for hpmcounters4..31 and hpmevent4..31 + * can easily computed, and were elided for brevity. + */ +#define SISELECT_SMCDELEG_HPMCOUNTER_3 0x43 +#define SISELECT_SMCDELEG_HPMEVENT_3 0x43 +#define SISELECT_SMCDELEG_END 0x5f + #define HSTATEEN0_CS 0x00000001 #define HSTATEEN0_FCSR 0x00000002 #define HSTATEEN0_JVT 0x00000004 |