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2021-08-03Fix Svinval rs1 encodings (#78)Daniel Lustig1-5/+5
2021-07-28Add missing aliases for vle1.v/vse1.vAndrew Waterman1-0/+3
2021-07-28Merge pull request #60 from riscv/p-extAndrew Waterman3-1/+334
2021-07-28RVP: v0.9.2 supportChun-Ping Chung1-327/+327
2021-07-28RVP: format opcodeChun-Ping Chung1-329/+327
2021-07-28RVP: v0.9.1 supportChun-Ping Chung2-26/+23
2021-07-28RVP: v0.5.2 supportChun-Ping Chung3-1/+339
2021-07-28Merge pull request #77 from ben-marshall/masterAndrew Waterman2-66/+4
2021-07-28scalar-crypto: Remove rv*_only logic.Ben Marshall1-54/+0
2021-07-23scalar-crypto: post arch-review aes32* opcode changeBen Marshall2-12/+4
2021-07-19Virtual memory updates (#76)Daniel Lustig4-1/+16
2021-07-18rvv: remove dot and qmac instructions (#75)Chih-Min Chao1-7/+0
2021-07-13Updated several RVV instructions (#74)Zhen Wei2-10/+20
2021-06-20Move shift instructions to opcodes-rv64i (#68)Andrew Waterman2-3/+5
2021-06-07Update PTE_N encodingAndrew Waterman1-1/+1
2021-06-04scalar-crypto: Opcode updates for v0.9.2 (#66)Ben Marshall4-8/+8
2021-04-05Add fence.tso and pause instructionsAndrew Waterman1-2/+2
2021-03-11update vmv.x.s opcode (#65)leahyao1-1/+1
2021-03-08Merge pull request #63 from ben-marshall/scalar-cryptoAndrew Waterman5-3/+136
2021-02-24Merge pull request #64 from chihminchao/rvv-v0.10Andrew Waterman2-5/+9
2021-02-23rvv: add vsetivliChih-Min Chao2-3/+5
2021-02-23rvv: rename reciprocal instructionsChih-Min Chao1-2/+2
2021-02-23rvv: add vle1/vse1 instructionsChih-Min Chao1-0/+2
2021-02-19scalar-crypto: Apply suggestions from code reviewBen Marshall3-5/+2
2021-02-19scalar-crypto: Add opcodes for RV32K, RV64KBen Marshall5-3/+139
2021-01-23Removing platform-specific definitions (#59)Dan Petrisko1-6/+0
2021-01-22Update Go instruction encoding generation (#34)Joel Sing1-4/+4
2021-01-17rvb: add xperm.[nbhw] (#56)Chih-Min Chao2-0/+6
2021-01-08Add Zfh encodingAndrew Waterman5-1/+46
2021-01-08Update Zba/Zbc/Zbs mnemonics to v0.93; Zbe to v0.94-draftAndrew Waterman2-19/+19
2021-01-08Add Zsn to encoding.hAndrew Waterman1-0/+1
2021-01-08Update mstatus/sstatus fields for hypervisor v0.6Andrew Waterman1-2/+8
2020-12-02Merge pull request #55 from chihminchao/rvv-pre-1.0-index-and-quadAndrew Waterman1-31/+36
2020-12-02rvv: follow change of indexed ordered/unordered load/storeChih-Min Chao1-26/+36
2020-12-02rvv: remove quad instructionsChih-Min Chao1-5/+0
2020-11-20Remove instructions already removed from RV64BAndrew Waterman1-7/+0
2020-11-13Merge branch 'riscv-bitmanip'Andrew Waterman3-1/+132
2020-11-13Remove subu.wriscv-bitmanipAndrew Waterman1-1/+0
2020-11-13Update minu/max encodingsAndrew Waterman1-2/+2
2020-11-09Add GitHub Actions file (#53)Pavel I. Kryukov1-0/+21
2020-11-08Support generating Rust code (#52)Ngo Iok Ui (Wu Yu Wei)2-0/+16
2020-10-14Adding four trigger CSRs to the list (#50)Jan Matyas1-0/+4
2020-09-17Add encodings of vfrsqrte7.v and vfrece7.v (#49)Zhen Wei1-0/+2
2020-08-21Add header to .h files. (#48)Tim Newsome1-1/+6
2020-08-03Make *.vv operand naming be consistent with type (#46)Zhen Wei1-48/+48
2020-07-31Merge pull request #45 from chihminchao/rvv-and-hypervisorAndrew Waterman8-47/+141
2020-07-31hyperviosr: add csr mask and interrupt macro nameChih-Min Chao6-13/+70
2020-07-27rvv: add eew 128 ~ 1024 load/store opcodeChih-Min Chao1-33/+65
2020-07-27rvv: add whole ldst pseudo instruction and update reference linkChih-Min Chao2-1/+6
2020-07-21Add vrgatherei16.vvAndrew Waterman1-10/+11
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