Separate FENCE.I and CSRRx from RV32I table

1 files changed, 15 insertions, 9 deletions

diff --git a/parse-opcodes b/parse-opcodes
index e4fc3b1..6ad06f1 100755
--- a/parse-opcodes
+++ b/parse-opcodes
@@ -748,10 +748,8 @@ def make_latex_table():
   print_insts('lb', 'lh', 'lw', 'lbu', 'lhu', 'sb', 'sh', 'sw')
   print_insts('addi', 'slti', 'sltiu', 'xori', 'ori', 'andi', 'slli.rv32', 'srli.rv32', 'srai.rv32')
   print_insts('add', 'sub', 'sll', 'slt', 'sltu', 'xor', 'srl', 'sra', 'or', 'and')
-  print_insts('fence', 'fence.i')
+  print_insts('fence')
   print_insts('ecall', 'ebreak')
-  print_insts('csrrw', 'csrrs', 'csrrc')
-  print_insts('csrrwi', 'csrrsi', 'csrrci')
   print_footer()
 
   print_header('r','a','i','s')
@@ -760,24 +758,32 @@ def make_latex_table():
   print_insts('slli', 'srli', 'srai')
   print_insts('addiw', 'slliw', 'srliw', 'sraiw')
   print_insts('addw', 'subw', 'sllw', 'srlw', 'sraw')
+  print_subtitle('RV32/RV64 \emph{Zifencei} Standard Extension')
+  print_insts('fence.i')
+  print_subtitle('RV32/RV64 Control and Status Register Access Instructions')
+  print_insts('csrrw', 'csrrs', 'csrrc')
+  print_insts('csrrwi', 'csrrsi', 'csrrci')
   print_subtitle('RV32M Standard Extension')
   print_insts('mul', 'mulh', 'mulhsu', 'mulhu')
   print_insts('div', 'divu', 'rem', 'remu')
   print_subtitle('RV64M Standard Extension (in addition to RV32M)')
   print_insts('mulw', 'divw', 'divuw', 'remw', 'remuw')
+  print_footer()
+
+  print_header('r')
   print_subtitle('RV32A Standard Extension')
   print_insts('lr.w', 'sc.w')
   print_insts('amoswap.w')
   print_insts('amoadd.w', 'amoxor.w', 'amoand.w', 'amoor.w')
   print_insts('amomin.w', 'amomax.w', 'amominu.w', 'amomaxu.w')
-  print_footer()
-
-  print_header('r','r4','i','s')
   print_subtitle('RV64A Standard Extension (in addition to RV32A)')
   print_insts('lr.d', 'sc.d')
   print_insts('amoswap.d')
   print_insts('amoadd.d', 'amoxor.d', 'amoand.d', 'amoor.d')
   print_insts('amomin.d', 'amomax.d', 'amominu.d', 'amomaxu.d')
+  print_footer()
+
+  print_header('r','r4','i','s')
   print_subtitle('RV32F Standard Extension')
   print_insts('flw', 'fsw')
   print_insts('fmadd.s', 'fmsub.s', 'fnmsub.s', 'fnmadd.s')
@@ -786,12 +792,12 @@ def make_latex_table():
   print_insts('fcvt.w.s', 'fcvt.wu.s', 'fmv.x.w')
   print_insts('feq.s', 'flt.s', 'fle.s', 'fclass.s')
   print_insts('fcvt.s.w', 'fcvt.s.wu', 'fmv.w.x')
-  print_footer()
-
-  print_header('r','r4','i','s')
   print_subtitle('RV64F Standard Extension (in addition to RV32F)')
   print_insts('fcvt.l.s', 'fcvt.lu.s')
   print_insts('fcvt.s.l', 'fcvt.s.lu')
+  print_footer()
+
+  print_header('r','r4','i','s')
   print_subtitle('RV32D Standard Extension')
   print_insts('fld', 'fsd')
   print_insts('fmadd.d', 'fmsub.d', 'fnmsub.d', 'fnmadd.d')