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| author | Rustem Yunusov <32241303+BEANefiT@users.noreply.github.com> | 2019-04-25 00:15:57 +0300 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-04-24 14:15:57 -0700 |
| commit | 376c833139c6f230d1eaca8a7028c1e8f55b7976 (patch) | |
| tree | a698c5996f550c1dae2e213a69d9fdae4b6a5823 | |
| parent | 308d16c30acd86f6814ef12cbc0e507a8c588f4e (diff) | |
| download | riscv-opcodes-376c833139c6f230d1eaca8a7028c1e8f55b7976.zip riscv-opcodes-376c833139c6f230d1eaca8a7028c1e8f55b7976.tar.gz riscv-opcodes-376c833139c6f230d1eaca8a7028c1e8f55b7976.tar.bz2 | |
Add RV128 opcodes (#26)
| -rw-r--r-- | opcodes-rvc | 8 | ||||
| -rw-r--r-- | opcodes-rvc-pseudo | 6 |
2 files changed, 10 insertions, 4 deletions
diff --git a/opcodes-rvc b/opcodes-rvc index ef1a1ac..af5dbff 100644 --- a/opcodes-rvc +++ b/opcodes-rvc @@ -2,10 +2,10 @@ # C0 encoding space c.addi4spn 1..0=0 15..13=0 12=ignore 11..2=ignore -c.fld 1..0=0 15..13=1 12=ignore 11..2=ignore +c.fld 1..0=0 15..13=1 12=ignore 11..2=ignore # c.lq for RV128 c.lw 1..0=0 15..13=2 12=ignore 11..2=ignore c.flw 1..0=0 15..13=3 12=ignore 11..2=ignore # c.ld for RV64 -c.fsd 1..0=0 15..13=5 12=ignore 11..2=ignore +c.fsd 1..0=0 15..13=5 12=ignore 11..2=ignore # c.sq for RV128 c.sw 1..0=0 15..13=6 12=ignore 11..2=ignore c.fsw 1..0=0 15..13=7 12=ignore 11..2=ignore # c.sd for RV64 @@ -29,11 +29,11 @@ c.bnez 1..0=1 15..13=7 12=ignore 11..2=ignore # C2 encoding space c.slli 1..0=2 15..13=0 12=ignore 11..2=ignore -c.fldsp 1..0=2 15..13=1 12=ignore 11..2=ignore +c.fldsp 1..0=2 15..13=1 12=ignore 11..2=ignore # c.lqsp for RV128 c.lwsp 1..0=2 15..13=2 12=ignore 11..2=ignore c.flwsp 1..0=2 15..13=3 12=ignore 11..2=ignore # c.ldsp for RV64 c.mv 1..0=2 15..13=4 12=0 11..2=ignore # !rs2 = c.jr c.add 1..0=2 15..13=4 12=1 11..2=ignore # !rs1 = c.ebreak; !rs2=c.jalr -c.fsdsp 1..0=2 15..13=5 12=ignore 11..2=ignore +c.fsdsp 1..0=2 15..13=5 12=ignore 11..2=ignore # c.sqsp for RV128 c.swsp 1..0=2 15..13=6 12=ignore 11..2=ignore c.fswsp 1..0=2 15..13=7 12=ignore 11..2=ignore # c.sdsp for RV64 diff --git a/opcodes-rvc-pseudo b/opcodes-rvc-pseudo index 2f60cc6..a75528b 100644 --- a/opcodes-rvc-pseudo +++ b/opcodes-rvc-pseudo @@ -13,3 +13,9 @@ @c.addiw 1..0=1 15..13=1 12=ignore 11..2=ignore # c.jal for RV32 @c.ldsp 1..0=2 15..13=3 12=ignore 11..2=ignore # c.flwsp for RV32 @c.sdsp 1..0=2 15..13=7 12=ignore 11..2=ignore # c.fswsp for RV32 + +# RV128C +@c.lq 1..0=0 15..13=1 12=ignore 11..2=ignore # c.fld for RV32/64 +@c.sq 1..0=0 15..13=5 12=ignore 11..2=ignore # c.fsd for RV32/64 +@c.lqsp 1..0=2 15..13=1 12=ignore 11..2=ignore # c.fldsp for RV32/64 +@c.sqsp 1..0=2 15..13=5 12=ignore 11..2=ignore # c.fsdsp for RV32/64 |