riscv-tools/riscv-isa-sim.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
6 days	Merge pull request #2207 from riscv-software-src/fix-2206HEAD master	Andrew Waterman	32	-76/+83
6 days	Retire dirty_vs_state macro	Andrew Waterman	2	-3/+2
6 days	Don't write vstart in set_vl	Andrew Waterman	1	-1/+0
6 days	Make sure VS is set on fault-only-first loads in all cases	Andrew Waterman	1	-2/+4
6 days	Make all vector ALU instructions invoke VECTOR_END, dirtying VS	Andrew Waterman	30	-31/+69
6 days	Dramatically simplify whole-register loads/stores	Andrew Waterman	1	-39/+8
7 days	Merge pull request #2239 from riscv-software-src/fix-2238	Andrew Waterman	4	-29/+30
7 days	Remove incorrect use of static variable	Andrew Waterman	1	-3/+2
7 days	Simplify masking of mnstatus bits when H is toggled	Andrew Waterman	1	-4/+4
7 days	Simplify masking of medeleg bits when H is toggled	Andrew Waterman	1	-10/+2
7 days	Simplify masking of mhpmevent bits when H is toggled	Andrew Waterman	1	-3/+2
7 days	Make minstretcfg/mcyclecfg privilege bits read-only zero as appropriate	Andrew Waterman	4	-9/+20
8 days	Merge pull request #2236 from riscv-software-src/fix-2235	Andrew Waterman	1	-1/+1
8 days	Merge pull request #2234 from hirooih/README.md-gdb-semihosting	Andrew Waterman	1	-58/+48
8 days	Merge pull request #2165 from FrancescoScappatura-Ax/dtb_discovery_feature	Andrew Waterman	22	-10/+835
8 days	Don't error out if program buffer has size 0	Andrew Waterman	1	-1/+1
8 days	Updated “Debugging With Gdb” to use semihosting	Hiroo HAYASHI	1	-58/+48
9 days	DTB discovery feature	Francesco Scappatura	22	-10/+835
2026-02-12	Merge pull request #2232 from riscv-software-src/fix-2230	Andrew Waterman	1	-1/+1
2026-02-12	Disallow delegation of misaligned-fetch exceptions when IALIGN=16	Andrew Waterman	1	-1/+1
2026-02-09	Merge pull request #2228 from abejgonzalez/patch-2	Andrew Waterman	1	-1/+1
2026-02-09	Modify in_bits to check in_valid before accessing	Abraham Gonzalez	1	-1/+1
2026-02-04	Merge pull request #2227 from riscv-software-src/fix-2221	Andrew Waterman	1	-4/+4
2026-02-04	Raise correct trap in U-mode on indirect CSRs when !mstateen.csrind	Andrew Waterman	1	-4/+4
2026-01-27	Merge pull request #2221 from DymShanks/fix/vu-mode-sireg	Andrew Waterman	1	-0/+4
2026-01-26	Fix: Enforce virtual_instruction trap for VU-mode indirect CSR access	DymShanks	1	-0/+4
2026-01-25	Merge pull request #2223 from riscv-software-src/fix-deps	Andrew Waterman	5	-423/+384
2026-01-25	Have Zabha imply extensions rather than erroring if not present	Andrew Waterman	1	-12/+3
2026-01-25	Have ZC* imply extensions rather than erroring if not present	Andrew Waterman	1	-5/+5
2026-01-25	Have Zvfofp4min imply extensions rather than erroring if not present	Andrew Waterman	1	-8/+2
2026-01-25	Clean up handling of Zcf	Andrew Waterman	2	-12/+10
2026-01-25	Have V imply extensions rather than erroring if not present	Andrew Waterman	1	-10/+6
2026-01-25	Have Z[v]fbfmin imply extensions rather than erroring if not present	Andrew Waterman	1	-16/+6
2026-01-25	Have Zvfhmin imply extensions rather than erroring if not present	Andrew Waterman	1	-9/+2
2026-01-25	Factor out add_extension method	Andrew Waterman	2	-343/+351
2026-01-25	Have Zfhmin imply extensions rather than erroring if not present	Andrew Waterman	1	-12/+11
2026-01-25	Have Zclsd imply extensions rather than erroring if not present	Andrew Waterman	1	-9/+8
2026-01-25	Have Zicfiss imply extensions rather than erroring if not present	Andrew Waterman	1	-10/+4
2026-01-25	Zicfiss depends on Zaamo	Andrew Waterman	3	-2/+1
2026-01-25	Don't log commits in snippy tests	Andrew Waterman	1	-1/+1
2026-01-25	Merge pull request #2224 from riscv-software-src/add-vector-test	Andrew Waterman	2	-0/+30
2026-01-25	Echo CI commands to ease debugging	Andrew Waterman	1	-0/+1
2026-01-25	Add simple vector extension test to CI	Andrew Waterman	2	-0/+29
2026-01-21	Merge pull request #2198 from riscv-software-src/fix-amocas-q	Andrew Waterman	1	-34/+12
2026-01-21	Make reg_from_bytes a bit less gross	Andrew Waterman	1	-22/+6
2026-01-21	DRY in logging code	Andrew Waterman	1	-9/+4
2026-01-21	Fix triggers for accesses wider than XLEN	Andrew Waterman	1	-3/+2
2026-01-20	Merge pull request #2216 from pointerliu/fix-tw-read	Andrew Waterman	1	-1/+2
2026-01-21	csrs.cc: if no U-mode, mstatus.tw is read-only 0	pointerliu	1	-1/+2
2026-01-13	Merge pull request #2208 from riscv-software-src/remove-grevi	Andrew Waterman	13	-360/+412