riscv-tools/riscv-isa-sim.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
5 days	Merge pull request #2227 from riscv-software-src/fix-2221HEAD master	Andrew Waterman	1	-4/+4
5 days	Raise correct trap in U-mode on indirect CSRs when !mstateen.csrind	Andrew Waterman	1	-4/+4
13 days	Merge pull request #2221 from DymShanks/fix/vu-mode-sireg	Andrew Waterman	1	-0/+4
2026-01-26	Fix: Enforce virtual_instruction trap for VU-mode indirect CSR access	DymShanks	1	-0/+4
2026-01-25	Merge pull request #2223 from riscv-software-src/fix-deps	Andrew Waterman	5	-423/+384
2026-01-25	Have Zabha imply extensions rather than erroring if not present	Andrew Waterman	1	-12/+3
2026-01-25	Have ZC* imply extensions rather than erroring if not present	Andrew Waterman	1	-5/+5
2026-01-25	Have Zvfofp4min imply extensions rather than erroring if not present	Andrew Waterman	1	-8/+2
2026-01-25	Clean up handling of Zcf	Andrew Waterman	2	-12/+10
2026-01-25	Have V imply extensions rather than erroring if not present	Andrew Waterman	1	-10/+6
2026-01-25	Have Z[v]fbfmin imply extensions rather than erroring if not present	Andrew Waterman	1	-16/+6
2026-01-25	Have Zvfhmin imply extensions rather than erroring if not present	Andrew Waterman	1	-9/+2
2026-01-25	Factor out add_extension method	Andrew Waterman	2	-343/+351
2026-01-25	Have Zfhmin imply extensions rather than erroring if not present	Andrew Waterman	1	-12/+11
2026-01-25	Have Zclsd imply extensions rather than erroring if not present	Andrew Waterman	1	-9/+8
2026-01-25	Have Zicfiss imply extensions rather than erroring if not present	Andrew Waterman	1	-10/+4
2026-01-25	Zicfiss depends on Zaamo	Andrew Waterman	3	-2/+1
2026-01-25	Don't log commits in snippy tests	Andrew Waterman	1	-1/+1
2026-01-25	Merge pull request #2224 from riscv-software-src/add-vector-test	Andrew Waterman	2	-0/+30
2026-01-25	Echo CI commands to ease debugging	Andrew Waterman	1	-0/+1
2026-01-25	Add simple vector extension test to CI	Andrew Waterman	2	-0/+29
2026-01-21	Merge pull request #2198 from riscv-software-src/fix-amocas-q	Andrew Waterman	1	-34/+12
2026-01-21	Make reg_from_bytes a bit less gross	Andrew Waterman	1	-22/+6
2026-01-21	DRY in logging code	Andrew Waterman	1	-9/+4
2026-01-21	Fix triggers for accesses wider than XLEN	Andrew Waterman	1	-3/+2
2026-01-20	Merge pull request #2216 from pointerliu/fix-tw-read	Andrew Waterman	1	-1/+2
2026-01-21	csrs.cc: if no U-mode, mstatus.tw is read-only 0	pointerliu	1	-1/+2
2026-01-13	Merge pull request #2208 from riscv-software-src/remove-grevi	Andrew Waterman	13	-360/+412
2026-01-13	Don't rely on definition of unratified bitmanip opcodes	Andrew Waterman	13	-333/+389
2026-01-13	Clean up grevi/gorci/shfli/unshfli implementations	Andrew Waterman	4	-29/+25
2026-01-12	Merge pull request #2205 from Steven-Li-Xiaogang/master	Andrew Waterman	1	-6/+8
2026-01-03	correct smcdeleg indirect CSRs address accessed via sireg*	steven	1	-6/+8
2026-01-02	Merge pull request #2191 from Steven-Li-Xiaogang/master	Andrew Waterman	2	-4/+6
2026-01-02	Merge pull request #2204 from mmhus/mmhus/mireg-sireg-fixes	Andrew Waterman	3	-54/+82
2026-01-02	fixed smcdeleg to be limited to, holds a value in the range 0x40-0x5F, from p...	muhammad.moiz.hussain	1	-35/+38
2026-01-02	changed minstret to instret and mcycle to cycle	muhammad.moiz.hussain	2	-18/+34
2026-01-02	when AIA throw virt intruction exception and V=1 & vs-mode, otherwise throw i...	muhammad.moiz.hussain	1	-1/+10
2025-12-31	Merge pull request #2193 from mslijepc/mslijepc_20251224_zicclsm	Andrew Waterman	6	-5/+4
2025-12-29	removed cfg.misaligned option	mslijepc	4	-5/+1
2025-12-27	Merge pull request #2197 from omerguzelelectronicguy/master	Andrew Waterman	2	-3/+5
2025-12-27	Merge pull request #2161 from fkhaidari/fk/trig-algo-mod	Andrew Waterman	4	-75/+116
2025-12-26	unnecessary dtb to dts operation removed	Ömer Güzel	2	-3/+5
2025-12-25	Update trigger behavior for memory accesses to match recommended debug specif...	Farid Khaydari	4	-75/+116
2025-12-24	Merge pull request #2194 from riscv-software-src/fix-2192	Andrew Waterman	1	-1/+0
2025-12-24	Remove declaration for undefined function	Andrew Waterman	1	-1/+0
2025-12-24	added support for zicclsm	mslijepc	3	-1/+4
2025-12-24	register indirection CSRs 'iprio0~iprio15' when Smaia/Ssaia supported	steven	2	-4/+6
2025-12-23	Merge pull request #2189 from Steven-Li-Xiaogang/master	Andrew Waterman	1	-5/+1
2025-12-23	Better to raise an illegal-instruction exception upon accessing sireg*	steven	1	-5/+1
2025-12-17	Merge pull request #2187 from riscv-software-src/2186-redux	Andrew Waterman	1	-4/+4