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| author | Andrew Waterman <andrew@sifive.com> | 2019-03-31 00:55:32 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-03-31 17:13:25 -0700 |
| commit | 1d08559a0280a0b975381ea4a0591ecd9ee56059 (patch) | |
| tree | 20de79c5f9db89542cc122f83c4d19fa8e6e926b /README.md | |
| parent | bce7b5e363957c134f944769e677354467b7e4ed (diff) | |
| download | riscv-tools-1d08559a0280a0b975381ea4a0591ecd9ee56059.zip riscv-tools-1d08559a0280a0b975381ea4a0591ecd9ee56059.tar.gz riscv-tools-1d08559a0280a0b975381ea4a0591ecd9ee56059.tar.bz2 | |
Merge fesvr into spike repo; bump spike to v1.0.0
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 2 |
1 files changed, 0 insertions, 2 deletions
@@ -13,8 +13,6 @@ enumeration of all RISC-V opcodes executable by the simulator a boot loader for Linux and similar OS kernels, and `pk`, a proxy kernel that services system calls for a target-machine application by forwarding them to the host machine -* [riscv-fesvr](https://github.com/riscv/riscv-fesvr/), the host side of -a simulation tether that services system calls on behalf of a target machine Several RISC-V tools that were previously maintained through this repository have since been upstreamed to their parent projects. Although this repository |