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2020-01-15Force DMI busy in all tests. (#235)Tim Newsome2-15/+44
This catches more corner cases where this may be a problem.
2020-01-09Smoke test virtual address translation support. (#233)Tim Newsome6-13/+231
* WIP * Smoke test virtual address support. Tests sv32, sv39, and sv48. Only explicitly tests 4K pages, but uses as large as possible pages to 1:1 map the rest of RAM so those sizes do get minimal coverage as well.
2019-12-18Hardcode misa values for all spike targets. (#227)Tim Newsome9-7/+27
`make` now takes 31s, `make all` takes 1m53s. The new CheckMisa test ensures that the misa value specified in the configuration is correct.
2019-12-18Tell people where to get software. (#226)Tim Newsome1-3/+9
2019-12-10Improve parallellism in debug test Makefile (#223)Tim Newsome2-15/+28
* Improve parallellism in debug test Makefile Now each test is an individual make target, so you can get the most out of however many cores you have. On my 12-core system, `make` went from 2m45s to 42s, and `make all` went from `3m25s` to `2m39s`. If you have few cores, this change may actually slow things down a bit, because ExamineTarget is run for every gdbserver.py invocation. * Remove test target.
2019-12-02Use a small binary to set up HiFive Unleashed. (#221)Tim Newsome3-10/+10
This binary comes from https://github.com/timsifive/freedom-u540-c000-bootloader/tree/board_setup2, which will hopefully be accepted upstream.
2019-11-22Move to Python 3. (#218)Tim Newsome4-75/+78
The impetus for this was mostly that after my Ubuntu upgrade, pylint suddenly starting to apply python3 rules, and I suppose it's time to adopt python 3 now that it's been released for more than a decade.
2019-10-15Add support to run all tests against HiFive Unleashed. (#212)Tim Newsome7-3/+191
* Parse inf/nan floats. * Enable mstatus.fs in SimpleF18Test Also accept "unable to fetch" message when FPRs aren't supported. * Add config files for HiFive Unleashed. * Add configs to flash HiFive Unleashed. All tests pass.
2019-10-09Remove ocd_ prefix. (#210)Tim Newsome4-4/+4
The latest OpenOCD doesn't need (nor support) this anymore.
2019-09-24Redo the debug README. (#205)Tim Newsome1-26/+19
Hopefully this is enough information that I can simply point people who submit OpenOCD changes to it, and they can run the tests themselves.
2019-09-24Look for binaries in $PATH. (#208)Tim Newsome1-7/+4
Instead of relying on $RISCV. Using $RISCV was common in the early days, but nowadays many tools are simply installed alongside the rest of the system.
2019-08-02Miscellaneous minor test improvements (#199)Tim Newsome4-19/+20
* Let the debugger enable mstatus.F if necessary. * Ignore (some) gdb debug output. * Increase timeout. * Make newer version of pylint happy.
2019-07-15Make tests work with RV32E targets. (#196)Tim Newsome5-27/+45
2019-07-15Use work area in spike-1 to cover CRC algorithm. (#195)Tim Newsome2-1/+6
2019-06-14Work better with mainline gdb (#192)Tim Newsome2-23/+46
* Parse floats the way mainline gdb prints them. For 64-bit floats, it shows both float and double results. Now more tests pass using mainline gdb. * Disable ANSI when talking to gdb. Helps more tests pass with mainline gdb. * Parse {float=...,double=...} in "info registers" Makes tests work better with mainline gdb.
2019-05-16Cover with/without halt groups. (#191)Tim Newsome5-12/+20
Also work with the new command line options that were renamed in https://github.com/riscv/riscv-isa-sim/pull/299
2019-04-08Test lack of abstract CSR access. (#187)Tim Newsome7-8/+14
2019-04-04Test simultaneous resume using hasel. (#186)Tim Newsome9-31/+51
Passes on spike and Arty. Won't merge until https://github.com/riscv/riscv-openocd/pull/364 merges.
2019-03-11Add SmpSimultaneousRunHalt test. (#181)Tim Newsome4-10/+89
This test confirms that in SMP configurations OpenOCD halts the harts near-simulatenously. (It'll also check for resume, but that's not implemented yet so commented out for now.)
2019-02-14Test `-rtos hwthread` (#178)Tim Newsome6-22/+81
* WIP * Use hwthread everywhere. * Test `-rtos hwthread`. Also tweak timeouts a bit so that we don't have ridiculous timeouts for simple operations. * Tweak timeouts so tests pass on a loaded system.
2019-01-25Merge pull request #175 from riscv/test_rtiCarsten Gosvig7-7/+17
Add testing of run-test/idle cases.
2019-01-07Fail on unsupported SREC type.Tim Newsome1-0/+2
2018-12-31Add testing of run-test/idle cases.Tim Newsome7-7/+17
2018-12-31Fix MemTestBlockTim Newsome1-20/+41
This test used to false pass on 64-bit targets because gdb doesn't like using Intel hex files on 64-bit targets.
2018-12-03Reduce download size a bit.Tim Newsome2-6/+9
Increase some timeouts in case memory access is slow.
2018-11-30Use more than 1KB for download test.Tim Newsome1-1/+1
This is a pretty old bug. I limited the size to 256KB because against spike my machine gets about 8KB/s, and I don't want to wait forever for `make` to pass.
2018-11-16Make pylint happy.Tim Newsome1-3/+6
2018-11-14Merge pull request #165 from riscv/flashTim Newsome7-18/+103
Tweak debug tests to run out of flash.
2018-11-14Cleanup and renamed test flag to invalid_memory_returns_zerocgsfv4-6/+6
2018-11-13Added MemTestBlockReadInvalid verifying the corresponding OpenOCD fixcgsfv4-2/+59
2018-11-12Simpler/more idiomatic way to keep string on stackTim Newsome1-4/+1
2018-10-31Add HiFive1-flash target configuration.Tim Newsome2-0/+59
2018-10-31Fix remaining tests to work from flash:Tim Newsome2-6/+17
TriggerDmode, ProgramHwWatchpoint, ProgramSwWatchpoint.
2018-10-29Almost all tests pass with HiFive1-flashTim Newsome2-4/+13
Only TriggerDmode still fails.
2018-10-29Tweak debug tests to run out of flash.Tim Newsome4-8/+17
Not all tests pass when run out of flash yet, but it's getting a lot closer. The ones still failing on HiFive1-flash are: DebugSymbols, Hwbp2, InstantHaltTest, TriggerDmode, TriggerLoadAddressInstant, and TriggerStoreAddressInstant.
2018-10-24Merge branch 'TriggerLoadAddressInstant'Tim Newsome1-12/+1
2018-10-24Re-enable TriggerStoreAddressInstantTim Newsome1-12/+1
Gdb and OpenOCD were fixed so we don't have to accept broken behavior anymore.
2018-10-05Make HwWatchpoint test fail on incorrect result.hw_watchpointTim Newsome3-7/+10
Also tiny cleanups, making pylint happy.
2018-10-03Added tests for hw and sw watchpointscgsfv3-0/+88
2018-09-13Assert if HiFive1 program is too large.Tim Newsome1-0/+2
2018-09-13Put debug test stack in data instead of textTim Newsome1-0/+1
2018-09-03Merge pull request #156 from riscv/PrivChangeTim Newsome1-27/+26
Reset address translation/perms before PrivChange
2018-08-31Fix CustomRegisterTest.Tim Newsome2-5/+6
gdb in riscv-tools doesn't automatically create a "custom" group like mainline gdb does.
2018-08-29Add test case for `riscv expose_custom`.Tim Newsome12-0/+55
Only works against spike, where I've implemented some custom debug registers to test against.
2018-08-28Reset address translation/perms before PrivChangeTim Newsome1-27/+26
We already did this for PrivTest. Hopefully solves #155, but I haven't been able to reproduce it.
2018-08-27Neuter TriggerStoreAddressInstantTim Newsome1-1/+13
Now that OpenOCD can tell gdb exactly which watchpoint was hit, this test exposes another problem: https://github.com/riscv/riscv-openocd/issues/295 For now neuter the test so the testsuite can still be useful.
2018-08-27Make pylint happy.Tim Newsome1-1/+2
2018-08-25Temporarily disabling PrivChange testAndrew Waterman1-22/+23
@timsifive we are debugging intermittent failures.
2018-08-23Make pylint happy with change d1d2d953b5016b465.Tim Newsome2-3/+4
2018-08-23Get all of the log into the final log fileTim Newsome1-6/+20
This allows me to see the final valgrind output on OpenOCD, so I can watch for memory leaks when using --server_cmd "valgrind --leak-check=full openocd".
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