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spike64-2.py
Age
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Author
Files
Lines
2021-10-05
Remove slen. (#360)
Tim Newsome
1
-11
/
+4
2020-12-14
Add tests for memory sampling feature. (#300)
Tim Newsome
1
-0
/
+1
2020-04-10
Change slen to a value that spike supports. (#271)
Tim Newsome
1
-1
/
+3
2020-02-14
Add tests for vector register access (#244)
Tim Newsome
1
-4
/
+5
2019-12-18
Hardcode misa values for all spike targets. (#227)
Tim Newsome
1
-1
/
+2
2019-08-02
Miscellaneous minor test improvements (#199)
Tim Newsome
1
-1
/
+3
2019-04-08
Test lack of abstract CSR access. (#187)
Tim Newsome
1
-1
/
+1
2019-04-04
Test simultaneous resume using hasel. (#186)
Tim Newsome
1
-2
/
+4
2018-12-31
Add testing of run-test/idle cases.
Tim Newsome
1
-1
/
+1
2018-08-29
Add test case for `riscv expose_custom`.
Tim Newsome
1
-0
/
+1
2017-12-27
Test FPRs that aren't XLEN in size.
Tim Newsome
1
-1
/
+1
2017-10-24
Increase dual-core RV64 timeouts.
Tim Newsome
1
-1
/
+1
2017-09-29
Fix tests to work in multi-gdb mode.
Tim Newsome
1
-1
/
+1
2017-09-21
Add coverage for single-core non-rtos OpenOCD.
Tim Newsome
1
-1
/
+1
2017-08-28
Increase remotetimeout for spike targets.
Tim Newsome
1
-0
/
+1
2017-08-28
Make pylint happy.
Tim Newsome
1
-1
/
+1
2017-08-28
Make the debug tests aware of multicore.
Tim Newsome
1
-0
/
+11