riscv-tests.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2016-05-25	Keep tohost/fromhost at deterministic address	Andrew Waterman	1	-2/+2
2016-05-02	Stop using tohost/fromhost registers	Andrew Waterman	1	-3/+11
2016-04-30	ERET -> xRET; new memory map	Andrew Waterman	1	-0/+92
2016-04-06	Don't use stats register; refer to uarch counters by number	Andrew Waterman	1	-10/+5
2016-03-14	Rework benchmarks to run in M-mode	Andrew Waterman	1	-3/+3
2015-07-02	Fix RV32 handling of syscall arguments	Andrew Waterman	1	-1/+1
2015-05-09	Update to privileged architecture version 1.7	Andrew Waterman	1	-4/+4
2015-04-21	Don't rely on reset values of MSTATUS_UA/SA	Andrew Waterman	1	-1/+1
2015-04-21	Fix benchmark compilation/execution on RV32	Andrew Waterman	1	-1/+1
2015-03-17	Merge [shm]call into ecall, [shm]ret into eret	Andrew Waterman	1	-1/+1
2015-03-12	Update to new privileged spec	Andrew Waterman	1	-1/+1
2015-01-09	Add LICENSE	Andrew Waterman	1	-0/+2
2014-12-15	Remove dependence on machine/syscall.h	Andrew Waterman	1	-1/+2
2014-12-13	Initialize static TLS for the benchmarks	Andrew Waterman	1	-0/+12
2014-12-03	Use new toolchain and calling convention	Andrew Waterman	1	-26/+18
2014-11-06	Fix build with riscv-gcc version 4.9	Andrew Waterman	1	-0/+1
2014-04-14	commit high-performance mm (scalar and vector versions)	Yunsup Lee	1	-2/+5
2014-04-07	Add radix sort benchmark	Andrew Waterman	1	-2/+1
2014-04-03	setStats in benchmarks now should set and unset the stats register. Also, rem...	Stephen Twigg	1	-1/+14
2014-02-11	Run benchmarks in user mode	Andrew Waterman	1	-18/+63
2014-02-06	Clean up benchmarks; support uarch-specific counters	Andrew Waterman	1	-49/+129
2013-11-25	Update benchmarks to new privileged ISA	Andrew Waterman	1	-6/+6
2013-08-23	Reflect changes to ISA	Andrew Waterman	1	-6/+6
2013-04-29	benchmarks initial commit	Yunsup Lee	1	-0/+265