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-rw-r--r--isa/rv64sv/ma_utsd.S10
1 files changed, 6 insertions, 4 deletions
diff --git a/isa/rv64sv/ma_utsd.S b/isa/rv64sv/ma_utsd.S
index 6bdfcd5..3b9e094 100644
--- a/isa/rv64sv/ma_utsd.S
+++ b/isa/rv64sv/ma_utsd.S
@@ -20,8 +20,9 @@ RVTEST_CODE_BEGIN
la a3,handler
mtpcr a3,cr3 # set exception handler
+ vsetcfg 32,0
li a3,4
- vvcfgivl a3,a3,32,0
+ vsetvl a3,a3
la a3, dest+1
vmsv vx1, a3
@@ -29,7 +30,7 @@ RVTEST_CODE_BEGIN
vf %lo(vtcode1)(a0)
la a3, dest+1
vsd vx1, a3
- fence.v.l
+ fence
vtcode1:
sw x2, 0(x1)
@@ -55,8 +56,9 @@ handler:
bne a3,a4,fail
# make sure vector unit has cleared out
+ vsetcfg 32,0
li a3,4
- vvcfgivl a3,a3,32,0
+ vsetvl a3,a3
la a3,src1
la a4,src2
@@ -66,7 +68,7 @@ handler:
vf %lo(vtcode2)(a0)
la a5,dest
vsd vx2,a5
- fence.v.l
+ fence
ld a1,0(a5)
li a2,5