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author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-10-10 12:04:58 -0700 |
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committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-10-10 12:04:58 -0700 |
commit | 57f2254feaf4e3595a5b6cce48ebcfbebaaa3c67 (patch) | |
tree | 9f09e5a22b797f06c528ac909caa2ec58f9df895 /isa/rv64sv/ma_utsd.S | |
parent | 8dd97c2e7af399bc04b9d132bd1f1a4bdbbfec57 (diff) | |
download | riscv-tests-57f2254feaf4e3595a5b6cce48ebcfbebaaa3c67.zip riscv-tests-57f2254feaf4e3595a5b6cce48ebcfbebaaa3c67.tar.gz riscv-tests-57f2254feaf4e3595a5b6cce48ebcfbebaaa3c67.tar.bz2 |
revamp hwacha tests
Diffstat (limited to 'isa/rv64sv/ma_utsd.S')
-rw-r--r-- | isa/rv64sv/ma_utsd.S | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/isa/rv64sv/ma_utsd.S b/isa/rv64sv/ma_utsd.S index 6bdfcd5..3b9e094 100644 --- a/isa/rv64sv/ma_utsd.S +++ b/isa/rv64sv/ma_utsd.S @@ -20,8 +20,9 @@ RVTEST_CODE_BEGIN la a3,handler mtpcr a3,cr3 # set exception handler + vsetcfg 32,0 li a3,4 - vvcfgivl a3,a3,32,0 + vsetvl a3,a3 la a3, dest+1 vmsv vx1, a3 @@ -29,7 +30,7 @@ RVTEST_CODE_BEGIN vf %lo(vtcode1)(a0) la a3, dest+1 vsd vx1, a3 - fence.v.l + fence vtcode1: sw x2, 0(x1) @@ -55,8 +56,9 @@ handler: bne a3,a4,fail # make sure vector unit has cleared out + vsetcfg 32,0 li a3,4 - vvcfgivl a3,a3,32,0 + vsetvl a3,a3 la a3,src1 la a4,src2 @@ -66,7 +68,7 @@ handler: vf %lo(vtcode2)(a0) la a5,dest vsd vx2,a5 - fence.v.l + fence ld a1,0(a5) li a2,5 |